* Sync with recent trunk (r52637).
[reactos.git] / boot / armllb / hw / omap3-zoom2 / hwlcd.c
1 /*
2 * PROJECT: ReactOS Boot Loader
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: boot/armllb/hw/omap3-zoom2/hwlcd.c
5 * PURPOSE: LLB LCD Routines for OMAP3 ZOOM2
6 * PROGRAMMERS: ReactOS Portable Systems Group
7 */
8
9 #include "precomp.h"
10
11 PUSHORT LlbHwVideoBuffer;
12
13 VOID
14 NTAPI
15 LlbHwOmap3LcdInitialize(VOID)
16 {
17 /*
18 * N.B. The following initialization sequence took about 12 months to figure
19 * out.
20 * This means if you are glancing at it and have no idea what on Earth
21 * could possibly be going on, this is *normal*.
22 * Just trust that this turns on the LCD.
23 * And be thankful all you ever have to worry about is Java and HTML.
24 */
25
26 /* Turn on the functional and interface clocks in the entire PER domain */
27 WRITE_REGISTER_ULONG(0x48005000, 0x3ffff); /* Functional clocks */
28 WRITE_REGISTER_ULONG(0x48005010, 0x3ffff); /* Interface clocks */
29
30 /* Now that GPIO Module 3 is on, send a reset to the LCD panel on GPIO 96 */
31 WRITE_REGISTER_ULONG(0x49054034, 0); /* FIXME: Enable all as output */
32 WRITE_REGISTER_ULONG(0x49054094, 0xffffffff); /* FIXME: Output on all gpios */
33
34 /* Now turn on the functional and interface clocks in the CORE domain */
35 WRITE_REGISTER_ULONG(0x48004a00, 0x03fffe29); /* Functional clocks */
36 WRITE_REGISTER_ULONG(0x48004a10, 0x3ffffffb); /* Interface clocks */
37
38 /* The HS I2C interface is now on, configure it */
39 WRITE_REGISTER_USHORT(0x48070024, 0x0); /* Disable I2c */
40 WRITE_REGISTER_USHORT(0x48070030, 0x17); /* Configure clock divider */
41 WRITE_REGISTER_USHORT(0x48070034, 0xd); /* Configure clock scaler */
42 WRITE_REGISTER_USHORT(0x48070038, 0xf); /* Configure clock scaler */
43 WRITE_REGISTER_USHORT(0x48070020, 0x215); /* Configure clocks and idle */
44 WRITE_REGISTER_USHORT(0x4807000c, 0x636f); /* Select wakeup bits */
45 WRITE_REGISTER_USHORT(0x48070014, 0x4343); /* Disable DMA */
46 WRITE_REGISTER_USHORT(0x48070024, 0x8000); /* Enable I2C */
47
48 /*
49 * Set the VPLL2 to cover all device groups instead of just P3.
50 * This essentially enables the VRRTC to power up the LCD panel.
51 */
52 LlbHwOmap3TwlWrite1(0x4B, 0x8E, 0xE0);
53
54 /* VPLL2 runs at 1.2V by default, so we need to reprogram to 1.8V for DVI */
55 LlbHwOmap3TwlWrite1(0x4B, 0x91, 0x05);
56
57 /* Set GPIO pin 7 on the TWL4030 as an output pin */
58 LlbHwOmap3TwlWrite1(0x49, 0x9B, 0x80);
59
60 /* Set GPIO pin 7 signal on the TWL4030 ON. This powers the LCD backlight */
61 LlbHwOmap3TwlWrite1(0x49, 0xA4, 0x80);
62
63 /* Now go on the McSPI interface and program it on for the channel */
64 WRITE_REGISTER_ULONG(0x48098010, 0x15);
65 WRITE_REGISTER_ULONG(0x48098020, 0x1);
66 WRITE_REGISTER_ULONG(0x48098028, 0x1);
67 WRITE_REGISTER_ULONG(0x4809802c, 0x112fdc);
68
69 /* Send the reset signal (R2 = 00h) to the NEC WVGA LCD Panel */
70 WRITE_REGISTER_ULONG(0x48098034, 0x1);
71 WRITE_REGISTER_ULONG(0x48098038, 0x20100);
72 WRITE_REGISTER_ULONG(0x48098034, 0x0);
73
74 /* Turn on the functional and interface clocks in the DSS domain */
75 WRITE_REGISTER_ULONG(0x48004e00, 0x5);
76 WRITE_REGISTER_ULONG(0x48004e10, 0x1);
77
78 /* Reset the Display Controller (DISPC) */
79 WRITE_REGISTER_ULONG(0x48050410, 0x00000005); // DISPC_SYSCONFIG
80
81 /* Set the frame buffer address */
82 WRITE_REGISTER_ULONG(0x48050480, 0x800A0000); // DISPC_GFX_BA0
83
84 /* Set resolution and RGB16 color mode */
85 WRITE_REGISTER_ULONG(0x4805048c, 0x01df031f); // DISPC_GFX_SIZE
86 WRITE_REGISTER_ULONG(0x480504a0, 0x0000000d); // DISPC_GFX_ATTRIBUTES
87
88 /* Set LCD timings (VSync and HSync), pixel clock, and LCD size */
89 WRITE_REGISTER_ULONG(0x4805046c, 0x00003000); // DISPC_POL_FREQ
90 WRITE_REGISTER_ULONG(0x48050470, 0x00010004); // DISPC_DIVISOR
91 WRITE_REGISTER_ULONG(0x48050464, 0x00300500); // DISPC_TIMING_H
92 WRITE_REGISTER_ULONG(0x48050468, 0x00400300); // DISPC_TIMING_V
93 WRITE_REGISTER_ULONG(0x4805047c, 0x01df031f); // DISPC_SIZE_LCD
94
95 /* Turn the LCD on */
96 WRITE_REGISTER_ULONG(0x48050440, 0x00018309); // DISPC_CONTROL
97 }
98
99 ULONG
100 NTAPI
101 LlbHwGetScreenWidth(VOID)
102 {
103 return 800;
104 }
105
106 ULONG
107 NTAPI
108 LlbHwGetScreenHeight(VOID)
109 {
110 return 480;
111 }
112
113 PVOID
114 NTAPI
115 LlbHwGetFrameBuffer(VOID)
116 {
117 return (PVOID)0x800A0000;
118 }
119
120 ULONG
121 NTAPI
122 LlbHwVideoCreateColor(IN ULONG Red,
123 IN ULONG Green,
124 IN ULONG Blue)
125 {
126 return (((Red >> 3) << 11)| ((Green >> 2) << 5)| ((Blue >> 3) << 0));
127 }
128
129 /* EOF */