boot/freeldr/freeldr/include/arch/pc/x86common.h

   1
   2 #ifndef HEX
   3 #define HEX(y) 0x##y
   4 #endif
   5
   6 /* Memory layout */
   7 //#ifdef _M_AMD64
   8 #define PML4_ADDRESS        HEX(1000) /* One page PML4 page table */
   9 #define PDP_ADDRESS         HEX(2000) /* One page PDP page table */
  10 #define PD_ADDRESS          HEX(3000) /* One page PD page table */
  11 //#endif
  12 #define BIOSCALLBUFFER      HEX(4000) /* Buffer to store temporary data for any Int386() call */
  13 #define STACK16ADDR         HEX(6F00) /* The 16-bit stack top will be at 0000:6F00 */
  14 #define BSS_START           HEX(6F00)
  15 #define STACKLOW            HEX(7000)
  16 #define STACKADDR           HEX(F000) /* The 32/64-bit stack top will be at 0000:F000, or 0xF000 */
  17 #define FREELDR_BASE        HEX(F800)
  18 #define FREELDR_PE_BASE    HEX(10000)
  19 #define DISKREADBUFFER     HEX(8E000) /* Buffer to store data read in from the disk via the BIOS */
  20 #define MEMORY_MARGIN      HEX(9C000) /* Highest usable address */
  21 /* 9F000- 9FFFF is reserved for the EBDA */
  22
  23 #define BIOSCALLBUFSEGMENT (BIOSCALLBUFFER/16) /* Buffer to store temporary data for any Int386() call */
  24 #define BIOSCALLBUFOFFSET   HEX(0000) /* Buffer to store temporary data for any Int386() call */
  25 #define BIOSCALLBUFSIZE     PAGE_SIZE /* max is sizeof(VESA_SVGA_INFO) = 512 */
  26 #define MAX_FREELDR_PE_SIZE (DISKREADBUFFER - FREELDR_PE_BASE)
  27 #define DISKREADBUFFER_SIZE (MEMORY_MARGIN - DISKREADBUFFER)
  28
  29 /* These addresses specify the realmode "BSS section" layout */
  30 #define BSS_RealModeEntry        (BSS_START +  0)
  31 #define BSS_CallbackReturn       (BSS_START +  4)
  32 #define BSS_RegisterSet          (BSS_START +  8) /* size = 40 */
  33 #define BSS_IntVector            (BSS_START + 52)
  34 #define BSS_PxeEntryPoint        (BSS_START + 56)
  35 #define BSS_PxeBufferSegment     (BSS_START + 60)
  36 #define BSS_PxeBufferOffset      (BSS_START + 64)
  37 #define BSS_PxeFunction          (BSS_START + 68)
  38 #define BSS_PxeResult            (BSS_START + 72)
  39 #define BSS_PnpBiosEntryPoint    (BSS_START + 76)
  40 #define BSS_PnpBiosDataSegment   (BSS_START + 80)
  41 #define BSS_PnpBiosBufferSegment (BSS_START + 84)
  42 #define BSS_PnpBiosBufferOffset  (BSS_START + 88)
  43 #define BSS_PnpNodeSize          (BSS_START + 92)
  44 #define BSS_PnpNodeCount         (BSS_START + 96)
  45 #define BSS_PnpNodeNumber        (BSS_START + 100)
  46 #define BSS_PnpResult            (BSS_START + 104)
  47 #define BSS_BootDrive            (BSS_START + 108) // 1 byte
  48 #define BSS_BootPartition        (BSS_START + 109) // 1 byte
  49
  50
  51 /* Realmode function IDs */
  52 #define FNID_Int386 0
  53 #define FNID_Reboot 1
  54 #define FNID_ChainLoadBiosBootSectorCode 2
  55 #define FNID_PxeCallApi 3
  56 #define FNID_PnpBiosGetDeviceNodeCount 4
  57 #define FNID_PnpBiosGetDeviceNode 5
  58 #define FNID_BootLinuxKernel 6
  59
  60 /* Flag Masks */
  61 #define CR0_PE_SET    HEX(00000001)    /* OR this value with CR0 to enable pmode */
  62 #define CR0_PE_CLR    HEX(FFFFFFFE)    /* AND this value with CR0 to disable pmode */
  63
  64 /* Defines needed for switching between real and protected mode */
  65 //#ifdef _M_IX86
  66 #define NULL_DESC    HEX(00)    /* NULL descriptor */
  67 #define PMODE_CS    HEX(08)    /* PMode code selector, base 0 limit 4g */
  68 #define PMODE_DS    HEX(10)    /* PMode data selector, base 0 limit 4g */
  69 #define RMODE_CS    HEX(18)    /* RMode code selector, base 0 limit 64k */
  70 #define RMODE_DS    HEX(20)    /* RMode data selector, base 0 limit 64k */
  71 //#else
  72 /* Long mode selectors */
  73 #define LMODE_CS HEX(10)
  74 #define LMODE_DS HEX(18)
  75 #define CMODE_CS HEX(30)
  76 //#endif
  77
  78 /* Makes "x" a global variable or label */
  79 #define EXTERN(x)    .global x; x: