Merge trunk HEAD (46152)
[reactos.git] / drivers / bus / acpi / include / actbl1.h
1 /******************************************************************************
2 *
3 * Name: actbl1.h - ACPI 1.0 tables
4 * $Revision: 1.1 $
5 *
6 *****************************************************************************/
7
8 /*
9 * Copyright (C) 2000, 2001 R. Byron Moore
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 */
25
26 #ifndef __ACTBL1_H__
27 #define __ACTBL1_H__
28
29 #pragma pack(1)
30
31 /*************************************/
32 /* ACPI Specification Rev 1.0 for */
33 /* the Root System Description Table */
34 /*************************************/
35 typedef struct
36 {
37 ACPI_TABLE_HEADER header; /* Table header */
38 u32 table_offset_entry [1]; /* Array of pointers to other */
39 /* ACPI tables */
40 } RSDT_DESCRIPTOR_REV1;
41
42
43 /***************************************/
44 /* ACPI Specification Rev 1.0 for */
45 /* the Firmware ACPI Control Structure */
46 /***************************************/
47 typedef struct
48 {
49 NATIVE_CHAR signature[4]; /* signature "FACS" */
50 u32 length; /* length of structure, in bytes */
51 u32 hardware_signature; /* hardware configuration signature */
52 u32 firmware_waking_vector; /* ACPI OS waking vector */
53 u32 global_lock; /* Global Lock */
54 u32 S4_bios_f : 1; /* Indicates if S4_bIOS support is present */
55 u32 reserved1 : 31; /* must be 0 */
56 u8 resverved3 [40]; /* reserved - must be zero */
57
58 } FACS_DESCRIPTOR_REV1;
59
60
61 /************************************/
62 /* ACPI Specification Rev 1.0 for */
63 /* the Fixed ACPI Description Table */
64 /************************************/
65 typedef struct
66 {
67 ACPI_TABLE_HEADER header; /* table header */
68 u32 firmware_ctrl; /* Physical address of FACS */
69 u32 dsdt; /* Physical address of DSDT */
70 u8 model; /* System Interrupt Model */
71 u8 reserved1; /* reserved */
72 u16 sci_int; /* System vector of SCI interrupt */
73 u32 smi_cmd; /* Port address of SMI command port */
74 u8 acpi_enable; /* value to write to smi_cmd to enable ACPI */
75 u8 acpi_disable; /* value to write to smi_cmd to disable ACPI */
76 u8 S4_bios_req; /* Value to write to SMI CMD to enter S4_bIOS state */
77 u8 reserved2; /* reserved - must be zero */
78 u32 pm1a_evt_blk; /* Port address of Power Mgt 1a Acpi_event Reg Blk */
79 u32 pm1b_evt_blk; /* Port address of Power Mgt 1b Acpi_event Reg Blk */
80 u32 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */
81 u32 pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */
82 u32 pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */
83 u32 pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */
84 u32 gpe0blk; /* Port addr of General Purpose Acpi_event 0 Reg Blk */
85 u32 gpe1_blk; /* Port addr of General Purpose Acpi_event 1 Reg Blk */
86 u8 pm1_evt_len; /* Byte Length of ports at pm1_x_evt_blk */
87 u8 pm1_cnt_len; /* Byte Length of ports at pm1_x_cnt_blk */
88 u8 pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */
89 u8 pm_tm_len; /* Byte Length of ports at pm_tm_blk */
90 u8 gpe0blk_len; /* Byte Length of ports at gpe0_blk */
91 u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */
92 u8 gpe1_base; /* offset in gpe model where gpe1 events start */
93 u8 reserved3; /* reserved */
94 u16 plvl2_lat; /* worst case HW latency to enter/exit C2 state */
95 u16 plvl3_lat; /* worst case HW latency to enter/exit C3 state */
96 u16 flush_size; /* Size of area read to flush caches */
97 u16 flush_stride; /* Stride used in flushing caches */
98 u8 duty_offset; /* bit location of duty cycle field in p_cnt reg */
99 u8 duty_width; /* bit width of duty cycle field in p_cnt reg */
100 u8 day_alrm; /* index to day-of-month alarm in RTC CMOS RAM */
101 u8 mon_alrm; /* index to month-of-year alarm in RTC CMOS RAM */
102 u8 century; /* index to century in RTC CMOS RAM */
103 u8 reserved4; /* reserved */
104 u8 reserved4a; /* reserved */
105 u8 reserved4b; /* reserved */
106 u32 wb_invd : 1; /* wbinvd instruction works properly */
107 u32 wb_invd_flush : 1; /* wbinvd flushes but does not invalidate */
108 u32 proc_c1 : 1; /* all processors support C1 state */
109 u32 plvl2_up : 1; /* C2 state works on MP system */
110 u32 pwr_button : 1; /* Power button is handled as a generic feature */
111 u32 sleep_button : 1; /* Sleep button is handled as a generic feature, or not present */
112 u32 fixed_rTC : 1; /* RTC wakeup stat not in fixed register space */
113 u32 rtcs4 : 1; /* RTC wakeup stat not possible from S4 */
114 u32 tmr_val_ext : 1; /* tmr_val is 32 bits */
115 u32 reserved5 : 23; /* reserved - must be zero */
116
117 } FADT_DESCRIPTOR_REV1;
118
119 #pragma pack()
120
121 #endif /* __ACTBL1_H__ */
122
123