15 #define TAG(A, B, C, D) (ULONG)(((A)<<0) + ((B)<<8) + ((C)<<16) + ((D)<<24))
16 #define TAG_ISAPNP TAG('I', 'P', 'N', 'P')
18 #define IO_RESOURCE_REQUIRED 0x00 //ROS Extension
20 #define ISAPNP_ADDRESS_PORT 0x0279 // ADDRESS (W)
21 #define ISAPNP_WRITE_PORT 0x0A79 // WRITE_DATA (W)
22 #define ISAPNP_MIN_READ_PORT 0x0203 // READ_DATA (R)
23 #define ISAPNP_MAX_READ_PORT 0x03FF // READ_DATA (R)
25 // Card control registers
26 #define ISAPNP_CARD_READ_DATA_PORT 0x00 // Set READ_DATA port
27 #define ISAPNP_CARD_ISOLATION 0x01 // Isolation
28 #define ISAPNP_CARD_CONFIG_COTROL 0x02 // Configuration control
29 #define ISAPNP_CARD_WAKECSN 0x03 // Wake[CSN]
30 #define ISAPNP_CARD_RESOUCE_DATA 0x04 // Resource data port
31 #define ISAPNP_CARD_STATUS 0x05 // Status port
32 #define ISAPNP_CARD_CSN 0x06 // Card Select Number port
33 #define ISAPNP_CARD_LOG_DEVICE_NUM 0x07 // Logical Device Number
34 #define ISAPNP_CARD_RESERVED 0x08 // Card level reserved
35 #define ISAPNP_CARD_VENDOR_DEFINED 0x20 // Vendor defined
37 // Logical device control registers
38 #define ISAPNP_CONTROL_ACTIVATE 0x30 // Activate logical device
39 #define ISAPNP_CONTROL_IO_RANGE_CHECK 0x31 // I/O range conflict check
40 #define ISAPNP_CONTROL_LDC_RESERVED 0x32 // Logical Device Control reserved
41 #define ISAPNP_CONTROL_LDCV_RESERVED 0x38 // Logical Device Control Vendor reserved
43 // Logical device configuration registers
44 #define ISAPNP_CONFIG_MEMORY_BASE2 0x00 // Memory base address bits 23-16
45 #define ISAPNP_CONFIG_MEMORY_BASE1 0x01 // Memory base address bits 15-8
46 #define ISAPNP_CONFIG_MEMORY_CONTROL 0x02 // Memory control
47 #define ISAPNP_CONFIG_MEMORY_LIMIT2 0x03 // Memory limit bits 23-16
48 #define ISAPNP_CONFIG_MEMORY_LIMIT1 0x04 // Memory limit bits 15-8
50 #define ISAPNP_CONFIG_MEMORY_DESC0 0x40 // Memory descriptor 0
51 #define ISAPNP_CONFIG_MEMORY_DESC1 0x48 // Memory descriptor 1
52 #define ISAPNP_CONFIG_MEMORY_DESC2 0x50 // Memory descriptor 2
53 #define ISAPNP_CONFIG_MEMORY_DESC3 0x58 // Memory descriptor 3
55 #define ISAPNP_CONFIG_MEMORY32_BASE3 0x00 // 32-bit memory base address bits 31-24
56 #define ISAPNP_CONFIG_MEMORY32_BASE2 0x01 // 32-bit memory base address bits 23-16
57 #define ISAPNP_CONFIG_MEMORY32_BASE1 0x01 // 32-bit memory base address bits 15-8
58 #define ISAPNP_CONFIG_MEMORY32_CONTROL 0x02 // 32-bit memory control
59 #define ISAPNP_CONFIG_MEMORY32_LIMIT3 0x03 // 32-bit memory limit bits 31-24
60 #define ISAPNP_CONFIG_MEMORY32_LIMIT2 0x04 // 32-bit memory limit bits 23-16
61 #define ISAPNP_CONFIG_MEMORY32_LIMIT1 0x05 // 32-bit memory limit bits 15-8
63 #define ISAPNP_CONFIG_MEMORY32_DESC0 0x76 // 32-bit memory descriptor 0
64 #define ISAPNP_CONFIG_MEMORY32_DESC1 0x80 // 32-bit memory descriptor 1
65 #define ISAPNP_CONFIG_MEMORY32_DESC2 0x90 // 32-bit memory descriptor 2
66 #define ISAPNP_CONFIG_MEMORY32_DESC3 0xA0 // 32-bit memory descriptor 3
68 #define ISAPNP_CONFIG_IO_BASE1 0x00 // I/O port base address bits 15-8
69 #define ISAPNP_CONFIG_IO_BASE0 0x01 // I/O port base address bits 7-0
71 #define ISAPNP_CONFIG_IO_DESC0 0x60 // I/O port descriptor 0
72 #define ISAPNP_CONFIG_IO_DESC1 0x62 // I/O port descriptor 1
73 #define ISAPNP_CONFIG_IO_DESC2 0x64 // I/O port descriptor 2
74 #define ISAPNP_CONFIG_IO_DESC3 0x66 // I/O port descriptor 3
75 #define ISAPNP_CONFIG_IO_DESC4 0x68 // I/O port descriptor 4
76 #define ISAPNP_CONFIG_IO_DESC5 0x6A // I/O port descriptor 5
77 #define ISAPNP_CONFIG_IO_DESC6 0x6C // I/O port descriptor 6
78 #define ISAPNP_CONFIG_IO_DESC7 0x6E // I/O port descriptor 7
80 #define ISAPNP_CONFIG_IRQ_LEVEL0 0x70 // Interupt level for descriptor 0
81 #define ISAPNP_CONFIG_IRQ_TYPE0 0x71 // Type level for descriptor 0
82 #define ISAPNP_CONFIG_IRQ_LEVEL1 0x72 // Interupt level for descriptor 1
83 #define ISAPNP_CONFIG_IRQ_TYPE1 0x73 // Type level for descriptor 1
85 #define ISAPNP_CONFIG_DMA_CHANNEL0 0x74 // DMA channel for descriptor 0
86 #define ISAPNP_CONFIG_DMA_CHANNEL1 0x75 // DMA channel for descriptor 1
89 typedef struct _PNPISA_SERIAL_ID
91 UCHAR VendorId
[4]; // Vendor Identifier
92 UCHAR SerialId
[4]; // Serial number
93 UCHAR Checksum
; // Checksum
94 } PNPISA_SERIAL_ID
, *PPNPISA_SERIAL_ID
;
97 #define ISAPNP_RES_PRIORITY_PREFERRED 0
98 #define ISAPNP_RES_PRIORITY_ACCEPTABLE 1
99 #define ISAPNP_RES_PRIORITY_FUNCTIONAL 2
100 #define ISAPNP_RES_PRIORITY_INVALID 65535
103 #define ISAPNP_RESOURCE_ITEM_TYPE 0x80 // 0 = small, 1 = large
105 // Small Resource Item Names (SRINs)
106 #define ISAPNP_SRIN_VERSION 0x1 // PnP version number
107 #define ISAPNP_SRIN_LDEVICE_ID 0x2 // Logical device id
108 #define ISAPNP_SRIN_CDEVICE_ID 0x3 // Compatible device id
109 #define ISAPNP_SRIN_IRQ_FORMAT 0x4 // IRQ format
110 #define ISAPNP_SRIN_DMA_FORMAT 0x5 // DMA format
111 #define ISAPNP_SRIN_START_DFUNCTION 0x6 // Start dependant function
112 #define ISAPNP_SRIN_END_DFUNCTION 0x7 // End dependant function
113 #define ISAPNP_SRIN_IO_DESCRIPTOR 0x8 // I/O port descriptor
114 #define ISAPNP_SRIN_FL_IO_DESCRIPOTOR 0x9 // Fixed location I/O port descriptor
115 #define ISAPNP_SRIN_VENDOR_DEFINED 0xE // Vendor defined
116 #define ISAPNP_SRIN_END_TAG 0xF // End tag
118 typedef struct _ISAPNP_SRI_VERSION
121 UCHAR Version
; // Packed BCD format version number
122 UCHAR VendorVersion
; // Vendor specific version number
123 } ISAPNP_SRI_VERSION
, *PISAPNP_SRI_VERSION
;
125 typedef struct _ISAPNP_SRI_LDEVICE_ID
128 USHORT DeviceId
; // Logical device id
129 USHORT VendorId
; // Manufacturer id
130 UCHAR Flags
; // Flags
131 } ISAPNP_SRI_LDEVICE_ID
, *PISAPNP_SRI_LDEVICE_ID
;
133 typedef struct _ISAPNP_SRI_CDEVICE_ID
136 USHORT DeviceId
; // Logical device id
137 USHORT VendorId
; // Manufacturer id
138 } ISAPNP_SRI_CDEVICE_ID
, *PISAPNP_SRI_CDEVICE_ID
;
140 typedef struct _ISAPNP_SRI_IRQ_FORMAT
143 USHORT Mask
; // IRQ mask (bit 0 = irq 0, etc.)
144 UCHAR Information
; // IRQ information
145 } ISAPNP_SRI_IRQ_FORMAT
, *PISAPNP_SRI_IRQ_FORMAT
;
147 typedef struct _ISAPNP_SRI_DMA_FORMAT
150 USHORT Mask
; // DMA channel mask (bit 0 = channel 0, etc.)
151 UCHAR Information
; // DMA information
152 } ISAPNP_SRI_DMA_FORMAT
, *PISAPNP_SRI_DMA_FORMAT
;
154 typedef struct _ISAPNP_SRI_START_DFUNCTION
157 } ISAPNP_SRI_START_DFUNCTION
, *PISAPNP_SRI_START_DFUNCTION
;
159 typedef struct _ISAPNP_SRI_END_DFUNCTION
162 } ISAPNP_SRI_END_DFUNCTION
, *PISAPNP_SRI_END_DFUNCTION
;
164 typedef struct _ISAPNP_SRI_IO_DESCRIPTOR
167 UCHAR Information
; // Information
168 USHORT RangeMinBase
; // Minimum base address
169 USHORT RangeMaxBase
; // Maximum base address
170 UCHAR Alignment
; // Base alignment
171 UCHAR RangeLength
; // Length of range
172 } ISAPNP_SRI_IO_DESCRIPTOR
, *PISAPNP_SRI_IO_DESCRIPTOR
;
174 typedef struct _ISAPNP_SRI_FL_IO_DESCRIPTOR
177 USHORT RangeBase
; // Range base address
178 UCHAR RangeLength
; // Length of range
179 } ISAPNP_SRI_FL_IO_DESCRIPTOR
, *PISAPNP_SRI_FL_IO_DESCRIPTOR
;
181 typedef struct _PISAPNP_SRI_VENDOR_DEFINED
184 UCHAR Reserved
[0]; // Vendor defined
185 } ISAPNP_SRI_VENDOR_DEFINED
, *PISAPNP_SRI_VENDOR_DEFINED
;
187 typedef struct _ISAPNP_SRI_END_TAG
190 UCHAR Checksum
; // Checksum
191 } ISAPNP_SRI_END_TAG
, *PISAPNP_SRI_END_TAG
;
194 typedef struct _ISAPNP_LRI
197 USHORT Length
; // Length of data items
198 } ISAPNP_LRI
, *PISAPNP_LRI
;
200 // Large Resource Item Names (LRINs)
201 #define ISAPNP_LRIN_MEMORY_RANGE 0x1 // Memory range descriptor
202 #define ISAPNP_LRIN_ID_STRING_ANSI 0x2 // Identifier string (ANSI)
203 #define ISAPNP_LRIN_ID_STRING_UNICODE 0x3 // Identifier string (UNICODE)
204 #define ISAPNP_LRIN_VENDOR_DEFINED 0x4 // Vendor defined
205 #define ISAPNP_LRIN_MEMORY_RANGE32 0x5 // 32-bit memory range descriptor
206 #define ISAPNP_LRIN_FL_MEMORY_RANGE32 0x6 // 32-bit fixed location memory range descriptor
208 typedef struct _ISAPNP_LRI_MEMORY_RANGE
211 USHORT Length
; // Length of data items
212 UCHAR Information
; // Information
213 USHORT RangeMinBase
; // Minimum base address
214 USHORT RangeMaxBase
; // Maximum base address
215 USHORT Alignment
; // Base alignment
216 USHORT RangeLength
; // Length of range
217 } ISAPNP_LRI_MEMORY_RANGE
, *PISAPNP_LRI_MEMORY_RANGE
;
219 typedef struct _ISAPNP_LRI_ID_STRING_ANSI
222 USHORT Length
; // Length of data items
223 UCHAR String
[0]; // Identifier string
224 } ISAPNP_LRI_ID_STRING_ANSI
, *PISAPNP_LRI_ID_STRING_ANSI
;
226 typedef struct _ISAPNP_LRI_ID_STRING_UNICODE
229 USHORT Length
; // Length of data items
230 USHORT CountryId
; // Country identifier
231 USHORT String
[0]; // Identifier string
232 } ISAPNP_LRI_ID_STRING_UNICODE
, *PISAPNP_LRI_ID_STRING_UNICODE
;
234 typedef struct _PISAPNP_LRI_VENDOR_DEFINED
237 USHORT Length
; // Length of data items
238 UCHAR Reserved
[0]; // Vendor defined
239 } ISAPNP_LRI_VENDOR_DEFINED
, *PISAPNP_LRI_VENDOR_DEFINED
;
241 typedef struct _ISAPNP_LRI_MEMORY_RANGE32
244 USHORT Length
; // Length of data items
245 UCHAR Information
; // Information
246 ULONG RangeMinBase
; // Minimum base address
247 ULONG RangeMaxBase
; // Maximum base address
248 ULONG Alignment
; // Base alignment
249 ULONG RangeLength
; // Length of range
250 } ISAPNP_LRI_MEMORY_RANGE32
, *PISAPNP_LRI_MEMORY_RANGE32
;
252 typedef struct _ISAPNP_LRI_FL_MEMORY_RANGE32
255 USHORT Length
; // Length of data items
256 UCHAR Information
; // Information
257 ULONG RangeMinBase
; // Minimum base address
258 ULONG RangeMaxBase
; // Maximum base address
259 ULONG RangeLength
; // Length of range
260 } ISAPNP_LRI_FL_MEMORY_RANGE32
, *PISAPNP_LRI_FL_MEMORY_RANGE32
;
262 typedef struct _ISAPNP_CARD
264 LIST_ENTRY ListEntry
;
270 UCHAR ProductVersion
;
272 LIST_ENTRY LogicalDevices
;
273 KSPIN_LOCK LogicalDevicesLock
;
274 } ISAPNP_CARD
, *PISAPNP_CARD
;
277 typedef struct _ISAPNP_DESCRIPTOR
279 LIST_ENTRY ListEntry
;
280 IO_RESOURCE_DESCRIPTOR Descriptor
;
281 } ISAPNP_DESCRIPTOR
, *PISAPNP_DESCRIPTOR
;
283 typedef struct _ISAPNP_CONFIGURATION_LIST
285 LIST_ENTRY ListEntry
;
288 } ISAPNP_CONFIGURATION_LIST
, *PISAPNP_CONFIGURATION_LIST
;
291 #define MAX_COMPATIBLE_ID 32
293 typedef struct _ISAPNP_LOGICAL_DEVICE
295 LIST_ENTRY CardListEntry
;
296 LIST_ENTRY DeviceListEntry
;
300 USHORT CVendorId
[MAX_COMPATIBLE_ID
];
301 USHORT CDeviceId
[MAX_COMPATIBLE_ID
];
306 PIO_RESOURCE_REQUIREMENTS_LIST ResourceLists
;
307 LIST_ENTRY Configuration
;
308 ULONG ConfigurationSize
;
309 ULONG DescriptorCount
;
310 ULONG CurrentDescriptorCount
;
311 } ISAPNP_LOGICAL_DEVICE
, *PISAPNP_LOGICAL_DEVICE
;
317 } ISAPNP_DEVICE_STATE
;
319 typedef struct _ISAPNP_DEVICE_EXTENSION
321 // Physical Device Object
323 // Lower device object
325 // List of ISA PnP cards managed by this driver
326 LIST_ENTRY CardListHead
;
327 // List of devices managed by this driver
328 LIST_ENTRY DeviceListHead
;
329 // Number of devices managed by this driver
330 ULONG DeviceListCount
;
331 // Spinlock for the linked lists
332 KSPIN_LOCK GlobalListLock
;
333 // Current state of the driver
334 ISAPNP_DEVICE_STATE State
;
335 } ISAPNP_DEVICE_EXTENSION
, *PISAPNP_DEVICE_EXTENSION
;
340 IN PDRIVER_OBJECT DriverObject
,
341 IN PUNICODE_STRING RegistryPath
);
347 #endif /* __ISAPNP_H */