Sync with trunk (r48545)
[reactos.git] / drivers / bus / pcix / pci.h
1 /*
2 * PROJECT: ReactOS PCI Bus Driver
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: drivers/bus/pci/pci.h
5 * PURPOSE: Main Header File
6 * PROGRAMMERS: ReactOS Portable Systems Group
7 */
8
9 #include <initguid.h>
10 #include <ntifs.h>
11 #include <ntagp.h>
12 #include <wdmguid.h>
13 #include <wchar.h>
14 #include <acpiioct.h>
15 #include <drivers/pci/pci.h>
16 #include <drivers/acpi/acpi.h>
17 #include "halfuncs.h"
18 #include "rtlfuncs.h"
19 #include "vffuncs.h"
20 #include "bugcodes.h"
21
22 //
23 // Tag used in all pool allocations (Pci Bus)
24 //
25 #define PCI_POOL_TAG 'BicP'
26
27 //
28 // Checks if the specified FDO is the FDO for the Root PCI Bus
29 //
30 #define PCI_IS_ROOT_FDO(x) ((x)->BusRootFdoExtension == x)
31
32 //
33 // Assertions to make sure we are dealing with the right kind of extension
34 //
35 #define ASSERT_FDO(x) ASSERT((x)->ExtensionType == PciFdoExtensionType);
36 #define ASSERT_PDO(x) ASSERT((x)->ExtensionType == PciPdoExtensionType);
37
38 //
39 // PCI Hack Entry Name Lengths
40 //
41 #define PCI_HACK_ENTRY_SIZE sizeof(L"VVVVdddd") - sizeof(UNICODE_NULL)
42 #define PCI_HACK_ENTRY_REV_SIZE sizeof(L"VVVVddddRR") - sizeof(UNICODE_NULL)
43 #define PCI_HACK_ENTRY_SUBSYS_SIZE sizeof(L"VVVVddddssssIIII") - sizeof(UNICODE_NULL)
44 #define PCI_HACK_ENTRY_FULL_SIZE sizeof(L"VVVVddddssssIIIIRR") - sizeof(UNICODE_NULL)
45
46 //
47 // PCI Hack Entry Flags
48 //
49 #define PCI_HACK_HAS_REVISION_INFO 0x01
50 #define PCI_HACK_HAS_SUBSYSTEM_INFO 0x02
51
52 //
53 // PCI Interface Flags
54 //
55 #define PCI_INTERFACE_PDO 0x01
56 #define PCI_INTERFACE_FDO 0x02
57 #define PCI_INTERFACE_ROOT 0x04
58
59 //
60 // PCI Skip Function Flags
61 //
62 #define PCI_SKIP_DEVICE_ENUMERATION 0x01
63 #define PCI_SKIP_RESOURCE_ENUMERATION 0x02
64
65 //
66 // PCI Apply Hack Flags
67 //
68 #define PCI_HACK_FIXUP_BEFORE_CONFIGURATION 0x00
69 #define PCI_HACK_FIXUP_AFTER_CONFIGURATION 0x01
70 #define PCI_HACK_FIXUP_BEFORE_UPDATE 0x03
71
72 //
73 // PCI Debugging Device Support
74 //
75 #define MAX_DEBUGGING_DEVICES_SUPPORTED 0x04
76
77 //
78 // PCI Driver Verifier Failures
79 //
80 #define PCI_VERIFIER_CODES 0x04
81
82 //
83 // Device Extension, Interface, Translator and Arbiter Signatures
84 //
85 typedef enum _PCI_SIGNATURE
86 {
87 PciPdoExtensionType = 'icP0',
88 PciFdoExtensionType = 'icP1',
89 PciArb_Io = 'icP2',
90 PciArb_Memory = 'icP3',
91 PciArb_Interrupt = 'icP4',
92 PciArb_BusNumber = 'icP5',
93 PciTrans_Interrupt = 'icP6',
94 PciInterface_BusHandler = 'icP7',
95 PciInterface_IntRouteHandler = 'icP8',
96 PciInterface_PciCb = 'icP9',
97 PciInterface_LegacyDeviceDetection = 'icP:',
98 PciInterface_PmeHandler = 'icP;',
99 PciInterface_DevicePresent = 'icP<',
100 PciInterface_NativeIde = 'icP=',
101 PciInterface_AgpTarget = 'icP>',
102 PciInterface_Location = 'icP?'
103 } PCI_SIGNATURE, *PPCI_SIGNATURE;
104
105 //
106 // Driver-handled PCI Device Types
107 //
108 typedef enum _PCI_DEVICE_TYPES
109 {
110 PciTypeInvalid,
111 PciTypeHostBridge,
112 PciTypePciBridge,
113 PciTypeCardbusBridge,
114 PciTypeDevice
115 } PCI_DEVICE_TYPES;
116
117 //
118 // Device Extension Logic States
119 //
120 typedef enum _PCI_STATE
121 {
122 PciNotStarted,
123 PciStarted,
124 PciDeleted,
125 PciStopped,
126 PciSurpriseRemoved,
127 PciSynchronizedOperation,
128 PciMaxObjectState
129 } PCI_STATE;
130
131 //
132 // IRP Dispatch Logic Style
133 //
134 typedef enum _PCI_DISPATCH_STYLE
135 {
136 IRP_COMPLETE,
137 IRP_DOWNWARD,
138 IRP_UPWARD,
139 IRP_DISPATCH,
140 } PCI_DISPATCH_STYLE;
141
142 //
143 // PCI Hack Entry Information
144 //
145 typedef struct _PCI_HACK_ENTRY
146 {
147 USHORT VendorID;
148 USHORT DeviceID;
149 USHORT SubVendorID;
150 USHORT SubSystemID;
151 ULONGLONG HackFlags;
152 USHORT RevisionID;
153 UCHAR Flags;
154 } PCI_HACK_ENTRY, *PPCI_HACK_ENTRY;
155
156 //
157 // Power State Information for Device Extension
158 //
159 typedef struct _PCI_POWER_STATE
160 {
161 SYSTEM_POWER_STATE CurrentSystemState;
162 DEVICE_POWER_STATE CurrentDeviceState;
163 SYSTEM_POWER_STATE SystemWakeLevel;
164 DEVICE_POWER_STATE DeviceWakeLevel;
165 DEVICE_POWER_STATE SystemStateMapping[7];
166 PIRP WaitWakeIrp;
167 PVOID SavedCancelRoutine;
168 LONG Paging;
169 LONG Hibernate;
170 LONG CrashDump;
171 } PCI_POWER_STATE, *PPCI_POWER_STATE;
172
173 //
174 // Internal PCI Lock Structure
175 //
176 typedef struct _PCI_LOCK
177 {
178 LONG Atom;
179 BOOLEAN OldIrql;
180 } PCI_LOCK, *PPCI_LOCK;
181
182 //
183 // Device Extension for a Bus FDO
184 //
185 typedef struct _PCI_FDO_EXTENSION
186 {
187 SINGLE_LIST_ENTRY List;
188 ULONG ExtensionType;
189 struct _PCI_MJ_DISPATCH_TABLE *IrpDispatchTable;
190 BOOLEAN DeviceState;
191 BOOLEAN TentativeNextState;
192 KEVENT SecondaryExtLock;
193 PDEVICE_OBJECT PhysicalDeviceObject;
194 PDEVICE_OBJECT FunctionalDeviceObject;
195 PDEVICE_OBJECT AttachedDeviceObject;
196 KEVENT ChildListLock;
197 struct _PCI_PDO_EXTENSION *ChildPdoList;
198 struct _PCI_FDO_EXTENSION *BusRootFdoExtension;
199 struct _PCI_FDO_EXTENSION *ParentFdoExtension;
200 struct _PCI_PDO_EXTENSION *ChildBridgePdoList;
201 PPCI_BUS_INTERFACE_STANDARD PciBusInterface;
202 BOOLEAN MaxSubordinateBus;
203 BUS_HANDLER *BusHandler;
204 BOOLEAN BaseBus;
205 BOOLEAN Fake;
206 BOOLEAN ChildDelete;
207 BOOLEAN Scanned;
208 BOOLEAN ArbitersInitialized;
209 BOOLEAN BrokenVideoHackApplied;
210 BOOLEAN Hibernated;
211 PCI_POWER_STATE PowerState;
212 SINGLE_LIST_ENTRY SecondaryExtension;
213 LONG ChildWaitWakeCount;
214 PPCI_COMMON_CONFIG PreservedConfig;
215 PCI_LOCK Lock;
216 struct
217 {
218 BOOLEAN Acquired;
219 BOOLEAN CacheLineSize;
220 BOOLEAN LatencyTimer;
221 BOOLEAN EnablePERR;
222 BOOLEAN EnableSERR;
223 } HotPlugParameters;
224 LONG BusHackFlags;
225 } PCI_FDO_EXTENSION, *PPCI_FDO_EXTENSION;
226
227 typedef struct _PCI_FUNCTION_RESOURCES
228 {
229 IO_RESOURCE_DESCRIPTOR Limit[7];
230 CM_PARTIAL_RESOURCE_DESCRIPTOR Current[7];
231 } PCI_FUNCTION_RESOURCES, *PPCI_FUNCTION_RESOURCES;
232
233 typedef union _PCI_HEADER_TYPE_DEPENDENT
234 {
235 struct
236 {
237 UCHAR Spare[4];
238 } type0;
239 struct
240 {
241 UCHAR PrimaryBus;
242 UCHAR SecondaryBus;
243 UCHAR SubordinateBus;
244 UCHAR SubtractiveDecode:1;
245 UCHAR IsaBitSet:1;
246 UCHAR VgaBitSet:1;
247 UCHAR WeChangedBusNumbers:1;
248 UCHAR IsaBitRequired:1;
249 } type1;
250 struct
251 {
252 UCHAR Spare[4];
253 } type2;
254 } PCI_HEADER_TYPE_DEPENDENT, *PPCI_HEADER_TYPE_DEPENDENT;
255
256 typedef struct _PCI_PDO_EXTENSION
257 {
258 PVOID Next;
259 ULONG ExtensionType;
260 struct _PCI_MJ_DISPATCH_TABLE *IrpDispatchTable;
261 BOOLEAN DeviceState;
262 BOOLEAN TentativeNextState;
263
264 KEVENT SecondaryExtLock;
265 PCI_SLOT_NUMBER Slot;
266 PDEVICE_OBJECT PhysicalDeviceObject;
267 PPCI_FDO_EXTENSION ParentFdoExtension;
268 SINGLE_LIST_ENTRY SecondaryExtension;
269 LONG BusInterfaceReferenceCount;
270 LONG AgpInterfaceReferenceCount;
271 USHORT VendorId;
272 USHORT DeviceId;
273 USHORT SubsystemVendorId;
274 USHORT SubsystemId;
275 BOOLEAN RevisionId;
276 BOOLEAN ProgIf;
277 BOOLEAN SubClass;
278 BOOLEAN BaseClass;
279 BOOLEAN AdditionalResourceCount;
280 BOOLEAN AdjustedInterruptLine;
281 BOOLEAN InterruptPin;
282 BOOLEAN RawInterruptLine;
283 BOOLEAN CapabilitiesPtr;
284 BOOLEAN SavedLatencyTimer;
285 BOOLEAN SavedCacheLineSize;
286 BOOLEAN HeaderType;
287 BOOLEAN NotPresent;
288 BOOLEAN ReportedMissing;
289 BOOLEAN ExpectedWritebackFailure;
290 BOOLEAN NoTouchPmeEnable;
291 BOOLEAN LegacyDriver;
292 BOOLEAN UpdateHardware;
293 BOOLEAN MovedDevice;
294 BOOLEAN DisablePowerDown;
295 BOOLEAN NeedsHotPlugConfiguration;
296 BOOLEAN SwitchedIDEToNativeMode;
297 BOOLEAN BIOSAllowsIDESwitchToNativeMode;
298 BOOLEAN IoSpaceUnderNativeIdeControl;
299 BOOLEAN OnDebugPath;
300 PCI_POWER_STATE PowerState;
301 PCI_HEADER_TYPE_DEPENDENT Dependent;
302 ULONGLONG HackFlags;
303 PCI_FUNCTION_RESOURCES *Resources;
304 PCI_FDO_EXTENSION *BridgeFdoExtension;
305 struct _PCI_PDO_EXTENSION *NextBridge;
306 struct _PCI_PDO_EXTENSION *NextHashEntry;
307 PCI_LOCK Lock;
308 PCI_PMC PowerCapabilities;
309 BOOLEAN TargetAgpCapabilityId;
310 USHORT CommandEnables;
311 USHORT InitialCommand;
312 } PCI_PDO_EXTENSION, *PPCI_PDO_EXTENSION;
313
314 //
315 // IRP Dispatch Function Type
316 //
317 typedef NTSTATUS (NTAPI *PCI_DISPATCH_FUNCTION)(
318 IN PIRP Irp,
319 IN PIO_STACK_LOCATION IoStackLocation,
320 IN PVOID DeviceExtension
321 );
322
323 //
324 // IRP Dispatch Minor Table
325 //
326 typedef struct _PCI_MN_DISPATCH_TABLE
327 {
328 PCI_DISPATCH_STYLE DispatchStyle;
329 PCI_DISPATCH_FUNCTION DispatchFunction;
330 } PCI_MN_DISPATCH_TABLE, *PPCI_MN_DISPATCH_TABLE;
331
332 //
333 // IRP Dispatch Major Table
334 //
335 typedef struct _PCI_MJ_DISPATCH_TABLE
336 {
337 ULONG PnpIrpMaximumMinorFunction;
338 PPCI_MN_DISPATCH_TABLE PnpIrpDispatchTable;
339 ULONG PowerIrpMaximumMinorFunction;
340 PPCI_MN_DISPATCH_TABLE PowerIrpDispatchTable;
341 PCI_DISPATCH_STYLE SystemControlIrpDispatchStyle;
342 PCI_DISPATCH_FUNCTION SystemControlIrpDispatchFunction;
343 PCI_DISPATCH_STYLE OtherIrpDispatchStyle;
344 PCI_DISPATCH_FUNCTION OtherIrpDispatchFunction;
345 } PCI_MJ_DISPATCH_TABLE, *PPCI_MJ_DISPATCH_TABLE;
346
347 //
348 // Generic PCI Interface Constructor and Initializer
349 //
350 struct _PCI_INTERFACE;
351 typedef NTSTATUS (NTAPI *PCI_INTERFACE_CONSTRUCTOR)(
352 IN PVOID DeviceExtension,
353 IN PVOID Instance,
354 IN PVOID InterfaceData,
355 IN USHORT Version,
356 IN USHORT Size,
357 IN PINTERFACE Interface
358 );
359
360 typedef NTSTATUS (NTAPI *PCI_INTERFACE_INITIALIZER)(
361 IN PVOID Instance
362 );
363
364 //
365 // Generic PCI Interface (Interface, Translator, Arbiter)
366 //
367 typedef struct _PCI_INTERFACE
368 {
369 CONST GUID *InterfaceType;
370 USHORT MinSize;
371 USHORT MinVersion;
372 USHORT MaxVersion;
373 USHORT Flags;
374 LONG ReferenceCount;
375 PCI_SIGNATURE Signature;
376 PCI_INTERFACE_CONSTRUCTOR Constructor;
377 PCI_INTERFACE_INITIALIZER Initializer;
378 } PCI_INTERFACE, *PPCI_INTERFACE;
379
380 //
381 // Generic Secondary Extension Instance Header (Interface, Translator, Arbiter)
382 //
383 typedef struct PCI_SECONDARY_EXTENSION
384 {
385 SINGLE_LIST_ENTRY List;
386 PCI_SIGNATURE ExtensionType;
387 PVOID Destructor;
388 } PCI_SECONDARY_EXTENSION, *PPCI_SECONDARY_EXTENSION;
389
390 //
391 // PCI Arbiter Instance
392 //
393 typedef struct PCI_ARBITER_INSTANCE
394 {
395 PCI_SECONDARY_EXTENSION Header;
396 PPCI_INTERFACE Interface;
397 PPCI_FDO_EXTENSION BusFdoExtension;
398 WCHAR InstanceName[24];
399 //ARBITER_INSTANCE CommonInstance; FIXME: Need Arbiter Headers
400 } PCI_ARBITER_INSTANCE, *PPCI_ARBITER_INSTANCE;
401
402 //
403 // PCI Verifier Data
404 //
405 typedef struct _PCI_VERIFIER_DATA
406 {
407 ULONG FailureCode;
408 VF_FAILURE_CLASS FailureClass;
409 ULONG AssertionControl;
410 PCHAR DebuggerMessageText;
411 } PCI_VERIFIER_DATA, *PPCI_VERIFIER_DATA;
412
413 //
414 // PCI Configuration Callbacks
415 //
416 struct _PCI_CONFIGURATOR_CONTEXT;
417
418 typedef VOID (NTAPI *PCI_CONFIGURATOR_INITIALIZE)(
419 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
420 );
421
422 typedef VOID (NTAPI *PCI_CONFIGURATOR_RESTORE_CURRENT)(
423 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
424 );
425
426 typedef VOID (NTAPI *PCI_CONFIGURATOR_SAVE_LIMITS)(
427 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
428 );
429
430 typedef VOID (NTAPI *PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS)(
431 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
432 );
433
434 typedef VOID (NTAPI *PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS)(
435 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
436 );
437
438 typedef VOID (NTAPI *PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS)(
439 IN struct _PCI_CONFIGURATOR_CONTEXT* Context,
440 IN PPCI_COMMON_HEADER PciData,
441 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
442 );
443
444 typedef VOID (NTAPI *PCI_CONFIGURATOR_RESET_DEVICE)(
445 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
446 );
447
448 //
449 // PCI Configurator
450 //
451 typedef struct _PCI_CONFIGURATOR
452 {
453 PCI_CONFIGURATOR_INITIALIZE Initialize;
454 PCI_CONFIGURATOR_RESTORE_CURRENT RestoreCurrent;
455 PCI_CONFIGURATOR_SAVE_LIMITS SaveLimits;
456 PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS SaveCurrentSettings;
457 PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS ChangeResourceSettings;
458 PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS GetAdditionalResourceDescriptors;
459 PCI_CONFIGURATOR_RESET_DEVICE ResetDevice;
460 } PCI_CONFIGURATOR, *PPCI_CONFIGURATOR;
461
462 //
463 // PCI Configurator Context
464 //
465 typedef struct _PCI_CONFIGURATOR_CONTEXT
466 {
467 PPCI_PDO_EXTENSION PdoExtension;
468 PPCI_COMMON_HEADER Current;
469 PPCI_COMMON_HEADER PciData;
470 PPCI_CONFIGURATOR Configurator;
471 USHORT SecondaryStatus;
472 USHORT Status;
473 USHORT Command;
474 } PCI_CONFIGURATOR_CONTEXT, *PPCI_CONFIGURATOR_CONTEXT;
475
476 //
477 // PCI IPI Function
478 //
479 typedef VOID (NTAPI *PCI_IPI_FUNCTION)(
480 IN PVOID Reserved,
481 IN PPCI_CONFIGURATOR_CONTEXT Context
482 );
483
484 //
485 // PCI IPI Context
486 //
487 typedef struct _PCI_IPI_CONTEXT
488 {
489 LONG RunCount;
490 ULONG Barrier;
491 PPCI_PDO_EXTENSION PdoExtension;
492 PCI_IPI_FUNCTION Function;
493 PVOID Context;
494 } PCI_IPI_CONTEXT, *PPCI_IPI_CONTEXT;
495
496 //
497 // IRP Dispatch Routines
498 //
499 NTSTATUS
500 NTAPI
501 PciDispatchIrp(
502 IN PDEVICE_OBJECT DeviceObject,
503 IN PIRP Irp
504 );
505
506 NTSTATUS
507 NTAPI
508 PciIrpNotSupported(
509 IN PIRP Irp,
510 IN PIO_STACK_LOCATION IoStackLocation,
511 IN PPCI_FDO_EXTENSION DeviceExtension
512 );
513
514 NTSTATUS
515 NTAPI
516 PciPassIrpFromFdoToPdo(
517 IN PPCI_FDO_EXTENSION DeviceExtension,
518 IN PIRP Irp
519 );
520
521 NTSTATUS
522 NTAPI
523 PciCallDownIrpStack(
524 IN PPCI_FDO_EXTENSION DeviceExtension,
525 IN PIRP Irp
526 );
527
528 NTSTATUS
529 NTAPI
530 PciIrpInvalidDeviceRequest(
531 IN PIRP Irp,
532 IN PIO_STACK_LOCATION IoStackLocation,
533 IN PPCI_FDO_EXTENSION DeviceExtension
534 );
535
536 //
537 // Power Routines
538 //
539 NTSTATUS
540 NTAPI
541 PciFdoWaitWake(
542 IN PIRP Irp,
543 IN PIO_STACK_LOCATION IoStackLocation,
544 IN PPCI_FDO_EXTENSION DeviceExtension
545 );
546
547 NTSTATUS
548 NTAPI
549 PciFdoSetPowerState(
550 IN PIRP Irp,
551 IN PIO_STACK_LOCATION IoStackLocation,
552 IN PPCI_FDO_EXTENSION DeviceExtension
553 );
554
555 NTSTATUS
556 NTAPI
557 PciFdoIrpQueryPower(
558 IN PIRP Irp,
559 IN PIO_STACK_LOCATION IoStackLocation,
560 IN PPCI_FDO_EXTENSION DeviceExtension
561 );
562
563 NTSTATUS
564 NTAPI
565 PciSetPowerManagedDevicePowerState(
566 IN PPCI_PDO_EXTENSION DeviceExtension,
567 IN DEVICE_POWER_STATE DeviceState,
568 IN BOOLEAN IrpSet
569 );
570
571 //
572 // Bus FDO Routines
573 //
574 NTSTATUS
575 NTAPI
576 PciAddDevice(
577 IN PDRIVER_OBJECT DriverObject,
578 IN PDEVICE_OBJECT PhysicalDeviceObject
579 );
580
581 NTSTATUS
582 NTAPI
583 PciFdoIrpStartDevice(
584 IN PIRP Irp,
585 IN PIO_STACK_LOCATION IoStackLocation,
586 IN PPCI_FDO_EXTENSION DeviceExtension
587 );
588
589 NTSTATUS
590 NTAPI
591 PciFdoIrpQueryRemoveDevice(
592 IN PIRP Irp,
593 IN PIO_STACK_LOCATION IoStackLocation,
594 IN PPCI_FDO_EXTENSION DeviceExtension
595 );
596
597 NTSTATUS
598 NTAPI
599 PciFdoIrpRemoveDevice(
600 IN PIRP Irp,
601 IN PIO_STACK_LOCATION IoStackLocation,
602 IN PPCI_FDO_EXTENSION DeviceExtension
603 );
604
605 NTSTATUS
606 NTAPI
607 PciFdoIrpCancelRemoveDevice(
608 IN PIRP Irp,
609 IN PIO_STACK_LOCATION IoStackLocation,
610 IN PPCI_FDO_EXTENSION DeviceExtension
611 );
612
613 NTSTATUS
614 NTAPI
615 PciFdoIrpStopDevice(
616 IN PIRP Irp,
617 IN PIO_STACK_LOCATION IoStackLocation,
618 IN PPCI_FDO_EXTENSION DeviceExtension
619 );
620
621 NTSTATUS
622 NTAPI
623 PciFdoIrpQueryStopDevice(
624 IN PIRP Irp,
625 IN PIO_STACK_LOCATION IoStackLocation,
626 IN PPCI_FDO_EXTENSION DeviceExtension
627 );
628
629 NTSTATUS
630 NTAPI
631 PciFdoIrpCancelStopDevice(
632 IN PIRP Irp,
633 IN PIO_STACK_LOCATION IoStackLocation,
634 IN PPCI_FDO_EXTENSION DeviceExtension
635 );
636
637 NTSTATUS
638 NTAPI
639 PciFdoIrpQueryDeviceRelations(
640 IN PIRP Irp,
641 IN PIO_STACK_LOCATION IoStackLocation,
642 IN PPCI_FDO_EXTENSION DeviceExtension
643 );
644
645 NTSTATUS
646 NTAPI
647 PciFdoIrpQueryInterface(
648 IN PIRP Irp,
649 IN PIO_STACK_LOCATION IoStackLocation,
650 IN PPCI_FDO_EXTENSION DeviceExtension
651 );
652
653 NTSTATUS
654 NTAPI
655 PciFdoIrpQueryCapabilities(
656 IN PIRP Irp,
657 IN PIO_STACK_LOCATION IoStackLocation,
658 IN PPCI_FDO_EXTENSION DeviceExtension
659 );
660
661 NTSTATUS
662 NTAPI
663 PciFdoIrpDeviceUsageNotification(
664 IN PIRP Irp,
665 IN PIO_STACK_LOCATION IoStackLocation,
666 IN PPCI_FDO_EXTENSION DeviceExtension
667 );
668
669 NTSTATUS
670 NTAPI
671 PciFdoIrpSurpriseRemoval(
672 IN PIRP Irp,
673 IN PIO_STACK_LOCATION IoStackLocation,
674 IN PPCI_FDO_EXTENSION DeviceExtension
675 );
676
677 NTSTATUS
678 NTAPI
679 PciFdoIrpQueryLegacyBusInformation(
680 IN PIRP Irp,
681 IN PIO_STACK_LOCATION IoStackLocation,
682 IN PPCI_FDO_EXTENSION DeviceExtension
683 );
684
685 //
686 // Device PDO Routines
687 //
688 NTSTATUS
689 NTAPI
690 PciPdoCreate(
691 IN PPCI_FDO_EXTENSION DeviceExtension,
692 IN PCI_SLOT_NUMBER Slot,
693 OUT PDEVICE_OBJECT *PdoDeviceObject
694 );
695
696 NTSTATUS
697 NTAPI
698 PciPdoWaitWake(
699 IN PIRP Irp,
700 IN PIO_STACK_LOCATION IoStackLocation,
701 IN PPCI_PDO_EXTENSION DeviceExtension
702 );
703
704 NTSTATUS
705 NTAPI
706 PciPdoSetPowerState(
707 IN PIRP Irp,
708 IN PIO_STACK_LOCATION IoStackLocation,
709 IN PPCI_PDO_EXTENSION DeviceExtension
710 );
711
712 NTSTATUS
713 NTAPI
714 PciPdoIrpQueryPower(
715 IN PIRP Irp,
716 IN PIO_STACK_LOCATION IoStackLocation,
717 IN PPCI_PDO_EXTENSION DeviceExtension
718 );
719
720 NTSTATUS
721 NTAPI
722 PciPdoIrpStartDevice(
723 IN PIRP Irp,
724 IN PIO_STACK_LOCATION IoStackLocation,
725 IN PPCI_PDO_EXTENSION DeviceExtension
726 );
727
728 NTSTATUS
729 NTAPI
730 PciPdoIrpQueryRemoveDevice(
731 IN PIRP Irp,
732 IN PIO_STACK_LOCATION IoStackLocation,
733 IN PPCI_PDO_EXTENSION DeviceExtension
734 );
735
736 NTSTATUS
737 NTAPI
738 PciPdoIrpRemoveDevice(
739 IN PIRP Irp,
740 IN PIO_STACK_LOCATION IoStackLocation,
741 IN PPCI_PDO_EXTENSION DeviceExtension
742 );
743
744 NTSTATUS
745 NTAPI
746 PciPdoIrpCancelRemoveDevice(
747 IN PIRP Irp,
748 IN PIO_STACK_LOCATION IoStackLocation,
749 IN PPCI_PDO_EXTENSION DeviceExtension
750 );
751
752 NTSTATUS
753 NTAPI
754 PciPdoIrpStopDevice(
755 IN PIRP Irp,
756 IN PIO_STACK_LOCATION IoStackLocation,
757 IN PPCI_PDO_EXTENSION DeviceExtension
758 );
759
760 NTSTATUS
761 NTAPI
762 PciPdoIrpQueryStopDevice(
763 IN PIRP Irp,
764 IN PIO_STACK_LOCATION IoStackLocation,
765 IN PPCI_PDO_EXTENSION DeviceExtension
766 );
767
768 NTSTATUS
769 NTAPI
770 PciPdoIrpCancelStopDevice(
771 IN PIRP Irp,
772 IN PIO_STACK_LOCATION IoStackLocation,
773 IN PPCI_PDO_EXTENSION DeviceExtension
774 );
775
776 NTSTATUS
777 NTAPI
778 PciPdoIrpQueryDeviceRelations(
779 IN PIRP Irp,
780 IN PIO_STACK_LOCATION IoStackLocation,
781 IN PPCI_PDO_EXTENSION DeviceExtension
782 );
783
784 NTSTATUS
785 NTAPI
786 PciPdoIrpQueryInterface(
787 IN PIRP Irp,
788 IN PIO_STACK_LOCATION IoStackLocation,
789 IN PPCI_PDO_EXTENSION DeviceExtension
790 );
791
792 NTSTATUS
793 NTAPI
794 PciPdoIrpQueryCapabilities(
795 IN PIRP Irp,
796 IN PIO_STACK_LOCATION IoStackLocation,
797 IN PPCI_PDO_EXTENSION DeviceExtension
798 );
799
800 NTSTATUS
801 NTAPI
802 PciPdoIrpQueryResources(
803 IN PIRP Irp,
804 IN PIO_STACK_LOCATION IoStackLocation,
805 IN PPCI_PDO_EXTENSION DeviceExtension
806 );
807
808 NTSTATUS
809 NTAPI
810 PciPdoIrpQueryResourceRequirements(
811 IN PIRP Irp,
812 IN PIO_STACK_LOCATION IoStackLocation,
813 IN PPCI_PDO_EXTENSION DeviceExtension
814 );
815
816 NTSTATUS
817 NTAPI
818 PciPdoIrpQueryDeviceText(
819 IN PIRP Irp,
820 IN PIO_STACK_LOCATION IoStackLocation,
821 IN PPCI_PDO_EXTENSION DeviceExtension
822 );
823
824 NTSTATUS
825 NTAPI
826 PciPdoIrpReadConfig(
827 IN PIRP Irp,
828 IN PIO_STACK_LOCATION IoStackLocation,
829 IN PPCI_PDO_EXTENSION DeviceExtension
830 );
831
832 NTSTATUS
833 NTAPI
834 PciPdoIrpWriteConfig(
835 IN PIRP Irp,
836 IN PIO_STACK_LOCATION IoStackLocation,
837 IN PPCI_PDO_EXTENSION DeviceExtension
838 );
839
840 NTSTATUS
841 NTAPI
842 PciPdoIrpQueryId(
843 IN PIRP Irp,
844 IN PIO_STACK_LOCATION IoStackLocation,
845 IN PPCI_PDO_EXTENSION DeviceExtension
846 );
847
848 NTSTATUS
849 NTAPI
850 PciPdoIrpQueryDeviceState(
851 IN PIRP Irp,
852 IN PIO_STACK_LOCATION IoStackLocation,
853 IN PPCI_PDO_EXTENSION DeviceExtension
854 );
855
856 NTSTATUS
857 NTAPI
858 PciPdoIrpQueryBusInformation(
859 IN PIRP Irp,
860 IN PIO_STACK_LOCATION IoStackLocation,
861 IN PPCI_PDO_EXTENSION DeviceExtension
862 );
863
864 NTSTATUS
865 NTAPI
866 PciPdoIrpDeviceUsageNotification(
867 IN PIRP Irp,
868 IN PIO_STACK_LOCATION IoStackLocation,
869 IN PPCI_PDO_EXTENSION DeviceExtension
870 );
871
872 NTSTATUS
873 NTAPI
874 PciPdoIrpSurpriseRemoval(
875 IN PIRP Irp,
876 IN PIO_STACK_LOCATION IoStackLocation,
877 IN PPCI_PDO_EXTENSION DeviceExtension
878 );
879
880 NTSTATUS
881 NTAPI
882 PciPdoIrpQueryLegacyBusInformation(
883 IN PIRP Irp,
884 IN PIO_STACK_LOCATION IoStackLocation,
885 IN PPCI_PDO_EXTENSION DeviceExtension
886 );
887
888
889 //
890 // HAL Callback/Hook Routines
891 //
892 VOID
893 NTAPI
894 PciHookHal(
895 VOID
896 );
897
898 //
899 // PCI Verifier Routines
900 //
901 VOID
902 NTAPI
903 PciVerifierInit(
904 IN PDRIVER_OBJECT DriverObject
905 );
906
907 PPCI_VERIFIER_DATA
908 NTAPI
909 PciVerifierRetrieveFailureData(
910 IN ULONG FailureCode
911 );
912
913 //
914 // Utility Routines
915 //
916 BOOLEAN
917 NTAPI
918 PciStringToUSHORT(
919 IN PWCHAR String,
920 OUT PUSHORT Value
921 );
922
923 BOOLEAN
924 NTAPI
925 PciIsDatacenter(
926 VOID
927 );
928
929 NTSTATUS
930 NTAPI
931 PciBuildDefaultExclusionLists(
932 VOID
933 );
934
935 BOOLEAN
936 NTAPI
937 PciUnicodeStringStrStr(
938 IN PUNICODE_STRING InputString,
939 IN PCUNICODE_STRING EqualString,
940 IN BOOLEAN CaseInSensitive
941 );
942
943 BOOLEAN
944 NTAPI
945 PciOpenKey(
946 IN PWCHAR KeyName,
947 IN HANDLE RootKey,
948 IN ACCESS_MASK DesiredAccess,
949 OUT PHANDLE KeyHandle,
950 OUT PNTSTATUS KeyStatus
951 );
952
953 NTSTATUS
954 NTAPI
955 PciGetRegistryValue(
956 IN PWCHAR ValueName,
957 IN PWCHAR KeyName,
958 IN HANDLE RootHandle,
959 IN ULONG Type,
960 OUT PVOID *OutputBuffer,
961 OUT PULONG OutputLength
962 );
963
964 PPCI_FDO_EXTENSION
965 NTAPI
966 PciFindParentPciFdoExtension(
967 IN PDEVICE_OBJECT DeviceObject,
968 IN PKEVENT Lock
969 );
970
971 VOID
972 NTAPI
973 PciInsertEntryAtTail(
974 IN PSINGLE_LIST_ENTRY ListHead,
975 IN PPCI_FDO_EXTENSION DeviceExtension,
976 IN PKEVENT Lock
977 );
978
979 NTSTATUS
980 NTAPI
981 PciGetDeviceProperty(
982 IN PDEVICE_OBJECT DeviceObject,
983 IN DEVICE_REGISTRY_PROPERTY DeviceProperty,
984 OUT PVOID *OutputBuffer
985 );
986
987 NTSTATUS
988 NTAPI
989 PciSendIoctl(
990 IN PDEVICE_OBJECT DeviceObject,
991 IN ULONG IoControlCode,
992 IN PVOID InputBuffer,
993 IN ULONG InputBufferLength,
994 IN PVOID OutputBuffer,
995 IN ULONG OutputBufferLength
996 );
997
998 VOID
999 NTAPI
1000 PcipLinkSecondaryExtension(
1001 IN PSINGLE_LIST_ENTRY List,
1002 IN PVOID Lock,
1003 IN PPCI_SECONDARY_EXTENSION SecondaryExtension,
1004 IN PCI_SIGNATURE ExtensionType,
1005 IN PVOID Destructor
1006 );
1007
1008 PPCI_SECONDARY_EXTENSION
1009 NTAPI
1010 PciFindNextSecondaryExtension(
1011 IN PSINGLE_LIST_ENTRY ListHead,
1012 IN PCI_SIGNATURE ExtensionType
1013 );
1014
1015 ULONGLONG
1016 NTAPI
1017 PciGetHackFlags(
1018 IN USHORT VendorId,
1019 IN USHORT DeviceId,
1020 IN USHORT SubVendorId,
1021 IN USHORT SubSystemId,
1022 IN UCHAR RevisionId
1023 );
1024
1025 PPCI_PDO_EXTENSION
1026 NTAPI
1027 PciFindPdoByFunction(
1028 IN PPCI_FDO_EXTENSION DeviceExtension,
1029 IN ULONG FunctionNumber,
1030 IN PPCI_COMMON_HEADER PciData
1031 );
1032
1033 BOOLEAN
1034 NTAPI
1035 PciIsCriticalDeviceClass(
1036 IN UCHAR BaseClass,
1037 IN UCHAR SubClass
1038 );
1039
1040 BOOLEAN
1041 NTAPI
1042 PciIsDeviceOnDebugPath(
1043 IN PPCI_PDO_EXTENSION DeviceExtension
1044 );
1045
1046 NTSTATUS
1047 NTAPI
1048 PciGetBiosConfig(
1049 IN PPCI_PDO_EXTENSION DeviceExtension,
1050 OUT PPCI_COMMON_HEADER PciData
1051 );
1052
1053 NTSTATUS
1054 NTAPI
1055 PciSaveBiosConfig(
1056 IN PPCI_PDO_EXTENSION DeviceExtension,
1057 OUT PPCI_COMMON_HEADER PciData
1058 );
1059
1060 UCHAR
1061 NTAPI
1062 PciReadDeviceCapability(
1063 IN PPCI_PDO_EXTENSION DeviceExtension,
1064 IN UCHAR Offset,
1065 IN ULONG CapabilityId,
1066 OUT PPCI_CAPABILITIES_HEADER Buffer,
1067 IN ULONG Length
1068 );
1069
1070 BOOLEAN
1071 NTAPI
1072 PciCanDisableDecodes(
1073 IN PPCI_PDO_EXTENSION DeviceExtension,
1074 IN PPCI_COMMON_HEADER Config,
1075 IN ULONGLONG HackFlags,
1076 IN BOOLEAN ForPowerDown
1077 );
1078
1079 PCI_DEVICE_TYPES
1080 NTAPI
1081 PciClassifyDeviceType(
1082 IN PPCI_PDO_EXTENSION PdoExtension
1083 );
1084
1085 ULONG_PTR
1086 NTAPI
1087 PciExecuteCriticalSystemRoutine(
1088 IN ULONG_PTR IpiContext
1089 );
1090
1091 BOOLEAN
1092 NTAPI
1093 PciCreateIoDescriptorFromBarLimit(
1094 PIO_RESOURCE_DESCRIPTOR ResourceDescriptor,
1095 IN PULONG BarArray,
1096 IN BOOLEAN Rom
1097 );
1098
1099 BOOLEAN
1100 NTAPI
1101 PciIsSlotPresentInParentMethod(
1102 IN PPCI_PDO_EXTENSION PdoExtension,
1103 IN ULONG Method
1104 );
1105
1106 VOID
1107 NTAPI
1108 PciDecodeEnable(
1109 IN PPCI_PDO_EXTENSION PdoExtension,
1110 IN BOOLEAN Enable,
1111 OUT PUSHORT Command
1112 );
1113
1114 //
1115 // Configuration Routines
1116 //
1117 NTSTATUS
1118 NTAPI
1119 PciGetConfigHandlers(
1120 IN PPCI_FDO_EXTENSION FdoExtension
1121 );
1122
1123 VOID
1124 NTAPI
1125 PciReadSlotConfig(
1126 IN PPCI_FDO_EXTENSION DeviceExtension,
1127 IN PCI_SLOT_NUMBER Slot,
1128 IN PVOID Buffer,
1129 IN ULONG Offset,
1130 IN ULONG Length
1131 );
1132
1133 VOID
1134 NTAPI
1135 PciWriteDeviceConfig(
1136 IN PPCI_PDO_EXTENSION DeviceExtension,
1137 IN PVOID Buffer,
1138 IN ULONG Offset,
1139 IN ULONG Length
1140 );
1141
1142 VOID
1143 NTAPI
1144 PciReadDeviceConfig(
1145 IN PPCI_PDO_EXTENSION DeviceExtension,
1146 IN PVOID Buffer,
1147 IN ULONG Offset,
1148 IN ULONG Length
1149 );
1150
1151 UCHAR
1152 NTAPI
1153 PciGetAdjustedInterruptLine(
1154 IN PPCI_PDO_EXTENSION PdoExtension
1155 );
1156
1157 //
1158 // State Machine Logic Transition Routines
1159 //
1160 VOID
1161 NTAPI
1162 PciInitializeState(
1163 IN PPCI_FDO_EXTENSION DeviceExtension
1164 );
1165
1166 NTSTATUS
1167 NTAPI
1168 PciBeginStateTransition(
1169 IN PPCI_FDO_EXTENSION DeviceExtension,
1170 IN PCI_STATE NewState
1171 );
1172
1173 NTSTATUS
1174 NTAPI
1175 PciCancelStateTransition(
1176 IN PPCI_FDO_EXTENSION DeviceExtension,
1177 IN PCI_STATE NewState
1178 );
1179
1180 VOID
1181 NTAPI
1182 PciCommitStateTransition(
1183 IN PPCI_FDO_EXTENSION DeviceExtension,
1184 IN PCI_STATE NewState
1185 );
1186
1187 //
1188 // Arbiter Support
1189 //
1190 NTSTATUS
1191 NTAPI
1192 PciInitializeArbiters(
1193 IN PPCI_FDO_EXTENSION FdoExtension
1194 );
1195
1196 NTSTATUS
1197 NTAPI
1198 PciInitializeArbiterRanges(
1199 IN PPCI_FDO_EXTENSION DeviceExtension,
1200 IN PCM_RESOURCE_LIST Resources
1201 );
1202
1203 //
1204 // Debug Helpers
1205 //
1206 BOOLEAN
1207 NTAPI
1208 PciDebugIrpDispatchDisplay(
1209 IN PIO_STACK_LOCATION IoStackLocation,
1210 IN PPCI_FDO_EXTENSION DeviceExtension,
1211 IN USHORT MaxMinor
1212 );
1213
1214 VOID
1215 NTAPI
1216 PciDebugDumpCommonConfig(
1217 IN PPCI_COMMON_HEADER PciData
1218 );
1219
1220 //
1221 // Interface Support
1222 //
1223 NTSTATUS
1224 NTAPI
1225 PciQueryInterface(
1226 IN PPCI_FDO_EXTENSION DeviceExtension,
1227 IN CONST GUID* InterfaceType,
1228 IN ULONG Size,
1229 IN ULONG Version,
1230 IN PVOID InterfaceData,
1231 IN PINTERFACE Interface,
1232 IN BOOLEAN LastChance
1233 );
1234
1235 NTSTATUS
1236 NTAPI
1237 PciPmeInterfaceInitializer(
1238 IN PVOID Instance
1239 );
1240
1241 NTSTATUS
1242 NTAPI
1243 routeintrf_Initializer(
1244 IN PVOID Instance
1245 );
1246
1247 NTSTATUS
1248 NTAPI
1249 arbusno_Initializer(
1250 IN PVOID Instance
1251 );
1252
1253 NTSTATUS
1254 NTAPI
1255 agpintrf_Initializer(
1256 IN PVOID Instance
1257 );
1258
1259 NTSTATUS
1260 NTAPI
1261 tranirq_Initializer(
1262 IN PVOID Instance
1263 );
1264
1265 NTSTATUS
1266 NTAPI
1267 busintrf_Initializer(
1268 IN PVOID Instance
1269 );
1270
1271 NTSTATUS
1272 NTAPI
1273 armem_Initializer(
1274 IN PVOID Instance
1275 );
1276
1277 NTSTATUS
1278 NTAPI
1279 ario_Initializer(
1280 IN PVOID Instance
1281 );
1282
1283 NTSTATUS
1284 NTAPI
1285 locintrf_Initializer(
1286 IN PVOID Instance
1287 );
1288
1289 NTSTATUS
1290 NTAPI
1291 pcicbintrf_Initializer(
1292 IN PVOID Instance
1293 );
1294
1295 NTSTATUS
1296 NTAPI
1297 lddintrf_Initializer(
1298 IN PVOID Instance
1299 );
1300
1301 NTSTATUS
1302 NTAPI
1303 devpresent_Initializer(
1304 IN PVOID Instance
1305 );
1306
1307 NTSTATUS
1308 NTAPI
1309 agpintrf_Constructor(
1310 IN PVOID DeviceExtension,
1311 IN PVOID Instance,
1312 IN PVOID InterfaceData,
1313 IN USHORT Version,
1314 IN USHORT Size,
1315 IN PINTERFACE Interface
1316 );
1317
1318 NTSTATUS
1319 NTAPI
1320 arbusno_Constructor(
1321 IN PVOID DeviceExtension,
1322 IN PVOID Instance,
1323 IN PVOID InterfaceData,
1324 IN USHORT Version,
1325 IN USHORT Size,
1326 IN PINTERFACE Interface
1327 );
1328
1329 NTSTATUS
1330 NTAPI
1331 tranirq_Constructor(
1332 IN PVOID DeviceExtension,
1333 IN PVOID Instance,
1334 IN PVOID InterfaceData,
1335 IN USHORT Version,
1336 IN USHORT Size,
1337 IN PINTERFACE Interface
1338 );
1339
1340 NTSTATUS
1341 NTAPI
1342 armem_Constructor(
1343 IN PVOID DeviceExtension,
1344 IN PVOID Instance,
1345 IN PVOID InterfaceData,
1346 IN USHORT Version,
1347 IN USHORT Size,
1348 IN PINTERFACE Interface
1349 );
1350
1351 NTSTATUS
1352 NTAPI
1353 busintrf_Constructor(
1354 IN PVOID DeviceExtension,
1355 IN PVOID Instance,
1356 IN PVOID InterfaceData,
1357 IN USHORT Version,
1358 IN USHORT Size,
1359 IN PINTERFACE Interface
1360 );
1361
1362 NTSTATUS
1363 NTAPI
1364 ario_Constructor(
1365 IN PVOID DeviceExtension,
1366 IN PVOID Instance,
1367 IN PVOID InterfaceData,
1368 IN USHORT Version,
1369 IN USHORT Size,
1370 IN PINTERFACE Interface
1371 );
1372
1373 VOID
1374 NTAPI
1375 ario_ApplyBrokenVideoHack(
1376 IN PPCI_FDO_EXTENSION FdoExtension
1377 );
1378
1379 NTSTATUS
1380 NTAPI
1381 pcicbintrf_Constructor(
1382 IN PVOID DeviceExtension,
1383 IN PVOID Instance,
1384 IN PVOID InterfaceData,
1385 IN USHORT Version,
1386 IN USHORT Size,
1387 IN PINTERFACE Interface
1388 );
1389
1390 NTSTATUS
1391 NTAPI
1392 lddintrf_Constructor(
1393 IN PVOID DeviceExtension,
1394 IN PVOID Instance,
1395 IN PVOID InterfaceData,
1396 IN USHORT Version,
1397 IN USHORT Size,
1398 IN PINTERFACE Interface
1399 );
1400
1401 NTSTATUS
1402 NTAPI
1403 locintrf_Constructor(
1404 IN PVOID DeviceExtension,
1405 IN PVOID Instance,
1406 IN PVOID InterfaceData,
1407 IN USHORT Version,
1408 IN USHORT Size,
1409 IN PINTERFACE Interface
1410 );
1411
1412 NTSTATUS
1413 NTAPI
1414 PciPmeInterfaceConstructor(
1415 IN PVOID DeviceExtension,
1416 IN PVOID Instance,
1417 IN PVOID InterfaceData,
1418 IN USHORT Version,
1419 IN USHORT Size,
1420 IN PINTERFACE Interface
1421 );
1422
1423 NTSTATUS
1424 NTAPI
1425 routeintrf_Constructor(
1426 IN PVOID DeviceExtension,
1427 IN PVOID Instance,
1428 IN PVOID InterfaceData,
1429 IN USHORT Version,
1430 IN USHORT Size,
1431 IN PINTERFACE Interface
1432 );
1433
1434 NTSTATUS
1435 NTAPI
1436 devpresent_Constructor(
1437 IN PVOID DeviceExtension,
1438 IN PVOID Instance,
1439 IN PVOID InterfaceData,
1440 IN USHORT Version,
1441 IN USHORT Size,
1442 IN PINTERFACE Interface
1443 );
1444
1445 //
1446 // PCI Enumeration and Resources
1447 //
1448 NTSTATUS
1449 NTAPI
1450 PciQueryDeviceRelations(
1451 IN PPCI_FDO_EXTENSION DeviceExtension,
1452 IN OUT PDEVICE_RELATIONS *pDeviceRelations
1453 );
1454
1455 //
1456 // Identification Functions
1457 //
1458 PWCHAR
1459 NTAPI
1460 PciGetDeviceDescriptionMessage(
1461 IN UCHAR BaseClass,
1462 IN UCHAR SubClass
1463 );
1464
1465 //
1466 // CardBUS Support
1467 //
1468 VOID
1469 NTAPI
1470 Cardbus_MassageHeaderForLimitsDetermination(
1471 IN PPCI_CONFIGURATOR_CONTEXT Context
1472 );
1473
1474 VOID
1475 NTAPI
1476 Cardbus_SaveCurrentSettings(
1477 IN PPCI_CONFIGURATOR_CONTEXT Context
1478 );
1479
1480 VOID
1481 NTAPI
1482 Cardbus_SaveLimits(
1483 IN PPCI_CONFIGURATOR_CONTEXT Context
1484 );
1485
1486 VOID
1487 NTAPI
1488 Cardbus_RestoreCurrent(
1489 IN PPCI_CONFIGURATOR_CONTEXT Context
1490 );
1491
1492 VOID
1493 NTAPI
1494 Cardbus_GetAdditionalResourceDescriptors(
1495 IN PPCI_CONFIGURATOR_CONTEXT Context,
1496 IN PPCI_COMMON_HEADER PciData,
1497 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1498 );
1499
1500 VOID
1501 NTAPI
1502 Cardbus_ResetDevice(
1503 IN PPCI_CONFIGURATOR_CONTEXT Context
1504 );
1505
1506 VOID
1507 NTAPI
1508 Cardbus_ChangeResourceSettings(
1509 IN PPCI_CONFIGURATOR_CONTEXT Context
1510 );
1511
1512 //
1513 // PCI Device Support
1514 //
1515 VOID
1516 NTAPI
1517 Device_MassageHeaderForLimitsDetermination(
1518 IN PPCI_CONFIGURATOR_CONTEXT Context
1519 );
1520
1521 VOID
1522 NTAPI
1523 Device_SaveCurrentSettings(
1524 IN PPCI_CONFIGURATOR_CONTEXT Context
1525 );
1526
1527 VOID
1528 NTAPI
1529 Device_SaveLimits(
1530 IN PPCI_CONFIGURATOR_CONTEXT Context
1531 );
1532
1533 VOID
1534 NTAPI
1535 Device_RestoreCurrent(
1536 IN PPCI_CONFIGURATOR_CONTEXT Context
1537 );
1538
1539 VOID
1540 NTAPI
1541 Device_GetAdditionalResourceDescriptors(
1542 IN PPCI_CONFIGURATOR_CONTEXT Context,
1543 IN PPCI_COMMON_HEADER PciData,
1544 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1545 );
1546
1547 VOID
1548 NTAPI
1549 Device_ResetDevice(
1550 IN PPCI_CONFIGURATOR_CONTEXT Context
1551 );
1552
1553 VOID
1554 NTAPI
1555 Device_ChangeResourceSettings(
1556 IN PPCI_CONFIGURATOR_CONTEXT Context
1557 );
1558
1559 //
1560 // PCI-to-PCI Bridge Device Support
1561 //
1562 VOID
1563 NTAPI
1564 PPBridge_MassageHeaderForLimitsDetermination(
1565 IN PPCI_CONFIGURATOR_CONTEXT Context
1566 );
1567
1568 VOID
1569 NTAPI
1570 PPBridge_SaveCurrentSettings(
1571 IN PPCI_CONFIGURATOR_CONTEXT Context
1572 );
1573
1574 VOID
1575 NTAPI
1576 PPBridge_SaveLimits(
1577 IN PPCI_CONFIGURATOR_CONTEXT Context
1578 );
1579
1580 VOID
1581 NTAPI
1582 PPBridge_RestoreCurrent(
1583 IN PPCI_CONFIGURATOR_CONTEXT Context
1584 );
1585
1586 VOID
1587 NTAPI
1588 PPBridge_GetAdditionalResourceDescriptors(
1589 IN PPCI_CONFIGURATOR_CONTEXT Context,
1590 IN PPCI_COMMON_HEADER PciData,
1591 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1592 );
1593
1594 VOID
1595 NTAPI
1596 PPBridge_ResetDevice(
1597 IN PPCI_CONFIGURATOR_CONTEXT Context
1598 );
1599
1600 VOID
1601 NTAPI
1602 PPBridge_ChangeResourceSettings(
1603 IN PPCI_CONFIGURATOR_CONTEXT Context
1604 );
1605
1606 //
1607 // External Resources
1608 //
1609 extern SINGLE_LIST_ENTRY PciFdoExtensionListHead;
1610 extern KEVENT PciGlobalLock;
1611 extern PPCI_INTERFACE PciInterfaces[];
1612 extern PCI_INTERFACE ArbiterInterfaceBusNumber;
1613 extern PCI_INTERFACE ArbiterInterfaceMemory;
1614 extern PCI_INTERFACE ArbiterInterfaceIo;
1615 extern PCI_INTERFACE BusHandlerInterface;
1616 extern PCI_INTERFACE PciRoutingInterface;
1617 extern PCI_INTERFACE PciCardbusPrivateInterface;
1618 extern PCI_INTERFACE PciLegacyDeviceDetectionInterface;
1619 extern PCI_INTERFACE PciPmeInterface;
1620 extern PCI_INTERFACE PciDevicePresentInterface;
1621 //extern PCI_INTERFACE PciNativeIdeInterface;
1622 extern PCI_INTERFACE PciLocationInterface;
1623 extern PCI_INTERFACE AgpTargetInterface;
1624 extern PCI_INTERFACE TranslatorInterfaceInterrupt;
1625 extern PDRIVER_OBJECT PciDriverObject;
1626 extern PWATCHDOG_TABLE WdTable;
1627 extern PPCI_HACK_ENTRY PciHackTable;
1628 extern BOOLEAN PciAssignBusNumbers;
1629 extern BOOLEAN PciEnableNativeModeATA;
1630
1631 /* Exported by NTOS, should this go in the NDK? */
1632 extern NTSYSAPI BOOLEAN InitSafeBootMode;
1633
1634 /* EOF */