sync trunk HEAD (r50626)
[reactos.git] / drivers / bus / pcix / pci.h
1 /*
2 * PROJECT: ReactOS PCI Bus Driver
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: drivers/bus/pci/pci.h
5 * PURPOSE: Main Header File
6 * PROGRAMMERS: ReactOS Portable Systems Group
7 */
8
9 #include <initguid.h>
10 #include <ntifs.h>
11 #include <ntagp.h>
12 #include <wdmguid.h>
13 #include <wchar.h>
14 #include <acpiioct.h>
15 #include <drivers/pci/pci.h>
16 #include <drivers/acpi/acpi.h>
17 #include "halfuncs.h"
18 #include "rtlfuncs.h"
19 #include "vffuncs.h"
20 #include "bugcodes.h"
21
22 //
23 // Tag used in all pool allocations (Pci Bus)
24 //
25 #define PCI_POOL_TAG 'BicP'
26
27 //
28 // Checks if the specified FDO is the FDO for the Root PCI Bus
29 //
30 #define PCI_IS_ROOT_FDO(x) ((x)->BusRootFdoExtension == x)
31
32 //
33 // Assertions to make sure we are dealing with the right kind of extension
34 //
35 #define ASSERT_FDO(x) ASSERT((x)->ExtensionType == PciFdoExtensionType);
36 #define ASSERT_PDO(x) ASSERT((x)->ExtensionType == PciPdoExtensionType);
37
38 //
39 // PCI Hack Entry Name Lengths
40 //
41 #define PCI_HACK_ENTRY_SIZE sizeof(L"VVVVdddd") - sizeof(UNICODE_NULL)
42 #define PCI_HACK_ENTRY_REV_SIZE sizeof(L"VVVVddddRR") - sizeof(UNICODE_NULL)
43 #define PCI_HACK_ENTRY_SUBSYS_SIZE sizeof(L"VVVVddddssssIIII") - sizeof(UNICODE_NULL)
44 #define PCI_HACK_ENTRY_FULL_SIZE sizeof(L"VVVVddddssssIIIIRR") - sizeof(UNICODE_NULL)
45
46 //
47 // PCI Hack Entry Flags
48 //
49 #define PCI_HACK_HAS_REVISION_INFO 0x01
50 #define PCI_HACK_HAS_SUBSYSTEM_INFO 0x02
51
52 //
53 // PCI Interface Flags
54 //
55 #define PCI_INTERFACE_PDO 0x01
56 #define PCI_INTERFACE_FDO 0x02
57 #define PCI_INTERFACE_ROOT 0x04
58
59 //
60 // PCI Skip Function Flags
61 //
62 #define PCI_SKIP_DEVICE_ENUMERATION 0x01
63 #define PCI_SKIP_RESOURCE_ENUMERATION 0x02
64
65 //
66 // PCI Apply Hack Flags
67 //
68 #define PCI_HACK_FIXUP_BEFORE_CONFIGURATION 0x00
69 #define PCI_HACK_FIXUP_AFTER_CONFIGURATION 0x01
70 #define PCI_HACK_FIXUP_BEFORE_UPDATE 0x03
71
72 //
73 // PCI Debugging Device Support
74 //
75 #define MAX_DEBUGGING_DEVICES_SUPPORTED 0x04
76
77 //
78 // PCI Driver Verifier Failures
79 //
80 #define PCI_VERIFIER_CODES 0x04
81
82 //
83 // PCI ID Buffer ANSI Strings
84 //
85 #define MAX_ANSI_STRINGS 0x08
86
87 //
88 // Device Extension, Interface, Translator and Arbiter Signatures
89 //
90 typedef enum _PCI_SIGNATURE
91 {
92 PciPdoExtensionType = 'icP0',
93 PciFdoExtensionType = 'icP1',
94 PciArb_Io = 'icP2',
95 PciArb_Memory = 'icP3',
96 PciArb_Interrupt = 'icP4',
97 PciArb_BusNumber = 'icP5',
98 PciTrans_Interrupt = 'icP6',
99 PciInterface_BusHandler = 'icP7',
100 PciInterface_IntRouteHandler = 'icP8',
101 PciInterface_PciCb = 'icP9',
102 PciInterface_LegacyDeviceDetection = 'icP:',
103 PciInterface_PmeHandler = 'icP;',
104 PciInterface_DevicePresent = 'icP<',
105 PciInterface_NativeIde = 'icP=',
106 PciInterface_AgpTarget = 'icP>',
107 PciInterface_Location = 'icP?'
108 } PCI_SIGNATURE, *PPCI_SIGNATURE;
109
110 //
111 // Driver-handled PCI Device Types
112 //
113 typedef enum _PCI_DEVICE_TYPES
114 {
115 PciTypeInvalid,
116 PciTypeHostBridge,
117 PciTypePciBridge,
118 PciTypeCardbusBridge,
119 PciTypeDevice
120 } PCI_DEVICE_TYPES;
121
122 //
123 // Device Extension Logic States
124 //
125 typedef enum _PCI_STATE
126 {
127 PciNotStarted,
128 PciStarted,
129 PciDeleted,
130 PciStopped,
131 PciSurpriseRemoved,
132 PciSynchronizedOperation,
133 PciMaxObjectState
134 } PCI_STATE;
135
136 //
137 // IRP Dispatch Logic Style
138 //
139 typedef enum _PCI_DISPATCH_STYLE
140 {
141 IRP_COMPLETE,
142 IRP_DOWNWARD,
143 IRP_UPWARD,
144 IRP_DISPATCH,
145 } PCI_DISPATCH_STYLE;
146
147 //
148 // PCI Hack Entry Information
149 //
150 typedef struct _PCI_HACK_ENTRY
151 {
152 USHORT VendorID;
153 USHORT DeviceID;
154 USHORT SubVendorID;
155 USHORT SubSystemID;
156 ULONGLONG HackFlags;
157 USHORT RevisionID;
158 UCHAR Flags;
159 } PCI_HACK_ENTRY, *PPCI_HACK_ENTRY;
160
161 //
162 // Power State Information for Device Extension
163 //
164 typedef struct _PCI_POWER_STATE
165 {
166 SYSTEM_POWER_STATE CurrentSystemState;
167 DEVICE_POWER_STATE CurrentDeviceState;
168 SYSTEM_POWER_STATE SystemWakeLevel;
169 DEVICE_POWER_STATE DeviceWakeLevel;
170 DEVICE_POWER_STATE SystemStateMapping[7];
171 PIRP WaitWakeIrp;
172 PVOID SavedCancelRoutine;
173 LONG Paging;
174 LONG Hibernate;
175 LONG CrashDump;
176 } PCI_POWER_STATE, *PPCI_POWER_STATE;
177
178 //
179 // Internal PCI Lock Structure
180 //
181 typedef struct _PCI_LOCK
182 {
183 LONG Atom;
184 BOOLEAN OldIrql;
185 } PCI_LOCK, *PPCI_LOCK;
186
187 //
188 // Device Extension for a Bus FDO
189 //
190 typedef struct _PCI_FDO_EXTENSION
191 {
192 SINGLE_LIST_ENTRY List;
193 ULONG ExtensionType;
194 struct _PCI_MJ_DISPATCH_TABLE *IrpDispatchTable;
195 BOOLEAN DeviceState;
196 BOOLEAN TentativeNextState;
197 KEVENT SecondaryExtLock;
198 PDEVICE_OBJECT PhysicalDeviceObject;
199 PDEVICE_OBJECT FunctionalDeviceObject;
200 PDEVICE_OBJECT AttachedDeviceObject;
201 KEVENT ChildListLock;
202 struct _PCI_PDO_EXTENSION *ChildPdoList;
203 struct _PCI_FDO_EXTENSION *BusRootFdoExtension;
204 struct _PCI_FDO_EXTENSION *ParentFdoExtension;
205 struct _PCI_PDO_EXTENSION *ChildBridgePdoList;
206 PPCI_BUS_INTERFACE_STANDARD PciBusInterface;
207 BOOLEAN MaxSubordinateBus;
208 BUS_HANDLER *BusHandler;
209 BOOLEAN BaseBus;
210 BOOLEAN Fake;
211 BOOLEAN ChildDelete;
212 BOOLEAN Scanned;
213 BOOLEAN ArbitersInitialized;
214 BOOLEAN BrokenVideoHackApplied;
215 BOOLEAN Hibernated;
216 PCI_POWER_STATE PowerState;
217 SINGLE_LIST_ENTRY SecondaryExtension;
218 LONG ChildWaitWakeCount;
219 PPCI_COMMON_CONFIG PreservedConfig;
220 PCI_LOCK Lock;
221 struct
222 {
223 BOOLEAN Acquired;
224 BOOLEAN CacheLineSize;
225 BOOLEAN LatencyTimer;
226 BOOLEAN EnablePERR;
227 BOOLEAN EnableSERR;
228 } HotPlugParameters;
229 LONG BusHackFlags;
230 } PCI_FDO_EXTENSION, *PPCI_FDO_EXTENSION;
231
232 typedef struct _PCI_FUNCTION_RESOURCES
233 {
234 IO_RESOURCE_DESCRIPTOR Limit[7];
235 CM_PARTIAL_RESOURCE_DESCRIPTOR Current[7];
236 } PCI_FUNCTION_RESOURCES, *PPCI_FUNCTION_RESOURCES;
237
238 typedef union _PCI_HEADER_TYPE_DEPENDENT
239 {
240 struct
241 {
242 UCHAR Spare[4];
243 } type0;
244 struct
245 {
246 UCHAR PrimaryBus;
247 UCHAR SecondaryBus;
248 UCHAR SubordinateBus;
249 UCHAR SubtractiveDecode:1;
250 UCHAR IsaBitSet:1;
251 UCHAR VgaBitSet:1;
252 UCHAR WeChangedBusNumbers:1;
253 UCHAR IsaBitRequired:1;
254 } type1;
255 struct
256 {
257 UCHAR Spare[4];
258 } type2;
259 } PCI_HEADER_TYPE_DEPENDENT, *PPCI_HEADER_TYPE_DEPENDENT;
260
261 typedef struct _PCI_PDO_EXTENSION
262 {
263 PVOID Next;
264 ULONG ExtensionType;
265 struct _PCI_MJ_DISPATCH_TABLE *IrpDispatchTable;
266 BOOLEAN DeviceState;
267 BOOLEAN TentativeNextState;
268
269 KEVENT SecondaryExtLock;
270 PCI_SLOT_NUMBER Slot;
271 PDEVICE_OBJECT PhysicalDeviceObject;
272 PPCI_FDO_EXTENSION ParentFdoExtension;
273 SINGLE_LIST_ENTRY SecondaryExtension;
274 LONG BusInterfaceReferenceCount;
275 LONG AgpInterfaceReferenceCount;
276 USHORT VendorId;
277 USHORT DeviceId;
278 USHORT SubsystemVendorId;
279 USHORT SubsystemId;
280 BOOLEAN RevisionId;
281 BOOLEAN ProgIf;
282 BOOLEAN SubClass;
283 BOOLEAN BaseClass;
284 BOOLEAN AdditionalResourceCount;
285 BOOLEAN AdjustedInterruptLine;
286 BOOLEAN InterruptPin;
287 BOOLEAN RawInterruptLine;
288 BOOLEAN CapabilitiesPtr;
289 BOOLEAN SavedLatencyTimer;
290 BOOLEAN SavedCacheLineSize;
291 BOOLEAN HeaderType;
292 BOOLEAN NotPresent;
293 BOOLEAN ReportedMissing;
294 BOOLEAN ExpectedWritebackFailure;
295 BOOLEAN NoTouchPmeEnable;
296 BOOLEAN LegacyDriver;
297 BOOLEAN UpdateHardware;
298 BOOLEAN MovedDevice;
299 BOOLEAN DisablePowerDown;
300 BOOLEAN NeedsHotPlugConfiguration;
301 BOOLEAN IDEInNativeMode;
302 BOOLEAN BIOSAllowsIDESwitchToNativeMode;
303 BOOLEAN IoSpaceUnderNativeIdeControl;
304 BOOLEAN OnDebugPath;
305 BOOLEAN IoSpaceNotRequired;
306 PCI_POWER_STATE PowerState;
307 PCI_HEADER_TYPE_DEPENDENT Dependent;
308 ULONGLONG HackFlags;
309 PCI_FUNCTION_RESOURCES *Resources;
310 PCI_FDO_EXTENSION *BridgeFdoExtension;
311 struct _PCI_PDO_EXTENSION *NextBridge;
312 struct _PCI_PDO_EXTENSION *NextHashEntry;
313 PCI_LOCK Lock;
314 PCI_PMC PowerCapabilities;
315 BOOLEAN TargetAgpCapabilityId;
316 USHORT CommandEnables;
317 USHORT InitialCommand;
318 } PCI_PDO_EXTENSION, *PPCI_PDO_EXTENSION;
319
320 //
321 // IRP Dispatch Function Type
322 //
323 typedef NTSTATUS (NTAPI *PCI_DISPATCH_FUNCTION)(
324 IN PIRP Irp,
325 IN PIO_STACK_LOCATION IoStackLocation,
326 IN PVOID DeviceExtension
327 );
328
329 //
330 // IRP Dispatch Minor Table
331 //
332 typedef struct _PCI_MN_DISPATCH_TABLE
333 {
334 PCI_DISPATCH_STYLE DispatchStyle;
335 PCI_DISPATCH_FUNCTION DispatchFunction;
336 } PCI_MN_DISPATCH_TABLE, *PPCI_MN_DISPATCH_TABLE;
337
338 //
339 // IRP Dispatch Major Table
340 //
341 typedef struct _PCI_MJ_DISPATCH_TABLE
342 {
343 ULONG PnpIrpMaximumMinorFunction;
344 PPCI_MN_DISPATCH_TABLE PnpIrpDispatchTable;
345 ULONG PowerIrpMaximumMinorFunction;
346 PPCI_MN_DISPATCH_TABLE PowerIrpDispatchTable;
347 PCI_DISPATCH_STYLE SystemControlIrpDispatchStyle;
348 PCI_DISPATCH_FUNCTION SystemControlIrpDispatchFunction;
349 PCI_DISPATCH_STYLE OtherIrpDispatchStyle;
350 PCI_DISPATCH_FUNCTION OtherIrpDispatchFunction;
351 } PCI_MJ_DISPATCH_TABLE, *PPCI_MJ_DISPATCH_TABLE;
352
353 //
354 // Generic PCI Interface Constructor and Initializer
355 //
356 struct _PCI_INTERFACE;
357 typedef NTSTATUS (NTAPI *PCI_INTERFACE_CONSTRUCTOR)(
358 IN PVOID DeviceExtension,
359 IN PVOID Instance,
360 IN PVOID InterfaceData,
361 IN USHORT Version,
362 IN USHORT Size,
363 IN PINTERFACE Interface
364 );
365
366 typedef NTSTATUS (NTAPI *PCI_INTERFACE_INITIALIZER)(
367 IN PVOID Instance
368 );
369
370 //
371 // Generic PCI Interface (Interface, Translator, Arbiter)
372 //
373 typedef struct _PCI_INTERFACE
374 {
375 CONST GUID *InterfaceType;
376 USHORT MinSize;
377 USHORT MinVersion;
378 USHORT MaxVersion;
379 USHORT Flags;
380 LONG ReferenceCount;
381 PCI_SIGNATURE Signature;
382 PCI_INTERFACE_CONSTRUCTOR Constructor;
383 PCI_INTERFACE_INITIALIZER Initializer;
384 } PCI_INTERFACE, *PPCI_INTERFACE;
385
386 //
387 // Generic Secondary Extension Instance Header (Interface, Translator, Arbiter)
388 //
389 typedef struct PCI_SECONDARY_EXTENSION
390 {
391 SINGLE_LIST_ENTRY List;
392 PCI_SIGNATURE ExtensionType;
393 PVOID Destructor;
394 } PCI_SECONDARY_EXTENSION, *PPCI_SECONDARY_EXTENSION;
395
396 //
397 // PCI Arbiter Instance
398 //
399 typedef struct PCI_ARBITER_INSTANCE
400 {
401 PCI_SECONDARY_EXTENSION Header;
402 PPCI_INTERFACE Interface;
403 PPCI_FDO_EXTENSION BusFdoExtension;
404 WCHAR InstanceName[24];
405 //ARBITER_INSTANCE CommonInstance; FIXME: Need Arbiter Headers
406 } PCI_ARBITER_INSTANCE, *PPCI_ARBITER_INSTANCE;
407
408 //
409 // PCI Verifier Data
410 //
411 typedef struct _PCI_VERIFIER_DATA
412 {
413 ULONG FailureCode;
414 VF_FAILURE_CLASS FailureClass;
415 ULONG AssertionControl;
416 PCHAR DebuggerMessageText;
417 } PCI_VERIFIER_DATA, *PPCI_VERIFIER_DATA;
418
419 //
420 // PCI ID Buffer Descriptor
421 //
422 typedef struct _PCI_ID_BUFFER
423 {
424 ULONG Count;
425 ANSI_STRING Strings[MAX_ANSI_STRINGS];
426 ULONG StringSize[MAX_ANSI_STRINGS];
427 ULONG TotalLength;
428 PCHAR CharBuffer;
429 CHAR BufferData[256];
430 } PCI_ID_BUFFER, *PPCI_ID_BUFFER;
431
432 //
433 // PCI Configuration Callbacks
434 //
435 struct _PCI_CONFIGURATOR_CONTEXT;
436
437 typedef VOID (NTAPI *PCI_CONFIGURATOR_INITIALIZE)(
438 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
439 );
440
441 typedef VOID (NTAPI *PCI_CONFIGURATOR_RESTORE_CURRENT)(
442 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
443 );
444
445 typedef VOID (NTAPI *PCI_CONFIGURATOR_SAVE_LIMITS)(
446 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
447 );
448
449 typedef VOID (NTAPI *PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS)(
450 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
451 );
452
453 typedef VOID (NTAPI *PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS)(
454 IN PPCI_PDO_EXTENSION PdoExtension,
455 IN PPCI_COMMON_HEADER PciData
456 );
457
458 typedef VOID (NTAPI *PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS)(
459 IN struct _PCI_CONFIGURATOR_CONTEXT* Context,
460 IN PPCI_COMMON_HEADER PciData,
461 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
462 );
463
464 typedef VOID (NTAPI *PCI_CONFIGURATOR_RESET_DEVICE)(
465 IN PPCI_PDO_EXTENSION PdoExtension,
466 IN PPCI_COMMON_HEADER PciData
467 );
468
469 //
470 // PCI Configurator
471 //
472 typedef struct _PCI_CONFIGURATOR
473 {
474 PCI_CONFIGURATOR_INITIALIZE Initialize;
475 PCI_CONFIGURATOR_RESTORE_CURRENT RestoreCurrent;
476 PCI_CONFIGURATOR_SAVE_LIMITS SaveLimits;
477 PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS SaveCurrentSettings;
478 PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS ChangeResourceSettings;
479 PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS GetAdditionalResourceDescriptors;
480 PCI_CONFIGURATOR_RESET_DEVICE ResetDevice;
481 } PCI_CONFIGURATOR, *PPCI_CONFIGURATOR;
482
483 //
484 // PCI Configurator Context
485 //
486 typedef struct _PCI_CONFIGURATOR_CONTEXT
487 {
488 PPCI_PDO_EXTENSION PdoExtension;
489 PPCI_COMMON_HEADER Current;
490 PPCI_COMMON_HEADER PciData;
491 PPCI_CONFIGURATOR Configurator;
492 USHORT SecondaryStatus;
493 USHORT Status;
494 USHORT Command;
495 } PCI_CONFIGURATOR_CONTEXT, *PPCI_CONFIGURATOR_CONTEXT;
496
497 //
498 // PCI IPI Function
499 //
500 typedef VOID (NTAPI *PCI_IPI_FUNCTION)(
501 IN PVOID Reserved,
502 IN PVOID Context
503 );
504
505 //
506 // PCI IPI Context
507 //
508 typedef struct _PCI_IPI_CONTEXT
509 {
510 LONG RunCount;
511 ULONG Barrier;
512 PVOID DeviceExtension;
513 PCI_IPI_FUNCTION Function;
514 PVOID Context;
515 } PCI_IPI_CONTEXT, *PPCI_IPI_CONTEXT;
516
517 //
518 // PCI Legacy Device Location Cache
519 //
520 typedef struct _PCI_LEGACY_DEVICE
521 {
522 struct _PCI_LEGACY_DEVICE *Next;
523 PDEVICE_OBJECT DeviceObject;
524 ULONG BusNumber;
525 ULONG SlotNumber;
526 UCHAR InterruptLine;
527 UCHAR InterruptPin;
528 UCHAR BaseClass;
529 UCHAR SubClass;
530 PDEVICE_OBJECT PhysicalDeviceObject;
531 ROUTING_TOKEN RoutingToken;
532 PPCI_PDO_EXTENSION PdoExtension;
533 } PCI_LEGACY_DEVICE, *PPCI_LEGACY_DEVICE;
534
535 //
536 // IRP Dispatch Routines
537 //
538 NTSTATUS
539 NTAPI
540 PciDispatchIrp(
541 IN PDEVICE_OBJECT DeviceObject,
542 IN PIRP Irp
543 );
544
545 NTSTATUS
546 NTAPI
547 PciIrpNotSupported(
548 IN PIRP Irp,
549 IN PIO_STACK_LOCATION IoStackLocation,
550 IN PPCI_FDO_EXTENSION DeviceExtension
551 );
552
553 NTSTATUS
554 NTAPI
555 PciPassIrpFromFdoToPdo(
556 IN PPCI_FDO_EXTENSION DeviceExtension,
557 IN PIRP Irp
558 );
559
560 NTSTATUS
561 NTAPI
562 PciCallDownIrpStack(
563 IN PPCI_FDO_EXTENSION DeviceExtension,
564 IN PIRP Irp
565 );
566
567 NTSTATUS
568 NTAPI
569 PciIrpInvalidDeviceRequest(
570 IN PIRP Irp,
571 IN PIO_STACK_LOCATION IoStackLocation,
572 IN PPCI_FDO_EXTENSION DeviceExtension
573 );
574
575 //
576 // Power Routines
577 //
578 NTSTATUS
579 NTAPI
580 PciFdoWaitWake(
581 IN PIRP Irp,
582 IN PIO_STACK_LOCATION IoStackLocation,
583 IN PPCI_FDO_EXTENSION DeviceExtension
584 );
585
586 NTSTATUS
587 NTAPI
588 PciFdoSetPowerState(
589 IN PIRP Irp,
590 IN PIO_STACK_LOCATION IoStackLocation,
591 IN PPCI_FDO_EXTENSION DeviceExtension
592 );
593
594 NTSTATUS
595 NTAPI
596 PciFdoIrpQueryPower(
597 IN PIRP Irp,
598 IN PIO_STACK_LOCATION IoStackLocation,
599 IN PPCI_FDO_EXTENSION DeviceExtension
600 );
601
602 NTSTATUS
603 NTAPI
604 PciSetPowerManagedDevicePowerState(
605 IN PPCI_PDO_EXTENSION DeviceExtension,
606 IN DEVICE_POWER_STATE DeviceState,
607 IN BOOLEAN IrpSet
608 );
609
610 //
611 // Bus FDO Routines
612 //
613 NTSTATUS
614 NTAPI
615 PciAddDevice(
616 IN PDRIVER_OBJECT DriverObject,
617 IN PDEVICE_OBJECT PhysicalDeviceObject
618 );
619
620 NTSTATUS
621 NTAPI
622 PciFdoIrpStartDevice(
623 IN PIRP Irp,
624 IN PIO_STACK_LOCATION IoStackLocation,
625 IN PPCI_FDO_EXTENSION DeviceExtension
626 );
627
628 NTSTATUS
629 NTAPI
630 PciFdoIrpQueryRemoveDevice(
631 IN PIRP Irp,
632 IN PIO_STACK_LOCATION IoStackLocation,
633 IN PPCI_FDO_EXTENSION DeviceExtension
634 );
635
636 NTSTATUS
637 NTAPI
638 PciFdoIrpRemoveDevice(
639 IN PIRP Irp,
640 IN PIO_STACK_LOCATION IoStackLocation,
641 IN PPCI_FDO_EXTENSION DeviceExtension
642 );
643
644 NTSTATUS
645 NTAPI
646 PciFdoIrpCancelRemoveDevice(
647 IN PIRP Irp,
648 IN PIO_STACK_LOCATION IoStackLocation,
649 IN PPCI_FDO_EXTENSION DeviceExtension
650 );
651
652 NTSTATUS
653 NTAPI
654 PciFdoIrpStopDevice(
655 IN PIRP Irp,
656 IN PIO_STACK_LOCATION IoStackLocation,
657 IN PPCI_FDO_EXTENSION DeviceExtension
658 );
659
660 NTSTATUS
661 NTAPI
662 PciFdoIrpQueryStopDevice(
663 IN PIRP Irp,
664 IN PIO_STACK_LOCATION IoStackLocation,
665 IN PPCI_FDO_EXTENSION DeviceExtension
666 );
667
668 NTSTATUS
669 NTAPI
670 PciFdoIrpCancelStopDevice(
671 IN PIRP Irp,
672 IN PIO_STACK_LOCATION IoStackLocation,
673 IN PPCI_FDO_EXTENSION DeviceExtension
674 );
675
676 NTSTATUS
677 NTAPI
678 PciFdoIrpQueryDeviceRelations(
679 IN PIRP Irp,
680 IN PIO_STACK_LOCATION IoStackLocation,
681 IN PPCI_FDO_EXTENSION DeviceExtension
682 );
683
684 NTSTATUS
685 NTAPI
686 PciFdoIrpQueryInterface(
687 IN PIRP Irp,
688 IN PIO_STACK_LOCATION IoStackLocation,
689 IN PPCI_FDO_EXTENSION DeviceExtension
690 );
691
692 NTSTATUS
693 NTAPI
694 PciFdoIrpQueryCapabilities(
695 IN PIRP Irp,
696 IN PIO_STACK_LOCATION IoStackLocation,
697 IN PPCI_FDO_EXTENSION DeviceExtension
698 );
699
700 NTSTATUS
701 NTAPI
702 PciFdoIrpDeviceUsageNotification(
703 IN PIRP Irp,
704 IN PIO_STACK_LOCATION IoStackLocation,
705 IN PPCI_FDO_EXTENSION DeviceExtension
706 );
707
708 NTSTATUS
709 NTAPI
710 PciFdoIrpSurpriseRemoval(
711 IN PIRP Irp,
712 IN PIO_STACK_LOCATION IoStackLocation,
713 IN PPCI_FDO_EXTENSION DeviceExtension
714 );
715
716 NTSTATUS
717 NTAPI
718 PciFdoIrpQueryLegacyBusInformation(
719 IN PIRP Irp,
720 IN PIO_STACK_LOCATION IoStackLocation,
721 IN PPCI_FDO_EXTENSION DeviceExtension
722 );
723
724 //
725 // Device PDO Routines
726 //
727 NTSTATUS
728 NTAPI
729 PciPdoCreate(
730 IN PPCI_FDO_EXTENSION DeviceExtension,
731 IN PCI_SLOT_NUMBER Slot,
732 OUT PDEVICE_OBJECT *PdoDeviceObject
733 );
734
735 NTSTATUS
736 NTAPI
737 PciPdoWaitWake(
738 IN PIRP Irp,
739 IN PIO_STACK_LOCATION IoStackLocation,
740 IN PPCI_PDO_EXTENSION DeviceExtension
741 );
742
743 NTSTATUS
744 NTAPI
745 PciPdoSetPowerState(
746 IN PIRP Irp,
747 IN PIO_STACK_LOCATION IoStackLocation,
748 IN PPCI_PDO_EXTENSION DeviceExtension
749 );
750
751 NTSTATUS
752 NTAPI
753 PciPdoIrpQueryPower(
754 IN PIRP Irp,
755 IN PIO_STACK_LOCATION IoStackLocation,
756 IN PPCI_PDO_EXTENSION DeviceExtension
757 );
758
759 NTSTATUS
760 NTAPI
761 PciPdoIrpStartDevice(
762 IN PIRP Irp,
763 IN PIO_STACK_LOCATION IoStackLocation,
764 IN PPCI_PDO_EXTENSION DeviceExtension
765 );
766
767 NTSTATUS
768 NTAPI
769 PciPdoIrpQueryRemoveDevice(
770 IN PIRP Irp,
771 IN PIO_STACK_LOCATION IoStackLocation,
772 IN PPCI_PDO_EXTENSION DeviceExtension
773 );
774
775 NTSTATUS
776 NTAPI
777 PciPdoIrpRemoveDevice(
778 IN PIRP Irp,
779 IN PIO_STACK_LOCATION IoStackLocation,
780 IN PPCI_PDO_EXTENSION DeviceExtension
781 );
782
783 NTSTATUS
784 NTAPI
785 PciPdoIrpCancelRemoveDevice(
786 IN PIRP Irp,
787 IN PIO_STACK_LOCATION IoStackLocation,
788 IN PPCI_PDO_EXTENSION DeviceExtension
789 );
790
791 NTSTATUS
792 NTAPI
793 PciPdoIrpStopDevice(
794 IN PIRP Irp,
795 IN PIO_STACK_LOCATION IoStackLocation,
796 IN PPCI_PDO_EXTENSION DeviceExtension
797 );
798
799 NTSTATUS
800 NTAPI
801 PciPdoIrpQueryStopDevice(
802 IN PIRP Irp,
803 IN PIO_STACK_LOCATION IoStackLocation,
804 IN PPCI_PDO_EXTENSION DeviceExtension
805 );
806
807 NTSTATUS
808 NTAPI
809 PciPdoIrpCancelStopDevice(
810 IN PIRP Irp,
811 IN PIO_STACK_LOCATION IoStackLocation,
812 IN PPCI_PDO_EXTENSION DeviceExtension
813 );
814
815 NTSTATUS
816 NTAPI
817 PciPdoIrpQueryDeviceRelations(
818 IN PIRP Irp,
819 IN PIO_STACK_LOCATION IoStackLocation,
820 IN PPCI_PDO_EXTENSION DeviceExtension
821 );
822
823 NTSTATUS
824 NTAPI
825 PciPdoIrpQueryInterface(
826 IN PIRP Irp,
827 IN PIO_STACK_LOCATION IoStackLocation,
828 IN PPCI_PDO_EXTENSION DeviceExtension
829 );
830
831 NTSTATUS
832 NTAPI
833 PciPdoIrpQueryCapabilities(
834 IN PIRP Irp,
835 IN PIO_STACK_LOCATION IoStackLocation,
836 IN PPCI_PDO_EXTENSION DeviceExtension
837 );
838
839 NTSTATUS
840 NTAPI
841 PciPdoIrpQueryResources(
842 IN PIRP Irp,
843 IN PIO_STACK_LOCATION IoStackLocation,
844 IN PPCI_PDO_EXTENSION DeviceExtension
845 );
846
847 NTSTATUS
848 NTAPI
849 PciPdoIrpQueryResourceRequirements(
850 IN PIRP Irp,
851 IN PIO_STACK_LOCATION IoStackLocation,
852 IN PPCI_PDO_EXTENSION DeviceExtension
853 );
854
855 NTSTATUS
856 NTAPI
857 PciPdoIrpQueryDeviceText(
858 IN PIRP Irp,
859 IN PIO_STACK_LOCATION IoStackLocation,
860 IN PPCI_PDO_EXTENSION DeviceExtension
861 );
862
863 NTSTATUS
864 NTAPI
865 PciPdoIrpReadConfig(
866 IN PIRP Irp,
867 IN PIO_STACK_LOCATION IoStackLocation,
868 IN PPCI_PDO_EXTENSION DeviceExtension
869 );
870
871 NTSTATUS
872 NTAPI
873 PciPdoIrpWriteConfig(
874 IN PIRP Irp,
875 IN PIO_STACK_LOCATION IoStackLocation,
876 IN PPCI_PDO_EXTENSION DeviceExtension
877 );
878
879 NTSTATUS
880 NTAPI
881 PciPdoIrpQueryId(
882 IN PIRP Irp,
883 IN PIO_STACK_LOCATION IoStackLocation,
884 IN PPCI_PDO_EXTENSION DeviceExtension
885 );
886
887 NTSTATUS
888 NTAPI
889 PciPdoIrpQueryDeviceState(
890 IN PIRP Irp,
891 IN PIO_STACK_LOCATION IoStackLocation,
892 IN PPCI_PDO_EXTENSION DeviceExtension
893 );
894
895 NTSTATUS
896 NTAPI
897 PciPdoIrpQueryBusInformation(
898 IN PIRP Irp,
899 IN PIO_STACK_LOCATION IoStackLocation,
900 IN PPCI_PDO_EXTENSION DeviceExtension
901 );
902
903 NTSTATUS
904 NTAPI
905 PciPdoIrpDeviceUsageNotification(
906 IN PIRP Irp,
907 IN PIO_STACK_LOCATION IoStackLocation,
908 IN PPCI_PDO_EXTENSION DeviceExtension
909 );
910
911 NTSTATUS
912 NTAPI
913 PciPdoIrpSurpriseRemoval(
914 IN PIRP Irp,
915 IN PIO_STACK_LOCATION IoStackLocation,
916 IN PPCI_PDO_EXTENSION DeviceExtension
917 );
918
919 NTSTATUS
920 NTAPI
921 PciPdoIrpQueryLegacyBusInformation(
922 IN PIRP Irp,
923 IN PIO_STACK_LOCATION IoStackLocation,
924 IN PPCI_PDO_EXTENSION DeviceExtension
925 );
926
927
928 //
929 // HAL Callback/Hook Routines
930 //
931 VOID
932 NTAPI
933 PciHookHal(
934 VOID
935 );
936
937 //
938 // PCI Verifier Routines
939 //
940 VOID
941 NTAPI
942 PciVerifierInit(
943 IN PDRIVER_OBJECT DriverObject
944 );
945
946 PPCI_VERIFIER_DATA
947 NTAPI
948 PciVerifierRetrieveFailureData(
949 IN ULONG FailureCode
950 );
951
952 //
953 // Utility Routines
954 //
955 BOOLEAN
956 NTAPI
957 PciStringToUSHORT(
958 IN PWCHAR String,
959 OUT PUSHORT Value
960 );
961
962 BOOLEAN
963 NTAPI
964 PciIsDatacenter(
965 VOID
966 );
967
968 NTSTATUS
969 NTAPI
970 PciBuildDefaultExclusionLists(
971 VOID
972 );
973
974 BOOLEAN
975 NTAPI
976 PciUnicodeStringStrStr(
977 IN PUNICODE_STRING InputString,
978 IN PCUNICODE_STRING EqualString,
979 IN BOOLEAN CaseInSensitive
980 );
981
982 BOOLEAN
983 NTAPI
984 PciOpenKey(
985 IN PWCHAR KeyName,
986 IN HANDLE RootKey,
987 IN ACCESS_MASK DesiredAccess,
988 OUT PHANDLE KeyHandle,
989 OUT PNTSTATUS KeyStatus
990 );
991
992 NTSTATUS
993 NTAPI
994 PciGetRegistryValue(
995 IN PWCHAR ValueName,
996 IN PWCHAR KeyName,
997 IN HANDLE RootHandle,
998 IN ULONG Type,
999 OUT PVOID *OutputBuffer,
1000 OUT PULONG OutputLength
1001 );
1002
1003 PPCI_FDO_EXTENSION
1004 NTAPI
1005 PciFindParentPciFdoExtension(
1006 IN PDEVICE_OBJECT DeviceObject,
1007 IN PKEVENT Lock
1008 );
1009
1010 VOID
1011 NTAPI
1012 PciInsertEntryAtTail(
1013 IN PSINGLE_LIST_ENTRY ListHead,
1014 IN PPCI_FDO_EXTENSION DeviceExtension,
1015 IN PKEVENT Lock
1016 );
1017
1018 NTSTATUS
1019 NTAPI
1020 PciGetDeviceProperty(
1021 IN PDEVICE_OBJECT DeviceObject,
1022 IN DEVICE_REGISTRY_PROPERTY DeviceProperty,
1023 OUT PVOID *OutputBuffer
1024 );
1025
1026 NTSTATUS
1027 NTAPI
1028 PciSendIoctl(
1029 IN PDEVICE_OBJECT DeviceObject,
1030 IN ULONG IoControlCode,
1031 IN PVOID InputBuffer,
1032 IN ULONG InputBufferLength,
1033 IN PVOID OutputBuffer,
1034 IN ULONG OutputBufferLength
1035 );
1036
1037 VOID
1038 NTAPI
1039 PcipLinkSecondaryExtension(
1040 IN PSINGLE_LIST_ENTRY List,
1041 IN PVOID Lock,
1042 IN PPCI_SECONDARY_EXTENSION SecondaryExtension,
1043 IN PCI_SIGNATURE ExtensionType,
1044 IN PVOID Destructor
1045 );
1046
1047 PPCI_SECONDARY_EXTENSION
1048 NTAPI
1049 PciFindNextSecondaryExtension(
1050 IN PSINGLE_LIST_ENTRY ListHead,
1051 IN PCI_SIGNATURE ExtensionType
1052 );
1053
1054 ULONGLONG
1055 NTAPI
1056 PciGetHackFlags(
1057 IN USHORT VendorId,
1058 IN USHORT DeviceId,
1059 IN USHORT SubVendorId,
1060 IN USHORT SubSystemId,
1061 IN UCHAR RevisionId
1062 );
1063
1064 PPCI_PDO_EXTENSION
1065 NTAPI
1066 PciFindPdoByFunction(
1067 IN PPCI_FDO_EXTENSION DeviceExtension,
1068 IN ULONG FunctionNumber,
1069 IN PPCI_COMMON_HEADER PciData
1070 );
1071
1072 BOOLEAN
1073 NTAPI
1074 PciIsCriticalDeviceClass(
1075 IN UCHAR BaseClass,
1076 IN UCHAR SubClass
1077 );
1078
1079 BOOLEAN
1080 NTAPI
1081 PciIsDeviceOnDebugPath(
1082 IN PPCI_PDO_EXTENSION DeviceExtension
1083 );
1084
1085 NTSTATUS
1086 NTAPI
1087 PciGetBiosConfig(
1088 IN PPCI_PDO_EXTENSION DeviceExtension,
1089 OUT PPCI_COMMON_HEADER PciData
1090 );
1091
1092 NTSTATUS
1093 NTAPI
1094 PciSaveBiosConfig(
1095 IN PPCI_PDO_EXTENSION DeviceExtension,
1096 OUT PPCI_COMMON_HEADER PciData
1097 );
1098
1099 UCHAR
1100 NTAPI
1101 PciReadDeviceCapability(
1102 IN PPCI_PDO_EXTENSION DeviceExtension,
1103 IN UCHAR Offset,
1104 IN ULONG CapabilityId,
1105 OUT PPCI_CAPABILITIES_HEADER Buffer,
1106 IN ULONG Length
1107 );
1108
1109 BOOLEAN
1110 NTAPI
1111 PciCanDisableDecodes(
1112 IN PPCI_PDO_EXTENSION DeviceExtension,
1113 IN PPCI_COMMON_HEADER Config,
1114 IN ULONGLONG HackFlags,
1115 IN BOOLEAN ForPowerDown
1116 );
1117
1118 PCI_DEVICE_TYPES
1119 NTAPI
1120 PciClassifyDeviceType(
1121 IN PPCI_PDO_EXTENSION PdoExtension
1122 );
1123
1124 ULONG_PTR
1125 NTAPI
1126 PciExecuteCriticalSystemRoutine(
1127 IN ULONG_PTR IpiContext
1128 );
1129
1130 BOOLEAN
1131 NTAPI
1132 PciCreateIoDescriptorFromBarLimit(
1133 PIO_RESOURCE_DESCRIPTOR ResourceDescriptor,
1134 IN PULONG BarArray,
1135 IN BOOLEAN Rom
1136 );
1137
1138 BOOLEAN
1139 NTAPI
1140 PciIsSlotPresentInParentMethod(
1141 IN PPCI_PDO_EXTENSION PdoExtension,
1142 IN ULONG Method
1143 );
1144
1145 VOID
1146 NTAPI
1147 PciDecodeEnable(
1148 IN PPCI_PDO_EXTENSION PdoExtension,
1149 IN BOOLEAN Enable,
1150 OUT PUSHORT Command
1151 );
1152
1153 NTSTATUS
1154 NTAPI
1155 PciQueryBusInformation(
1156 IN PPCI_PDO_EXTENSION PdoExtension,
1157 IN PPNP_BUS_INFORMATION* Buffer
1158 );
1159
1160 NTSTATUS
1161 NTAPI
1162 PciQueryCapabilities(
1163 IN PPCI_PDO_EXTENSION PdoExtension,
1164 IN OUT PDEVICE_CAPABILITIES DeviceCapability
1165 );
1166
1167 PCM_PARTIAL_RESOURCE_DESCRIPTOR
1168 NTAPI
1169 PciNextPartialDescriptor(
1170 PCM_PARTIAL_RESOURCE_DESCRIPTOR CmDescriptor
1171 );
1172
1173 //
1174 // Configuration Routines
1175 //
1176 NTSTATUS
1177 NTAPI
1178 PciGetConfigHandlers(
1179 IN PPCI_FDO_EXTENSION FdoExtension
1180 );
1181
1182 VOID
1183 NTAPI
1184 PciReadSlotConfig(
1185 IN PPCI_FDO_EXTENSION DeviceExtension,
1186 IN PCI_SLOT_NUMBER Slot,
1187 IN PVOID Buffer,
1188 IN ULONG Offset,
1189 IN ULONG Length
1190 );
1191
1192 VOID
1193 NTAPI
1194 PciWriteDeviceConfig(
1195 IN PPCI_PDO_EXTENSION DeviceExtension,
1196 IN PVOID Buffer,
1197 IN ULONG Offset,
1198 IN ULONG Length
1199 );
1200
1201 VOID
1202 NTAPI
1203 PciReadDeviceConfig(
1204 IN PPCI_PDO_EXTENSION DeviceExtension,
1205 IN PVOID Buffer,
1206 IN ULONG Offset,
1207 IN ULONG Length
1208 );
1209
1210 UCHAR
1211 NTAPI
1212 PciGetAdjustedInterruptLine(
1213 IN PPCI_PDO_EXTENSION PdoExtension
1214 );
1215
1216 //
1217 // State Machine Logic Transition Routines
1218 //
1219 VOID
1220 NTAPI
1221 PciInitializeState(
1222 IN PPCI_FDO_EXTENSION DeviceExtension
1223 );
1224
1225 NTSTATUS
1226 NTAPI
1227 PciBeginStateTransition(
1228 IN PPCI_FDO_EXTENSION DeviceExtension,
1229 IN PCI_STATE NewState
1230 );
1231
1232 NTSTATUS
1233 NTAPI
1234 PciCancelStateTransition(
1235 IN PPCI_FDO_EXTENSION DeviceExtension,
1236 IN PCI_STATE NewState
1237 );
1238
1239 VOID
1240 NTAPI
1241 PciCommitStateTransition(
1242 IN PPCI_FDO_EXTENSION DeviceExtension,
1243 IN PCI_STATE NewState
1244 );
1245
1246 //
1247 // Arbiter Support
1248 //
1249 NTSTATUS
1250 NTAPI
1251 PciInitializeArbiters(
1252 IN PPCI_FDO_EXTENSION FdoExtension
1253 );
1254
1255 NTSTATUS
1256 NTAPI
1257 PciInitializeArbiterRanges(
1258 IN PPCI_FDO_EXTENSION DeviceExtension,
1259 IN PCM_RESOURCE_LIST Resources
1260 );
1261
1262 //
1263 // Debug Helpers
1264 //
1265 BOOLEAN
1266 NTAPI
1267 PciDebugIrpDispatchDisplay(
1268 IN PIO_STACK_LOCATION IoStackLocation,
1269 IN PPCI_FDO_EXTENSION DeviceExtension,
1270 IN USHORT MaxMinor
1271 );
1272
1273 VOID
1274 NTAPI
1275 PciDebugDumpCommonConfig(
1276 IN PPCI_COMMON_HEADER PciData
1277 );
1278
1279 VOID
1280 NTAPI
1281 PciDebugDumpQueryCapabilities(
1282 IN PDEVICE_CAPABILITIES DeviceCaps
1283 );
1284
1285 VOID
1286 NTAPI
1287 PciDebugPrintIoResReqList(
1288 IN PIO_RESOURCE_REQUIREMENTS_LIST Requirements
1289 );
1290
1291 VOID
1292 NTAPI
1293 PciDebugPrintCmResList(
1294 IN PCM_RESOURCE_LIST ResourceList
1295 );
1296
1297 VOID
1298 NTAPI
1299 PciDebugPrintPartialResource(
1300 IN PCM_PARTIAL_RESOURCE_DESCRIPTOR PartialResource
1301 );
1302
1303 //
1304 // Interface Support
1305 //
1306 NTSTATUS
1307 NTAPI
1308 PciQueryInterface(
1309 IN PPCI_FDO_EXTENSION DeviceExtension,
1310 IN CONST GUID* InterfaceType,
1311 IN ULONG Size,
1312 IN ULONG Version,
1313 IN PVOID InterfaceData,
1314 IN PINTERFACE Interface,
1315 IN BOOLEAN LastChance
1316 );
1317
1318 NTSTATUS
1319 NTAPI
1320 PciPmeInterfaceInitializer(
1321 IN PVOID Instance
1322 );
1323
1324 NTSTATUS
1325 NTAPI
1326 routeintrf_Initializer(
1327 IN PVOID Instance
1328 );
1329
1330 NTSTATUS
1331 NTAPI
1332 arbusno_Initializer(
1333 IN PVOID Instance
1334 );
1335
1336 NTSTATUS
1337 NTAPI
1338 agpintrf_Initializer(
1339 IN PVOID Instance
1340 );
1341
1342 NTSTATUS
1343 NTAPI
1344 tranirq_Initializer(
1345 IN PVOID Instance
1346 );
1347
1348 NTSTATUS
1349 NTAPI
1350 busintrf_Initializer(
1351 IN PVOID Instance
1352 );
1353
1354 NTSTATUS
1355 NTAPI
1356 armem_Initializer(
1357 IN PVOID Instance
1358 );
1359
1360 NTSTATUS
1361 NTAPI
1362 ario_Initializer(
1363 IN PVOID Instance
1364 );
1365
1366 NTSTATUS
1367 NTAPI
1368 locintrf_Initializer(
1369 IN PVOID Instance
1370 );
1371
1372 NTSTATUS
1373 NTAPI
1374 pcicbintrf_Initializer(
1375 IN PVOID Instance
1376 );
1377
1378 NTSTATUS
1379 NTAPI
1380 lddintrf_Initializer(
1381 IN PVOID Instance
1382 );
1383
1384 NTSTATUS
1385 NTAPI
1386 devpresent_Initializer(
1387 IN PVOID Instance
1388 );
1389
1390 NTSTATUS
1391 NTAPI
1392 agpintrf_Constructor(
1393 IN PVOID DeviceExtension,
1394 IN PVOID Instance,
1395 IN PVOID InterfaceData,
1396 IN USHORT Version,
1397 IN USHORT Size,
1398 IN PINTERFACE Interface
1399 );
1400
1401 NTSTATUS
1402 NTAPI
1403 arbusno_Constructor(
1404 IN PVOID DeviceExtension,
1405 IN PVOID Instance,
1406 IN PVOID InterfaceData,
1407 IN USHORT Version,
1408 IN USHORT Size,
1409 IN PINTERFACE Interface
1410 );
1411
1412 NTSTATUS
1413 NTAPI
1414 tranirq_Constructor(
1415 IN PVOID DeviceExtension,
1416 IN PVOID Instance,
1417 IN PVOID InterfaceData,
1418 IN USHORT Version,
1419 IN USHORT Size,
1420 IN PINTERFACE Interface
1421 );
1422
1423 NTSTATUS
1424 NTAPI
1425 armem_Constructor(
1426 IN PVOID DeviceExtension,
1427 IN PVOID Instance,
1428 IN PVOID InterfaceData,
1429 IN USHORT Version,
1430 IN USHORT Size,
1431 IN PINTERFACE Interface
1432 );
1433
1434 NTSTATUS
1435 NTAPI
1436 busintrf_Constructor(
1437 IN PVOID DeviceExtension,
1438 IN PVOID Instance,
1439 IN PVOID InterfaceData,
1440 IN USHORT Version,
1441 IN USHORT Size,
1442 IN PINTERFACE Interface
1443 );
1444
1445 NTSTATUS
1446 NTAPI
1447 ario_Constructor(
1448 IN PVOID DeviceExtension,
1449 IN PVOID Instance,
1450 IN PVOID InterfaceData,
1451 IN USHORT Version,
1452 IN USHORT Size,
1453 IN PINTERFACE Interface
1454 );
1455
1456 VOID
1457 NTAPI
1458 ario_ApplyBrokenVideoHack(
1459 IN PPCI_FDO_EXTENSION FdoExtension
1460 );
1461
1462 NTSTATUS
1463 NTAPI
1464 pcicbintrf_Constructor(
1465 IN PVOID DeviceExtension,
1466 IN PVOID Instance,
1467 IN PVOID InterfaceData,
1468 IN USHORT Version,
1469 IN USHORT Size,
1470 IN PINTERFACE Interface
1471 );
1472
1473 NTSTATUS
1474 NTAPI
1475 lddintrf_Constructor(
1476 IN PVOID DeviceExtension,
1477 IN PVOID Instance,
1478 IN PVOID InterfaceData,
1479 IN USHORT Version,
1480 IN USHORT Size,
1481 IN PINTERFACE Interface
1482 );
1483
1484 NTSTATUS
1485 NTAPI
1486 locintrf_Constructor(
1487 IN PVOID DeviceExtension,
1488 IN PVOID Instance,
1489 IN PVOID InterfaceData,
1490 IN USHORT Version,
1491 IN USHORT Size,
1492 IN PINTERFACE Interface
1493 );
1494
1495 NTSTATUS
1496 NTAPI
1497 PciPmeInterfaceConstructor(
1498 IN PVOID DeviceExtension,
1499 IN PVOID Instance,
1500 IN PVOID InterfaceData,
1501 IN USHORT Version,
1502 IN USHORT Size,
1503 IN PINTERFACE Interface
1504 );
1505
1506 NTSTATUS
1507 NTAPI
1508 routeintrf_Constructor(
1509 IN PVOID DeviceExtension,
1510 IN PVOID Instance,
1511 IN PVOID InterfaceData,
1512 IN USHORT Version,
1513 IN USHORT Size,
1514 IN PINTERFACE Interface
1515 );
1516
1517 NTSTATUS
1518 NTAPI
1519 devpresent_Constructor(
1520 IN PVOID DeviceExtension,
1521 IN PVOID Instance,
1522 IN PVOID InterfaceData,
1523 IN USHORT Version,
1524 IN USHORT Size,
1525 IN PINTERFACE Interface
1526 );
1527
1528 //
1529 // PCI Enumeration and Resources
1530 //
1531 NTSTATUS
1532 NTAPI
1533 PciQueryDeviceRelations(
1534 IN PPCI_FDO_EXTENSION DeviceExtension,
1535 IN OUT PDEVICE_RELATIONS *pDeviceRelations
1536 );
1537
1538 NTSTATUS
1539 NTAPI
1540 PciQueryResources(
1541 IN PPCI_PDO_EXTENSION PdoExtension,
1542 OUT PCM_RESOURCE_LIST *Buffer
1543 );
1544
1545 NTSTATUS
1546 NTAPI
1547 PciQueryTargetDeviceRelations(
1548 IN PPCI_PDO_EXTENSION PdoExtension,
1549 IN OUT PDEVICE_RELATIONS *pDeviceRelations
1550 );
1551
1552 NTSTATUS
1553 NTAPI
1554 PciQueryEjectionRelations(
1555 IN PPCI_PDO_EXTENSION PdoExtension,
1556 IN OUT PDEVICE_RELATIONS *pDeviceRelations
1557 );
1558
1559 NTSTATUS
1560 NTAPI
1561 PciQueryRequirements(
1562 IN PPCI_PDO_EXTENSION PdoExtension,
1563 IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *RequirementsList
1564 );
1565
1566 BOOLEAN
1567 NTAPI
1568 PciComputeNewCurrentSettings(
1569 IN PPCI_PDO_EXTENSION PdoExtension,
1570 IN PCM_RESOURCE_LIST ResourceList
1571 );
1572
1573 NTSTATUS
1574 NTAPI
1575 PciSetResources(
1576 IN PPCI_PDO_EXTENSION PdoExtension,
1577 IN BOOLEAN DoReset,
1578 IN BOOLEAN SomethingSomethingDarkSide
1579 );
1580
1581 NTSTATUS
1582 NTAPI
1583 PciBuildRequirementsList(
1584 IN PPCI_PDO_EXTENSION PdoExtension,
1585 IN PPCI_COMMON_HEADER PciData,
1586 OUT PIO_RESOURCE_REQUIREMENTS_LIST* Buffer
1587 );
1588
1589 //
1590 // Identification Functions
1591 //
1592 PWCHAR
1593 NTAPI
1594 PciGetDeviceDescriptionMessage(
1595 IN UCHAR BaseClass,
1596 IN UCHAR SubClass
1597 );
1598
1599 NTSTATUS
1600 NTAPI
1601 PciQueryDeviceText(
1602 IN PPCI_PDO_EXTENSION PdoExtension,
1603 IN DEVICE_TEXT_TYPE QueryType,
1604 IN ULONG Locale,
1605 OUT PWCHAR *Buffer
1606 );
1607
1608 NTSTATUS
1609 NTAPI
1610 PciQueryId(
1611 IN PPCI_PDO_EXTENSION DeviceExtension,
1612 IN BUS_QUERY_ID_TYPE QueryType,
1613 OUT PWCHAR *Buffer
1614 );
1615
1616 //
1617 // CardBUS Support
1618 //
1619 VOID
1620 NTAPI
1621 Cardbus_MassageHeaderForLimitsDetermination(
1622 IN PPCI_CONFIGURATOR_CONTEXT Context
1623 );
1624
1625 VOID
1626 NTAPI
1627 Cardbus_SaveCurrentSettings(
1628 IN PPCI_CONFIGURATOR_CONTEXT Context
1629 );
1630
1631 VOID
1632 NTAPI
1633 Cardbus_SaveLimits(
1634 IN PPCI_CONFIGURATOR_CONTEXT Context
1635 );
1636
1637 VOID
1638 NTAPI
1639 Cardbus_RestoreCurrent(
1640 IN PPCI_CONFIGURATOR_CONTEXT Context
1641 );
1642
1643 VOID
1644 NTAPI
1645 Cardbus_GetAdditionalResourceDescriptors(
1646 IN PPCI_CONFIGURATOR_CONTEXT Context,
1647 IN PPCI_COMMON_HEADER PciData,
1648 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1649 );
1650
1651 VOID
1652 NTAPI
1653 Cardbus_ResetDevice(
1654 IN PPCI_PDO_EXTENSION PdoExtension,
1655 IN PPCI_COMMON_HEADER PciData
1656 );
1657
1658 VOID
1659 NTAPI
1660 Cardbus_ChangeResourceSettings(
1661 IN PPCI_PDO_EXTENSION PdoExtension,
1662 IN PPCI_COMMON_HEADER PciData
1663 );
1664
1665 //
1666 // PCI Device Support
1667 //
1668 VOID
1669 NTAPI
1670 Device_MassageHeaderForLimitsDetermination(
1671 IN PPCI_CONFIGURATOR_CONTEXT Context
1672 );
1673
1674 VOID
1675 NTAPI
1676 Device_SaveCurrentSettings(
1677 IN PPCI_CONFIGURATOR_CONTEXT Context
1678 );
1679
1680 VOID
1681 NTAPI
1682 Device_SaveLimits(
1683 IN PPCI_CONFIGURATOR_CONTEXT Context
1684 );
1685
1686 VOID
1687 NTAPI
1688 Device_RestoreCurrent(
1689 IN PPCI_CONFIGURATOR_CONTEXT Context
1690 );
1691
1692 VOID
1693 NTAPI
1694 Device_GetAdditionalResourceDescriptors(
1695 IN PPCI_CONFIGURATOR_CONTEXT Context,
1696 IN PPCI_COMMON_HEADER PciData,
1697 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1698 );
1699
1700 VOID
1701 NTAPI
1702 Device_ResetDevice(
1703 IN PPCI_PDO_EXTENSION PdoExtension,
1704 IN PPCI_COMMON_HEADER PciData
1705 );
1706
1707 VOID
1708 NTAPI
1709 Device_ChangeResourceSettings(
1710 IN PPCI_PDO_EXTENSION PdoExtension,
1711 IN PPCI_COMMON_HEADER PciData
1712 );
1713
1714 //
1715 // PCI-to-PCI Bridge Device Support
1716 //
1717 VOID
1718 NTAPI
1719 PPBridge_MassageHeaderForLimitsDetermination(
1720 IN PPCI_CONFIGURATOR_CONTEXT Context
1721 );
1722
1723 VOID
1724 NTAPI
1725 PPBridge_SaveCurrentSettings(
1726 IN PPCI_CONFIGURATOR_CONTEXT Context
1727 );
1728
1729 VOID
1730 NTAPI
1731 PPBridge_SaveLimits(
1732 IN PPCI_CONFIGURATOR_CONTEXT Context
1733 );
1734
1735 VOID
1736 NTAPI
1737 PPBridge_RestoreCurrent(
1738 IN PPCI_CONFIGURATOR_CONTEXT Context
1739 );
1740
1741 VOID
1742 NTAPI
1743 PPBridge_GetAdditionalResourceDescriptors(
1744 IN PPCI_CONFIGURATOR_CONTEXT Context,
1745 IN PPCI_COMMON_HEADER PciData,
1746 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1747 );
1748
1749 VOID
1750 NTAPI
1751 PPBridge_ResetDevice(
1752 IN PPCI_PDO_EXTENSION PdoExtension,
1753 IN PPCI_COMMON_HEADER PciData
1754 );
1755
1756 VOID
1757 NTAPI
1758 PPBridge_ChangeResourceSettings(
1759 IN PPCI_PDO_EXTENSION PdoExtension,
1760 IN PPCI_COMMON_HEADER PciData
1761 );
1762
1763 //
1764 // Bus Number Routines
1765 //
1766 BOOLEAN
1767 NTAPI
1768 PciAreBusNumbersConfigured(
1769 IN PPCI_PDO_EXTENSION PdoExtension
1770 );
1771
1772 //
1773 // Routine Interface
1774 //
1775 NTSTATUS
1776 NTAPI
1777 PciCacheLegacyDeviceRouting(
1778 IN PDEVICE_OBJECT DeviceObject,
1779 IN ULONG BusNumber,
1780 IN ULONG SlotNumber,
1781 IN UCHAR InterruptLine,
1782 IN UCHAR InterruptPin,
1783 IN UCHAR BaseClass,
1784 IN UCHAR SubClass,
1785 IN PDEVICE_OBJECT PhysicalDeviceObject,
1786 IN PPCI_PDO_EXTENSION PdoExtension,
1787 OUT PDEVICE_OBJECT *pFoundDeviceObject
1788 );
1789
1790 //
1791 // External Resources
1792 //
1793 extern SINGLE_LIST_ENTRY PciFdoExtensionListHead;
1794 extern KEVENT PciGlobalLock;
1795 extern PPCI_INTERFACE PciInterfaces[];
1796 extern PCI_INTERFACE ArbiterInterfaceBusNumber;
1797 extern PCI_INTERFACE ArbiterInterfaceMemory;
1798 extern PCI_INTERFACE ArbiterInterfaceIo;
1799 extern PCI_INTERFACE BusHandlerInterface;
1800 extern PCI_INTERFACE PciRoutingInterface;
1801 extern PCI_INTERFACE PciCardbusPrivateInterface;
1802 extern PCI_INTERFACE PciLegacyDeviceDetectionInterface;
1803 extern PCI_INTERFACE PciPmeInterface;
1804 extern PCI_INTERFACE PciDevicePresentInterface;
1805 //extern PCI_INTERFACE PciNativeIdeInterface;
1806 extern PCI_INTERFACE PciLocationInterface;
1807 extern PCI_INTERFACE AgpTargetInterface;
1808 extern PCI_INTERFACE TranslatorInterfaceInterrupt;
1809 extern PDRIVER_OBJECT PciDriverObject;
1810 extern PWATCHDOG_TABLE WdTable;
1811 extern PPCI_HACK_ENTRY PciHackTable;
1812 extern BOOLEAN PciAssignBusNumbers;
1813 extern BOOLEAN PciEnableNativeModeATA;
1814 extern PPCI_IRQ_ROUTING_TABLE PciIrqRoutingTable;
1815 extern BOOLEAN PciRunningDatacenter;
1816
1817 /* Exported by NTOS, should this go in the NDK? */
1818 extern NTSYSAPI BOOLEAN InitSafeBootMode;
1819
1820 /* EOF */