[CMAKE]
[reactos.git] / drivers / bus / pcix / pci.h
1 /*
2 * PROJECT: ReactOS PCI Bus Driver
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: drivers/bus/pci/pci.h
5 * PURPOSE: Main Header File
6 * PROGRAMMERS: ReactOS Portable Systems Group
7 */
8
9 #include <initguid.h>
10 #include <ntifs.h>
11 #include <ntagp.h>
12 #include <wdmguid.h>
13 #include <wchar.h>
14 #include <acpiioct.h>
15 #include <drivers/pci/pci.h>
16 #include <drivers/acpi/acpi.h>
17 #include "halfuncs.h"
18 #include "rtlfuncs.h"
19 #include "vffuncs.h"
20 #include "bugcodes.h"
21
22 //
23 // Tag used in all pool allocations (Pci Bus)
24 //
25 #define PCI_POOL_TAG 'BicP'
26
27 //
28 // Checks if the specified FDO is the FDO for the Root PCI Bus
29 //
30 #define PCI_IS_ROOT_FDO(x) ((x)->BusRootFdoExtension == x)
31
32 //
33 // Assertions to make sure we are dealing with the right kind of extension
34 //
35 #define ASSERT_FDO(x) ASSERT((x)->ExtensionType == PciFdoExtensionType);
36 #define ASSERT_PDO(x) ASSERT((x)->ExtensionType == PciPdoExtensionType);
37
38 //
39 // PCI Hack Entry Name Lengths
40 //
41 #define PCI_HACK_ENTRY_SIZE sizeof(L"VVVVdddd") - sizeof(UNICODE_NULL)
42 #define PCI_HACK_ENTRY_REV_SIZE sizeof(L"VVVVddddRR") - sizeof(UNICODE_NULL)
43 #define PCI_HACK_ENTRY_SUBSYS_SIZE sizeof(L"VVVVddddssssIIII") - sizeof(UNICODE_NULL)
44 #define PCI_HACK_ENTRY_FULL_SIZE sizeof(L"VVVVddddssssIIIIRR") - sizeof(UNICODE_NULL)
45
46 //
47 // PCI Hack Entry Flags
48 //
49 #define PCI_HACK_HAS_REVISION_INFO 0x01
50 #define PCI_HACK_HAS_SUBSYSTEM_INFO 0x02
51
52 //
53 // PCI Interface Flags
54 //
55 #define PCI_INTERFACE_PDO 0x01
56 #define PCI_INTERFACE_FDO 0x02
57 #define PCI_INTERFACE_ROOT 0x04
58
59 //
60 // PCI Skip Function Flags
61 //
62 #define PCI_SKIP_DEVICE_ENUMERATION 0x01
63 #define PCI_SKIP_RESOURCE_ENUMERATION 0x02
64
65 //
66 // PCI Apply Hack Flags
67 //
68 #define PCI_HACK_FIXUP_BEFORE_CONFIGURATION 0x00
69 #define PCI_HACK_FIXUP_AFTER_CONFIGURATION 0x01
70 #define PCI_HACK_FIXUP_BEFORE_UPDATE 0x03
71
72 //
73 // PCI Debugging Device Support
74 //
75 #define MAX_DEBUGGING_DEVICES_SUPPORTED 0x04
76
77 //
78 // PCI Driver Verifier Failures
79 //
80 #define PCI_VERIFIER_CODES 0x04
81
82 //
83 // Device Extension, Interface, Translator and Arbiter Signatures
84 //
85 typedef enum _PCI_SIGNATURE
86 {
87 PciPdoExtensionType = 'icP0',
88 PciFdoExtensionType = 'icP1',
89 PciArb_Io = 'icP2',
90 PciArb_Memory = 'icP3',
91 PciArb_Interrupt = 'icP4',
92 PciArb_BusNumber = 'icP5',
93 PciTrans_Interrupt = 'icP6',
94 PciInterface_BusHandler = 'icP7',
95 PciInterface_IntRouteHandler = 'icP8',
96 PciInterface_PciCb = 'icP9',
97 PciInterface_LegacyDeviceDetection = 'icP:',
98 PciInterface_PmeHandler = 'icP;',
99 PciInterface_DevicePresent = 'icP<',
100 PciInterface_NativeIde = 'icP=',
101 PciInterface_AgpTarget = 'icP>',
102 PciInterface_Location = 'icP?'
103 } PCI_SIGNATURE, *PPCI_SIGNATURE;
104
105 //
106 // Device Extension Logic States
107 //
108 typedef enum _PCI_STATE
109 {
110 PciNotStarted,
111 PciStarted,
112 PciDeleted,
113 PciStopped,
114 PciSurpriseRemoved,
115 PciSynchronizedOperation,
116 PciMaxObjectState
117 } PCI_STATE;
118
119 //
120 // IRP Dispatch Logic Style
121 //
122 typedef enum _PCI_DISPATCH_STYLE
123 {
124 IRP_COMPLETE,
125 IRP_DOWNWARD,
126 IRP_UPWARD,
127 IRP_DISPATCH,
128 } PCI_DISPATCH_STYLE;
129
130 //
131 // PCI Hack Entry Information
132 //
133 typedef struct _PCI_HACK_ENTRY
134 {
135 USHORT VendorID;
136 USHORT DeviceID;
137 USHORT SubVendorID;
138 USHORT SubSystemID;
139 ULONGLONG HackFlags;
140 USHORT RevisionID;
141 UCHAR Flags;
142 } PCI_HACK_ENTRY, *PPCI_HACK_ENTRY;
143
144 //
145 // Power State Information for Device Extension
146 //
147 typedef struct _PCI_POWER_STATE
148 {
149 SYSTEM_POWER_STATE CurrentSystemState;
150 DEVICE_POWER_STATE CurrentDeviceState;
151 SYSTEM_POWER_STATE SystemWakeLevel;
152 DEVICE_POWER_STATE DeviceWakeLevel;
153 DEVICE_POWER_STATE SystemStateMapping[7];
154 PIRP WaitWakeIrp;
155 PVOID SavedCancelRoutine;
156 LONG Paging;
157 LONG Hibernate;
158 LONG CrashDump;
159 } PCI_POWER_STATE, *PPCI_POWER_STATE;
160
161 //
162 // Internal PCI Lock Structure
163 //
164 typedef struct _PCI_LOCK
165 {
166 LONG Atom;
167 BOOLEAN OldIrql;
168 } PCI_LOCK, *PPCI_LOCK;
169
170 //
171 // Device Extension for a Bus FDO
172 //
173 typedef struct _PCI_FDO_EXTENSION
174 {
175 SINGLE_LIST_ENTRY List;
176 ULONG ExtensionType;
177 struct _PCI_MJ_DISPATCH_TABLE *IrpDispatchTable;
178 BOOLEAN DeviceState;
179 BOOLEAN TentativeNextState;
180 KEVENT SecondaryExtLock;
181 PDEVICE_OBJECT PhysicalDeviceObject;
182 PDEVICE_OBJECT FunctionalDeviceObject;
183 PDEVICE_OBJECT AttachedDeviceObject;
184 KEVENT ChildListLock;
185 struct _PCI_PDO_EXTENSION *ChildPdoList;
186 struct _PCI_FDO_EXTENSION *BusRootFdoExtension;
187 struct _PCI_FDO_EXTENSION *ParentFdoExtension;
188 struct _PCI_PDO_EXTENSION *ChildBridgePdoList;
189 PPCI_BUS_INTERFACE_STANDARD PciBusInterface;
190 BOOLEAN MaxSubordinateBus;
191 BUS_HANDLER *BusHandler;
192 BOOLEAN BaseBus;
193 BOOLEAN Fake;
194 BOOLEAN ChildDelete;
195 BOOLEAN Scanned;
196 BOOLEAN ArbitersInitialized;
197 BOOLEAN BrokenVideoHackApplied;
198 BOOLEAN Hibernated;
199 PCI_POWER_STATE PowerState;
200 SINGLE_LIST_ENTRY SecondaryExtension;
201 LONG ChildWaitWakeCount;
202 PPCI_COMMON_CONFIG PreservedConfig;
203 PCI_LOCK Lock;
204 struct
205 {
206 BOOLEAN Acquired;
207 BOOLEAN CacheLineSize;
208 BOOLEAN LatencyTimer;
209 BOOLEAN EnablePERR;
210 BOOLEAN EnableSERR;
211 } HotPlugParameters;
212 LONG BusHackFlags;
213 } PCI_FDO_EXTENSION, *PPCI_FDO_EXTENSION;
214
215 typedef struct _PCI_FUNCTION_RESOURCES
216 {
217 IO_RESOURCE_DESCRIPTOR Limit[7];
218 CM_PARTIAL_RESOURCE_DESCRIPTOR Current[7];
219 } PCI_FUNCTION_RESOURCES, *PPCI_FUNCTION_RESOURCES;
220
221 typedef union _PCI_HEADER_TYPE_DEPENDENT
222 {
223 struct
224 {
225 UCHAR Spare[4];
226 } type0;
227 struct
228 {
229 UCHAR PrimaryBus;
230 UCHAR SecondaryBus;
231 UCHAR SubordinateBus;
232 UCHAR SubtractiveDecode:1;
233 UCHAR IsaBitSet:1;
234 UCHAR VgaBitSet:1;
235 UCHAR WeChangedBusNumbers:1;
236 UCHAR IsaBitRequired:1;
237 } type1;
238 struct
239 {
240 UCHAR Spare[4];
241 } type2;
242 } PCI_HEADER_TYPE_DEPENDENT, *PPCI_HEADER_TYPE_DEPENDENT;
243
244 typedef struct _PCI_PDO_EXTENSION
245 {
246 PVOID Next;
247 ULONG ExtensionType;
248 struct _PCI_MJ_DISPATCH_TABLE *IrpDispatchTable;
249 BOOLEAN DeviceState;
250 BOOLEAN TentativeNextState;
251
252 KEVENT SecondaryExtLock;
253 PCI_SLOT_NUMBER Slot;
254 PDEVICE_OBJECT PhysicalDeviceObject;
255 PPCI_FDO_EXTENSION ParentFdoExtension;
256 SINGLE_LIST_ENTRY SecondaryExtension;
257 LONG BusInterfaceReferenceCount;
258 LONG AgpInterfaceReferenceCount;
259 USHORT VendorId;
260 USHORT DeviceId;
261 USHORT SubsystemVendorId;
262 USHORT SubsystemId;
263 BOOLEAN RevisionId;
264 BOOLEAN ProgIf;
265 BOOLEAN SubClass;
266 BOOLEAN BaseClass;
267 BOOLEAN AdditionalResourceCount;
268 BOOLEAN AdjustedInterruptLine;
269 BOOLEAN InterruptPin;
270 BOOLEAN RawInterruptLine;
271 BOOLEAN CapabilitiesPtr;
272 BOOLEAN SavedLatencyTimer;
273 BOOLEAN SavedCacheLineSize;
274 BOOLEAN HeaderType;
275 BOOLEAN NotPresent;
276 BOOLEAN ReportedMissing;
277 BOOLEAN ExpectedWritebackFailure;
278 BOOLEAN NoTouchPmeEnable;
279 BOOLEAN LegacyDriver;
280 BOOLEAN UpdateHardware;
281 BOOLEAN MovedDevice;
282 BOOLEAN DisablePowerDown;
283 BOOLEAN NeedsHotPlugConfiguration;
284 BOOLEAN SwitchedIDEToNativeMode;
285 BOOLEAN BIOSAllowsIDESwitchToNativeMode;
286 BOOLEAN IoSpaceUnderNativeIdeControl;
287 BOOLEAN OnDebugPath;
288 PCI_POWER_STATE PowerState;
289 PCI_HEADER_TYPE_DEPENDENT Dependent;
290 ULONGLONG HackFlags;
291 PCI_FUNCTION_RESOURCES *Resources;
292 PCI_FDO_EXTENSION *BridgeFdoExtension;
293 struct _PCI_PDO_EXTENSION *NextBridge;
294 struct _PCI_PDO_EXTENSION *NextHashEntry;
295 PCI_LOCK Lock;
296 PCI_PMC PowerCapabilities;
297 BOOLEAN TargetAgpCapabilityId;
298 USHORT CommandEnables;
299 USHORT InitialCommand;
300 } PCI_PDO_EXTENSION, *PPCI_PDO_EXTENSION;
301
302 //
303 // IRP Dispatch Function Type
304 //
305 typedef NTSTATUS (NTAPI *PCI_DISPATCH_FUNCTION)(
306 IN PIRP Irp,
307 IN PIO_STACK_LOCATION IoStackLocation,
308 IN PVOID DeviceExtension
309 );
310
311 //
312 // IRP Dispatch Minor Table
313 //
314 typedef struct _PCI_MN_DISPATCH_TABLE
315 {
316 PCI_DISPATCH_STYLE DispatchStyle;
317 PCI_DISPATCH_FUNCTION DispatchFunction;
318 } PCI_MN_DISPATCH_TABLE, *PPCI_MN_DISPATCH_TABLE;
319
320 //
321 // IRP Dispatch Major Table
322 //
323 typedef struct _PCI_MJ_DISPATCH_TABLE
324 {
325 ULONG PnpIrpMaximumMinorFunction;
326 PPCI_MN_DISPATCH_TABLE PnpIrpDispatchTable;
327 ULONG PowerIrpMaximumMinorFunction;
328 PPCI_MN_DISPATCH_TABLE PowerIrpDispatchTable;
329 PCI_DISPATCH_STYLE SystemControlIrpDispatchStyle;
330 PCI_DISPATCH_FUNCTION SystemControlIrpDispatchFunction;
331 PCI_DISPATCH_STYLE OtherIrpDispatchStyle;
332 PCI_DISPATCH_FUNCTION OtherIrpDispatchFunction;
333 } PCI_MJ_DISPATCH_TABLE, *PPCI_MJ_DISPATCH_TABLE;
334
335 //
336 // Generic PCI Interface Constructor and Initializer
337 //
338 struct _PCI_INTERFACE;
339 typedef NTSTATUS (NTAPI *PCI_INTERFACE_CONSTRUCTOR)(
340 IN PVOID DeviceExtension,
341 IN PVOID Instance,
342 IN PVOID InterfaceData,
343 IN USHORT Version,
344 IN USHORT Size,
345 IN PINTERFACE Interface
346 );
347
348 typedef NTSTATUS (NTAPI *PCI_INTERFACE_INITIALIZER)(
349 IN PVOID Instance
350 );
351
352 //
353 // Generic PCI Interface (Interface, Translator, Arbiter)
354 //
355 typedef struct _PCI_INTERFACE
356 {
357 CONST GUID *InterfaceType;
358 USHORT MinSize;
359 USHORT MinVersion;
360 USHORT MaxVersion;
361 USHORT Flags;
362 LONG ReferenceCount;
363 PCI_SIGNATURE Signature;
364 PCI_INTERFACE_CONSTRUCTOR Constructor;
365 PCI_INTERFACE_INITIALIZER Initializer;
366 } PCI_INTERFACE, *PPCI_INTERFACE;
367
368 //
369 // Generic Secondary Extension Instance Header (Interface, Translator, Arbiter)
370 //
371 typedef struct PCI_SECONDARY_EXTENSION
372 {
373 SINGLE_LIST_ENTRY List;
374 PCI_SIGNATURE ExtensionType;
375 PVOID Destructor;
376 } PCI_SECONDARY_EXTENSION, *PPCI_SECONDARY_EXTENSION;
377
378 //
379 // PCI Arbiter Instance
380 //
381 typedef struct PCI_ARBITER_INSTANCE
382 {
383 PCI_SECONDARY_EXTENSION Header;
384 PPCI_INTERFACE Interface;
385 PPCI_FDO_EXTENSION BusFdoExtension;
386 WCHAR InstanceName[24];
387 //ARBITER_INSTANCE CommonInstance; FIXME: Need Arbiter Headers
388 } PCI_ARBITER_INSTANCE, *PPCI_ARBITER_INSTANCE;
389
390 //
391 // PCI Verifier Data
392 //
393 typedef struct _PCI_VERIFIER_DATA
394 {
395 ULONG FailureCode;
396 VF_FAILURE_CLASS FailureClass;
397 ULONG AssertionControl;
398 PCHAR DebuggerMessageText;
399 } PCI_VERIFIER_DATA, *PPCI_VERIFIER_DATA;
400
401 //
402 // PCI Configuration Callbacks
403 //
404 struct _PCI_CONFIGURATOR_CONTEXT;
405
406 typedef VOID (NTAPI *PCI_CONFIGURATOR_INITIALIZE)(
407 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
408 );
409
410 typedef VOID (NTAPI *PCI_CONFIGURATOR_RESTORE_CURRENT)(
411 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
412 );
413
414 typedef VOID (NTAPI *PCI_CONFIGURATOR_SAVE_LIMITS)(
415 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
416 );
417
418 typedef VOID (NTAPI *PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS)(
419 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
420 );
421
422 typedef VOID (NTAPI *PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS)(
423 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
424 );
425
426 typedef VOID (NTAPI *PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS)(
427 IN struct _PCI_CONFIGURATOR_CONTEXT* Context,
428 IN PPCI_COMMON_HEADER PciData,
429 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
430 );
431
432 typedef VOID (NTAPI *PCI_CONFIGURATOR_RESET_DEVICE)(
433 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
434 );
435
436 //
437 // PCI Configurator
438 //
439 typedef struct _PCI_CONFIGURATOR
440 {
441 PCI_CONFIGURATOR_INITIALIZE Initialize;
442 PCI_CONFIGURATOR_RESTORE_CURRENT RestoreCurrent;
443 PCI_CONFIGURATOR_SAVE_LIMITS SaveLimits;
444 PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS SaveCurrentSettings;
445 PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS ChangeResourceSettings;
446 PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS GetAdditionalResourceDescriptors;
447 PCI_CONFIGURATOR_RESET_DEVICE ResetDevice;
448 } PCI_CONFIGURATOR, *PPCI_CONFIGURATOR;
449
450 //
451 // PCI Configurator Context
452 //
453 typedef struct _PCI_CONFIGURATOR_CONTEXT
454 {
455 PPCI_PDO_EXTENSION PdoExtension;
456 PPCI_COMMON_HEADER Current;
457 PPCI_COMMON_HEADER PciData;
458 PPCI_CONFIGURATOR Configurator;
459 USHORT SecondaryStatus;
460 USHORT Status;
461 USHORT Command;
462 } PCI_CONFIGURATOR_CONTEXT, *PPCI_CONFIGURATOR_CONTEXT;
463
464 //
465 // PCI IPI Function
466 //
467 typedef VOID (NTAPI *PCI_IPI_FUNCTION)(
468 IN PVOID Reserved,
469 IN PPCI_CONFIGURATOR_CONTEXT Context
470 );
471
472 //
473 // PCI IPI Context
474 //
475 typedef struct _PCI_IPI_CONTEXT
476 {
477 LONG RunCount;
478 ULONG Barrier;
479 PPCI_PDO_EXTENSION PdoExtension;
480 PCI_IPI_FUNCTION Function;
481 PVOID Context;
482 } PCI_IPI_CONTEXT, *PPCI_IPI_CONTEXT;
483
484 //
485 // IRP Dispatch Routines
486 //
487 NTSTATUS
488 NTAPI
489 PciDispatchIrp(
490 IN PDEVICE_OBJECT DeviceObject,
491 IN PIRP Irp
492 );
493
494 NTSTATUS
495 NTAPI
496 PciIrpNotSupported(
497 IN PIRP Irp,
498 IN PIO_STACK_LOCATION IoStackLocation,
499 IN PPCI_FDO_EXTENSION DeviceExtension
500 );
501
502 NTSTATUS
503 NTAPI
504 PciPassIrpFromFdoToPdo(
505 IN PPCI_FDO_EXTENSION DeviceExtension,
506 IN PIRP Irp
507 );
508
509 NTSTATUS
510 NTAPI
511 PciCallDownIrpStack(
512 IN PPCI_FDO_EXTENSION DeviceExtension,
513 IN PIRP Irp
514 );
515
516 NTSTATUS
517 NTAPI
518 PciIrpInvalidDeviceRequest(
519 IN PIRP Irp,
520 IN PIO_STACK_LOCATION IoStackLocation,
521 IN PPCI_FDO_EXTENSION DeviceExtension
522 );
523
524 //
525 // Power Routines
526 //
527 NTSTATUS
528 NTAPI
529 PciFdoWaitWake(
530 IN PIRP Irp,
531 IN PIO_STACK_LOCATION IoStackLocation,
532 IN PPCI_FDO_EXTENSION DeviceExtension
533 );
534
535 NTSTATUS
536 NTAPI
537 PciFdoSetPowerState(
538 IN PIRP Irp,
539 IN PIO_STACK_LOCATION IoStackLocation,
540 IN PPCI_FDO_EXTENSION DeviceExtension
541 );
542
543 NTSTATUS
544 NTAPI
545 PciFdoIrpQueryPower(
546 IN PIRP Irp,
547 IN PIO_STACK_LOCATION IoStackLocation,
548 IN PPCI_FDO_EXTENSION DeviceExtension
549 );
550
551 NTSTATUS
552 NTAPI
553 PciSetPowerManagedDevicePowerState(
554 IN PPCI_PDO_EXTENSION DeviceExtension,
555 IN DEVICE_POWER_STATE DeviceState,
556 IN BOOLEAN IrpSet
557 );
558
559 //
560 // Bus FDO Routines
561 //
562 NTSTATUS
563 NTAPI
564 PciAddDevice(
565 IN PDRIVER_OBJECT DriverObject,
566 IN PDEVICE_OBJECT PhysicalDeviceObject
567 );
568
569 NTSTATUS
570 NTAPI
571 PciFdoIrpStartDevice(
572 IN PIRP Irp,
573 IN PIO_STACK_LOCATION IoStackLocation,
574 IN PPCI_FDO_EXTENSION DeviceExtension
575 );
576
577 NTSTATUS
578 NTAPI
579 PciFdoIrpQueryRemoveDevice(
580 IN PIRP Irp,
581 IN PIO_STACK_LOCATION IoStackLocation,
582 IN PPCI_FDO_EXTENSION DeviceExtension
583 );
584
585 NTSTATUS
586 NTAPI
587 PciFdoIrpRemoveDevice(
588 IN PIRP Irp,
589 IN PIO_STACK_LOCATION IoStackLocation,
590 IN PPCI_FDO_EXTENSION DeviceExtension
591 );
592
593 NTSTATUS
594 NTAPI
595 PciFdoIrpCancelRemoveDevice(
596 IN PIRP Irp,
597 IN PIO_STACK_LOCATION IoStackLocation,
598 IN PPCI_FDO_EXTENSION DeviceExtension
599 );
600
601 NTSTATUS
602 NTAPI
603 PciFdoIrpStopDevice(
604 IN PIRP Irp,
605 IN PIO_STACK_LOCATION IoStackLocation,
606 IN PPCI_FDO_EXTENSION DeviceExtension
607 );
608
609 NTSTATUS
610 NTAPI
611 PciFdoIrpQueryStopDevice(
612 IN PIRP Irp,
613 IN PIO_STACK_LOCATION IoStackLocation,
614 IN PPCI_FDO_EXTENSION DeviceExtension
615 );
616
617 NTSTATUS
618 NTAPI
619 PciFdoIrpCancelStopDevice(
620 IN PIRP Irp,
621 IN PIO_STACK_LOCATION IoStackLocation,
622 IN PPCI_FDO_EXTENSION DeviceExtension
623 );
624
625 NTSTATUS
626 NTAPI
627 PciFdoIrpQueryDeviceRelations(
628 IN PIRP Irp,
629 IN PIO_STACK_LOCATION IoStackLocation,
630 IN PPCI_FDO_EXTENSION DeviceExtension
631 );
632
633 NTSTATUS
634 NTAPI
635 PciFdoIrpQueryInterface(
636 IN PIRP Irp,
637 IN PIO_STACK_LOCATION IoStackLocation,
638 IN PPCI_FDO_EXTENSION DeviceExtension
639 );
640
641 NTSTATUS
642 NTAPI
643 PciFdoIrpQueryCapabilities(
644 IN PIRP Irp,
645 IN PIO_STACK_LOCATION IoStackLocation,
646 IN PPCI_FDO_EXTENSION DeviceExtension
647 );
648
649 NTSTATUS
650 NTAPI
651 PciFdoIrpDeviceUsageNotification(
652 IN PIRP Irp,
653 IN PIO_STACK_LOCATION IoStackLocation,
654 IN PPCI_FDO_EXTENSION DeviceExtension
655 );
656
657 NTSTATUS
658 NTAPI
659 PciFdoIrpSurpriseRemoval(
660 IN PIRP Irp,
661 IN PIO_STACK_LOCATION IoStackLocation,
662 IN PPCI_FDO_EXTENSION DeviceExtension
663 );
664
665 NTSTATUS
666 NTAPI
667 PciFdoIrpQueryLegacyBusInformation(
668 IN PIRP Irp,
669 IN PIO_STACK_LOCATION IoStackLocation,
670 IN PPCI_FDO_EXTENSION DeviceExtension
671 );
672
673 //
674 // Device PDO Routines
675 //
676 NTSTATUS
677 NTAPI
678 PciPdoCreate(
679 IN PPCI_FDO_EXTENSION DeviceExtension,
680 IN PCI_SLOT_NUMBER Slot,
681 OUT PDEVICE_OBJECT *PdoDeviceObject
682 );
683
684 NTSTATUS
685 NTAPI
686 PciPdoWaitWake(
687 IN PIRP Irp,
688 IN PIO_STACK_LOCATION IoStackLocation,
689 IN PPCI_PDO_EXTENSION DeviceExtension
690 );
691
692 NTSTATUS
693 NTAPI
694 PciPdoSetPowerState(
695 IN PIRP Irp,
696 IN PIO_STACK_LOCATION IoStackLocation,
697 IN PPCI_PDO_EXTENSION DeviceExtension
698 );
699
700 NTSTATUS
701 NTAPI
702 PciPdoIrpQueryPower(
703 IN PIRP Irp,
704 IN PIO_STACK_LOCATION IoStackLocation,
705 IN PPCI_PDO_EXTENSION DeviceExtension
706 );
707
708 NTSTATUS
709 NTAPI
710 PciPdoIrpStartDevice(
711 IN PIRP Irp,
712 IN PIO_STACK_LOCATION IoStackLocation,
713 IN PPCI_PDO_EXTENSION DeviceExtension
714 );
715
716 NTSTATUS
717 NTAPI
718 PciPdoIrpQueryRemoveDevice(
719 IN PIRP Irp,
720 IN PIO_STACK_LOCATION IoStackLocation,
721 IN PPCI_PDO_EXTENSION DeviceExtension
722 );
723
724 NTSTATUS
725 NTAPI
726 PciPdoIrpRemoveDevice(
727 IN PIRP Irp,
728 IN PIO_STACK_LOCATION IoStackLocation,
729 IN PPCI_PDO_EXTENSION DeviceExtension
730 );
731
732 NTSTATUS
733 NTAPI
734 PciPdoIrpCancelRemoveDevice(
735 IN PIRP Irp,
736 IN PIO_STACK_LOCATION IoStackLocation,
737 IN PPCI_PDO_EXTENSION DeviceExtension
738 );
739
740 NTSTATUS
741 NTAPI
742 PciPdoIrpStopDevice(
743 IN PIRP Irp,
744 IN PIO_STACK_LOCATION IoStackLocation,
745 IN PPCI_PDO_EXTENSION DeviceExtension
746 );
747
748 NTSTATUS
749 NTAPI
750 PciPdoIrpQueryStopDevice(
751 IN PIRP Irp,
752 IN PIO_STACK_LOCATION IoStackLocation,
753 IN PPCI_PDO_EXTENSION DeviceExtension
754 );
755
756 NTSTATUS
757 NTAPI
758 PciPdoIrpCancelStopDevice(
759 IN PIRP Irp,
760 IN PIO_STACK_LOCATION IoStackLocation,
761 IN PPCI_PDO_EXTENSION DeviceExtension
762 );
763
764 NTSTATUS
765 NTAPI
766 PciPdoIrpQueryDeviceRelations(
767 IN PIRP Irp,
768 IN PIO_STACK_LOCATION IoStackLocation,
769 IN PPCI_PDO_EXTENSION DeviceExtension
770 );
771
772 NTSTATUS
773 NTAPI
774 PciPdoIrpQueryInterface(
775 IN PIRP Irp,
776 IN PIO_STACK_LOCATION IoStackLocation,
777 IN PPCI_PDO_EXTENSION DeviceExtension
778 );
779
780 NTSTATUS
781 NTAPI
782 PciPdoIrpQueryCapabilities(
783 IN PIRP Irp,
784 IN PIO_STACK_LOCATION IoStackLocation,
785 IN PPCI_PDO_EXTENSION DeviceExtension
786 );
787
788 NTSTATUS
789 NTAPI
790 PciPdoIrpQueryResources(
791 IN PIRP Irp,
792 IN PIO_STACK_LOCATION IoStackLocation,
793 IN PPCI_PDO_EXTENSION DeviceExtension
794 );
795
796 NTSTATUS
797 NTAPI
798 PciPdoIrpQueryResourceRequirements(
799 IN PIRP Irp,
800 IN PIO_STACK_LOCATION IoStackLocation,
801 IN PPCI_PDO_EXTENSION DeviceExtension
802 );
803
804 NTSTATUS
805 NTAPI
806 PciPdoIrpQueryDeviceText(
807 IN PIRP Irp,
808 IN PIO_STACK_LOCATION IoStackLocation,
809 IN PPCI_PDO_EXTENSION DeviceExtension
810 );
811
812 NTSTATUS
813 NTAPI
814 PciPdoIrpReadConfig(
815 IN PIRP Irp,
816 IN PIO_STACK_LOCATION IoStackLocation,
817 IN PPCI_PDO_EXTENSION DeviceExtension
818 );
819
820 NTSTATUS
821 NTAPI
822 PciPdoIrpWriteConfig(
823 IN PIRP Irp,
824 IN PIO_STACK_LOCATION IoStackLocation,
825 IN PPCI_PDO_EXTENSION DeviceExtension
826 );
827
828 NTSTATUS
829 NTAPI
830 PciPdoIrpQueryId(
831 IN PIRP Irp,
832 IN PIO_STACK_LOCATION IoStackLocation,
833 IN PPCI_PDO_EXTENSION DeviceExtension
834 );
835
836 NTSTATUS
837 NTAPI
838 PciPdoIrpQueryDeviceState(
839 IN PIRP Irp,
840 IN PIO_STACK_LOCATION IoStackLocation,
841 IN PPCI_PDO_EXTENSION DeviceExtension
842 );
843
844 NTSTATUS
845 NTAPI
846 PciPdoIrpQueryBusInformation(
847 IN PIRP Irp,
848 IN PIO_STACK_LOCATION IoStackLocation,
849 IN PPCI_PDO_EXTENSION DeviceExtension
850 );
851
852 NTSTATUS
853 NTAPI
854 PciPdoIrpDeviceUsageNotification(
855 IN PIRP Irp,
856 IN PIO_STACK_LOCATION IoStackLocation,
857 IN PPCI_PDO_EXTENSION DeviceExtension
858 );
859
860 NTSTATUS
861 NTAPI
862 PciPdoIrpSurpriseRemoval(
863 IN PIRP Irp,
864 IN PIO_STACK_LOCATION IoStackLocation,
865 IN PPCI_PDO_EXTENSION DeviceExtension
866 );
867
868 NTSTATUS
869 NTAPI
870 PciPdoIrpQueryLegacyBusInformation(
871 IN PIRP Irp,
872 IN PIO_STACK_LOCATION IoStackLocation,
873 IN PPCI_PDO_EXTENSION DeviceExtension
874 );
875
876
877 //
878 // HAL Callback/Hook Routines
879 //
880 VOID
881 NTAPI
882 PciHookHal(
883 VOID
884 );
885
886 //
887 // PCI Verifier Routines
888 //
889 VOID
890 NTAPI
891 PciVerifierInit(
892 IN PDRIVER_OBJECT DriverObject
893 );
894
895 PPCI_VERIFIER_DATA
896 NTAPI
897 PciVerifierRetrieveFailureData(
898 IN ULONG FailureCode
899 );
900
901 //
902 // Utility Routines
903 //
904 BOOLEAN
905 NTAPI
906 PciStringToUSHORT(
907 IN PWCHAR String,
908 OUT PUSHORT Value
909 );
910
911 BOOLEAN
912 NTAPI
913 PciIsDatacenter(
914 VOID
915 );
916
917 NTSTATUS
918 NTAPI
919 PciBuildDefaultExclusionLists(
920 VOID
921 );
922
923 BOOLEAN
924 NTAPI
925 PciUnicodeStringStrStr(
926 IN PUNICODE_STRING InputString,
927 IN PCUNICODE_STRING EqualString,
928 IN BOOLEAN CaseInSensitive
929 );
930
931 BOOLEAN
932 NTAPI
933 PciOpenKey(
934 IN PWCHAR KeyName,
935 IN HANDLE RootKey,
936 IN ACCESS_MASK DesiredAccess,
937 OUT PHANDLE KeyHandle,
938 OUT PNTSTATUS KeyStatus
939 );
940
941 NTSTATUS
942 NTAPI
943 PciGetRegistryValue(
944 IN PWCHAR ValueName,
945 IN PWCHAR KeyName,
946 IN HANDLE RootHandle,
947 IN ULONG Type,
948 OUT PVOID *OutputBuffer,
949 OUT PULONG OutputLength
950 );
951
952 PPCI_FDO_EXTENSION
953 NTAPI
954 PciFindParentPciFdoExtension(
955 IN PDEVICE_OBJECT DeviceObject,
956 IN PKEVENT Lock
957 );
958
959 VOID
960 NTAPI
961 PciInsertEntryAtTail(
962 IN PSINGLE_LIST_ENTRY ListHead,
963 IN PPCI_FDO_EXTENSION DeviceExtension,
964 IN PKEVENT Lock
965 );
966
967 NTSTATUS
968 NTAPI
969 PciGetDeviceProperty(
970 IN PDEVICE_OBJECT DeviceObject,
971 IN DEVICE_REGISTRY_PROPERTY DeviceProperty,
972 OUT PVOID *OutputBuffer
973 );
974
975 NTSTATUS
976 NTAPI
977 PciSendIoctl(
978 IN PDEVICE_OBJECT DeviceObject,
979 IN ULONG IoControlCode,
980 IN PVOID InputBuffer,
981 IN ULONG InputBufferLength,
982 IN PVOID OutputBuffer,
983 IN ULONG OutputBufferLength
984 );
985
986 VOID
987 NTAPI
988 PcipLinkSecondaryExtension(
989 IN PSINGLE_LIST_ENTRY List,
990 IN PVOID Lock,
991 IN PPCI_SECONDARY_EXTENSION SecondaryExtension,
992 IN PCI_SIGNATURE ExtensionType,
993 IN PVOID Destructor
994 );
995
996 PPCI_SECONDARY_EXTENSION
997 NTAPI
998 PciFindNextSecondaryExtension(
999 IN PSINGLE_LIST_ENTRY ListHead,
1000 IN PCI_SIGNATURE ExtensionType
1001 );
1002
1003 ULONGLONG
1004 NTAPI
1005 PciGetHackFlags(
1006 IN USHORT VendorId,
1007 IN USHORT DeviceId,
1008 IN USHORT SubVendorId,
1009 IN USHORT SubSystemId,
1010 IN UCHAR RevisionId
1011 );
1012
1013 PPCI_PDO_EXTENSION
1014 NTAPI
1015 PciFindPdoByFunction(
1016 IN PPCI_FDO_EXTENSION DeviceExtension,
1017 IN ULONG FunctionNumber,
1018 IN PPCI_COMMON_HEADER PciData
1019 );
1020
1021 BOOLEAN
1022 NTAPI
1023 PciIsCriticalDeviceClass(
1024 IN UCHAR BaseClass,
1025 IN UCHAR SubClass
1026 );
1027
1028 BOOLEAN
1029 NTAPI
1030 PciIsDeviceOnDebugPath(
1031 IN PPCI_PDO_EXTENSION DeviceExtension
1032 );
1033
1034 NTSTATUS
1035 NTAPI
1036 PciGetBiosConfig(
1037 IN PPCI_PDO_EXTENSION DeviceExtension,
1038 OUT PPCI_COMMON_HEADER PciData
1039 );
1040
1041 NTSTATUS
1042 NTAPI
1043 PciSaveBiosConfig(
1044 IN PPCI_PDO_EXTENSION DeviceExtension,
1045 OUT PPCI_COMMON_HEADER PciData
1046 );
1047
1048 UCHAR
1049 NTAPI
1050 PciReadDeviceCapability(
1051 IN PPCI_PDO_EXTENSION DeviceExtension,
1052 IN UCHAR Offset,
1053 IN ULONG CapabilityId,
1054 OUT PPCI_CAPABILITIES_HEADER Buffer,
1055 IN ULONG Length
1056 );
1057
1058 BOOLEAN
1059 NTAPI
1060 PciCanDisableDecodes(
1061 IN PPCI_PDO_EXTENSION DeviceExtension,
1062 IN PPCI_COMMON_HEADER Config,
1063 IN ULONGLONG HackFlags,
1064 IN BOOLEAN ForPowerDown
1065 );
1066
1067 ULONG_PTR
1068 NTAPI
1069 PciExecuteCriticalSystemRoutine(
1070 IN ULONG_PTR IpiContext
1071 );
1072
1073 BOOLEAN
1074 NTAPI
1075 PciIsSlotPresentInParentMethod(
1076 IN PPCI_PDO_EXTENSION PdoExtension,
1077 IN ULONG Method
1078 );
1079
1080 VOID
1081 NTAPI
1082 PciDecodeEnable(
1083 IN PPCI_PDO_EXTENSION PdoExtension,
1084 IN BOOLEAN Enable,
1085 OUT PUSHORT Command
1086 );
1087
1088 //
1089 // Configuration Routines
1090 //
1091 NTSTATUS
1092 NTAPI
1093 PciGetConfigHandlers(
1094 IN PPCI_FDO_EXTENSION FdoExtension
1095 );
1096
1097 VOID
1098 NTAPI
1099 PciReadSlotConfig(
1100 IN PPCI_FDO_EXTENSION DeviceExtension,
1101 IN PCI_SLOT_NUMBER Slot,
1102 IN PVOID Buffer,
1103 IN ULONG Offset,
1104 IN ULONG Length
1105 );
1106
1107 VOID
1108 NTAPI
1109 PciWriteDeviceConfig(
1110 IN PPCI_PDO_EXTENSION DeviceExtension,
1111 IN PVOID Buffer,
1112 IN ULONG Offset,
1113 IN ULONG Length
1114 );
1115
1116 VOID
1117 NTAPI
1118 PciReadDeviceConfig(
1119 IN PPCI_PDO_EXTENSION DeviceExtension,
1120 IN PVOID Buffer,
1121 IN ULONG Offset,
1122 IN ULONG Length
1123 );
1124
1125 UCHAR
1126 NTAPI
1127 PciGetAdjustedInterruptLine(
1128 IN PPCI_PDO_EXTENSION PdoExtension
1129 );
1130
1131 //
1132 // State Machine Logic Transition Routines
1133 //
1134 VOID
1135 NTAPI
1136 PciInitializeState(
1137 IN PPCI_FDO_EXTENSION DeviceExtension
1138 );
1139
1140 NTSTATUS
1141 NTAPI
1142 PciBeginStateTransition(
1143 IN PPCI_FDO_EXTENSION DeviceExtension,
1144 IN PCI_STATE NewState
1145 );
1146
1147 NTSTATUS
1148 NTAPI
1149 PciCancelStateTransition(
1150 IN PPCI_FDO_EXTENSION DeviceExtension,
1151 IN PCI_STATE NewState
1152 );
1153
1154 VOID
1155 NTAPI
1156 PciCommitStateTransition(
1157 IN PPCI_FDO_EXTENSION DeviceExtension,
1158 IN PCI_STATE NewState
1159 );
1160
1161 //
1162 // Arbiter Support
1163 //
1164 NTSTATUS
1165 NTAPI
1166 PciInitializeArbiters(
1167 IN PPCI_FDO_EXTENSION FdoExtension
1168 );
1169
1170 NTSTATUS
1171 NTAPI
1172 PciInitializeArbiterRanges(
1173 IN PPCI_FDO_EXTENSION DeviceExtension,
1174 IN PCM_RESOURCE_LIST Resources
1175 );
1176
1177 //
1178 // Debug Helpers
1179 //
1180 BOOLEAN
1181 NTAPI
1182 PciDebugIrpDispatchDisplay(
1183 IN PIO_STACK_LOCATION IoStackLocation,
1184 IN PPCI_FDO_EXTENSION DeviceExtension,
1185 IN USHORT MaxMinor
1186 );
1187
1188 VOID
1189 NTAPI
1190 PciDebugDumpCommonConfig(
1191 IN PPCI_COMMON_HEADER PciData
1192 );
1193
1194 //
1195 // Interface Support
1196 //
1197 NTSTATUS
1198 NTAPI
1199 PciQueryInterface(
1200 IN PPCI_FDO_EXTENSION DeviceExtension,
1201 IN CONST GUID* InterfaceType,
1202 IN ULONG Size,
1203 IN ULONG Version,
1204 IN PVOID InterfaceData,
1205 IN PINTERFACE Interface,
1206 IN BOOLEAN LastChance
1207 );
1208
1209 NTSTATUS
1210 NTAPI
1211 PciPmeInterfaceInitializer(
1212 IN PVOID Instance
1213 );
1214
1215 NTSTATUS
1216 NTAPI
1217 routeintrf_Initializer(
1218 IN PVOID Instance
1219 );
1220
1221 NTSTATUS
1222 NTAPI
1223 arbusno_Initializer(
1224 IN PVOID Instance
1225 );
1226
1227 NTSTATUS
1228 NTAPI
1229 agpintrf_Initializer(
1230 IN PVOID Instance
1231 );
1232
1233 NTSTATUS
1234 NTAPI
1235 tranirq_Initializer(
1236 IN PVOID Instance
1237 );
1238
1239 NTSTATUS
1240 NTAPI
1241 busintrf_Initializer(
1242 IN PVOID Instance
1243 );
1244
1245 NTSTATUS
1246 NTAPI
1247 armem_Initializer(
1248 IN PVOID Instance
1249 );
1250
1251 NTSTATUS
1252 NTAPI
1253 ario_Initializer(
1254 IN PVOID Instance
1255 );
1256
1257 NTSTATUS
1258 NTAPI
1259 locintrf_Initializer(
1260 IN PVOID Instance
1261 );
1262
1263 NTSTATUS
1264 NTAPI
1265 pcicbintrf_Initializer(
1266 IN PVOID Instance
1267 );
1268
1269 NTSTATUS
1270 NTAPI
1271 lddintrf_Initializer(
1272 IN PVOID Instance
1273 );
1274
1275 NTSTATUS
1276 NTAPI
1277 devpresent_Initializer(
1278 IN PVOID Instance
1279 );
1280
1281 NTSTATUS
1282 NTAPI
1283 agpintrf_Constructor(
1284 IN PVOID DeviceExtension,
1285 IN PVOID Instance,
1286 IN PVOID InterfaceData,
1287 IN USHORT Version,
1288 IN USHORT Size,
1289 IN PINTERFACE Interface
1290 );
1291
1292 NTSTATUS
1293 NTAPI
1294 arbusno_Constructor(
1295 IN PVOID DeviceExtension,
1296 IN PVOID Instance,
1297 IN PVOID InterfaceData,
1298 IN USHORT Version,
1299 IN USHORT Size,
1300 IN PINTERFACE Interface
1301 );
1302
1303 NTSTATUS
1304 NTAPI
1305 tranirq_Constructor(
1306 IN PVOID DeviceExtension,
1307 IN PVOID Instance,
1308 IN PVOID InterfaceData,
1309 IN USHORT Version,
1310 IN USHORT Size,
1311 IN PINTERFACE Interface
1312 );
1313
1314 NTSTATUS
1315 NTAPI
1316 armem_Constructor(
1317 IN PVOID DeviceExtension,
1318 IN PVOID Instance,
1319 IN PVOID InterfaceData,
1320 IN USHORT Version,
1321 IN USHORT Size,
1322 IN PINTERFACE Interface
1323 );
1324
1325 NTSTATUS
1326 NTAPI
1327 busintrf_Constructor(
1328 IN PVOID DeviceExtension,
1329 IN PVOID Instance,
1330 IN PVOID InterfaceData,
1331 IN USHORT Version,
1332 IN USHORT Size,
1333 IN PINTERFACE Interface
1334 );
1335
1336 NTSTATUS
1337 NTAPI
1338 ario_Constructor(
1339 IN PVOID DeviceExtension,
1340 IN PVOID Instance,
1341 IN PVOID InterfaceData,
1342 IN USHORT Version,
1343 IN USHORT Size,
1344 IN PINTERFACE Interface
1345 );
1346
1347 VOID
1348 NTAPI
1349 ario_ApplyBrokenVideoHack(
1350 IN PPCI_FDO_EXTENSION FdoExtension
1351 );
1352
1353 NTSTATUS
1354 NTAPI
1355 pcicbintrf_Constructor(
1356 IN PVOID DeviceExtension,
1357 IN PVOID Instance,
1358 IN PVOID InterfaceData,
1359 IN USHORT Version,
1360 IN USHORT Size,
1361 IN PINTERFACE Interface
1362 );
1363
1364 NTSTATUS
1365 NTAPI
1366 lddintrf_Constructor(
1367 IN PVOID DeviceExtension,
1368 IN PVOID Instance,
1369 IN PVOID InterfaceData,
1370 IN USHORT Version,
1371 IN USHORT Size,
1372 IN PINTERFACE Interface
1373 );
1374
1375 NTSTATUS
1376 NTAPI
1377 locintrf_Constructor(
1378 IN PVOID DeviceExtension,
1379 IN PVOID Instance,
1380 IN PVOID InterfaceData,
1381 IN USHORT Version,
1382 IN USHORT Size,
1383 IN PINTERFACE Interface
1384 );
1385
1386 NTSTATUS
1387 NTAPI
1388 PciPmeInterfaceConstructor(
1389 IN PVOID DeviceExtension,
1390 IN PVOID Instance,
1391 IN PVOID InterfaceData,
1392 IN USHORT Version,
1393 IN USHORT Size,
1394 IN PINTERFACE Interface
1395 );
1396
1397 NTSTATUS
1398 NTAPI
1399 routeintrf_Constructor(
1400 IN PVOID DeviceExtension,
1401 IN PVOID Instance,
1402 IN PVOID InterfaceData,
1403 IN USHORT Version,
1404 IN USHORT Size,
1405 IN PINTERFACE Interface
1406 );
1407
1408 NTSTATUS
1409 NTAPI
1410 devpresent_Constructor(
1411 IN PVOID DeviceExtension,
1412 IN PVOID Instance,
1413 IN PVOID InterfaceData,
1414 IN USHORT Version,
1415 IN USHORT Size,
1416 IN PINTERFACE Interface
1417 );
1418
1419 //
1420 // PCI Enumeration and Resources
1421 //
1422 NTSTATUS
1423 NTAPI
1424 PciQueryDeviceRelations(
1425 IN PPCI_FDO_EXTENSION DeviceExtension,
1426 IN OUT PDEVICE_RELATIONS *pDeviceRelations
1427 );
1428
1429 //
1430 // Identification Functions
1431 //
1432 PWCHAR
1433 NTAPI
1434 PciGetDeviceDescriptionMessage(
1435 IN UCHAR BaseClass,
1436 IN UCHAR SubClass
1437 );
1438
1439 //
1440 // CardBUS Support
1441 //
1442 VOID
1443 NTAPI
1444 Cardbus_MassageHeaderForLimitsDetermination(
1445 IN PPCI_CONFIGURATOR_CONTEXT Context
1446 );
1447
1448 VOID
1449 NTAPI
1450 Cardbus_SaveCurrentSettings(
1451 IN PPCI_CONFIGURATOR_CONTEXT Context
1452 );
1453
1454 VOID
1455 NTAPI
1456 Cardbus_SaveLimits(
1457 IN PPCI_CONFIGURATOR_CONTEXT Context
1458 );
1459
1460 VOID
1461 NTAPI
1462 Cardbus_RestoreCurrent(
1463 IN PPCI_CONFIGURATOR_CONTEXT Context
1464 );
1465
1466 VOID
1467 NTAPI
1468 Cardbus_GetAdditionalResourceDescriptors(
1469 IN PPCI_CONFIGURATOR_CONTEXT Context,
1470 IN PPCI_COMMON_HEADER PciData,
1471 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1472 );
1473
1474 VOID
1475 NTAPI
1476 Cardbus_ResetDevice(
1477 IN PPCI_CONFIGURATOR_CONTEXT Context
1478 );
1479
1480 VOID
1481 NTAPI
1482 Cardbus_ChangeResourceSettings(
1483 IN PPCI_CONFIGURATOR_CONTEXT Context
1484 );
1485
1486 //
1487 // PCI Device Support
1488 //
1489 VOID
1490 NTAPI
1491 Device_MassageHeaderForLimitsDetermination(
1492 IN PPCI_CONFIGURATOR_CONTEXT Context
1493 );
1494
1495 VOID
1496 NTAPI
1497 Device_SaveCurrentSettings(
1498 IN PPCI_CONFIGURATOR_CONTEXT Context
1499 );
1500
1501 VOID
1502 NTAPI
1503 Device_SaveLimits(
1504 IN PPCI_CONFIGURATOR_CONTEXT Context
1505 );
1506
1507 VOID
1508 NTAPI
1509 Device_RestoreCurrent(
1510 IN PPCI_CONFIGURATOR_CONTEXT Context
1511 );
1512
1513 VOID
1514 NTAPI
1515 Device_GetAdditionalResourceDescriptors(
1516 IN PPCI_CONFIGURATOR_CONTEXT Context,
1517 IN PPCI_COMMON_HEADER PciData,
1518 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1519 );
1520
1521 VOID
1522 NTAPI
1523 Device_ResetDevice(
1524 IN PPCI_CONFIGURATOR_CONTEXT Context
1525 );
1526
1527 VOID
1528 NTAPI
1529 Device_ChangeResourceSettings(
1530 IN PPCI_CONFIGURATOR_CONTEXT Context
1531 );
1532
1533 //
1534 // PCI-to-PCI Bridge Device Support
1535 //
1536 VOID
1537 NTAPI
1538 PPBridge_MassageHeaderForLimitsDetermination(
1539 IN PPCI_CONFIGURATOR_CONTEXT Context
1540 );
1541
1542 VOID
1543 NTAPI
1544 PPBridge_SaveCurrentSettings(
1545 IN PPCI_CONFIGURATOR_CONTEXT Context
1546 );
1547
1548 VOID
1549 NTAPI
1550 PPBridge_SaveLimits(
1551 IN PPCI_CONFIGURATOR_CONTEXT Context
1552 );
1553
1554 VOID
1555 NTAPI
1556 PPBridge_RestoreCurrent(
1557 IN PPCI_CONFIGURATOR_CONTEXT Context
1558 );
1559
1560 VOID
1561 NTAPI
1562 PPBridge_GetAdditionalResourceDescriptors(
1563 IN PPCI_CONFIGURATOR_CONTEXT Context,
1564 IN PPCI_COMMON_HEADER PciData,
1565 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1566 );
1567
1568 VOID
1569 NTAPI
1570 PPBridge_ResetDevice(
1571 IN PPCI_CONFIGURATOR_CONTEXT Context
1572 );
1573
1574 VOID
1575 NTAPI
1576 PPBridge_ChangeResourceSettings(
1577 IN PPCI_CONFIGURATOR_CONTEXT Context
1578 );
1579
1580 //
1581 // External Resources
1582 //
1583 extern SINGLE_LIST_ENTRY PciFdoExtensionListHead;
1584 extern KEVENT PciGlobalLock;
1585 extern PPCI_INTERFACE PciInterfaces[];
1586 extern PCI_INTERFACE ArbiterInterfaceBusNumber;
1587 extern PCI_INTERFACE ArbiterInterfaceMemory;
1588 extern PCI_INTERFACE ArbiterInterfaceIo;
1589 extern PCI_INTERFACE BusHandlerInterface;
1590 extern PCI_INTERFACE PciRoutingInterface;
1591 extern PCI_INTERFACE PciCardbusPrivateInterface;
1592 extern PCI_INTERFACE PciLegacyDeviceDetectionInterface;
1593 extern PCI_INTERFACE PciPmeInterface;
1594 extern PCI_INTERFACE PciDevicePresentInterface;
1595 //extern PCI_INTERFACE PciNativeIdeInterface;
1596 extern PCI_INTERFACE PciLocationInterface;
1597 extern PCI_INTERFACE AgpTargetInterface;
1598 extern PCI_INTERFACE TranslatorInterfaceInterrupt;
1599 extern PDRIVER_OBJECT PciDriverObject;
1600 extern PWATCHDOG_TABLE WdTable;
1601 extern PPCI_HACK_ENTRY PciHackTable;
1602 extern BOOLEAN PciEnableNativeModeATA;
1603
1604 /* Exported by NTOS, should this go in the NDK? */
1605 extern NTSYSAPI BOOLEAN InitSafeBootMode;
1606
1607 /* EOF */