Sync with trunk r58113.
[reactos.git] / drivers / bus / pcix / utils.c
1 /*
2 * PROJECT: ReactOS PCI Bus Driver
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: drivers/bus/pci/utils.c
5 * PURPOSE: Utility/Helper Support Code
6 * PROGRAMMERS: ReactOS Portable Systems Group
7 */
8
9 /* INCLUDES *******************************************************************/
10
11 #include <pci.h>
12 #define NDEBUG
13 #include <debug.h>
14
15 /* GLOBALS ********************************************************************/
16
17 ULONG PciDebugPortsCount;
18
19 RTL_RANGE_LIST PciIsaBitExclusionList;
20 RTL_RANGE_LIST PciVgaAndIsaBitExclusionList;
21
22 /* FUNCTIONS ******************************************************************/
23
24 BOOLEAN
25 NTAPI
26 PciUnicodeStringStrStr(IN PUNICODE_STRING InputString,
27 IN PCUNICODE_STRING EqualString,
28 IN BOOLEAN CaseInSensitive)
29 {
30 UNICODE_STRING PartialString;
31 LONG EqualChars, TotalChars;
32
33 /* Build a partial string with the smaller substring */
34 PartialString.Length = EqualString->Length;
35 PartialString.MaximumLength = InputString->MaximumLength;;
36 PartialString.Buffer = InputString->Buffer;
37
38 /* Check how many characters that need comparing */
39 EqualChars = 0;
40 TotalChars = (InputString->Length - EqualString->Length) / sizeof(WCHAR);
41
42 /* If the substring is bigger, just fail immediately */
43 if (TotalChars < 0) return FALSE;
44
45 /* Keep checking each character */
46 while (!RtlEqualUnicodeString(EqualString, &PartialString, CaseInSensitive))
47 {
48 /* Continue checking until all the required characters are equal */
49 PartialString.Buffer++;
50 PartialString.MaximumLength -= sizeof(WCHAR);
51 if (++EqualChars > TotalChars) return FALSE;
52 }
53
54 /* The string is equal */
55 return TRUE;
56 }
57
58 BOOLEAN
59 NTAPI
60 PciStringToUSHORT(IN PWCHAR String,
61 OUT PUSHORT Value)
62 {
63 USHORT Short;
64 ULONG Low, High, Length;
65 WCHAR Char;
66
67 /* Initialize everything to zero */
68 Short = 0;
69 Length = 0;
70 while (TRUE)
71 {
72 /* Get the character and set the high byte based on the previous one */
73 Char = *String++;
74 High = 16 * Short;
75
76 /* Check for numbers */
77 if ( Char >= '0' && Char <= '9' )
78 {
79 /* Convert them to a byte */
80 Low = Char - '0';
81 }
82 else if ( Char >= 'A' && Char <= 'F' )
83 {
84 /* Convert upper-case hex letters into a byte */
85 Low = Char - '7';
86 }
87 else if ( Char >= 'a' && Char <= 'f' )
88 {
89 /* Convert lower-case hex letters into a byte */
90 Low = Char - 'W';
91 }
92 else
93 {
94 /* Invalid string, fail the conversion */
95 return FALSE;
96 }
97
98 /* Combine the high and low byte */
99 Short = High | Low;
100
101 /* If 4 letters have been reached, the 16-bit integer should exist */
102 if (++Length >= 4)
103 {
104 /* Return it to the caller */
105 *Value = Short;
106 return TRUE;
107 }
108 }
109 }
110
111 BOOLEAN
112 NTAPI
113 PciIsSuiteVersion(IN USHORT SuiteMask)
114 {
115 ULONGLONG Mask = 0;
116 RTL_OSVERSIONINFOEXW VersionInfo;
117
118 /* Initialize the version information */
119 RtlZeroMemory(&VersionInfo, sizeof(RTL_OSVERSIONINFOEXW));
120 VersionInfo.dwOSVersionInfoSize = sizeof(RTL_OSVERSIONINFOEXW);
121 VersionInfo.wSuiteMask = SuiteMask;
122
123 /* Set the comparison mask and return if the passed suite mask matches */
124 VER_SET_CONDITION(Mask, VER_SUITENAME, VER_AND);
125 return NT_SUCCESS(RtlVerifyVersionInfo(&VersionInfo, VER_SUITENAME, Mask));
126 }
127
128 BOOLEAN
129 NTAPI
130 PciIsDatacenter(VOID)
131 {
132 BOOLEAN Result;
133 PVOID Value;
134 ULONG ResultLength;
135 NTSTATUS Status;
136
137 /* Assume this isn't Datacenter */
138 Result = FALSE;
139
140 /* First, try opening the setup key */
141 Status = PciGetRegistryValue(L"",
142 L"\\REGISTRY\\MACHINE\\SYSTEM\\CurrentControlSet\\Services\\setupdd",
143 0,
144 REG_BINARY,
145 &Value,
146 &ResultLength);
147 if (!NT_SUCCESS(Status))
148 {
149 /* This is not an in-progress Setup boot, so query the suite version */
150 Result = PciIsSuiteVersion(VER_SUITE_DATACENTER);
151 }
152 else
153 {
154 /* This scenario shouldn't happen yet, since SetupDD isn't used */
155 UNIMPLEMENTED;
156 ASSERT(FALSE); // while (TRUE);
157 }
158
159 /* Return if this is Datacenter or not */
160 return Result;
161 }
162
163 BOOLEAN
164 NTAPI
165 PciOpenKey(IN PWCHAR KeyName,
166 IN HANDLE RootKey,
167 IN ACCESS_MASK DesiredAccess,
168 OUT PHANDLE KeyHandle,
169 OUT PNTSTATUS KeyStatus)
170 {
171 NTSTATUS Status;
172 OBJECT_ATTRIBUTES ObjectAttributes;
173 UNICODE_STRING KeyString;
174 PAGED_CODE();
175
176 /* Initialize the object attributes */
177 RtlInitUnicodeString(&KeyString, KeyName);
178 InitializeObjectAttributes(&ObjectAttributes,
179 &KeyString,
180 OBJ_CASE_INSENSITIVE,
181 RootKey,
182 NULL);
183
184 /* Open the key, returning a boolean, and the status, if requested */
185 Status = ZwOpenKey(KeyHandle, DesiredAccess, &ObjectAttributes);
186 if (KeyStatus) *KeyStatus = Status;
187 return NT_SUCCESS(Status);
188 }
189
190 NTSTATUS
191 NTAPI
192 PciGetRegistryValue(IN PWCHAR ValueName,
193 IN PWCHAR KeyName,
194 IN HANDLE RootHandle,
195 IN ULONG Type,
196 OUT PVOID *OutputBuffer,
197 OUT PULONG OutputLength)
198 {
199 NTSTATUS Status;
200 PKEY_VALUE_PARTIAL_INFORMATION PartialInfo;
201 ULONG NeededLength, ActualLength;
202 UNICODE_STRING ValueString;
203 HANDLE KeyHandle;
204 BOOLEAN Result;
205
206 /* So we know what to free at the end of the body */
207 PartialInfo = NULL;
208 KeyHandle = NULL;
209 do
210 {
211 /* Open the key by name, rooted off the handle passed */
212 Result = PciOpenKey(KeyName,
213 RootHandle,
214 KEY_QUERY_VALUE,
215 &KeyHandle,
216 &Status);
217 if (!Result) break;
218
219 /* Query for the size that's needed for the value that was passed in */
220 RtlInitUnicodeString(&ValueString, ValueName);
221 Status = ZwQueryValueKey(KeyHandle,
222 &ValueString,
223 KeyValuePartialInformation,
224 NULL,
225 0,
226 &NeededLength);
227 ASSERT(!NT_SUCCESS(Status));
228 if (Status != STATUS_BUFFER_TOO_SMALL) break;
229
230 /* Allocate an appropriate buffer for the size that was returned */
231 ASSERT(NeededLength != 0);
232 Status = STATUS_INSUFFICIENT_RESOURCES;
233 PartialInfo = ExAllocatePoolWithTag(PagedPool,
234 NeededLength,
235 PCI_POOL_TAG);
236 if (!PartialInfo) break;
237
238 /* Query the actual value information now that the size is known */
239 Status = ZwQueryValueKey(KeyHandle,
240 &ValueString,
241 KeyValuePartialInformation,
242 PartialInfo,
243 NeededLength,
244 &ActualLength);
245 if (!NT_SUCCESS(Status)) break;
246
247 /* Make sure it's of the type that the caller expects */
248 Status = STATUS_INVALID_PARAMETER;
249 if (PartialInfo->Type != Type) break;
250
251 /* Subtract the registry-specific header, to get the data size */
252 ASSERT(NeededLength == ActualLength);
253 NeededLength -= sizeof(KEY_VALUE_PARTIAL_INFORMATION);
254
255 /* Allocate a buffer to hold the data and return it to the caller */
256 Status = STATUS_INSUFFICIENT_RESOURCES;
257 *OutputBuffer = ExAllocatePoolWithTag(PagedPool,
258 NeededLength,
259 PCI_POOL_TAG);
260 if (!*OutputBuffer) break;
261
262 /* Copy the data into the buffer and return its length to the caller */
263 RtlCopyMemory(*OutputBuffer, PartialInfo->Data, NeededLength);
264 if (OutputLength) *OutputLength = NeededLength;
265 Status = STATUS_SUCCESS;
266 } while (0);
267
268 /* Close any opened keys and free temporary allocations */
269 if (KeyHandle) ZwClose(KeyHandle);
270 if (PartialInfo) ExFreePoolWithTag(PartialInfo, 0);
271 return Status;
272 }
273
274 NTSTATUS
275 NTAPI
276 PciBuildDefaultExclusionLists(VOID)
277 {
278 ULONG Start;
279 NTSTATUS Status;
280 ASSERT(PciIsaBitExclusionList.Count == 0);
281 ASSERT(PciVgaAndIsaBitExclusionList.Count == 0);
282
283 /* Initialize the range lists */
284 RtlInitializeRangeList(&PciIsaBitExclusionList);
285 RtlInitializeRangeList(&PciVgaAndIsaBitExclusionList);
286
287 /* Loop x86 I/O ranges */
288 for (Start = 0x100; Start <= 0xFEFF; Start += 0x400)
289 {
290 /* Add the ISA I/O ranges */
291 Status = RtlAddRange(&PciIsaBitExclusionList,
292 Start,
293 Start + 0x2FF,
294 0,
295 RTL_RANGE_LIST_ADD_IF_CONFLICT,
296 NULL,
297 NULL);
298 if (!NT_SUCCESS(Status)) break;
299
300 /* Add the ISA I/O ranges */
301 Status = RtlAddRange(&PciVgaAndIsaBitExclusionList,
302 Start,
303 Start + 0x2AF,
304 0,
305 RTL_RANGE_LIST_ADD_IF_CONFLICT,
306 NULL,
307 NULL);
308 if (!NT_SUCCESS(Status)) break;
309
310 /* Add the VGA I/O range for Monochrome Video */
311 Status = RtlAddRange(&PciVgaAndIsaBitExclusionList,
312 Start + 0x2BC,
313 Start + 0x2BF,
314 0,
315 RTL_RANGE_LIST_ADD_IF_CONFLICT,
316 NULL,
317 NULL);
318 if (!NT_SUCCESS(Status)) break;
319
320 /* Add the VGA I/O range for certain CGA adapters */
321 Status = RtlAddRange(&PciVgaAndIsaBitExclusionList,
322 Start + 0x2E0,
323 Start + 0x2FF,
324 0,
325 RTL_RANGE_LIST_ADD_IF_CONFLICT,
326 NULL,
327 NULL);
328 if (!NT_SUCCESS(Status)) break;
329
330 /* Success, ranges added done */
331 };
332
333 RtlFreeRangeList(&PciIsaBitExclusionList);
334 RtlFreeRangeList(&PciVgaAndIsaBitExclusionList);
335 return Status;
336 }
337
338 PPCI_FDO_EXTENSION
339 NTAPI
340 PciFindParentPciFdoExtension(IN PDEVICE_OBJECT DeviceObject,
341 IN PKEVENT Lock)
342 {
343 PPCI_FDO_EXTENSION DeviceExtension;
344 PPCI_PDO_EXTENSION SearchExtension, FoundExtension;
345
346 /* Assume we'll find nothing */
347 SearchExtension = DeviceObject->DeviceExtension;
348 FoundExtension = NULL;
349
350 /* Check if a lock was specified */
351 if (Lock)
352 {
353 /* Wait for the lock to be released */
354 KeEnterCriticalRegion();
355 KeWaitForSingleObject(Lock, Executive, KernelMode, FALSE, NULL);
356 }
357
358 /* Now search for the extension */
359 DeviceExtension = (PPCI_FDO_EXTENSION)PciFdoExtensionListHead.Next;
360 while (DeviceExtension)
361 {
362 /* Acquire this device's lock */
363 KeEnterCriticalRegion();
364 KeWaitForSingleObject(&DeviceExtension->ChildListLock,
365 Executive,
366 KernelMode,
367 FALSE,
368 NULL);
369
370 /* Scan all children PDO, stop when no more PDOs, or found it */
371 for (FoundExtension = DeviceExtension->ChildPdoList;
372 ((FoundExtension) && (FoundExtension != SearchExtension));
373 FoundExtension = FoundExtension->Next);
374
375 /* Release this device's lock */
376 KeSetEvent(&DeviceExtension->ChildListLock, IO_NO_INCREMENT, FALSE);
377 KeLeaveCriticalRegion();
378
379 /* If we found it, break out */
380 if (FoundExtension) break;
381
382 /* Move to the next device */
383 DeviceExtension = (PPCI_FDO_EXTENSION)DeviceExtension->List.Next;
384 }
385
386 /* Check if we had acquired a lock previously */
387 if (Lock)
388 {
389 /* Release it */
390 KeSetEvent(Lock, IO_NO_INCREMENT, FALSE);
391 KeLeaveCriticalRegion();
392 }
393
394 /* Return which extension was found, if any */
395 return DeviceExtension;
396 }
397
398 VOID
399 NTAPI
400 PciInsertEntryAtTail(IN PSINGLE_LIST_ENTRY ListHead,
401 IN PPCI_FDO_EXTENSION DeviceExtension,
402 IN PKEVENT Lock)
403 {
404 PSINGLE_LIST_ENTRY NextEntry;
405 PAGED_CODE();
406
407 /* Check if a lock was specified */
408 if (Lock)
409 {
410 /* Wait for the lock to be released */
411 KeEnterCriticalRegion();
412 KeWaitForSingleObject(Lock, Executive, KernelMode, FALSE, NULL);
413 }
414
415 /* Loop the list until we get to the end, then insert this entry there */
416 for (NextEntry = ListHead; NextEntry->Next; NextEntry = NextEntry->Next);
417 NextEntry->Next = &DeviceExtension->List;
418
419 /* Check if we had acquired a lock previously */
420 if (Lock)
421 {
422 /* Release it */
423 KeSetEvent(Lock, IO_NO_INCREMENT, FALSE);
424 KeLeaveCriticalRegion();
425 }
426 }
427
428 VOID
429 NTAPI
430 PciInsertEntryAtHead(IN PSINGLE_LIST_ENTRY ListHead,
431 IN PSINGLE_LIST_ENTRY Entry,
432 IN PKEVENT Lock)
433 {
434 PAGED_CODE();
435
436 /* Check if a lock was specified */
437 if (Lock)
438 {
439 /* Wait for the lock to be released */
440 KeEnterCriticalRegion();
441 KeWaitForSingleObject(Lock, Executive, KernelMode, FALSE, NULL);
442 }
443
444 /* Make the entry point to the current head and make the head point to it */
445 Entry->Next = ListHead->Next;
446 ListHead->Next = Entry;
447
448 /* Check if we had acquired a lock previously */
449 if (Lock)
450 {
451 /* Release it */
452 KeSetEvent(Lock, IO_NO_INCREMENT, FALSE);
453 KeLeaveCriticalRegion();
454 }
455 }
456
457 VOID
458 NTAPI
459 PcipLinkSecondaryExtension(IN PSINGLE_LIST_ENTRY List,
460 IN PVOID Lock,
461 IN PPCI_SECONDARY_EXTENSION SecondaryExtension,
462 IN PCI_SIGNATURE ExtensionType,
463 IN PVOID Destructor)
464 {
465 PAGED_CODE();
466
467 /* Setup the extension data, and insert it into the primary's list */
468 SecondaryExtension->ExtensionType = ExtensionType;
469 SecondaryExtension->Destructor = Destructor;
470 PciInsertEntryAtHead(List, &SecondaryExtension->List, Lock);
471 }
472
473 NTSTATUS
474 NTAPI
475 PciGetDeviceProperty(IN PDEVICE_OBJECT DeviceObject,
476 IN DEVICE_REGISTRY_PROPERTY DeviceProperty,
477 OUT PVOID *OutputBuffer)
478 {
479 NTSTATUS Status;
480 ULONG BufferLength, ResultLength;
481 PVOID Buffer;
482 do
483 {
484 /* Query the requested property size */
485 Status = IoGetDeviceProperty(DeviceObject,
486 DeviceProperty,
487 0,
488 NULL,
489 &BufferLength);
490 if (Status != STATUS_BUFFER_TOO_SMALL)
491 {
492 /* Call should've failed with buffer too small! */
493 DPRINT1("PCI - Unexpected status from GetDeviceProperty, saw %08X, expected %08X.\n",
494 Status,
495 STATUS_BUFFER_TOO_SMALL);
496 *OutputBuffer = NULL;
497 ASSERTMSG(FALSE, "PCI Successfully did the impossible!");
498 break;
499 }
500
501 /* Allocate the required buffer */
502 Buffer = ExAllocatePoolWithTag(PagedPool, BufferLength, 'BicP');
503 if (!Buffer)
504 {
505 /* No memory, fail the request */
506 DPRINT1("PCI - Failed to allocate DeviceProperty buffer (%d bytes).\n", BufferLength);
507 Status = STATUS_INSUFFICIENT_RESOURCES;
508 break;
509 }
510
511 /* Do the actual property query call */
512 Status = IoGetDeviceProperty(DeviceObject,
513 DeviceProperty,
514 BufferLength,
515 Buffer,
516 &ResultLength);
517 if (!NT_SUCCESS(Status)) break;
518
519 /* Return the buffer to the caller */
520 ASSERT(BufferLength == ResultLength);
521 *OutputBuffer = Buffer;
522 return STATUS_SUCCESS;
523 } while (FALSE);
524
525 /* Failure path */
526 return STATUS_UNSUCCESSFUL;
527 }
528
529 NTSTATUS
530 NTAPI
531 PciSendIoctl(IN PDEVICE_OBJECT DeviceObject,
532 IN ULONG IoControlCode,
533 IN PVOID InputBuffer,
534 IN ULONG InputBufferLength,
535 IN PVOID OutputBuffer,
536 IN ULONG OutputBufferLength)
537 {
538 PIRP Irp;
539 NTSTATUS Status;
540 KEVENT Event;
541 IO_STATUS_BLOCK IoStatusBlock;
542 PDEVICE_OBJECT AttachedDevice;
543 PAGED_CODE();
544
545 /* Initialize the pending IRP event */
546 KeInitializeEvent(&Event, SynchronizationEvent, FALSE);
547
548 /* Get a reference to the root PDO (ACPI) */
549 AttachedDevice = IoGetAttachedDeviceReference(DeviceObject);
550 if (!AttachedDevice) return STATUS_INVALID_PARAMETER;
551
552 /* Build the requested IOCTL IRP */
553 Irp = IoBuildDeviceIoControlRequest(IoControlCode,
554 AttachedDevice,
555 InputBuffer,
556 InputBufferLength,
557 OutputBuffer,
558 OutputBufferLength,
559 0,
560 &Event,
561 &IoStatusBlock);
562 if (!Irp) return STATUS_INSUFFICIENT_RESOURCES;
563
564 /* Send the IOCTL to the driver */
565 Status = IoCallDriver(AttachedDevice, Irp);
566 if (Status == STATUS_PENDING)
567 {
568 /* Wait for a response */
569 KeWaitForSingleObject(&Event,
570 Executive,
571 KernelMode,
572 FALSE,
573 NULL);
574 Status = Irp->IoStatus.Status;
575 }
576
577 /* Take away the reference we took and return the result to the caller */
578 ObDereferenceObject(AttachedDevice);
579 return Status;
580 }
581
582 PPCI_SECONDARY_EXTENSION
583 NTAPI
584 PciFindNextSecondaryExtension(IN PSINGLE_LIST_ENTRY ListHead,
585 IN PCI_SIGNATURE ExtensionType)
586 {
587 PSINGLE_LIST_ENTRY NextEntry;
588 PPCI_SECONDARY_EXTENSION Extension;
589
590 /* Scan the list */
591 for (NextEntry = ListHead; NextEntry; NextEntry = NextEntry->Next)
592 {
593 /* Grab each extension and check if it's the one requested */
594 Extension = CONTAINING_RECORD(NextEntry, PCI_SECONDARY_EXTENSION, List);
595 if (Extension->ExtensionType == ExtensionType) return Extension;
596 }
597
598 /* Nothing was found */
599 return NULL;
600 }
601
602 ULONGLONG
603 NTAPI
604 PciGetHackFlags(IN USHORT VendorId,
605 IN USHORT DeviceId,
606 IN USHORT SubVendorId,
607 IN USHORT SubSystemId,
608 IN UCHAR RevisionId)
609 {
610 PPCI_HACK_ENTRY HackEntry;
611 ULONGLONG HackFlags;
612 ULONG LastWeight, MatchWeight;
613 ULONG EntryFlags;
614
615 /* ReactOS SetupLDR Hack */
616 if (!PciHackTable) return 0;
617
618 /* Initialize the variables before looping */
619 LastWeight = 0;
620 HackFlags = 0;
621 ASSERT(PciHackTable);
622
623 /* Scan the hack table */
624 for (HackEntry = PciHackTable;
625 HackEntry->VendorID != PCI_INVALID_VENDORID;
626 ++HackEntry)
627 {
628 /* Check if there's an entry for this device */
629 if ((HackEntry->DeviceID == DeviceId) &&
630 (HackEntry->VendorID == VendorId))
631 {
632 /* This is a basic match */
633 EntryFlags = HackEntry->Flags;
634 MatchWeight = 1;
635
636 /* Does the entry have revision information? */
637 if (EntryFlags & PCI_HACK_HAS_REVISION_INFO)
638 {
639 /* Check if the revision matches, if so, this is a better match */
640 if (HackEntry->RevisionID != RevisionId) continue;
641 MatchWeight = 3;
642 }
643
644 /* Does the netry have subsystem information? */
645 if (EntryFlags & PCI_HACK_HAS_SUBSYSTEM_INFO)
646 {
647 /* Check if it matches, if so, this is the best possible match */
648 if ((HackEntry->SubVendorID != SubVendorId) ||
649 (HackEntry->SubSystemID != SubSystemId))
650 {
651 continue;
652 }
653 MatchWeight += 4;
654 }
655
656 /* Is this the best match yet? */
657 if (MatchWeight > LastWeight)
658 {
659 /* This is the best match for now, use this as the hack flags */
660 HackFlags = HackEntry->HackFlags;
661 LastWeight = MatchWeight;
662 }
663 }
664 }
665
666 /* Return the best match */
667 return HackFlags;
668 }
669
670 BOOLEAN
671 NTAPI
672 PciIsCriticalDeviceClass(IN UCHAR BaseClass,
673 IN UCHAR SubClass)
674 {
675 /* Check for system or bridge devices */
676 if (BaseClass == PCI_CLASS_BASE_SYSTEM_DEV)
677 {
678 /* Interrupt controlers are critical */
679 return SubClass == PCI_SUBCLASS_SYS_INTERRUPT_CTLR;
680 }
681 else if (BaseClass == PCI_CLASS_BRIDGE_DEV)
682 {
683 /* ISA Bridges are critical */
684 return SubClass == PCI_SUBCLASS_BR_ISA;
685 }
686 else
687 {
688 /* All display controllers are critical */
689 return BaseClass == PCI_CLASS_DISPLAY_CTLR;
690 }
691 }
692
693 PPCI_PDO_EXTENSION
694 NTAPI
695 PciFindPdoByFunction(IN PPCI_FDO_EXTENSION DeviceExtension,
696 IN ULONG FunctionNumber,
697 IN PPCI_COMMON_HEADER PciData)
698 {
699 KIRQL Irql;
700 PPCI_PDO_EXTENSION PdoExtension;
701
702 /* Get the current IRQL when this call was made */
703 Irql = KeGetCurrentIrql();
704
705 /* Is this a low-IRQL call? */
706 if (Irql < DISPATCH_LEVEL)
707 {
708 /* Acquire this device's lock */
709 KeEnterCriticalRegion();
710 KeWaitForSingleObject(&DeviceExtension->ChildListLock,
711 Executive,
712 KernelMode,
713 FALSE,
714 NULL);
715 }
716
717 /* Loop every child PDO */
718 for (PdoExtension = DeviceExtension->ChildPdoList;
719 PdoExtension;
720 PdoExtension = PdoExtension->Next)
721 {
722 /* Find only enumerated PDOs */
723 if (!PdoExtension->ReportedMissing)
724 {
725 /* Check if the function number and header data matches */
726 if ((FunctionNumber == PdoExtension->Slot.u.AsULONG) &&
727 (PdoExtension->VendorId == PciData->VendorID) &&
728 (PdoExtension->DeviceId == PciData->DeviceID) &&
729 (PdoExtension->RevisionId == PciData->RevisionID))
730 {
731 /* This is considered to be the same PDO */
732 break;
733 }
734 }
735 }
736
737 /* Was this a low-IRQL call? */
738 if (Irql < DISPATCH_LEVEL)
739 {
740 /* Release this device's lock */
741 KeSetEvent(&DeviceExtension->ChildListLock, IO_NO_INCREMENT, FALSE);
742 KeLeaveCriticalRegion();
743 }
744
745 /* If the search found something, this is non-NULL, otherwise it's NULL */
746 return PdoExtension;
747 }
748
749 BOOLEAN
750 NTAPI
751 PciIsDeviceOnDebugPath(IN PPCI_PDO_EXTENSION DeviceExtension)
752 {
753 PAGED_CODE();
754
755 /* Check for too many, or no, debug ports */
756 ASSERT(PciDebugPortsCount <= MAX_DEBUGGING_DEVICES_SUPPORTED);
757 if (!PciDebugPortsCount) return FALSE;
758
759 /* eVb has not been able to test such devices yet */
760 UNIMPLEMENTED;
761 ASSERT(FALSE); // while (TRUE);
762 return FALSE;
763 }
764
765 NTSTATUS
766 NTAPI
767 PciGetBiosConfig(IN PPCI_PDO_EXTENSION DeviceExtension,
768 OUT PPCI_COMMON_HEADER PciData)
769 {
770 HANDLE KeyHandle, SubKeyHandle;
771 OBJECT_ATTRIBUTES ObjectAttributes;
772 UNICODE_STRING KeyName, KeyValue;
773 WCHAR Buffer[32];
774 WCHAR DataBuffer[sizeof(KEY_VALUE_PARTIAL_INFORMATION) + PCI_COMMON_HDR_LENGTH];
775 PKEY_VALUE_PARTIAL_INFORMATION PartialInfo = (PVOID)DataBuffer;
776 NTSTATUS Status;
777 ULONG ResultLength;
778 PAGED_CODE();
779
780 /* Open the PCI key */
781 Status = IoOpenDeviceRegistryKey(DeviceExtension->ParentFdoExtension->
782 PhysicalDeviceObject,
783 TRUE,
784 KEY_ALL_ACCESS,
785 &KeyHandle);
786 if (!NT_SUCCESS(Status)) return Status;
787
788 /* Create a volatile BIOS configuration key */
789 RtlInitUnicodeString(&KeyName, L"BiosConfig");
790 InitializeObjectAttributes(&ObjectAttributes,
791 &KeyName,
792 OBJ_KERNEL_HANDLE,
793 KeyHandle,
794 NULL);
795 Status = ZwCreateKey(&SubKeyHandle,
796 KEY_READ,
797 &ObjectAttributes,
798 0,
799 NULL,
800 REG_OPTION_VOLATILE,
801 NULL);
802 ZwClose(KeyHandle);
803 if (!NT_SUCCESS(Status)) return Status;
804
805 /* Create the key value based on the device and function number */
806 swprintf(Buffer,
807 L"DEV_%02x&FUN_%02x",
808 DeviceExtension->Slot.u.bits.DeviceNumber,
809 DeviceExtension->Slot.u.bits.FunctionNumber);
810 RtlInitUnicodeString(&KeyValue, Buffer);
811
812 /* Query the value information (PCI BIOS configuration header) */
813 Status = ZwQueryValueKey(SubKeyHandle,
814 &KeyValue,
815 KeyValuePartialInformation,
816 PartialInfo,
817 sizeof(DataBuffer),
818 &ResultLength);
819 ZwClose(SubKeyHandle);
820 if (!NT_SUCCESS(Status)) return Status;
821
822 /* If any information was returned, go ahead and copy its data */
823 ASSERT(PartialInfo->DataLength == PCI_COMMON_HDR_LENGTH);
824 RtlCopyMemory(PciData, PartialInfo->Data, PCI_COMMON_HDR_LENGTH);
825 return Status;
826 }
827
828 NTSTATUS
829 NTAPI
830 PciSaveBiosConfig(IN PPCI_PDO_EXTENSION DeviceExtension,
831 IN PPCI_COMMON_HEADER PciData)
832 {
833 HANDLE KeyHandle, SubKeyHandle;
834 OBJECT_ATTRIBUTES ObjectAttributes;
835 UNICODE_STRING KeyName, KeyValue;
836 WCHAR Buffer[32];
837 NTSTATUS Status;
838 PAGED_CODE();
839
840 /* Open the PCI key */
841 Status = IoOpenDeviceRegistryKey(DeviceExtension->ParentFdoExtension->
842 PhysicalDeviceObject,
843 TRUE,
844 KEY_READ | KEY_WRITE,
845 &KeyHandle);
846 if (!NT_SUCCESS(Status)) return Status;
847
848 /* Create a volatile BIOS configuration key */
849 RtlInitUnicodeString(&KeyName, L"BiosConfig");
850 InitializeObjectAttributes(&ObjectAttributes,
851 &KeyName,
852 OBJ_KERNEL_HANDLE,
853 KeyHandle,
854 NULL);
855 Status = ZwCreateKey(&SubKeyHandle,
856 KEY_READ | KEY_WRITE,
857 &ObjectAttributes,
858 0,
859 NULL,
860 REG_OPTION_VOLATILE,
861 NULL);
862 ZwClose(KeyHandle);
863 if (!NT_SUCCESS(Status)) return Status;
864
865 /* Create the key value based on the device and function number */
866 swprintf(Buffer,
867 L"DEV_%02x&FUN_%02x",
868 DeviceExtension->Slot.u.bits.DeviceNumber,
869 DeviceExtension->Slot.u.bits.FunctionNumber);
870 RtlInitUnicodeString(&KeyValue, Buffer);
871
872 /* Set the value data (the PCI BIOS configuration header) */
873 Status = ZwSetValueKey(SubKeyHandle,
874 &KeyValue,
875 0,
876 REG_BINARY,
877 PciData,
878 PCI_COMMON_HDR_LENGTH);
879 ZwClose(SubKeyHandle);
880 return Status;
881 }
882
883 UCHAR
884 NTAPI
885 PciReadDeviceCapability(IN PPCI_PDO_EXTENSION DeviceExtension,
886 IN UCHAR Offset,
887 IN ULONG CapabilityId,
888 OUT PPCI_CAPABILITIES_HEADER Buffer,
889 IN ULONG Length)
890 {
891 ULONG CapabilityCount = 0;
892
893 /* If the device has no capabilility list, fail */
894 if (!Offset) return 0;
895
896 /* Validate a PDO with capabilities, a valid buffer, and a valid length */
897 ASSERT(DeviceExtension->ExtensionType == PciPdoExtensionType);
898 ASSERT(DeviceExtension->CapabilitiesPtr != 0);
899 ASSERT(Buffer);
900 ASSERT(Length >= sizeof(PCI_CAPABILITIES_HEADER));
901
902 /* Loop all capabilities */
903 while (Offset)
904 {
905 /* Make sure the pointer is spec-aligned and spec-sized */
906 ASSERT((Offset >= PCI_COMMON_HDR_LENGTH) && ((Offset & 0x3) == 0));
907
908 /* Read the capability header */
909 PciReadDeviceConfig(DeviceExtension,
910 Buffer,
911 Offset,
912 sizeof(PCI_CAPABILITIES_HEADER));
913
914 /* Check if this is the capability being looked up */
915 if ((Buffer->CapabilityID == CapabilityId) || !(CapabilityId))
916 {
917 /* Check if was at a valid offset and length */
918 if ((Offset) && (Length > sizeof(PCI_CAPABILITIES_HEADER)))
919 {
920 /* Sanity check */
921 ASSERT(Length <= (sizeof(PCI_COMMON_CONFIG) - Offset));
922
923 /* Now read the whole capability data into the buffer */
924 PciReadDeviceConfig(DeviceExtension,
925 (PVOID)((ULONG_PTR)Buffer +
926 sizeof(PCI_CAPABILITIES_HEADER)),
927 Offset + sizeof(PCI_CAPABILITIES_HEADER),
928 Length - sizeof(PCI_CAPABILITIES_HEADER));
929 }
930
931 /* Return the offset where the capability was found */
932 return Offset;
933 }
934
935 /* Try the next capability instead */
936 CapabilityCount++;
937 Offset = Buffer->Next;
938
939 /* There can't be more than 48 capabilities (256 bytes max) */
940 if (CapabilityCount > 48)
941 {
942 /* Fail, since this is basically a broken PCI device */
943 DPRINT1("PCI device %p capabilities list is broken.\n", DeviceExtension);
944 return 0;
945 }
946 }
947
948 /* Capability wasn't found, fail */
949 return 0;
950 }
951
952 BOOLEAN
953 NTAPI
954 PciCanDisableDecodes(IN PPCI_PDO_EXTENSION DeviceExtension,
955 IN PPCI_COMMON_HEADER Config,
956 IN ULONGLONG HackFlags,
957 IN BOOLEAN ForPowerDown)
958 {
959 UCHAR BaseClass, SubClass;
960 BOOLEAN IsVga;
961
962 /* Is there a device extension or should the PCI header be used? */
963 if (DeviceExtension)
964 {
965 /* Never disable decodes for a debug PCI Device */
966 if (DeviceExtension->OnDebugPath) return FALSE;
967
968 /* Hack flags will be obtained from the extension, not the caller */
969 ASSERT(HackFlags == 0);
970
971 /* Get hacks and classification from the device extension */
972 HackFlags = DeviceExtension->HackFlags;
973 SubClass = DeviceExtension->SubClass;
974 BaseClass = DeviceExtension->BaseClass;
975 }
976 else
977 {
978 /* There must be a PCI header, go read the classification information */
979 ASSERT(Config != NULL);
980 BaseClass = Config->BaseClass;
981 SubClass = Config->SubClass;
982 }
983
984 /* Check for hack flags that prevent disabling the decodes */
985 if (HackFlags & (PCI_HACK_PRESERVE_COMMAND |
986 PCI_HACK_CB_SHARE_CMD_BITS |
987 PCI_HACK_DONT_DISABLE_DECODES))
988 {
989 /* Don't do it */
990 return FALSE;
991 }
992
993 /* Is this a VGA adapter? */
994 if ((BaseClass == PCI_CLASS_DISPLAY_CTLR) &&
995 (SubClass == PCI_SUBCLASS_VID_VGA_CTLR))
996 {
997 /* Never disable decodes if this is for power down */
998 return ForPowerDown;
999 }
1000
1001 /* Check for legacy devices */
1002 if (BaseClass == PCI_CLASS_PRE_20)
1003 {
1004 /* Never disable video adapter cards if this is for power down */
1005 if (SubClass == PCI_SUBCLASS_PRE_20_VGA) return ForPowerDown;
1006 }
1007 else if (BaseClass == PCI_CLASS_DISPLAY_CTLR)
1008 {
1009 /* Never disable VGA adapters if this is for power down */
1010 if (SubClass == PCI_SUBCLASS_VID_VGA_CTLR) return ForPowerDown;
1011 }
1012 else if (BaseClass == PCI_CLASS_BRIDGE_DEV)
1013 {
1014 /* Check for legacy bridges */
1015 if ((SubClass == PCI_SUBCLASS_BR_ISA) ||
1016 (SubClass == PCI_SUBCLASS_BR_EISA) ||
1017 (SubClass == PCI_SUBCLASS_BR_MCA) ||
1018 (SubClass == PCI_SUBCLASS_BR_HOST) ||
1019 (SubClass == PCI_SUBCLASS_BR_OTHER))
1020 {
1021 /* Never disable these */
1022 return FALSE;
1023 }
1024 else if ((SubClass == PCI_SUBCLASS_BR_PCI_TO_PCI) ||
1025 (SubClass == PCI_SUBCLASS_BR_CARDBUS))
1026 {
1027 /* This is a supported bridge, but does it have a VGA card? */
1028 if (!DeviceExtension)
1029 {
1030 /* Read the bridge control flag from the PCI header */
1031 IsVga = Config->u.type1.BridgeControl & PCI_ENABLE_BRIDGE_VGA;
1032 }
1033 else
1034 {
1035 /* Read the cached flag in the device extension */
1036 IsVga = DeviceExtension->Dependent.type1.VgaBitSet;
1037 }
1038
1039 /* Never disable VGA adapters if this is for power down */
1040 if (IsVga) return ForPowerDown;
1041 }
1042 }
1043
1044 /* Finally, never disable decodes if there's no power management */
1045 return !(HackFlags & PCI_HACK_NO_PM_CAPS);
1046 }
1047
1048 PCI_DEVICE_TYPES
1049 NTAPI
1050 PciClassifyDeviceType(IN PPCI_PDO_EXTENSION PdoExtension)
1051 {
1052 ASSERT(PdoExtension->ExtensionType == PciPdoExtensionType);
1053
1054 /* Differenriate between devices and bridges */
1055 if (PdoExtension->BaseClass != PCI_CLASS_BRIDGE_DEV) return PciTypeDevice;
1056
1057 /* The PCI Bus driver handles only CardBus and PCI bridges (plus host) */
1058 if (PdoExtension->SubClass == PCI_SUBCLASS_BR_HOST) return PciTypeHostBridge;
1059 if (PdoExtension->SubClass == PCI_SUBCLASS_BR_PCI_TO_PCI) return PciTypePciBridge;
1060 if (PdoExtension->SubClass == PCI_SUBCLASS_BR_CARDBUS) return PciTypeCardbusBridge;
1061
1062 /* Any other kind of bridge is treated like a device */
1063 return PciTypeDevice;
1064 }
1065
1066 ULONG_PTR
1067 NTAPI
1068 PciExecuteCriticalSystemRoutine(IN ULONG_PTR IpiContext)
1069 {
1070 PPCI_IPI_CONTEXT Context = (PPCI_IPI_CONTEXT)IpiContext;
1071
1072 /* Check if the IPI is already running */
1073 if (!InterlockedDecrement(&Context->RunCount))
1074 {
1075 /* Nope, this is the first instance, so execute the IPI function */
1076 Context->Function(Context->DeviceExtension, Context->Context);
1077
1078 /* Notify anyone that was spinning that they can stop now */
1079 Context->Barrier = 0;
1080 }
1081 else
1082 {
1083 /* Spin until it has finished running */
1084 while (Context->Barrier);
1085 }
1086
1087 /* Done */
1088 return 0;
1089 }
1090
1091 BOOLEAN
1092 NTAPI
1093 PciIsSlotPresentInParentMethod(IN PPCI_PDO_EXTENSION PdoExtension,
1094 IN ULONG Method)
1095 {
1096 BOOLEAN FoundSlot;
1097 PACPI_METHOD_ARGUMENT Argument;
1098 ACPI_EVAL_INPUT_BUFFER InputBuffer;
1099 PACPI_EVAL_OUTPUT_BUFFER OutputBuffer;
1100 ULONG i, Length;
1101 NTSTATUS Status;
1102 PAGED_CODE();
1103
1104 /* Assume slot is not part of the parent method */
1105 FoundSlot = FALSE;
1106
1107 /* Allocate a 2KB buffer for the method return parameters */
1108 Length = sizeof(ACPI_EVAL_OUTPUT_BUFFER) + 2048;
1109 OutputBuffer = ExAllocatePoolWithTag(PagedPool, Length, 'BicP');
1110 if (OutputBuffer)
1111 {
1112 /* Clear out the output buffer */
1113 RtlZeroMemory(OutputBuffer, Length);
1114
1115 /* Initialize the input buffer with the method requested */
1116 InputBuffer.Signature = 0;
1117 *(PULONG)InputBuffer.MethodName = Method;
1118 InputBuffer.Signature = ACPI_EVAL_INPUT_BUFFER_SIGNATURE;
1119
1120 /* Send it to the ACPI driver */
1121 Status = PciSendIoctl(PdoExtension->ParentFdoExtension->PhysicalDeviceObject,
1122 IOCTL_ACPI_EVAL_METHOD,
1123 &InputBuffer,
1124 sizeof(ACPI_EVAL_INPUT_BUFFER),
1125 OutputBuffer,
1126 Length);
1127 if (NT_SUCCESS(Status))
1128 {
1129 /* Scan all output arguments */
1130 for (i = 0; i < OutputBuffer->Count; i++)
1131 {
1132 /* Make sure it's an integer */
1133 Argument = &OutputBuffer->Argument[i];
1134 if (Argument->Type != ACPI_METHOD_ARGUMENT_INTEGER) continue;
1135
1136 /* Check if the argument matches this PCI slot structure */
1137 if (Argument->Argument == ((PdoExtension->Slot.u.bits.DeviceNumber) |
1138 ((PdoExtension->Slot.u.bits.FunctionNumber) << 16)))
1139 {
1140 /* This slot has been found, return it */
1141 FoundSlot = TRUE;
1142 break;
1143 }
1144 }
1145 }
1146
1147 /* Finished with the buffer, free it */
1148 ExFreePoolWithTag(OutputBuffer, 0);
1149 }
1150
1151 /* Return if the slot was found */
1152 return FoundSlot;
1153 }
1154
1155 ULONG
1156 NTAPI
1157 PciGetLengthFromBar(IN ULONG Bar)
1158 {
1159 ULONG Length;
1160
1161 /* I/O addresses vs. memory addresses start differently due to alignment */
1162 Length = 1 << ((Bar & PCI_ADDRESS_IO_SPACE) ? 2 : 4);
1163
1164 /* Keep going until a set bit */
1165 while (!(Length & Bar) && (Length)) Length <<= 1;
1166
1167 /* Return the length (might be 0 on 64-bit because it's the low-word) */
1168 if ((Bar & PCI_ADDRESS_MEMORY_TYPE_MASK) != PCI_TYPE_64BIT) ASSERT(Length);
1169 return Length;
1170 }
1171
1172 BOOLEAN
1173 NTAPI
1174 PciCreateIoDescriptorFromBarLimit(PIO_RESOURCE_DESCRIPTOR ResourceDescriptor,
1175 IN PULONG BarArray,
1176 IN BOOLEAN Rom)
1177 {
1178 ULONG CurrentBar, BarLength, BarMask;
1179 BOOLEAN Is64BitBar = FALSE;
1180
1181 /* Check if the BAR is nor I/O nor memory */
1182 CurrentBar = BarArray[0];
1183 if (!(CurrentBar & ~PCI_ADDRESS_IO_SPACE))
1184 {
1185 /* Fail this descriptor */
1186 ResourceDescriptor->Type = CmResourceTypeNull;
1187 return FALSE;
1188 }
1189
1190 /* Set default flag and clear high words */
1191 ResourceDescriptor->Flags = 0;
1192 ResourceDescriptor->u.Generic.MaximumAddress.HighPart = 0;
1193 ResourceDescriptor->u.Generic.MinimumAddress.LowPart = 0;
1194 ResourceDescriptor->u.Generic.MinimumAddress.HighPart = 0;
1195
1196 /* Check for ROM Address */
1197 if (Rom)
1198 {
1199 /* Clean up the BAR to get just the address */
1200 CurrentBar &= PCI_ADDRESS_ROM_ADDRESS_MASK;
1201 if (!CurrentBar)
1202 {
1203 /* Invalid ar, fail this descriptor */
1204 ResourceDescriptor->Type = CmResourceTypeNull;
1205 return FALSE;
1206 }
1207
1208 /* ROM Addresses are always read only */
1209 ResourceDescriptor->Flags = CM_RESOURCE_MEMORY_READ_ONLY;
1210 }
1211
1212 /* Compute the length, assume it's the alignment for now */
1213 BarLength = PciGetLengthFromBar(CurrentBar);
1214 ResourceDescriptor->u.Generic.Length = BarLength;
1215 ResourceDescriptor->u.Generic.Alignment = BarLength;
1216
1217 /* Check what kind of BAR this is */
1218 if (CurrentBar & PCI_ADDRESS_IO_SPACE)
1219 {
1220 /* Use correct mask to decode the address */
1221 BarMask = PCI_ADDRESS_IO_ADDRESS_MASK;
1222
1223 /* Set this as an I/O Port descriptor */
1224 ResourceDescriptor->Type = CmResourceTypePort;
1225 ResourceDescriptor->Flags = CM_RESOURCE_PORT_IO;
1226 }
1227 else
1228 {
1229 /* Use correct mask to decode the address */
1230 BarMask = PCI_ADDRESS_MEMORY_ADDRESS_MASK;
1231
1232 /* Set this as a memory descriptor */
1233 ResourceDescriptor->Type = CmResourceTypeMemory;
1234
1235 /* Check if it's 64-bit or 20-bit decode */
1236 if ((CurrentBar & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_64BIT)
1237 {
1238 /* The next BAR has the high word, read it */
1239 ResourceDescriptor->u.Port.MaximumAddress.HighPart = BarArray[1];
1240 Is64BitBar = TRUE;
1241 }
1242 else if ((CurrentBar & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_20BIT)
1243 {
1244 /* Use the correct mask to decode the address */
1245 BarMask = ~0xFFF0000F;
1246 }
1247
1248 /* Check if the BAR is listed as prefetchable memory */
1249 if (CurrentBar & PCI_ADDRESS_MEMORY_PREFETCHABLE)
1250 {
1251 /* Mark the descriptor in the same way */
1252 ResourceDescriptor->Flags |= CM_RESOURCE_MEMORY_PREFETCHABLE;
1253 }
1254 }
1255
1256 /* Now write down the maximum address based on the base + length */
1257 ResourceDescriptor->u.Port.MaximumAddress.QuadPart = (CurrentBar & BarMask) +
1258 BarLength - 1;
1259
1260 /* Return if this is a 64-bit BAR, so the loop code knows to skip the next one */
1261 return Is64BitBar;
1262 }
1263
1264 VOID
1265 NTAPI
1266 PciDecodeEnable(IN PPCI_PDO_EXTENSION PdoExtension,
1267 IN BOOLEAN Enable,
1268 OUT PUSHORT Command)
1269 {
1270 USHORT CommandValue;
1271
1272 /*
1273 * If decodes are being disabled, make sure it's allowed, and in both cases,
1274 * make sure that a hackflag isn't preventing touching the decodes at all.
1275 */
1276 if (((Enable) || (PciCanDisableDecodes(PdoExtension, 0, 0, 0))) &&
1277 !(PdoExtension->HackFlags & PCI_HACK_PRESERVE_COMMAND))
1278 {
1279 /* Did the caller already have a command word? */
1280 if (Command)
1281 {
1282 /* Use the caller's */
1283 CommandValue = *Command;
1284 }
1285 else
1286 {
1287 /* Otherwise, read the current command */
1288 PciReadDeviceConfig(PdoExtension,
1289 &Command,
1290 FIELD_OFFSET(PCI_COMMON_HEADER, Command),
1291 sizeof(USHORT));
1292 }
1293
1294 /* Turn off decodes by default */
1295 CommandValue &= ~(PCI_ENABLE_IO_SPACE |
1296 PCI_ENABLE_MEMORY_SPACE |
1297 PCI_ENABLE_BUS_MASTER);
1298
1299 /* If requested, enable the decodes that were enabled at init time */
1300 if (Enable) CommandValue |= PdoExtension->CommandEnables &
1301 (PCI_ENABLE_IO_SPACE |
1302 PCI_ENABLE_MEMORY_SPACE |
1303 PCI_ENABLE_BUS_MASTER);
1304
1305 /* Update the command word */
1306 PciWriteDeviceConfig(PdoExtension,
1307 &CommandValue,
1308 FIELD_OFFSET(PCI_COMMON_HEADER, Command),
1309 sizeof(USHORT));
1310 }
1311 }
1312
1313 NTSTATUS
1314 NTAPI
1315 PciQueryBusInformation(IN PPCI_PDO_EXTENSION PdoExtension,
1316 IN PPNP_BUS_INFORMATION* Buffer)
1317 {
1318 PPNP_BUS_INFORMATION BusInfo;
1319
1320 /* Allocate a structure for the bus information */
1321 BusInfo = ExAllocatePoolWithTag(PagedPool,
1322 sizeof(PNP_BUS_INFORMATION),
1323 'BicP');
1324 if (!BusInfo) return STATUS_INSUFFICIENT_RESOURCES;
1325
1326 /* Write the correct GUID and bus type identifier, and fill the bus number */
1327 BusInfo->BusTypeGuid = GUID_BUS_TYPE_PCI;
1328 BusInfo->LegacyBusType = PCIBus;
1329 BusInfo->BusNumber = PdoExtension->ParentFdoExtension->BaseBus;
1330 return STATUS_SUCCESS;
1331 }
1332
1333 NTSTATUS
1334 NTAPI
1335 PciDetermineSlotNumber(IN PPCI_PDO_EXTENSION PdoExtension,
1336 OUT PULONG SlotNumber)
1337 {
1338 PPCI_FDO_EXTENSION ParentExtension;
1339 ULONG ResultLength;
1340 NTSTATUS Status;
1341 PSLOT_INFO SlotInfo;
1342
1343 /* Check if a $PIR from the BIOS is used (legacy IRQ routing) */
1344 ParentExtension = PdoExtension->ParentFdoExtension;
1345 DPRINT1("Slot lookup for %d.%d.%d\n",
1346 ParentExtension ? ParentExtension->BaseBus : -1,
1347 PdoExtension->Slot.u.bits.DeviceNumber,
1348 PdoExtension->Slot.u.bits.FunctionNumber);
1349 if ((PciIrqRoutingTable) && (ParentExtension))
1350 {
1351 /* Read every slot information entry */
1352 SlotInfo = &PciIrqRoutingTable->Slot[0];
1353 DPRINT1("PIR$ %p is %lx bytes, slot 0 is at: %lx\n",
1354 PciIrqRoutingTable, PciIrqRoutingTable->TableSize, SlotInfo);
1355 while (SlotInfo < (PSLOT_INFO)((ULONG_PTR)PciIrqRoutingTable +
1356 PciIrqRoutingTable->TableSize))
1357 {
1358 DPRINT1("Slot Info: %d.%d->#%d\n",
1359 SlotInfo->BusNumber,
1360 SlotInfo->DeviceNumber,
1361 SlotInfo->SlotNumber);
1362
1363 /* Check if this slot information matches the PDO being queried */
1364 if ((ParentExtension->BaseBus == SlotInfo->BusNumber) &&
1365 (PdoExtension->Slot.u.bits.DeviceNumber == SlotInfo->DeviceNumber >> 3) &&
1366 (SlotInfo->SlotNumber))
1367 {
1368 /* We found it, return it and return success */
1369 *SlotNumber = SlotInfo->SlotNumber;
1370 return STATUS_SUCCESS;
1371 }
1372
1373 /* Try the next slot */
1374 SlotInfo++;
1375 }
1376 }
1377
1378 /* Otherwise, grab the parent FDO and check if it's the root */
1379 if (PCI_IS_ROOT_FDO(ParentExtension))
1380 {
1381 /* The root FDO doesn't have a slot number */
1382 Status = STATUS_UNSUCCESSFUL;
1383 }
1384 else
1385 {
1386 /* Otherwise, query the slot/UI address/number as a device property */
1387 Status = IoGetDeviceProperty(ParentExtension->PhysicalDeviceObject,
1388 DevicePropertyUINumber,
1389 sizeof(ULONG),
1390 SlotNumber,
1391 &ResultLength);
1392 }
1393
1394 /* Return the status of this endeavour */
1395 return Status;
1396 }
1397
1398 NTSTATUS
1399 NTAPI
1400 PciGetDeviceCapabilities(IN PDEVICE_OBJECT DeviceObject,
1401 IN OUT PDEVICE_CAPABILITIES DeviceCapability)
1402 {
1403 PIRP Irp;
1404 NTSTATUS Status;
1405 KEVENT Event;
1406 PDEVICE_OBJECT AttachedDevice;
1407 PIO_STACK_LOCATION IoStackLocation;
1408 IO_STATUS_BLOCK IoStatusBlock;
1409 PAGED_CODE();
1410
1411 /* Zero out capabilities and set undefined values to start with */
1412 RtlZeroMemory(DeviceCapability, sizeof(DEVICE_CAPABILITIES));
1413 DeviceCapability->Size = sizeof(DEVICE_CAPABILITIES);
1414 DeviceCapability->Version = 1;
1415 DeviceCapability->Address = -1;
1416 DeviceCapability->UINumber = -1;
1417
1418 /* Build the wait event for the IOCTL */
1419 KeInitializeEvent(&Event, SynchronizationEvent, FALSE);
1420
1421 /* Find the device the PDO is attached to */
1422 AttachedDevice = IoGetAttachedDeviceReference(DeviceObject);
1423
1424 /* And build an IRP for it */
1425 Irp = IoBuildSynchronousFsdRequest(IRP_MJ_PNP,
1426 AttachedDevice,
1427 NULL,
1428 0,
1429 NULL,
1430 &Event,
1431 &IoStatusBlock);
1432 if (!Irp)
1433 {
1434 /* The IRP failed, fail the request as well */
1435 ObDereferenceObject(AttachedDevice);
1436 return STATUS_INSUFFICIENT_RESOURCES;
1437 }
1438
1439 /* Set default status */
1440 Irp->IoStatus.Information = 0;
1441 Irp->IoStatus.Status = STATUS_NOT_SUPPORTED;
1442
1443 /* Get a stack location in this IRP */
1444 IoStackLocation = IoGetNextIrpStackLocation(Irp);
1445 ASSERT(IoStackLocation);
1446
1447 /* Initialize it as a query capabilities IRP, with no completion routine */
1448 RtlZeroMemory(IoStackLocation, sizeof(IO_STACK_LOCATION));
1449 IoStackLocation->MajorFunction = IRP_MJ_PNP;
1450 IoStackLocation->MinorFunction = IRP_MN_QUERY_CAPABILITIES;
1451 IoStackLocation->Parameters.DeviceCapabilities.Capabilities = DeviceCapability;
1452 IoSetCompletionRoutine(Irp, NULL, NULL, FALSE, FALSE, FALSE);
1453
1454 /* Send the IOCTL to the driver */
1455 Status = IoCallDriver(AttachedDevice, Irp);
1456 if (Status == STATUS_PENDING)
1457 {
1458 /* Wait for a response and update the actual status */
1459 KeWaitForSingleObject(&Event,
1460 Executive,
1461 KernelMode,
1462 FALSE,
1463 NULL);
1464 Status = Irp->IoStatus.Status;
1465 }
1466
1467 /* Done, dereference the attached device and return the final result */
1468 ObDereferenceObject(AttachedDevice);
1469 return Status;
1470 }
1471
1472 NTSTATUS
1473 NTAPI
1474 PciQueryPowerCapabilities(IN PPCI_PDO_EXTENSION PdoExtension,
1475 IN PDEVICE_CAPABILITIES DeviceCapability)
1476 {
1477 PDEVICE_OBJECT DeviceObject;
1478 NTSTATUS Status;
1479 DEVICE_CAPABILITIES AttachedCaps;
1480 DEVICE_POWER_STATE NewPowerState, DevicePowerState, DeviceWakeLevel, DeviceWakeState;
1481 SYSTEM_POWER_STATE SystemWakeState, DeepestWakeState, CurrentState;
1482
1483 /* Nothing is known at first */
1484 DeviceWakeState = PowerDeviceUnspecified;
1485 SystemWakeState = DeepestWakeState = PowerSystemUnspecified;
1486
1487 /* Get the PCI capabilities for the parent PDO */
1488 DeviceObject = PdoExtension->ParentFdoExtension->PhysicalDeviceObject;
1489 Status = PciGetDeviceCapabilities(DeviceObject, &AttachedCaps);
1490 ASSERT(NT_SUCCESS(Status));
1491 if (!NT_SUCCESS(Status)) return Status;
1492
1493 /* Check if there's not an existing device state for S0 */
1494 if (!AttachedCaps.DeviceState[PowerSystemWorking])
1495 {
1496 /* Set D0<->S0 mapping */
1497 AttachedCaps.DeviceState[PowerSystemWorking] = PowerDeviceD0;
1498 }
1499
1500 /* Check if there's not an existing device state for S3 */
1501 if (!AttachedCaps.DeviceState[PowerSystemShutdown])
1502 {
1503 /* Set D3<->S3 mapping */
1504 AttachedCaps.DeviceState[PowerSystemShutdown] = PowerDeviceD3;
1505 }
1506
1507 /* Check for a PDO with broken, or no, power capabilities */
1508 if (PdoExtension->HackFlags & PCI_HACK_NO_PM_CAPS)
1509 {
1510 /* Unknown wake device states */
1511 DeviceCapability->DeviceWake = PowerDeviceUnspecified;
1512 DeviceCapability->SystemWake = PowerSystemUnspecified;
1513
1514 /* No device state support */
1515 DeviceCapability->DeviceD1 = FALSE;
1516 DeviceCapability->DeviceD2 = FALSE;
1517
1518 /* No waking from any low-power device state is supported */
1519 DeviceCapability->WakeFromD0 = FALSE;
1520 DeviceCapability->WakeFromD1 = FALSE;
1521 DeviceCapability->WakeFromD2 = FALSE;
1522 DeviceCapability->WakeFromD3 = FALSE;
1523
1524 /* For the rest, copy whatever the parent PDO had */
1525 RtlCopyMemory(DeviceCapability->DeviceState,
1526 AttachedCaps.DeviceState,
1527 sizeof(DeviceCapability->DeviceState));
1528 return STATUS_SUCCESS;
1529 }
1530
1531 /* The PCI Device has power capabilities, so read which ones are supported */
1532 DeviceCapability->DeviceD1 = PdoExtension->PowerCapabilities.Support.D1;
1533 DeviceCapability->DeviceD2 = PdoExtension->PowerCapabilities.Support.D2;
1534 DeviceCapability->WakeFromD0 = PdoExtension->PowerCapabilities.Support.PMED0;
1535 DeviceCapability->WakeFromD1 = PdoExtension->PowerCapabilities.Support.PMED1;
1536 DeviceCapability->WakeFromD2 = PdoExtension->PowerCapabilities.Support.PMED2;
1537
1538 /* Can the attached device wake from D3? */
1539 if (AttachedCaps.DeviceWake != PowerDeviceD3)
1540 {
1541 /* It can't, so check if this PDO supports hot D3 wake */
1542 DeviceCapability->WakeFromD3 = PdoExtension->PowerCapabilities.Support.PMED3Hot;
1543 }
1544 else
1545 {
1546 /* It can, is this the root bus? */
1547 if (PCI_IS_ROOT_FDO(PdoExtension->ParentFdoExtension))
1548 {
1549 /* This is the root bus, so just check if it supports hot D3 wake */
1550 DeviceCapability->WakeFromD3 = PdoExtension->PowerCapabilities.Support.PMED3Hot;
1551 }
1552 else
1553 {
1554 /* Take the minimums? -- need to check with briang at work */
1555 UNIMPLEMENTED;
1556 }
1557 }
1558
1559 /* Now loop each system power state to determine its device state mapping */
1560 for (CurrentState = PowerSystemWorking;
1561 CurrentState < PowerSystemMaximum;
1562 CurrentState++)
1563 {
1564 /* Read the current mapping from the attached device */
1565 DevicePowerState = AttachedCaps.DeviceState[CurrentState];
1566 NewPowerState = DevicePowerState;
1567
1568 /* The attachee suports D1, but this PDO does not */
1569 if ((NewPowerState == PowerDeviceD1) &&
1570 !(PdoExtension->PowerCapabilities.Support.D1))
1571 {
1572 /* Fall back to D2 */
1573 NewPowerState = PowerDeviceD2;
1574 }
1575
1576 /* The attachee supports D2, but this PDO does not */
1577 if ((NewPowerState == PowerDeviceD2) &&
1578 !(PdoExtension->PowerCapabilities.Support.D2))
1579 {
1580 /* Fall back to D3 */
1581 NewPowerState = PowerDeviceD3;
1582 }
1583
1584 /* Set the mapping based on the best state supported */
1585 DeviceCapability->DeviceState[CurrentState] = NewPowerState;
1586
1587 /* Check if sleep states are being processed, and a mapping was found */
1588 if ((CurrentState < PowerSystemHibernate) &&
1589 (NewPowerState != PowerDeviceUnspecified))
1590 {
1591 /* Save this state as being the deepest one found until now */
1592 DeepestWakeState = CurrentState;
1593 }
1594
1595 /*
1596 * Finally, check if the computed sleep state is within the states that
1597 * this device can wake the system from, and if it's higher or equal to
1598 * the sleep state mapping that came from the attachee, assuming that it
1599 * had a valid mapping to begin with.
1600 *
1601 * It this is the case, then make sure that the computed sleep state is
1602 * matched by the device's ability to actually wake from that state.
1603 *
1604 * For devices that support D3, the PCI device only needs Hot D3 as long
1605 * as the attachee's state is less than D3. Otherwise, if the attachee
1606 * might also be at D3, this would require a Cold D3 wake, so check that
1607 * the device actually support this.
1608 */
1609 if ((CurrentState < AttachedCaps.SystemWake) &&
1610 (NewPowerState >= DevicePowerState) &&
1611 (DevicePowerState != PowerDeviceUnspecified) &&
1612 (((NewPowerState == PowerDeviceD0) && (DeviceCapability->WakeFromD0)) ||
1613 ((NewPowerState == PowerDeviceD1) && (DeviceCapability->WakeFromD1)) ||
1614 ((NewPowerState == PowerDeviceD2) && (DeviceCapability->WakeFromD2)) ||
1615 ((NewPowerState == PowerDeviceD3) &&
1616 (PdoExtension->PowerCapabilities.Support.PMED3Hot) &&
1617 ((DevicePowerState < PowerDeviceD3) ||
1618 (PdoExtension->PowerCapabilities.Support.PMED3Cold)))))
1619 {
1620 /* The mapping is valid, so this will be the lowest wake state */
1621 SystemWakeState = CurrentState;
1622 DeviceWakeState = NewPowerState;
1623 }
1624 }
1625
1626 /* Read the current wake level */
1627 DeviceWakeLevel = PdoExtension->PowerState.DeviceWakeLevel;
1628
1629 /* Check if the attachee's wake levels are valid, and the PDO's is higher */
1630 if ((AttachedCaps.SystemWake != PowerSystemUnspecified) &&
1631 (AttachedCaps.DeviceWake != PowerDeviceUnspecified) &&
1632 (DeviceWakeLevel != PowerDeviceUnspecified) &&
1633 (DeviceWakeLevel >= AttachedCaps.DeviceWake))
1634 {
1635 /* Inherit the system wake from the attachee, and this PDO's wake level */
1636 DeviceCapability->SystemWake = AttachedCaps.SystemWake;
1637 DeviceCapability->DeviceWake = DeviceWakeLevel;
1638
1639 /* Now check if the wake level is D0, but the PDO doesn't support it */
1640 if ((DeviceCapability->DeviceWake == PowerDeviceD0) &&
1641 !(DeviceCapability->WakeFromD0))
1642 {
1643 /* Bump to D1 */
1644 DeviceCapability->DeviceWake = PowerDeviceD1;
1645 }
1646
1647 /* Now check if the wake level is D1, but the PDO doesn't support it */
1648 if ((DeviceCapability->DeviceWake == PowerDeviceD1) &&
1649 !(DeviceCapability->WakeFromD1))
1650 {
1651 /* Bump to D2 */
1652 DeviceCapability->DeviceWake = PowerDeviceD2;
1653 }
1654
1655 /* Now check if the wake level is D2, but the PDO doesn't support it */
1656 if ((DeviceCapability->DeviceWake == PowerDeviceD2) &&
1657 !(DeviceCapability->WakeFromD2))
1658 {
1659 /* Bump it to D3 */
1660 DeviceCapability->DeviceWake = PowerDeviceD3;
1661 }
1662
1663 /* Now check if the wake level is D3, but the PDO doesn't support it */
1664 if ((DeviceCapability->DeviceWake == PowerDeviceD3) &&
1665 !(DeviceCapability->WakeFromD3))
1666 {
1667 /* Then no valid wake state exists */
1668 DeviceCapability->DeviceWake = PowerDeviceUnspecified;
1669 DeviceCapability->SystemWake = PowerSystemUnspecified;
1670 }
1671
1672 /* Check if no valid wake state was found */
1673 if ((DeviceCapability->DeviceWake == PowerDeviceUnspecified) ||
1674 (DeviceCapability->SystemWake == PowerSystemUnspecified))
1675 {
1676 /* Check if one was computed earlier */
1677 if ((SystemWakeState != PowerSystemUnspecified) &&
1678 (DeviceWakeState != PowerDeviceUnspecified))
1679 {
1680 /* Use the wake state that had been computed earlier */
1681 DeviceCapability->DeviceWake = DeviceWakeState;
1682 DeviceCapability->SystemWake = SystemWakeState;
1683
1684 /* If that state was D3, then the device supports Hot/Cold D3 */
1685 if (DeviceWakeState == PowerDeviceD3) DeviceCapability->WakeFromD3 = TRUE;
1686 }
1687 }
1688
1689 /*
1690 * Finally, check for off states (lower than S3, such as hibernate) and
1691 * make sure that the device both supports waking from D3 as well as
1692 * supports a Cold wake
1693 */
1694 if ((DeviceCapability->SystemWake > PowerSystemSleeping3) &&
1695 ((DeviceCapability->DeviceWake != PowerDeviceD3) ||
1696 !(PdoExtension->PowerCapabilities.Support.PMED3Cold)))
1697 {
1698 /* It doesn't, so pick the computed lowest wake state from earlier */
1699 DeviceCapability->SystemWake = DeepestWakeState;
1700 }
1701
1702 /* Set the PCI Specification mandated maximum latencies for transitions */
1703 DeviceCapability->D1Latency = 0;
1704 DeviceCapability->D2Latency = 2;
1705 DeviceCapability->D3Latency = 100;
1706
1707 /* Sanity check */
1708 ASSERT(DeviceCapability->DeviceState[PowerSystemWorking] == PowerDeviceD0);
1709 }
1710 else
1711 {
1712 /* No valid sleep states, no latencies to worry about */
1713 DeviceCapability->D1Latency = 0;
1714 DeviceCapability->D2Latency = 0;
1715 DeviceCapability->D3Latency = 0;
1716 }
1717
1718 /* This function always succeeds, even without power management support */
1719 return STATUS_SUCCESS;
1720 }
1721
1722 NTSTATUS
1723 NTAPI
1724 PciQueryCapabilities(IN PPCI_PDO_EXTENSION PdoExtension,
1725 IN OUT PDEVICE_CAPABILITIES DeviceCapability)
1726 {
1727 NTSTATUS Status;
1728
1729 /* A PDO ID is never unique, and its address is its function and device */
1730 DeviceCapability->UniqueID = FALSE;
1731 DeviceCapability->Address = PdoExtension->Slot.u.bits.FunctionNumber |
1732 (PdoExtension->Slot.u.bits.DeviceNumber << 16);
1733
1734 /* Check for host bridges */
1735 if ((PdoExtension->BaseClass == PCI_CLASS_BRIDGE_DEV) &&
1736 (PdoExtension->SubClass == PCI_SUBCLASS_BR_HOST))
1737 {
1738 /* Raw device opens to a host bridge are acceptable */
1739 DeviceCapability->RawDeviceOK = TRUE;
1740 }
1741 else
1742 {
1743 /* Otherwise, other PDOs cannot be directly opened */
1744 DeviceCapability->RawDeviceOK = FALSE;
1745 }
1746
1747 /* PCI PDOs are pretty fixed things */
1748 DeviceCapability->LockSupported = FALSE;
1749 DeviceCapability->EjectSupported = FALSE;
1750 DeviceCapability->Removable = FALSE;
1751 DeviceCapability->DockDevice = FALSE;
1752
1753 /* The slot number is stored as a device property, go query it */
1754 PciDetermineSlotNumber(PdoExtension, &DeviceCapability->UINumber);
1755
1756 /* Finally, query and power capabilities and convert them for PnP usage */
1757 Status = PciQueryPowerCapabilities(PdoExtension, DeviceCapability);
1758
1759 /* Dump the capabilities if it all worked, and return the status */
1760 if (NT_SUCCESS(Status)) PciDebugDumpQueryCapabilities(DeviceCapability);
1761 return Status;
1762 }
1763
1764 PCM_PARTIAL_RESOURCE_DESCRIPTOR
1765 NTAPI
1766 PciNextPartialDescriptor(PCM_PARTIAL_RESOURCE_DESCRIPTOR CmDescriptor)
1767 {
1768 PCM_PARTIAL_RESOURCE_DESCRIPTOR NextDescriptor;
1769
1770 /* Assume the descriptors are the fixed size ones */
1771 NextDescriptor = CmDescriptor + 1;
1772
1773 /* But check if this is actually a variable-sized descriptor */
1774 if (CmDescriptor->Type == CmResourceTypeDeviceSpecific)
1775 {
1776 /* Add the size of the variable section as well */
1777 NextDescriptor = (PVOID)((ULONG_PTR)NextDescriptor +
1778 CmDescriptor->u.DeviceSpecificData.DataSize);
1779 }
1780
1781 /* Now the correct pointer has been computed, return it */
1782 return NextDescriptor;
1783 }
1784
1785 /* EOF */