drivers/input/i8042prt/dmi.h

   1
   2 #pragma once
   3
   4 enum DMI_DEVICE_TYPE
   5 {
   6     DMI_DEV_TYPE_ANY = 0,
   7     DMI_DEV_TYPE_OTHER,
   8     DMI_DEV_TYPE_UNKNOWN,
   9     DMI_DEV_TYPE_VIDEO,
  10     DMI_DEV_TYPE_SCSI,
  11     DMI_DEV_TYPE_ETHERNET,
  12     DMI_DEV_TYPE_TOKENRING,
  13     DMI_DEV_TYPE_SOUND,
  14     DMI_DEV_TYPE_PATA,
  15     DMI_DEV_TYPE_SATA,
  16     DMI_DEV_TYPE_SAS,
  17     DMI_DEV_TYPE_IPMI = -1,
  18     DMI_DEV_TYPE_OEM_STRING = -2,
  19     DMI_DEV_TYPE_DEV_ONBOARD = -3,
  20 };
  21
  22 enum DMI_ENTRY_TYPE
  23 {
  24     DMI_ENTRY_BIOS = 0,
  25     DMI_ENTRY_SYSTEM = 1,
  26     DMI_ENTRY_BASEBOARD = 2,
  27     DMI_ENTRY_CHASSIS = 3,
  28     DMI_ENTRY_PROCESSOR = 4,
  29     DMI_ENTRY_MEM_CONTROLLER = 5,
  30     DMI_ENTRY_MEM_MODULE = 6,
  31     DMI_ENTRY_CACHE = 7,
  32     DMI_ENTRY_PORT_CONNECTOR = 8,
  33     DMI_ENTRY_SYSTEM_SLOT = 9,
  34     DMI_ENTRY_ONBOARD_DEVICE = 10,
  35     DMI_ENTRY_OEMSTRINGS = 11,
  36     DMI_ENTRY_SYSCONF = 12,
  37     DMI_ENTRY_BIOS_LANG = 13,
  38     DMI_ENTRY_GROUP_ASSOC = 14,
  39     DMI_ENTRY_SYSTEM_EVENT_LOG = 15,
  40     DMI_ENTRY_PHYS_MEM_ARRAY = 16,
  41     DMI_ENTRY_MEM_DEVICE = 17,
  42     DMI_ENTRY_32_MEM_ERROR = 18,
  43     DMI_ENTRY_MEM_ARRAY_MAPPED_ADDR = 19,
  44     DMI_ENTRY_MEM_DEV_MAPPED_ADDR = 20,
  45     DMI_ENTRY_BUILTIN_POINTING_DEV,
  46     DMI_ENTRY_PORTABLE_BATTERY,
  47     DMI_ENTRY_SYSTEM_RESET,
  48     DMI_ENTRY_HW_SECURITY,
  49     DMI_ENTRY_SYSTEM_POWER_CONTROLS = 25,
  50     DMI_ENTRY_VOLTAGE_PROBE,
  51     DMI_ENTRY_COOLING_DEV,
  52     DMI_ENTRY_TEMP_PROBE,
  53     DMI_ENTRY_ELECTRICAL_CURRENT_PROBE,
  54     DMI_ENTRY_OOB_REMOTE_ACCESS = 30,
  55     DMI_ENTRY_BIS_ENTRY,
  56     DMI_ENTRY_SYSTEM_BOOT = 32,
  57     DMI_ENTRY_MGMT_DEV,
  58     DMI_ENTRY_MGMT_DEV_COMPONENT,
  59     DMI_ENTRY_MGMT_DEV_THRES = 35,
  60     DMI_ENTRY_MEM_CHANNEL = 36,
  61     DMI_ENTRY_IPMI_DEV = 37,
  62     DMI_ENTRY_SYS_POWER_SUPPLY = 38,
  63     DMI_ENTRY_ADDITIONAL = 39,
  64     DMI_ENTRY_ONBOARD_DEV_EXT = 40,
  65     DMI_ENTRY_MGMT_CONTROLLER_HOST = 41,
  66     DMI_ENTRY_INACTIVE = 126,
  67     DMI_ENTRY_END_OF_TABLE = 127,
  68 };
  69
  70 enum _DMI_FIELD_OFFSETS
  71 {
  72     /* Type = 0: DMI_ENTRY_BIOS */
  73     DMI_BIOS_VENDOR = 0x04,
  74     DMI_BIOS_VERSION = 0x05,
  75     DMI_BIOS_DATE = 0x08,
  76     DMI_BIOS_SIZE = 0x14,
  77
  78     /* Type = 1: DMI_ENTRY_SYSTEM */
  79     DMI_SYS_VENDOR = 0x04,
  80     DMI_SYS_PRODUCT = 0x05,
  81     DMI_SYS_VERSION = 0x06,
  82     DMI_SYS_SERIAL = 0x07,
  83     DMI_SYS_SIZE = 0x1b,
  84
  85     /* Type = 2: DMI_ENTRY_BASEBOARD */
  86     DMI_BOARD_VENDOR = 0x04,
  87     DMI_BOARD_NAME = 0x05,
  88     DMI_BOARD_VERSION = 0x06,
  89     DMI_BOARD_SERIAL = 0x07,
  90     DMI_BOARD_ASSET_TAG = 0x08,
  91     DMI_BOARD_SIZE = 0x10,
  92
  93
  94 };
  95
  96 typedef struct _DMI_HEADER
  97 {
  98         UCHAR Type;
  99         UCHAR Length;
 100         USHORT Handle;
 101 } DMI_HEADER, *PDMI_HEADER;
 102