drivers/storage/storahci/storahci.h

   1 #include "miniport.h"
   2 #include "storport.h"
   3
   4 typedef struct _AHCI_PORT
   5 {
   6         ULONG   CLB;            // 0x00, command list base address, 1K-byte aligned
   7         ULONG   CLBU;           // 0x04, command list base address upper 32 bits
   8         ULONG   FB;                     // 0x08, FIS base address, 256-byte aligned
   9         ULONG   FBU;            // 0x0C, FIS base address upper 32 bits
  10         ULONG   IS;                     // 0x10, interrupt status
  11         ULONG   IE;                     // 0x14, interrupt enable
  12         ULONG   CMD;            // 0x18, command and status
  13         ULONG   RSV0;           // 0x1C, Reserved
  14         ULONG   TFD;            // 0x20, task file data
  15         ULONG   SIG;            // 0x24, signature
  16         ULONG   SSTS;           // 0x28, SATA status (SCR0:SStatus)
  17         ULONG   SCTL;           // 0x2C, SATA control (SCR2:SControl)
  18         ULONG   SERR;           // 0x30, SATA error (SCR1:SError)
  19         ULONG   SACT;           // 0x34, SATA active (SCR3:SActive)
  20         ULONG   CI;                     // 0x38, command issue
  21         ULONG   SNTF;           // 0x3C, SATA notification (SCR4:SNotification)
  22         ULONG   FBS;            // 0x40, FIS-based switch control
  23         ULONG   RSV1[11];       // 0x44 ~ 0x6F, Reserved
  24         ULONG   Vendor[4];      // 0x70 ~ 0x7F, vendor specific
  25 } AHCI_PORT;
  26
  27 typedef struct _AHCI_MEMORY_REGISTERS
  28 {
  29         // 0x00 - 0x2B, Generic Host Control
  30         ULONG CAP;                                              // 0x00, Host capability
  31         ULONG GHC;                                              // 0x04, Global host control
  32         ULONG IS;                                               // 0x08, Interrupt status
  33         ULONG PI;                                               // 0x0C, Port implemented
  34         ULONG VS;                                               // 0x10, Version
  35         ULONG CCC_CTL;                                  // 0x14, Command completion coalescing control
  36         ULONG CCC_PTS;                                  // 0x18, Command completion coalescing ports
  37         ULONG EM_LOC;                                   // 0x1C, Enclosure management location
  38         ULONG EM_CTL;                                   // 0x20, Enclosure management control
  39         ULONG CAP2;                                             // 0x24, Host capabilities extended
  40         ULONG BOHC;                                             // 0x28, BIOS/OS handoff control and status
  41
  42         // 0x2C - 0x9F, Reserved
  43         ULONG Reserved[0xA0-0x2C];
  44
  45         // 0xA0 - 0xFF, Vendor specific registers
  46         ULONG VendorSpecific[0x100-0xA0];
  47
  48         AHCI_PORT PortList[32];//1~32
  49
  50 } AHCI_MEMORY_REGISTERS, *PAHCI_MEMORY_REGISTERS;
  51
  52 typedef struct _AHCI_ADAPTER_EXTENSION
  53 {
  54         ULONG   AdapterNumber;
  55         ULONG   SystemIoBusNumber;
  56         ULONG   SlotNumber;
  57         ULONG   AhciBaseAddress;
  58         ULONG   IS;                                     // Interrupt status
  59         ULONG   PortImplemented;
  60
  61         USHORT  VendorID;
  62         USHORT  DeviceID;
  63         USHORT  RevisionID;
  64
  65         ULONG   Version;
  66         ULONG   CAP;
  67         ULONG   CAP2;
  68         PAHCI_MEMORY_REGISTERS ABAR_Address;
  69 } AHCI_ADAPTER_EXTENSION, *PAHCI_ADAPTER_EXTENSION;
  70
  71 typedef struct _AHCI_SRB_EXTENSION
  72 {
  73         ULONG AdapterNumber;
  74 } AHCI_SRB_EXTENSION;