2 * PROJECT: ReactOS Universal Serial Bus Bulk Enhanced Host Controller Interface
3 * LICENSE: GPL - See COPYING in the top level directory
4 * FILE: drivers/usb/usbehci/hcd_controller.cpp
5 * PURPOSE: USB EHCI device driver.
7 * Michael Martin (michael.martin@reactos.org)
8 * Johannes Anderwald (johannes.anderwald@reactos.org)
15 typedef VOID __stdcall
HD_INIT_CALLBACK(IN PVOID CallBackContext
);
19 InterruptServiceRoutine(
20 IN PKINTERRUPT Interrupt
,
21 IN PVOID ServiceContext
);
27 IN PVOID DeferredContext
,
28 IN PVOID SystemArgument1
,
29 IN PVOID SystemArgument2
);
33 StatusChangeWorkItemRoutine(PVOID Context
);
35 class CUSBHardwareDevice
: public IUSBHardwareDevice
38 STDMETHODIMP
QueryInterface( REFIID InterfaceId
, PVOID
* Interface
);
40 STDMETHODIMP_(ULONG
) AddRef()
42 InterlockedIncrement(&m_Ref
);
45 STDMETHODIMP_(ULONG
) Release()
47 InterlockedDecrement(&m_Ref
);
57 NTSTATUS
Initialize(PDRIVER_OBJECT DriverObject
, PDEVICE_OBJECT FunctionalDeviceObject
, PDEVICE_OBJECT PhysicalDeviceObject
, PDEVICE_OBJECT LowerDeviceObject
);
58 NTSTATUS
PnpStart(PCM_RESOURCE_LIST RawResources
, PCM_RESOURCE_LIST TranslatedResources
);
59 NTSTATUS
PnpStop(void);
60 NTSTATUS
HandlePower(PIRP Irp
);
61 NTSTATUS
GetDeviceDetails(PUSHORT VendorId
, PUSHORT DeviceId
, PULONG NumberOfPorts
, PULONG Speed
);
62 NTSTATUS
GetDMA(OUT
struct IDMAMemoryManager
**m_DmaManager
);
63 NTSTATUS
GetUSBQueue(OUT
struct IUSBQueue
**OutUsbQueue
);
65 NTSTATUS
StartController();
66 NTSTATUS
StopController();
67 NTSTATUS
ResetController();
68 NTSTATUS
ResetPort(ULONG PortIndex
);
70 NTSTATUS
GetPortStatus(ULONG PortId
, OUT USHORT
*PortStatus
, OUT USHORT
*PortChange
);
71 NTSTATUS
ClearPortStatus(ULONG PortId
, ULONG Status
);
72 NTSTATUS
SetPortFeature(ULONG PortId
, ULONG Feature
);
74 VOID
SetAsyncListRegister(ULONG PhysicalAddress
);
75 VOID
SetPeriodicListRegister(ULONG PhysicalAddress
);
76 struct _QUEUE_HEAD
* GetAsyncListQueueHead();
77 ULONG
GetPeriodicListRegister();
79 VOID
SetStatusChangeEndpointCallBack(PVOID CallBack
, PVOID Context
);
81 KIRQL
AcquireDeviceLock(void);
82 VOID
ReleaseDeviceLock(KIRQL OldLevel
);
84 VOID
SetCommandRegister(PEHCI_USBCMD_CONTENT UsbCmd
);
87 VOID
GetCommandRegister(PEHCI_USBCMD_CONTENT UsbCmd
);
91 BOOLEAN
InterruptService();
94 friend BOOLEAN NTAPI
InterruptServiceRoutine(IN PKINTERRUPT Interrupt
, IN PVOID ServiceContext
);
95 friend VOID NTAPI
EhciDefferedRoutine(IN PKDPC Dpc
, IN PVOID DeferredContext
, IN PVOID SystemArgument1
, IN PVOID SystemArgument2
);
96 friend VOID NTAPI
StatusChangeWorkItemRoutine(PVOID Context
);
97 // constructor / destructor
98 CUSBHardwareDevice(IUnknown
*OuterUnknown
){}
99 virtual ~CUSBHardwareDevice(){}
102 LONG m_Ref
; // reference count
103 PDRIVER_OBJECT m_DriverObject
; // driver object
104 PDEVICE_OBJECT m_PhysicalDeviceObject
; // pdo
105 PDEVICE_OBJECT m_FunctionalDeviceObject
; // fdo (hcd controller)
106 PDEVICE_OBJECT m_NextDeviceObject
; // lower device object
107 KSPIN_LOCK m_Lock
; // hardware lock
108 PKINTERRUPT m_Interrupt
; // interrupt object
109 KDPC m_IntDpcObject
; // dpc object for deferred isr processing
110 PVOID VirtualBase
; // virtual base for memory manager
111 PHYSICAL_ADDRESS PhysicalAddress
; // physical base for memory manager
112 PULONG m_Base
; // EHCI operational port base registers
113 PDMA_ADAPTER m_Adapter
; // dma adapter object
114 ULONG m_MapRegisters
; // map registers count
115 EHCI_CAPS m_Capabilities
; // EHCI caps
116 USHORT m_VendorID
; // vendor id
117 USHORT m_DeviceID
; // device id
118 PQUEUE_HEAD AsyncQueueHead
; // async queue head terminator
119 PUSBQUEUE m_UsbQueue
; // usb request queue
120 PDMAMEMORYMANAGER m_MemoryManager
; // memory manager
121 HD_INIT_CALLBACK
* m_SCECallBack
; // status change callback routine
122 PVOID m_SCEContext
; // status change callback routine context
123 BOOLEAN m_DoorBellRingInProgress
; // door bell ring in progress
124 WORK_QUEUE_ITEM m_StatusChangeWorkItem
; // work item for status change callback
125 ULONG m_SyncFramePhysAddr
; // periodic frame list physical address
126 BOOLEAN m_ResetInProgress
[16]; // set when a reset is in progress
127 BUS_INTERFACE_STANDARD m_BusInterface
; // pci bus interface
130 ULONG
EHCI_READ_REGISTER_ULONG(ULONG Offset
);
133 VOID
EHCI_WRITE_REGISTER_ULONG(ULONG Offset
, ULONG Value
);
136 //=================================================================================================
141 CUSBHardwareDevice::QueryInterface(
145 if (IsEqualGUIDAligned(refiid
, IID_IUnknown
))
147 *Output
= PVOID(PUNKNOWN(this));
148 PUNKNOWN(*Output
)->AddRef();
149 return STATUS_SUCCESS
;
152 return STATUS_UNSUCCESSFUL
;
156 CUSBHardwareDevice::Initialize(
157 PDRIVER_OBJECT DriverObject
,
158 PDEVICE_OBJECT FunctionalDeviceObject
,
159 PDEVICE_OBJECT PhysicalDeviceObject
,
160 PDEVICE_OBJECT LowerDeviceObject
)
162 PCI_COMMON_CONFIG PciConfig
;
166 DPRINT1("CUSBHardwareDevice::Initialize\n");
169 // Create DMAMemoryManager for use with QueueHeads and Transfer Descriptors.
171 Status
= CreateDMAMemoryManager(&m_MemoryManager
);
172 if (!NT_SUCCESS(Status
))
174 DPRINT1("Failed to create DMAMemoryManager Object\n");
179 // Create the UsbQueue class that will handle the Asynchronous and Periodic Schedules
181 Status
= CreateUSBQueue(&m_UsbQueue
);
182 if (!NT_SUCCESS(Status
))
184 DPRINT1("Failed to create UsbQueue!\n");
189 // store device objects
191 m_DriverObject
= DriverObject
;
192 m_FunctionalDeviceObject
= FunctionalDeviceObject
;
193 m_PhysicalDeviceObject
= PhysicalDeviceObject
;
194 m_NextDeviceObject
= LowerDeviceObject
;
197 // initialize device lock
199 KeInitializeSpinLock(&m_Lock
);
202 // intialize status change work item
204 ExInitializeWorkItem(&m_StatusChangeWorkItem
, StatusChangeWorkItemRoutine
, PVOID(this));
209 Status
= GetBusInterface(PhysicalDeviceObject
, &m_BusInterface
);
210 if (!NT_SUCCESS(Status
))
212 DPRINT1("Failed to get BusInteface!\n");
216 BytesRead
= (*m_BusInterface
.GetBusData
)(m_BusInterface
.Context
,
217 PCI_WHICHSPACE_CONFIG
,
220 PCI_COMMON_HDR_LENGTH
);
222 if (BytesRead
!= PCI_COMMON_HDR_LENGTH
)
224 DPRINT1("Failed to get pci config information!\n");
225 return STATUS_SUCCESS
;
228 m_VendorID
= PciConfig
.VendorID
;
229 m_DeviceID
= PciConfig
.DeviceID
;
232 if (PciConfig
.Command
& PCI_ENABLE_BUS_MASTER
)
237 return STATUS_SUCCESS
;
240 DPRINT1("PCI Configuration shows this as a non Bus Mastering device! Enabling...\n");
242 PciConfig
.Command
|= PCI_ENABLE_BUS_MASTER
;
243 m_BusInterface
.SetBusData(m_BusInterface
.Context
, PCI_WHICHSPACE_CONFIG
, &PciConfig
, 0, PCI_COMMON_HDR_LENGTH
);
245 BytesRead
= (*m_BusInterface
.GetBusData
)(m_BusInterface
.Context
,
246 PCI_WHICHSPACE_CONFIG
,
249 PCI_COMMON_HDR_LENGTH
);
251 if (BytesRead
!= PCI_COMMON_HDR_LENGTH
)
253 DPRINT1("Failed to get pci config information!\n");
255 return STATUS_SUCCESS
;
258 if (!(PciConfig
.Command
& PCI_ENABLE_BUS_MASTER
))
260 PciConfig
.Command
|= PCI_ENABLE_BUS_MASTER
;
261 DPRINT1("Failed to enable master\n");
262 return STATUS_UNSUCCESSFUL
;
264 return STATUS_SUCCESS
;
268 CUSBHardwareDevice::SetCommandRegister(PEHCI_USBCMD_CONTENT UsbCmd
)
271 Register
= (PULONG
)UsbCmd
;
272 WRITE_REGISTER_ULONG((PULONG
)((ULONG
)m_Base
+ EHCI_USBCMD
), *Register
);
276 CUSBHardwareDevice::GetCommandRegister(PEHCI_USBCMD_CONTENT UsbCmd
)
279 Register
= (PULONG
)UsbCmd
;
280 *Register
= READ_REGISTER_ULONG((PULONG
)((ULONG
)m_Base
+ EHCI_USBCMD
));
284 CUSBHardwareDevice::EHCI_READ_REGISTER_ULONG(ULONG Offset
)
286 return READ_REGISTER_ULONG((PULONG
)((ULONG
)m_Base
+ Offset
));
290 CUSBHardwareDevice::EHCI_WRITE_REGISTER_ULONG(ULONG Offset
, ULONG Value
)
292 WRITE_REGISTER_ULONG((PULONG
)((ULONG
)m_Base
+ Offset
), Value
);
296 CUSBHardwareDevice::PnpStart(
297 PCM_RESOURCE_LIST RawResources
,
298 PCM_RESOURCE_LIST TranslatedResources
)
301 PCM_PARTIAL_RESOURCE_DESCRIPTOR ResourceDescriptor
;
302 DEVICE_DESCRIPTION DeviceDescription
;
303 PHYSICAL_ADDRESS AsyncPhysicalAddress
;
309 DPRINT1("CUSBHardwareDevice::PnpStart\n");
310 for(Index
= 0; Index
< TranslatedResources
->List
[0].PartialResourceList
.Count
; Index
++)
313 // get resource descriptor
315 ResourceDescriptor
= &TranslatedResources
->List
[0].PartialResourceList
.PartialDescriptors
[Index
];
317 switch(ResourceDescriptor
->Type
)
319 case CmResourceTypeInterrupt
:
321 KeInitializeDpc(&m_IntDpcObject
,
325 Status
= IoConnectInterrupt(&m_Interrupt
,
326 InterruptServiceRoutine
,
329 ResourceDescriptor
->u
.Interrupt
.Vector
,
330 (KIRQL
)ResourceDescriptor
->u
.Interrupt
.Level
,
331 (KIRQL
)ResourceDescriptor
->u
.Interrupt
.Level
,
332 (KINTERRUPT_MODE
)(ResourceDescriptor
->Flags
& CM_RESOURCE_INTERRUPT_LATCHED
),
333 (ResourceDescriptor
->ShareDisposition
!= CmResourceShareDeviceExclusive
),
334 ResourceDescriptor
->u
.Interrupt
.Affinity
,
337 if (!NT_SUCCESS(Status
))
340 // failed to register interrupt
342 DPRINT1("IoConnect Interrupt failed with %x\n", Status
);
347 case CmResourceTypeMemory
:
352 ResourceBase
= MmMapIoSpace(ResourceDescriptor
->u
.Memory
.Start
, ResourceDescriptor
->u
.Memory
.Length
, MmNonCached
);
356 // failed to map registers
358 DPRINT1("MmMapIoSpace failed\n");
359 return STATUS_INSUFFICIENT_RESOURCES
;
363 // Get controllers capabilities
365 m_Capabilities
.Length
= READ_REGISTER_UCHAR((PUCHAR
)ResourceBase
+ EHCI_CAPLENGTH
);
366 m_Capabilities
.HCIVersion
= READ_REGISTER_USHORT((PUSHORT
)((ULONG
)ResourceBase
+ EHCI_HCIVERSION
));
367 m_Capabilities
.HCSParamsLong
= READ_REGISTER_ULONG((PULONG
)((ULONG
)ResourceBase
+ EHCI_HCSPARAMS
));
368 m_Capabilities
.HCCParamsLong
= READ_REGISTER_ULONG((PULONG
)((ULONG
)ResourceBase
+ EHCI_HCCPARAMS
));
370 DPRINT1("Controller has %d Length\n", m_Capabilities
.Length
);
371 DPRINT1("Controller has %d Ports\n", m_Capabilities
.HCSParams
.PortCount
);
372 DPRINT1("Controller EHCI Version %x\n", m_Capabilities
.HCIVersion
);
373 DPRINT1("Controler EHCI Caps HCSParamsLong %x\n", m_Capabilities
.HCSParamsLong
);
374 DPRINT1("Controler EHCI Caps HCCParamsLong %x\n", m_Capabilities
.HCCParamsLong
);
375 DPRINT1("Controler EHCI Caps PowerControl %x\n", m_Capabilities
.HCSParams
.PortPowerControl
);
377 if (m_Capabilities
.HCSParams
.PortRouteRules
)
380 PortCount
= max(m_Capabilities
.HCSParams
.PortCount
/2, (m_Capabilities
.HCSParams
.PortCount
+1)/2);
384 // each entry is a 4 bit field EHCI 2.2.5
386 Value
= READ_REGISTER_UCHAR((PUCHAR
)(ULONG
)ResourceBase
+ EHCI_HCSP_PORTROUTE
+ Count
);
387 m_Capabilities
.PortRoute
[Count
*2] = (Value
& 0xF0);
389 if ((Count
*2) + 1 < m_Capabilities
.HCSParams
.PortCount
)
390 m_Capabilities
.PortRoute
[(Count
*2)+1] = (Value
& 0x0F);
393 }while(Count
< PortCount
);
397 // Set m_Base to the address of Operational Register Space
399 m_Base
= (PULONG
)((ULONG
)ResourceBase
+ m_Capabilities
.Length
);
407 // zero device description
409 RtlZeroMemory(&DeviceDescription
, sizeof(DEVICE_DESCRIPTION
));
412 // initialize device description
414 DeviceDescription
.Version
= DEVICE_DESCRIPTION_VERSION
;
415 DeviceDescription
.Master
= TRUE
;
416 DeviceDescription
.ScatterGather
= TRUE
;
417 DeviceDescription
.Dma32BitAddresses
= TRUE
;
418 DeviceDescription
.DmaWidth
= Width32Bits
;
419 DeviceDescription
.InterfaceType
= PCIBus
;
420 DeviceDescription
.MaximumLength
= MAXULONG
;
425 m_Adapter
= IoGetDmaAdapter(m_PhysicalDeviceObject
, &DeviceDescription
, &m_MapRegisters
);
429 // failed to get dma adapter
431 DPRINT1("Failed to acquire dma adapter\n");
432 return STATUS_INSUFFICIENT_RESOURCES
;
436 // Create Common Buffer
438 VirtualBase
= m_Adapter
->DmaOperations
->AllocateCommonBuffer(m_Adapter
,
444 DPRINT1("Failed to allocate a common buffer\n");
445 return STATUS_INSUFFICIENT_RESOURCES
;
449 // Stop the controller before modifying schedules
451 Status
= StopController();
452 if (!NT_SUCCESS(Status
))
456 // Initialize the DMAMemoryManager
458 Status
= m_MemoryManager
->Initialize(this, &m_Lock
, PAGE_SIZE
* 4, VirtualBase
, PhysicalAddress
, 32);
459 if (!NT_SUCCESS(Status
))
461 DPRINT1("Failed to initialize the DMAMemoryManager\n");
466 // Create a queuehead for the Async Register
468 m_MemoryManager
->Allocate(sizeof(QUEUE_HEAD
), (PVOID
*)&AsyncQueueHead
, &AsyncPhysicalAddress
);
470 AsyncQueueHead
->PhysicalAddr
= AsyncPhysicalAddress
.LowPart
;
471 AsyncQueueHead
->HorizontalLinkPointer
= AsyncQueueHead
->PhysicalAddr
| QH_TYPE_QH
;
472 AsyncQueueHead
->EndPointCharacteristics
.HeadOfReclamation
= TRUE
;
473 AsyncQueueHead
->EndPointCharacteristics
.EndPointSpeed
= QH_ENDPOINT_HIGHSPEED
;
474 AsyncQueueHead
->Token
.Bits
.Halted
= TRUE
;
476 AsyncQueueHead
->EndPointCapabilities
.NumberOfTransactionPerFrame
= 0x01;
477 AsyncQueueHead
->NextPointer
= TERMINATE_POINTER
;
478 AsyncQueueHead
->CurrentLinkPointer
= TERMINATE_POINTER
;
480 InitializeListHead(&AsyncQueueHead
->LinkedQueueHeads
);
483 // Initialize the UsbQueue now that we have an AdapterObject.
485 Status
= m_UsbQueue
->Initialize(PUSBHARDWAREDEVICE(this), m_Adapter
, m_MemoryManager
, &m_Lock
);
486 if (!NT_SUCCESS(Status
))
488 DPRINT1("Failed to Initialize the UsbQueue\n");
493 // Start the controller
495 DPRINT1("Starting Controller\n");
496 Status
= StartController();
505 CUSBHardwareDevice::PnpStop(void)
508 return STATUS_NOT_IMPLEMENTED
;
512 CUSBHardwareDevice::HandlePower(
516 return STATUS_NOT_IMPLEMENTED
;
520 CUSBHardwareDevice::GetDeviceDetails(
521 OUT OPTIONAL PUSHORT VendorId
,
522 OUT OPTIONAL PUSHORT DeviceId
,
523 OUT OPTIONAL PULONG NumberOfPorts
,
524 OUT OPTIONAL PULONG Speed
)
527 *VendorId
= m_VendorID
;
529 *DeviceId
= m_DeviceID
;
531 *NumberOfPorts
= m_Capabilities
.HCSParams
.PortCount
;
532 //FIXME: What to returned here?
535 return STATUS_SUCCESS
;
538 NTSTATUS
CUSBHardwareDevice::GetDMA(
539 OUT
struct IDMAMemoryManager
**OutDMAMemoryManager
)
541 if (!m_MemoryManager
)
542 return STATUS_UNSUCCESSFUL
;
543 *OutDMAMemoryManager
= m_MemoryManager
;
544 return STATUS_SUCCESS
;
548 CUSBHardwareDevice::GetUSBQueue(
549 OUT
struct IUSBQueue
**OutUsbQueue
)
552 return STATUS_UNSUCCESSFUL
;
553 *OutUsbQueue
= m_UsbQueue
;
554 return STATUS_SUCCESS
;
559 CUSBHardwareDevice::StartController(void)
561 EHCI_USBCMD_CONTENT UsbCmd
;
562 ULONG UsbSts
, FailSafe
, ExtendedCapsSupport
, Caps
, Index
;
564 LARGE_INTEGER Timeout
;
567 // are extended caps supported
569 ExtendedCapsSupport
= (m_Capabilities
.HCCParamsLong
>> EHCI_ECP_SHIFT
) & EHCI_ECP_MASK
;
570 if (ExtendedCapsSupport
)
572 DPRINT1("[EHCI] Extended Caps Support detected!\n");
577 ASSERT(ExtendedCapsSupport
>= PCI_COMMON_HDR_LENGTH
);
578 m_BusInterface
.GetBusData(m_BusInterface
.Context
, PCI_WHICHSPACE_CONFIG
, &Caps
, ExtendedCapsSupport
, sizeof(ULONG
));
581 // OS Handoff Synchronization support capability. EHCI 5.1
583 if ((Caps
& EHCI_LEGSUP_CAPID_MASK
) == EHCI_LEGSUP_CAPID
)
588 if ((Caps
& EHCI_LEGSUP_BIOSOWNED
))
590 DPRINT1("[EHCI] Controller is BIOS owned, acquring control\n");
596 m_BusInterface
.SetBusData(m_BusInterface
.Context
, PCI_WHICHSPACE_CONFIG
, &Value
, ExtendedCapsSupport
+3, sizeof(UCHAR
));
598 for(Index
= 0; Index
< 20; Index
++)
603 m_BusInterface
.GetBusData(m_BusInterface
.Context
, PCI_WHICHSPACE_CONFIG
, &Caps
, ExtendedCapsSupport
, sizeof(ULONG
));
604 if ((Caps
& EHCI_LEGSUP_BIOSOWNED
))
609 Timeout
.QuadPart
= 50;
610 DPRINT1("Waiting %d milliseconds for port reset\n", Timeout
.LowPart
);
613 // convert to 100 ns units (absolute)
615 Timeout
.QuadPart
*= -10000;
620 KeDelayExecutionThread(KernelMode
, FALSE
, &Timeout
);
623 if ((Caps
& EHCI_LEGSUP_BIOSOWNED
))
626 // failed to aquire ownership
628 DPRINT1("[EHCI] failed to acquire ownership\n");
630 else if ((Caps
& EHCI_LEGSUP_OSOWNED
))
633 // HC OS Owned Semaphore EHCI 2.1.7
635 DPRINT1("[EHCI] acquired ownership\n");
639 // explictly clear the bios owned flag 2.1.7
642 m_BusInterface
.SetBusData(m_BusInterface
.Context
, PCI_WHICHSPACE_CONFIG
, &Value
, ExtendedCapsSupport
+2, sizeof(UCHAR
));
645 // clear SMI interrupt EHCI 2.1.8
648 m_BusInterface
.SetBusData(m_BusInterface
.Context
, PCI_WHICHSPACE_CONFIG
, &Caps
, ExtendedCapsSupport
+4, sizeof(ULONG
));
655 // get command register
657 GetCommandRegister(&UsbCmd
);
660 // disable running schedules
662 UsbCmd
.PeriodicEnable
= FALSE
;
663 UsbCmd
.AsyncEnable
= FALSE
;
664 SetCommandRegister(&UsbCmd
);
667 // Wait for execution to start
669 for (FailSafe
= 100; FailSafe
> 1; FailSafe
--)
671 KeStallExecutionProcessor(100);
672 UsbSts
= EHCI_READ_REGISTER_ULONG(EHCI_USBSTS
);
674 if (!(UsbSts
& EHCI_STS_PSS
) && (UsbSts
& EHCI_STS_ASS
))
680 if ((UsbSts
& (EHCI_STS_PSS
| EHCI_STS_ASS
)))
682 DPRINT1("Failed to stop running schedules %x\n", UsbSts
);
688 // Stop the controller if its running
690 UsbSts
= EHCI_READ_REGISTER_ULONG(EHCI_USBSTS
);
691 if (!(UsbSts
& EHCI_STS_HALT
))
693 DPRINT1("Stopping Controller %x\n", UsbSts
);
698 // Reset the controller
705 if (m_Capabilities
.HCCParams
.CurAddrBits
)
708 // disable 64-bit addressing
710 EHCI_WRITE_REGISTER_ULONG(EHCI_CTRLDSSEGMENT
, 0x0);
714 // Enable Interrupts and start execution
716 ULONG Mask
= EHCI_USBINTR_INTE
| EHCI_USBINTR_ERR
| EHCI_USBINTR_ASYNC
| EHCI_USBINTR_HSERR
| EHCI_USBINTR_PC
;
717 EHCI_WRITE_REGISTER_ULONG(EHCI_USBINTR
, Mask
);
719 KeStallExecutionProcessor(10);
721 ULONG Status
= EHCI_READ_REGISTER_ULONG(EHCI_USBINTR
);
723 DPRINT1("Interrupt Mask %x\n", Status
);
724 ASSERT((Status
& Mask
) == Mask
);
727 // Assign the SyncList Register
729 EHCI_WRITE_REGISTER_ULONG(EHCI_PERIODICLISTBASE
, m_SyncFramePhysAddr
);
732 // Set Schedules to Enable and Interrupt Threshold to 1ms.
734 RtlZeroMemory(&UsbCmd
, sizeof(EHCI_USBCMD_CONTENT
));
736 UsbCmd
.PeriodicEnable
= TRUE
;
737 UsbCmd
.IntThreshold
= 0x8; //1ms
739 UsbCmd
.FrameListSize
= 0x0; //1024
740 SetCommandRegister(&UsbCmd
);
743 // Wait for execution to start
745 for (FailSafe
= 100; FailSafe
> 1; FailSafe
--)
747 KeStallExecutionProcessor(100);
748 UsbSts
= EHCI_READ_REGISTER_ULONG(EHCI_USBSTS
);
750 if (!(UsbSts
& EHCI_STS_HALT
) && (UsbSts
& EHCI_STS_PSS
))
756 if (UsbSts
& EHCI_STS_HALT
)
758 DPRINT1("Could not start execution on the controller\n");
760 return STATUS_UNSUCCESSFUL
;
763 if (!(UsbSts
& EHCI_STS_PSS
))
765 DPRINT1("Could not enable periodic scheduling\n");
767 return STATUS_UNSUCCESSFUL
;
771 // Assign the AsyncList Register
773 EHCI_WRITE_REGISTER_ULONG(EHCI_ASYNCLISTBASE
, AsyncQueueHead
->PhysicalAddr
);
776 // get command register
778 GetCommandRegister(&UsbCmd
);
783 UsbCmd
.AsyncEnable
= TRUE
;
788 SetCommandRegister(&UsbCmd
);
791 // Wait for execution to start
793 for (FailSafe
= 100; FailSafe
> 1; FailSafe
--)
795 KeStallExecutionProcessor(100);
796 UsbSts
= EHCI_READ_REGISTER_ULONG(EHCI_USBSTS
);
798 if ((UsbSts
& EHCI_STS_ASS
))
804 if (!(UsbSts
& EHCI_STS_ASS
))
806 DPRINT1("Failed to enable async schedule UsbSts %x\n", UsbSts
);
808 return STATUS_UNSUCCESSFUL
;
811 DPRINT1("UsbSts %x\n", UsbSts
);
812 GetCommandRegister(&UsbCmd
);
814 DPRINT1("UsbCmd.PeriodicEnable %x\n", UsbCmd
.PeriodicEnable
);
815 DPRINT1("UsbCmd.AsyncEnable %x\n", UsbCmd
.AsyncEnable
);
816 DPRINT1("UsbCmd.IntThreshold %x\n", UsbCmd
.IntThreshold
);
817 DPRINT1("UsbCmd.Run %x\n", UsbCmd
.Run
);
818 DPRINT1("UsbCmd.FrameListSize %x\n", UsbCmd
.FrameListSize
);
821 // Set port routing to EHCI controller
823 EHCI_WRITE_REGISTER_ULONG(EHCI_CONFIGFLAG
, 1);
825 DPRINT1("EHCI Started!\n");
826 return STATUS_SUCCESS
;
830 CUSBHardwareDevice::StopController(void)
832 EHCI_USBCMD_CONTENT UsbCmd
;
833 ULONG UsbSts
, FailSafe
;
836 // Disable Interrupts and stop execution
838 EHCI_WRITE_REGISTER_ULONG (EHCI_USBINTR
, 0);
840 GetCommandRegister(&UsbCmd
);
842 SetCommandRegister(&UsbCmd
);
844 for (FailSafe
= 100; FailSafe
> 1; FailSafe
--)
846 KeStallExecutionProcessor(10);
847 UsbSts
= EHCI_READ_REGISTER_ULONG(EHCI_USBSTS
);
848 if (UsbSts
& EHCI_STS_HALT
)
854 if (!(UsbSts
& EHCI_STS_HALT
))
856 DPRINT1("EHCI ERROR: Controller is not responding to Stop request!\n");
857 return STATUS_UNSUCCESSFUL
;
860 return STATUS_SUCCESS
;
864 CUSBHardwareDevice::ResetController(void)
866 EHCI_USBCMD_CONTENT UsbCmd
;
869 GetCommandRegister(&UsbCmd
);
870 UsbCmd
.HCReset
= TRUE
;
871 SetCommandRegister(&UsbCmd
);
873 for (FailSafe
= 100; FailSafe
> 1; FailSafe
--)
875 KeStallExecutionProcessor(100);
876 GetCommandRegister(&UsbCmd
);
883 DPRINT1("EHCI ERROR: Controller is not responding to reset request!\n");
884 return STATUS_UNSUCCESSFUL
;
887 return STATUS_SUCCESS
;
891 CUSBHardwareDevice::ResetPort(
895 LARGE_INTEGER Timeout
;
897 if (PortIndex
> m_Capabilities
.HCSParams
.PortCount
)
898 return STATUS_UNSUCCESSFUL
;
900 PortStatus
= EHCI_READ_REGISTER_ULONG(EHCI_PORTSC
+ (4 * PortIndex
));
902 // check slow speed line before reset
904 if (PortStatus
& EHCI_PRT_SLOWSPEEDLINE
)
906 DPRINT1("Non HighSpeed device. Releasing Ownership\n");
907 EHCI_WRITE_REGISTER_ULONG(EHCI_PORTSC
+ (4 * PortIndex
), EHCI_PRT_RELEASEOWNERSHIP
);
908 return STATUS_DEVICE_NOT_CONNECTED
;
911 ASSERT(PortStatus
& EHCI_PRT_CONNECTED
);
914 // Reset and clean enable
916 PortStatus
|= EHCI_PRT_RESET
;
917 PortStatus
&= ~EHCI_PRT_ENABLED
;
918 EHCI_WRITE_REGISTER_ULONG(EHCI_PORTSC
+ (4 * PortIndex
), PortStatus
);
921 // delay is 20 ms for port reset as per USB 2.0 spec
923 Timeout
.QuadPart
= 20;
924 DPRINT1("Waiting %d milliseconds for port reset\n", Timeout
.LowPart
);
927 // convert to 100 ns units (absolute)
929 Timeout
.QuadPart
*= -10000;
934 KeDelayExecutionThread(KernelMode
, FALSE
, &Timeout
);
939 PortStatus
= EHCI_READ_REGISTER_ULONG(EHCI_PORTSC
+ (4 * PortIndex
));
940 PortStatus
&= ~EHCI_PRT_RESET
;
941 EHCI_WRITE_REGISTER_ULONG(EHCI_PORTSC
+ (4 * PortIndex
), PortStatus
);
948 KeStallExecutionProcessor(100);
951 // Check that the port reset
953 PortStatus
= EHCI_READ_REGISTER_ULONG(EHCI_PORTSC
+ (4 * PortIndex
));
954 if (!(PortStatus
& EHCI_PRT_RESET
))
961 Timeout
.QuadPart
= 10;
962 DPRINT1("Waiting %d milliseconds for port to recover after reset\n", Timeout
.LowPart
);
965 // convert to 100 ns units (absolute)
967 Timeout
.QuadPart
*= -10000;
972 KeDelayExecutionThread(KernelMode
, FALSE
, &Timeout
);
975 // check slow speed line after reset
977 PortStatus
= EHCI_READ_REGISTER_ULONG(EHCI_PORTSC
+ (4 * PortIndex
));
978 if (PortStatus
& EHCI_PRT_SLOWSPEEDLINE
)
980 DPRINT1("Non HighSpeed device. Releasing Ownership\n");
981 EHCI_WRITE_REGISTER_ULONG(EHCI_PORTSC
+ (4 * PortIndex
), EHCI_PRT_RELEASEOWNERSHIP
);
982 return STATUS_DEVICE_NOT_CONNECTED
;
986 // this must be enabled now
988 ASSERT(PortStatus
& EHCI_PRT_ENABLED
);
990 return STATUS_SUCCESS
;
994 CUSBHardwareDevice::GetPortStatus(
996 OUT USHORT
*PortStatus
,
997 OUT USHORT
*PortChange
)
1000 USHORT Status
= 0, Change
= 0;
1002 if (PortId
> m_Capabilities
.HCSParams
.PortCount
)
1003 return STATUS_UNSUCCESSFUL
;
1006 // Get the value of the Port Status and Control Register
1008 Value
= EHCI_READ_REGISTER_ULONG(EHCI_PORTSC
+ (4 * PortId
));
1011 // If the PowerPortControl is 0 then host controller does not have power control switches
1012 if (!m_Capabilities
.HCSParams
.PortPowerControl
)
1014 Status
|= USB_PORT_STATUS_POWER
;
1018 // Check the value of PortPower
1019 if (Value
& EHCI_PRT_POWER
)
1021 Status
|= USB_PORT_STATUS_POWER
;
1025 // Get Connected Status
1026 if (Value
& EHCI_PRT_CONNECTED
)
1028 Status
|= USB_PORT_STATUS_CONNECT
;
1030 // Get Speed. If SlowSpeedLine flag is there then its a slow speed device
1031 if (Value
& EHCI_PRT_SLOWSPEEDLINE
)
1032 Status
|= USB_PORT_STATUS_LOW_SPEED
;
1034 Status
|= USB_PORT_STATUS_HIGH_SPEED
;
1037 // Get Enabled Status
1038 if (Value
& EHCI_PRT_ENABLED
)
1039 Status
|= USB_PORT_STATUS_ENABLE
;
1042 if (Value
& EHCI_PRT_SUSPEND
)
1043 Status
|= USB_PORT_STATUS_SUSPEND
;
1045 // a overcurrent is active?
1046 if (Value
& EHCI_PRT_OVERCURRENTACTIVE
)
1047 Status
|= USB_PORT_STATUS_OVER_CURRENT
;
1049 // In a reset state?
1050 if ((Value
& EHCI_PRT_RESET
) || m_ResetInProgress
[PortId
])
1052 Status
|= USB_PORT_STATUS_RESET
;
1053 Change
|= USB_PORT_STATUS_RESET
;
1057 // FIXME: Is the Change here correct?
1059 if (Value
& EHCI_PRT_CONNECTSTATUSCHANGE
)
1060 Change
|= USB_PORT_STATUS_CONNECT
;
1062 if (Value
& EHCI_PRT_ENABLEDSTATUSCHANGE
)
1063 Change
|= USB_PORT_STATUS_ENABLE
;
1065 *PortStatus
= Status
;
1066 *PortChange
= Change
;
1068 return STATUS_SUCCESS
;
1072 CUSBHardwareDevice::ClearPortStatus(
1078 DPRINT("CUSBHardwareDevice::ClearPortStatus PortId %x Feature %x\n", PortId
, Status
);
1080 if (PortId
> m_Capabilities
.HCSParams
.PortCount
)
1081 return STATUS_UNSUCCESSFUL
;
1083 if (Status
== C_PORT_RESET
)
1086 // update port status
1088 m_ResetInProgress
[PortId
] = FALSE
;
1091 if (Status
== C_PORT_CONNECTION
)
1093 LARGE_INTEGER Timeout
;
1096 // reset status change bits
1098 Value
= EHCI_READ_REGISTER_ULONG(EHCI_PORTSC
+ (4 * PortId
));
1099 Value
|= EHCI_PRT_CONNECTSTATUSCHANGE
| EHCI_PRT_ENABLEDSTATUSCHANGE
;
1100 EHCI_WRITE_REGISTER_ULONG(EHCI_PORTSC
+ (4 * PortId
), Value
);
1105 Timeout
.QuadPart
= 100;
1106 DPRINT1("Waiting %d milliseconds for port to stabilize after connection\n", Timeout
.LowPart
);
1109 // convert to 100 ns units (absolute)
1111 Timeout
.QuadPart
*= -10000;
1116 KeDelayExecutionThread(KernelMode
, FALSE
, &Timeout
);
1119 return STATUS_SUCCESS
;
1124 CUSBHardwareDevice::SetPortFeature(
1130 DPRINT("CUSBHardwareDevice::SetPortFeature\n");
1132 if (PortId
> m_Capabilities
.HCSParams
.PortCount
)
1133 return STATUS_UNSUCCESSFUL
;
1135 Value
= EHCI_READ_REGISTER_ULONG(EHCI_PORTSC
+ (4 * PortId
));
1137 if (Feature
== PORT_ENABLE
)
1140 // FIXME: EHCI Ports can only be disabled via reset
1142 DPRINT1("PORT_ENABLE not supported for EHCI\n");
1145 if (Feature
== PORT_RESET
)
1150 // update cached settings
1152 m_ResetInProgress
[PortId
] = TRUE
;
1155 // is there a status change callback
1157 if (m_SCECallBack
!= NULL
)
1162 m_SCECallBack(m_SCEContext
);
1166 if (Feature
== PORT_POWER
)
1168 if (m_Capabilities
.HCSParams
.PortPowerControl
)
1171 LARGE_INTEGER Timeout
;
1174 // enable port power
1176 Value
= EHCI_READ_REGISTER_ULONG(EHCI_PORTSC
+ (4 * PortId
)) | EHCI_PRT_POWER
;
1177 EHCI_WRITE_REGISTER_ULONG(EHCI_PORTSC
, Value
);
1182 Timeout
.QuadPart
= 20;
1183 DPRINT1("Waiting %d milliseconds for port power up\n", Timeout
.LowPart
);
1186 // convert to 100 ns units (absolute)
1188 Timeout
.QuadPart
*= -10000;
1193 KeDelayExecutionThread(KernelMode
, FALSE
, &Timeout
);
1196 return STATUS_SUCCESS
;
1200 CUSBHardwareDevice::SetAsyncListRegister(
1201 ULONG PhysicalAddress
)
1203 EHCI_WRITE_REGISTER_ULONG(EHCI_ASYNCLISTBASE
, PhysicalAddress
);
1207 CUSBHardwareDevice::SetPeriodicListRegister(
1208 ULONG PhysicalAddress
)
1211 // store physical address
1213 m_SyncFramePhysAddr
= PhysicalAddress
;
1216 struct _QUEUE_HEAD
*
1217 CUSBHardwareDevice::GetAsyncListQueueHead()
1219 return AsyncQueueHead
;
1222 ULONG
CUSBHardwareDevice::GetPeriodicListRegister()
1228 VOID
CUSBHardwareDevice::SetStatusChangeEndpointCallBack(
1232 m_SCECallBack
= (HD_INIT_CALLBACK
*)CallBack
;
1233 m_SCEContext
= Context
;
1237 CUSBHardwareDevice::AcquireDeviceLock(void)
1244 KeAcquireSpinLock(&m_Lock
, &OldLevel
);
1254 CUSBHardwareDevice::ReleaseDeviceLock(
1257 KeReleaseSpinLock(&m_Lock
, OldLevel
);
1262 InterruptServiceRoutine(
1263 IN PKINTERRUPT Interrupt
,
1264 IN PVOID ServiceContext
)
1266 CUSBHardwareDevice
*This
;
1269 This
= (CUSBHardwareDevice
*) ServiceContext
;
1270 CStatus
= This
->EHCI_READ_REGISTER_ULONG(EHCI_USBSTS
);
1272 CStatus
&= (EHCI_ERROR_INT
| EHCI_STS_INT
| EHCI_STS_IAA
| EHCI_STS_PCD
| EHCI_STS_FLR
);
1273 DPRINT1("CStatus %x\n", CStatus
);
1276 // Check that it belongs to EHCI
1284 This
->EHCI_WRITE_REGISTER_ULONG(EHCI_USBSTS
, CStatus
);
1286 if (CStatus
& EHCI_STS_FATAL
)
1288 This
->StopController();
1289 DPRINT1("EHCI: Host System Error!\n");
1293 if (CStatus
& EHCI_ERROR_INT
)
1295 DPRINT1("EHCI Status = 0x%x\n", CStatus
);
1298 if (CStatus
& EHCI_STS_HALT
)
1300 DPRINT1("Host Error Unexpected Halt\n");
1301 // FIXME: Reset controller\n");
1305 KeInsertQueueDpc(&This
->m_IntDpcObject
, This
, (PVOID
)CStatus
);
1310 EhciDefferedRoutine(
1312 IN PVOID DeferredContext
,
1313 IN PVOID SystemArgument1
,
1314 IN PVOID SystemArgument2
)
1316 CUSBHardwareDevice
*This
;
1317 ULONG CStatus
, PortStatus
, PortCount
, i
, ShouldRingDoorBell
;
1318 NTSTATUS Status
= STATUS_SUCCESS
;
1319 EHCI_USBCMD_CONTENT UsbCmd
;
1321 This
= (CUSBHardwareDevice
*) SystemArgument1
;
1322 CStatus
= (ULONG
) SystemArgument2
;
1324 DPRINT("CStatus %x\n", CStatus
);
1327 // check for completion of async schedule
1329 if (CStatus
& (EHCI_STS_RECL
| EHCI_STS_INT
| EHCI_ERROR_INT
))
1332 // check if there is a door bell ring in progress
1334 if (This
->m_DoorBellRingInProgress
== FALSE
)
1336 if (CStatus
& EHCI_ERROR_INT
)
1339 // controller reported error
1341 DPRINT1("CStatus %x\n", CStatus
);
1346 // inform IUSBQueue of a completed queue head
1348 This
->m_UsbQueue
->InterruptCallback(Status
, &ShouldRingDoorBell
);
1351 // was a queue head completed?
1353 if (ShouldRingDoorBell
)
1356 // set door ring bell in progress status flag
1358 This
->m_DoorBellRingInProgress
= TRUE
;
1361 // get command register
1363 This
->GetCommandRegister(&UsbCmd
);
1366 // set door rang bell bit
1368 UsbCmd
.DoorBell
= TRUE
;
1371 // update command status
1373 This
->SetCommandRegister(&UsbCmd
);
1379 // check if the controller has acknowledged the door bell
1381 if (CStatus
& EHCI_STS_IAA
)
1384 // controller has acknowledged, assert we rang the bell
1386 PC_ASSERT(This
->m_DoorBellRingInProgress
== TRUE
);
1389 // now notify IUSBQueue that it can free completed requests
1391 This
->m_UsbQueue
->CompleteAsyncRequests();
1394 // door ring bell completed
1396 This
->m_DoorBellRingInProgress
= FALSE
;
1399 This
->GetDeviceDetails(NULL
, NULL
, &PortCount
, NULL
);
1400 if (CStatus
& EHCI_STS_PCD
)
1402 for (i
= 0; i
< PortCount
; i
++)
1404 PortStatus
= This
->EHCI_READ_REGISTER_ULONG(EHCI_PORTSC
+ (4 * i
));
1407 // Device connected or removed
1409 if (PortStatus
& EHCI_PRT_CONNECTSTATUSCHANGE
)
1411 if (PortStatus
& EHCI_PRT_CONNECTED
)
1413 DPRINT1("Device connected on port %d\n", i
);
1416 //FIXME: Determine device speed
1418 if (This
->m_Capabilities
.HCSParams
.CHCCount
)
1420 if (PortStatus
& EHCI_PRT_ENABLED
)
1422 DPRINT1("Misbeaving controller. Port should be disabled at this point\n");
1425 if (PortStatus
& EHCI_PRT_SLOWSPEEDLINE
)
1427 DPRINT1("Non HighSpeed device connected. Release ownership\n");
1428 This
->EHCI_WRITE_REGISTER_ULONG(EHCI_PORTSC
+ (4 * i
), EHCI_PRT_RELEASEOWNERSHIP
);
1435 DPRINT1("Device disconnected on port %d\n", i
);
1439 // is there a status change callback
1441 if (This
->m_SCECallBack
!= NULL
)
1444 // queue work item for processing
1446 ExQueueWorkItem(&This
->m_StatusChangeWorkItem
, DelayedWorkQueue
);
1450 // FIXME: This needs to be saved somewhere
1460 StatusChangeWorkItemRoutine(
1464 // cast to hardware object
1466 CUSBHardwareDevice
* This
= (CUSBHardwareDevice
*)Context
;
1469 // is there a callback
1471 if (This
->m_SCECallBack
)
1476 This
->m_SCECallBack(This
->m_SCEContext
);
1483 PUSBHARDWAREDEVICE
*OutHardware
)
1485 PUSBHARDWAREDEVICE This
;
1487 This
= new(NonPagedPool
, TAG_USBEHCI
) CUSBHardwareDevice(0);
1490 return STATUS_INSUFFICIENT_RESOURCES
;
1495 *OutHardware
= (PUSBHARDWAREDEVICE
)This
;
1497 return STATUS_SUCCESS
;