2 * PROJECT: ReactOS Universal Serial Bus Bulk Enhanced Host Controller Interface
3 * LICENSE: GPL - See COPYING in the top level directory
4 * FILE: drivers/usb/usbohci/hcd_controller.cpp
5 * PURPOSE: USB OHCI device driver.
7 * Michael Martin (michael.martin@reactos.org)
8 * Johannes Anderwald (johannes.anderwald@reactos.org)
15 typedef VOID __stdcall
HD_INIT_CALLBACK(IN PVOID CallBackContext
);
19 InterruptServiceRoutine(
20 IN PKINTERRUPT Interrupt
,
21 IN PVOID ServiceContext
);
27 IN PVOID DeferredContext
,
28 IN PVOID SystemArgument1
,
29 IN PVOID SystemArgument2
);
33 StatusChangeWorkItemRoutine(PVOID Context
);
35 class CUSBHardwareDevice
: public IUSBHardwareDevice
38 STDMETHODIMP
QueryInterface( REFIID InterfaceId
, PVOID
* Interface
);
40 STDMETHODIMP_(ULONG
) AddRef()
42 InterlockedIncrement(&m_Ref
);
45 STDMETHODIMP_(ULONG
) Release()
47 InterlockedDecrement(&m_Ref
);
57 NTSTATUS
Initialize(PDRIVER_OBJECT DriverObject
, PDEVICE_OBJECT FunctionalDeviceObject
, PDEVICE_OBJECT PhysicalDeviceObject
, PDEVICE_OBJECT LowerDeviceObject
);
58 NTSTATUS
PnpStart(PCM_RESOURCE_LIST RawResources
, PCM_RESOURCE_LIST TranslatedResources
);
59 NTSTATUS
PnpStop(void);
60 NTSTATUS
HandlePower(PIRP Irp
);
61 NTSTATUS
GetDeviceDetails(PUSHORT VendorId
, PUSHORT DeviceId
, PULONG NumberOfPorts
, PULONG Speed
);
62 NTSTATUS
GetBulkHeadEndpointDescriptor(struct _OHCI_ENDPOINT_DESCRIPTOR
** OutDescriptor
);
63 NTSTATUS
GetControlHeadEndpointDescriptor(struct _OHCI_ENDPOINT_DESCRIPTOR
** OutDescriptor
);
64 NTSTATUS
GetInterruptEndpointDescriptors(struct _OHCI_ENDPOINT_DESCRIPTOR
*** OutDescriptor
);
65 NTSTATUS
GetIsochronousHeadEndpointDescriptor(struct _OHCI_ENDPOINT_DESCRIPTOR
** OutDescriptor
);
66 VOID
HeadEndpointDescriptorModified(ULONG HeadType
);
69 NTSTATUS
GetDMA(OUT
struct IDMAMemoryManager
**m_DmaManager
);
70 NTSTATUS
GetUSBQueue(OUT
struct IUSBQueue
**OutUsbQueue
);
72 NTSTATUS
StartController();
73 NTSTATUS
StopController();
74 NTSTATUS
ResetController();
75 NTSTATUS
ResetPort(ULONG PortIndex
);
77 NTSTATUS
GetPortStatus(ULONG PortId
, OUT USHORT
*PortStatus
, OUT USHORT
*PortChange
);
78 NTSTATUS
ClearPortStatus(ULONG PortId
, ULONG Status
);
79 NTSTATUS
SetPortFeature(ULONG PortId
, ULONG Feature
);
81 VOID
SetStatusChangeEndpointCallBack(PVOID CallBack
, PVOID Context
);
83 KIRQL
AcquireDeviceLock(void);
84 VOID
ReleaseDeviceLock(KIRQL OldLevel
);
85 virtual VOID
GetCurrentFrameNumber(PULONG FrameNumber
);
87 BOOLEAN
InterruptService();
88 NTSTATUS
InitializeController();
89 NTSTATUS
AllocateEndpointDescriptor(OUT POHCI_ENDPOINT_DESCRIPTOR
*OutDescriptor
);
92 friend BOOLEAN NTAPI
InterruptServiceRoutine(IN PKINTERRUPT Interrupt
, IN PVOID ServiceContext
);
93 friend VOID NTAPI
OhciDefferedRoutine(IN PKDPC Dpc
, IN PVOID DeferredContext
, IN PVOID SystemArgument1
, IN PVOID SystemArgument2
);
94 friend VOID NTAPI
StatusChangeWorkItemRoutine(PVOID Context
);
95 // constructor / destructor
96 CUSBHardwareDevice(IUnknown
*OuterUnknown
){}
97 virtual ~CUSBHardwareDevice(){}
100 LONG m_Ref
; // reference count
101 PDRIVER_OBJECT m_DriverObject
; // driver object
102 PDEVICE_OBJECT m_PhysicalDeviceObject
; // pdo
103 PDEVICE_OBJECT m_FunctionalDeviceObject
; // fdo (hcd controller)
104 PDEVICE_OBJECT m_NextDeviceObject
; // lower device object
105 KSPIN_LOCK m_Lock
; // hardware lock
106 PKINTERRUPT m_Interrupt
; // interrupt object
107 KDPC m_IntDpcObject
; // dpc object for deferred isr processing
108 PVOID VirtualBase
; // virtual base for memory manager
109 PHYSICAL_ADDRESS PhysicalAddress
; // physical base for memory manager
110 PULONG m_Base
; // OHCI operational port base registers
111 PDMA_ADAPTER m_Adapter
; // dma adapter object
112 ULONG m_MapRegisters
; // map registers count
113 USHORT m_VendorID
; // vendor id
114 USHORT m_DeviceID
; // device id
115 PUSBQUEUE m_UsbQueue
; // usb request queue
116 POHCIHCCA m_HCCA
; // hcca virtual base
117 PHYSICAL_ADDRESS m_HCCAPhysicalAddress
; // hcca physical address
118 POHCI_ENDPOINT_DESCRIPTOR m_ControlEndpointDescriptor
; // dummy control endpoint descriptor
119 POHCI_ENDPOINT_DESCRIPTOR m_BulkEndpointDescriptor
; // dummy control endpoint descriptor
120 POHCI_ENDPOINT_DESCRIPTOR m_IsoEndpointDescriptor
; // iso endpoint descriptor
121 POHCI_ENDPOINT_DESCRIPTOR m_InterruptEndpoints
[OHCI_STATIC_ENDPOINT_COUNT
]; // endpoints for interrupt / iso transfers
122 ULONG m_NumberOfPorts
; // number of ports
123 OHCI_PORT_STATUS m_PortStatus
[OHCI_MAX_PORT_COUNT
]; // port change status
124 PDMAMEMORYMANAGER m_MemoryManager
; // memory manager
125 HD_INIT_CALLBACK
* m_SCECallBack
; // status change callback routine
126 PVOID m_SCEContext
; // status change callback routine context
127 WORK_QUEUE_ITEM m_StatusChangeWorkItem
; // work item for status change callback
128 ULONG m_SyncFramePhysAddr
; // periodic frame list physical address
129 ULONG m_IntervalValue
; // periodic interval value
132 //=================================================================================================
137 CUSBHardwareDevice::QueryInterface(
141 if (IsEqualGUIDAligned(refiid
, IID_IUnknown
))
143 *Output
= PVOID(PUNKNOWN(this));
144 PUNKNOWN(*Output
)->AddRef();
145 return STATUS_SUCCESS
;
148 return STATUS_UNSUCCESSFUL
;
152 CUSBHardwareDevice::Initialize(
153 PDRIVER_OBJECT DriverObject
,
154 PDEVICE_OBJECT FunctionalDeviceObject
,
155 PDEVICE_OBJECT PhysicalDeviceObject
,
156 PDEVICE_OBJECT LowerDeviceObject
)
158 BUS_INTERFACE_STANDARD BusInterface
;
159 PCI_COMMON_CONFIG PciConfig
;
163 DPRINT1("CUSBHardwareDevice::Initialize\n");
166 // Create DMAMemoryManager for use with QueueHeads and Transfer Descriptors.
168 Status
= CreateDMAMemoryManager(&m_MemoryManager
);
169 if (!NT_SUCCESS(Status
))
171 DPRINT1("Failed to create DMAMemoryManager Object\n");
176 // Create the UsbQueue class that will handle the Asynchronous and Periodic Schedules
178 Status
= CreateUSBQueue(&m_UsbQueue
);
179 if (!NT_SUCCESS(Status
))
181 DPRINT1("Failed to create UsbQueue!\n");
186 // store device objects
188 m_DriverObject
= DriverObject
;
189 m_FunctionalDeviceObject
= FunctionalDeviceObject
;
190 m_PhysicalDeviceObject
= PhysicalDeviceObject
;
191 m_NextDeviceObject
= LowerDeviceObject
;
194 // initialize device lock
196 KeInitializeSpinLock(&m_Lock
);
199 // intialize status change work item
201 ExInitializeWorkItem(&m_StatusChangeWorkItem
, StatusChangeWorkItemRoutine
, PVOID(this));
206 Status
= GetBusInterface(PhysicalDeviceObject
, &BusInterface
);
207 if (!NT_SUCCESS(Status
))
209 DPRINT1("Failed to get BusInteface!\n");
213 BytesRead
= (*BusInterface
.GetBusData
)(BusInterface
.Context
,
214 PCI_WHICHSPACE_CONFIG
,
217 PCI_COMMON_HDR_LENGTH
);
219 if (BytesRead
!= PCI_COMMON_HDR_LENGTH
)
221 DPRINT1("Failed to get pci config information!\n");
222 return STATUS_SUCCESS
;
225 if (!(PciConfig
.Command
& PCI_ENABLE_BUS_MASTER
))
227 DPRINT1("PCI Configuration shows this as a non Bus Mastering device!\n");
230 m_VendorID
= PciConfig
.VendorID
;
231 m_DeviceID
= PciConfig
.DeviceID
;
233 return STATUS_SUCCESS
;
237 CUSBHardwareDevice::PnpStart(
238 PCM_RESOURCE_LIST RawResources
,
239 PCM_RESOURCE_LIST TranslatedResources
)
242 PCM_PARTIAL_RESOURCE_DESCRIPTOR ResourceDescriptor
;
243 DEVICE_DESCRIPTION DeviceDescription
;
248 DPRINT1("CUSBHardwareDevice::PnpStart\n");
249 for(Index
= 0; Index
< TranslatedResources
->List
[0].PartialResourceList
.Count
; Index
++)
252 // get resource descriptor
254 ResourceDescriptor
= &TranslatedResources
->List
[0].PartialResourceList
.PartialDescriptors
[Index
];
256 switch(ResourceDescriptor
->Type
)
258 case CmResourceTypeInterrupt
:
260 KeInitializeDpc(&m_IntDpcObject
,
264 Status
= IoConnectInterrupt(&m_Interrupt
,
265 InterruptServiceRoutine
,
268 ResourceDescriptor
->u
.Interrupt
.Vector
,
269 (KIRQL
)ResourceDescriptor
->u
.Interrupt
.Level
,
270 (KIRQL
)ResourceDescriptor
->u
.Interrupt
.Level
,
271 (KINTERRUPT_MODE
)(ResourceDescriptor
->Flags
& CM_RESOURCE_INTERRUPT_LATCHED
),
272 (ResourceDescriptor
->ShareDisposition
!= CmResourceShareDeviceExclusive
),
273 ResourceDescriptor
->u
.Interrupt
.Affinity
,
276 if (!NT_SUCCESS(Status
))
279 // failed to register interrupt
281 DPRINT1("IoConnect Interrupt failed with %x\n", Status
);
286 case CmResourceTypeMemory
:
291 ResourceBase
= MmMapIoSpace(ResourceDescriptor
->u
.Memory
.Start
, ResourceDescriptor
->u
.Memory
.Length
, MmNonCached
);
295 // failed to map registers
297 DPRINT1("MmMapIoSpace failed\n");
298 return STATUS_INSUFFICIENT_RESOURCES
;
302 // Get controllers capabilities
304 Version
= READ_REGISTER_ULONG((PULONG
)((ULONG_PTR
)ResourceBase
+ OHCI_REVISION_OFFSET
));
306 DPRINT1("Version %x\n", Version
);
309 // Store Resource base
311 m_Base
= (PULONG
)ResourceBase
;
319 // zero device description
321 RtlZeroMemory(&DeviceDescription
, sizeof(DEVICE_DESCRIPTION
));
324 // initialize device description
326 DeviceDescription
.Version
= DEVICE_DESCRIPTION_VERSION
;
327 DeviceDescription
.Master
= TRUE
;
328 DeviceDescription
.ScatterGather
= TRUE
;
329 DeviceDescription
.Dma32BitAddresses
= TRUE
;
330 DeviceDescription
.DmaWidth
= Width32Bits
;
331 DeviceDescription
.InterfaceType
= PCIBus
;
332 DeviceDescription
.MaximumLength
= MAXULONG
;
337 m_Adapter
= IoGetDmaAdapter(m_PhysicalDeviceObject
, &DeviceDescription
, &m_MapRegisters
);
341 // failed to get dma adapter
343 DPRINT1("Failed to acquire dma adapter\n");
344 return STATUS_INSUFFICIENT_RESOURCES
;
348 // Create Common Buffer
350 VirtualBase
= m_Adapter
->DmaOperations
->AllocateCommonBuffer(m_Adapter
,
356 DPRINT1("Failed to allocate a common buffer\n");
357 return STATUS_INSUFFICIENT_RESOURCES
;
361 // Initialize the DMAMemoryManager
363 Status
= m_MemoryManager
->Initialize(this, &m_Lock
, PAGE_SIZE
* 4, VirtualBase
, PhysicalAddress
, 32);
364 if (!NT_SUCCESS(Status
))
366 DPRINT1("Failed to initialize the DMAMemoryManager\n");
371 // initializes the controller
373 Status
= InitializeController();
374 if (!NT_SUCCESS(Status
))
376 DPRINT1("Failed to Initialize the controller \n");
382 // Initialize the UsbQueue now that we have an AdapterObject.
384 Status
= m_UsbQueue
->Initialize(PUSBHARDWAREDEVICE(this), m_Adapter
, m_MemoryManager
, NULL
);
385 if (!NT_SUCCESS(Status
))
387 DPRINT1("Failed to Initialize the UsbQueue\n");
393 // Stop the controller before modifying schedules
395 Status
= StopController();
396 if (!NT_SUCCESS(Status
))
398 DPRINT1("Failed to stop the controller \n");
405 // Start the controller
407 DPRINT1("Starting Controller\n");
408 Status
= StartController();
417 CUSBHardwareDevice::PnpStop(void)
420 return STATUS_NOT_IMPLEMENTED
;
424 CUSBHardwareDevice::HandlePower(
428 return STATUS_NOT_IMPLEMENTED
;
432 CUSBHardwareDevice::GetDeviceDetails(
433 OUT OPTIONAL PUSHORT VendorId
,
434 OUT OPTIONAL PUSHORT DeviceId
,
435 OUT OPTIONAL PULONG NumberOfPorts
,
436 OUT OPTIONAL PULONG Speed
)
443 *VendorId
= m_VendorID
;
451 *DeviceId
= m_DeviceID
;
457 // get number of ports
459 *NumberOfPorts
= m_NumberOfPorts
;
470 return STATUS_SUCCESS
;
473 NTSTATUS
CUSBHardwareDevice::GetDMA(
474 OUT
struct IDMAMemoryManager
**OutDMAMemoryManager
)
476 if (!m_MemoryManager
)
477 return STATUS_UNSUCCESSFUL
;
478 *OutDMAMemoryManager
= m_MemoryManager
;
479 return STATUS_SUCCESS
;
483 CUSBHardwareDevice::GetUSBQueue(
484 OUT
struct IUSBQueue
**OutUsbQueue
)
487 return STATUS_UNSUCCESSFUL
;
488 *OutUsbQueue
= m_UsbQueue
;
489 return STATUS_SUCCESS
;
494 CUSBHardwareDevice::StartController(void)
496 ULONG Control
, NumberOfPorts
, Index
, Descriptor
, FrameInterval
, Periodic
;
499 // lets write physical address of dummy control endpoint descriptor
501 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_HEAD_ED_OFFSET
), m_ControlEndpointDescriptor
->PhysicalAddress
.LowPart
);
504 // lets write physical address of dummy bulk endpoint descriptor
506 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_BULK_HEAD_ED_OFFSET
), m_BulkEndpointDescriptor
->PhysicalAddress
.LowPart
);
509 // get frame interval
511 FrameInterval
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_FRAME_INTERVAL_OFFSET
));
512 FrameInterval
= ((FrameInterval
& OHCI_FRAME_INTERVAL_TOGGLE
) ^ OHCI_FRAME_INTERVAL_TOGGLE
);
513 DPRINT1("FrameInterval %x IntervalValue %x\n", FrameInterval
, m_IntervalValue
);
514 FrameInterval
|= OHCI_FSMPS(m_IntervalValue
) | m_IntervalValue
;
515 DPRINT1("FrameInterval %x\n", FrameInterval
);
518 // write frame interval
520 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_FRAME_INTERVAL_OFFSET
), FrameInterval
);
523 // write address of HCCA
525 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_HCCA_OFFSET
), m_HCCAPhysicalAddress
.LowPart
);
528 // now enable the interrupts
530 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_INTERRUPT_ENABLE_OFFSET
), OHCI_NORMAL_INTERRUPTS
| OHCI_MASTER_INTERRUPT_ENABLE
);
535 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_OFFSET
), OHCI_ENABLE_LIST
);
540 Periodic
= OHCI_PERIODIC(m_IntervalValue
);
541 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_PERIODIC_START_OFFSET
), Periodic
);
542 DPRINT1("Periodic Start %x\n", Periodic
);
545 // start the controller
547 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_OFFSET
), OHCI_ENABLE_LIST
| OHCI_CONTROL_BULK_RATIO_1_4
| OHCI_HC_FUNCTIONAL_STATE_OPERATIONAL
);
552 KeStallExecutionProcessor(100);
555 // is the controller started
557 Control
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_OFFSET
));
560 // assert that the controller has been started
562 ASSERT((Control
& OHCI_HC_FUNCTIONAL_STATE_MASK
) == OHCI_HC_FUNCTIONAL_STATE_OPERATIONAL
);
563 ASSERT((Control
& OHCI_ENABLE_LIST
) == OHCI_ENABLE_LIST
);
564 DPRINT1("Control %x\n", Control
);
569 Descriptor
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_DESCRIPTOR_A_OFFSET
));
572 // no over current protection
574 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_DESCRIPTOR_A_OFFSET
), Descriptor
| OHCI_RH_NO_OVER_CURRENT_PROTECTION
);
577 // enable power on all ports
579 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_STATUS_OFFSET
), OHCI_RH_LOCAL_POWER_STATUS_CHANGE
);
584 KeStallExecutionProcessor(10);
589 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_DESCRIPTOR_A_OFFSET
), Descriptor
);
592 // retrieve number of ports
594 for(Index
= 0; Index
< 10; Index
++)
599 KeStallExecutionProcessor(10);
604 Descriptor
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_DESCRIPTOR_A_OFFSET
));
607 // get number of ports
609 NumberOfPorts
= OHCI_RH_GET_PORT_COUNT(Descriptor
);
612 // check if we have received the ports
621 ASSERT(NumberOfPorts
< OHCI_MAX_PORT_COUNT
);
624 // store number of ports
626 m_NumberOfPorts
= NumberOfPorts
;
629 // print out number ports
631 DPRINT1("NumberOfPorts %lu\n", m_NumberOfPorts
);
637 return STATUS_SUCCESS
;
641 CUSBHardwareDevice::AllocateEndpointDescriptor(
642 OUT POHCI_ENDPOINT_DESCRIPTOR
*OutDescriptor
)
644 POHCI_ENDPOINT_DESCRIPTOR Descriptor
;
645 PHYSICAL_ADDRESS DescriptorAddress
;
649 // allocate descriptor
651 Status
= m_MemoryManager
->Allocate(sizeof(OHCI_ENDPOINT_DESCRIPTOR
), (PVOID
*)&Descriptor
, &DescriptorAddress
);
652 if (!NT_SUCCESS(Status
))
655 // failed to allocate descriptor
661 // intialize descriptor
663 Descriptor
->Flags
= OHCI_ENDPOINT_SKIP
;
664 Descriptor
->HeadPhysicalDescriptor
= 0;
665 Descriptor
->NextPhysicalEndpoint
= 0;
666 Descriptor
->TailPhysicalDescriptor
= 0;
667 Descriptor
->PhysicalAddress
.QuadPart
= DescriptorAddress
.QuadPart
;
672 *OutDescriptor
= Descriptor
;
677 return STATUS_SUCCESS
;
681 CUSBHardwareDevice::GetBulkHeadEndpointDescriptor(
682 struct _OHCI_ENDPOINT_DESCRIPTOR
** OutDescriptor
)
684 *OutDescriptor
= m_BulkEndpointDescriptor
;
685 return STATUS_SUCCESS
;
689 CUSBHardwareDevice::GetInterruptEndpointDescriptors(
690 struct _OHCI_ENDPOINT_DESCRIPTOR
*** OutDescriptor
)
692 *OutDescriptor
= m_InterruptEndpoints
;
693 return STATUS_SUCCESS
;
697 CUSBHardwareDevice::GetIsochronousHeadEndpointDescriptor(
698 struct _OHCI_ENDPOINT_DESCRIPTOR
** OutDescriptor
)
703 *OutDescriptor
= m_IsoEndpointDescriptor
;
704 return STATUS_SUCCESS
;
708 CUSBHardwareDevice::HeadEndpointDescriptorModified(
711 ULONG Value
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_COMMAND_STATUS_OFFSET
));
713 if (Type
== USB_ENDPOINT_TYPE_CONTROL
)
718 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_COMMAND_STATUS_OFFSET
), Value
| OHCI_CONTROL_LIST_FILLED
);
720 else if (Type
== USB_ENDPOINT_TYPE_BULK
)
725 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_COMMAND_STATUS_OFFSET
), Value
| OHCI_BULK_LIST_FILLED
);
730 CUSBHardwareDevice::GetControlHeadEndpointDescriptor(
731 struct _OHCI_ENDPOINT_DESCRIPTOR
** OutDescriptor
)
733 *OutDescriptor
= m_ControlEndpointDescriptor
;
734 return STATUS_SUCCESS
;
738 CUSBHardwareDevice::InitializeController()
741 ULONG Index
, Interval
, IntervalIndex
, InsertIndex
;
742 POHCI_ENDPOINT_DESCRIPTOR Descriptor
;
745 // first allocate the hcca area
747 Status
= m_MemoryManager
->Allocate(sizeof(OHCIHCCA
), (PVOID
*)&m_HCCA
, &m_HCCAPhysicalAddress
);
748 if (!NT_SUCCESS(Status
))
757 // now allocate an endpoint for control transfers
758 // this endpoint will never be removed
760 Status
= AllocateEndpointDescriptor(&m_ControlEndpointDescriptor
);
761 if (!NT_SUCCESS(Status
))
770 // now allocate an endpoint for bulk transfers
771 // this endpoint will never be removed
773 Status
= AllocateEndpointDescriptor(&m_BulkEndpointDescriptor
);
774 if (!NT_SUCCESS(Status
))
783 // now allocate an endpoint for iso transfers
784 // this endpoint will never be removed
786 Status
= AllocateEndpointDescriptor(&m_IsoEndpointDescriptor
);
787 if (!NT_SUCCESS(Status
))
796 // now allocate endpoint descriptors for iso / interrupt transfers interval is 1,2,4,8,16,32
798 for(Index
= 0; Index
< OHCI_STATIC_ENDPOINT_COUNT
; Index
++)
801 // allocate endpoint descriptor
803 Status
= AllocateEndpointDescriptor(&Descriptor
);
804 if (!NT_SUCCESS(Status
))
815 m_InterruptEndpoints
[Index
] = Descriptor
;
820 // now link the descriptors, taken from Haiku
822 Interval
= OHCI_BIGGEST_INTERVAL
;
823 IntervalIndex
= OHCI_STATIC_ENDPOINT_COUNT
- 1;
826 InsertIndex
= Interval
/ 2;
827 while (InsertIndex
< OHCI_BIGGEST_INTERVAL
)
830 // assign endpoint address
832 m_HCCA
->InterruptTable
[InsertIndex
] = m_InterruptEndpoints
[IntervalIndex
]->PhysicalAddress
.LowPart
;
833 InsertIndex
+= Interval
;
841 // link all endpoint descriptors to first descriptor in array
843 m_HCCA
->InterruptTable
[0] = m_InterruptEndpoints
[0]->PhysicalAddress
.LowPart
;
844 for (Index
= 1; Index
< OHCI_STATIC_ENDPOINT_COUNT
; Index
++)
849 m_InterruptEndpoints
[Index
]->NextPhysicalEndpoint
= m_InterruptEndpoints
[0]->PhysicalAddress
.LowPart
;
853 // Now link the first endpoint to the isochronous endpoint
855 m_InterruptEndpoints
[0]->NextPhysicalEndpoint
= m_IsoEndpointDescriptor
->PhysicalAddress
.LowPart
;
858 // set iso endpoint type
860 m_IsoEndpointDescriptor
->Flags
|= OHCI_ENDPOINT_ISOCHRONOUS_FORMAT
;
865 return STATUS_SUCCESS
;
869 CUSBHardwareDevice::StopController(void)
871 ULONG Control
, Reset
, Status
;
872 ULONG Index
, FrameInterval
;
877 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_HCCA_OFFSET
), 0xFFFFFFFF);
878 Control
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_HCCA_OFFSET
));
879 //ASSERT((m_HCCAPhysicalAddress.QuadPart & Control) == Control);
885 Control
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_OFFSET
));
887 if ((Control
& OHCI_INTERRUPT_ROUTING
))
890 // read command status
892 Status
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_COMMAND_STATUS_OFFSET
));
897 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_COMMAND_STATUS_OFFSET
), Status
| OHCI_OWNERSHIP_CHANGE_REQUEST
);
898 for(Index
= 0; Index
< 100; Index
++)
903 KeStallExecutionProcessor(100);
908 Control
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_OFFSET
));
909 if (!(Control
& OHCI_INTERRUPT_ROUTING
))
912 // acquired ownership
919 // if the ownership is still not changed, perform reset
921 if (Control
& OHCI_INTERRUPT_ROUTING
)
923 DPRINT1("SMM not responding\n");
927 DPRINT1("SMM has given up ownership\n");
933 // read contents of control register
935 Control
= (READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_OFFSET
)) & OHCI_HC_FUNCTIONAL_STATE_MASK
);
936 DPRINT1("Controller State %x\n", Control
);
938 if (Control
!= OHCI_HC_FUNCTIONAL_STATE_RESET
)
941 // OHCI 5.1.1.3.4, no SMM, BIOS active
943 if (Control
!= OHCI_HC_FUNCTIONAL_STATE_OPERATIONAL
)
948 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_OFFSET
), OHCI_HC_FUNCTIONAL_STATE_RESUME
);
953 // wait untill its resumed
955 KeStallExecutionProcessor(10);
958 // check control register
960 Control
= (READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_OFFSET
)) & OHCI_HC_FUNCTIONAL_STATE_MASK
);
961 if (Control
& OHCI_HC_FUNCTIONAL_STATE_RESUME
)
970 // check for time outs
975 DPRINT1("Failed to resume controller\n");
984 // 5.1.1.3.5 OHCI, no SMM, no BIOS
989 // some controllers also depend on this
991 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_OFFSET
), OHCI_HC_FUNCTIONAL_STATE_RESET
);
995 // wait untill its reset
997 KeStallExecutionProcessor(10);
1000 // check control register
1002 Control
= (READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_OFFSET
)) & OHCI_HC_FUNCTIONAL_STATE_MASK
);
1003 if (Control
== OHCI_HC_FUNCTIONAL_STATE_RESET
)
1012 // check for time outs
1017 DPRINT1("Failed to reset controller\n");
1026 // read from interval
1028 FrameInterval
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_FRAME_INTERVAL_OFFSET
));
1031 // store interval value for later
1033 m_IntervalValue
= OHCI_GET_INTERVAL_VALUE(FrameInterval
);
1035 DPRINT1("FrameInterval %x Interval %x\n", FrameInterval
, m_IntervalValue
);
1038 // now reset controller
1040 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_COMMAND_STATUS_OFFSET
), OHCI_HOST_CONTROLLER_RESET
);
1043 // reset time is 10ms
1045 for(Index
= 0; Index
< 10; Index
++)
1050 KeStallExecutionProcessor(10);
1053 // read command status
1055 Reset
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_COMMAND_STATUS_OFFSET
));
1058 // was reset bit cleared
1060 if ((Reset
& OHCI_HOST_CONTROLLER_RESET
) == 0)
1063 // restore the frame interval register
1065 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_FRAME_INTERVAL_OFFSET
), FrameInterval
);
1068 // controller completed reset
1070 return STATUS_SUCCESS
;
1075 // failed to reset controller
1077 return STATUS_UNSUCCESSFUL
;
1081 CUSBHardwareDevice::ResetController(void)
1084 return STATUS_NOT_IMPLEMENTED
;
1088 CUSBHardwareDevice::ResetPort(
1093 return STATUS_SUCCESS
;
1097 CUSBHardwareDevice::GetPortStatus(
1099 OUT USHORT
*PortStatus
,
1100 OUT USHORT
*PortChange
)
1105 if (PortId
> m_NumberOfPorts
)
1106 return STATUS_UNSUCCESSFUL
;
1108 // init result variables
1115 Value
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)));
1116 DPRINT("GetPortStatus PortId %x Value %x\n", PortId
, Value
);
1120 if (Value
& OHCI_RH_PORTSTATUS_CCS
)
1121 *PortStatus
|= USB_PORT_STATUS_CONNECT
;
1123 // did a device connect?
1124 if (Value
& OHCI_RH_PORTSTATUS_CSC
)
1125 *PortChange
|= USB_PORT_STATUS_CONNECT
;
1128 if (Value
& OHCI_RH_PORTSTATUS_PES
)
1129 *PortStatus
|= USB_PORT_STATUS_ENABLE
;
1132 if (Value
& OHCI_RH_PORTSTATUS_PESC
)
1133 *PortChange
|= USB_PORT_STATUS_ENABLE
;
1136 if (Value
& OHCI_RH_PORTSTATUS_PSS
)
1137 *PortStatus
|= USB_PORT_STATUS_SUSPEND
;
1140 if (Value
& OHCI_RH_PORTSTATUS_PSSC
)
1141 *PortChange
|= USB_PORT_STATUS_ENABLE
;
1144 if (Value
& OHCI_RH_PORTSTATUS_PSS
)
1145 *PortStatus
|= USB_PORT_STATUS_RESET
;
1148 if (Value
& OHCI_RH_PORTSTATUS_PRSC
)
1149 *PortChange
|= USB_PORT_STATUS_RESET
;
1152 *PortStatus
= m_PortStatus
[PortId
].PortStatus
;
1153 *PortChange
= m_PortStatus
[PortId
].PortChange
;
1156 return STATUS_SUCCESS
;
1160 CUSBHardwareDevice::ClearPortStatus(
1166 DPRINT("CUSBHardwareDevice::ClearPortStatus PortId %x Feature %x\n", PortId
, Status
);
1168 if (PortId
> m_NumberOfPorts
)
1169 return STATUS_UNSUCCESSFUL
;
1171 Value
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)));
1172 KeStallExecutionProcessor(100);
1174 if (Status
== C_PORT_RESET
)
1181 Value
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)));
1183 if ((Value
& OHCI_RH_PORTSTATUS_PRS
) == 0)
1186 // reset is complete
1194 KeStallExecutionProcessor(100);
1196 //DPRINT1("Value %x Index %lu\n", Value, Index);
1201 // check if reset bit is still set
1203 if (Value
& OHCI_RH_PORTSTATUS_PRS
)
1208 DPRINT1("PortId %lu Reset failed\n", PortId
);
1209 return STATUS_UNSUCCESSFUL
;
1215 ASSERT((Value
& OHCI_RH_PORTSTATUS_PRS
) == 0);
1216 ASSERT((Value
& OHCI_RH_PORTSTATUS_PRSC
));
1219 // clear reset bit complete
1221 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)), OHCI_RH_PORTSTATUS_PRSC
);
1224 // read status register
1226 Value
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)));
1229 // reset complete bit should be cleared
1231 ASSERT((Value
& OHCI_RH_PORTSTATUS_PRSC
) == 0);
1234 // update port status
1236 m_PortStatus
[PortId
].PortChange
&= ~USB_PORT_STATUS_RESET
;
1241 ASSERT((Value
& OHCI_RH_PORTSTATUS_PES
));
1246 m_PortStatus
[PortId
].PortStatus
|= USB_PORT_STATUS_ENABLE
;
1249 // re-enable root hub change
1251 Value
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_INTERRUPT_ENABLE_OFFSET
));
1252 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_INTERRUPT_ENABLE_OFFSET
), Value
| OHCI_ROOT_HUB_STATUS_CHANGE
);
1256 if (Status
== C_PORT_CONNECTION
)
1261 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)), OHCI_RH_PORTSTATUS_CSC
);
1262 m_PortStatus
[PortId
].PortChange
&= ~USB_PORT_STATUS_CONNECT
;
1267 return STATUS_SUCCESS
;
1272 CUSBHardwareDevice::SetPortFeature(
1278 DPRINT1("CUSBHardwareDevice::SetPortFeature PortId %x Feature %x\n", PortId
, Feature
);
1283 Value
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)));
1286 if (Feature
== PORT_ENABLE
)
1291 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)), OHCI_RH_PORTSTATUS_PES
);
1292 return STATUS_SUCCESS
;
1294 else if (Feature
== PORT_POWER
)
1299 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)), OHCI_RH_PORTSTATUS_PPS
);
1300 return STATUS_SUCCESS
;
1302 else if (Feature
== PORT_SUSPEND
)
1307 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)), OHCI_RH_PORTSTATUS_PSS
);
1308 return STATUS_SUCCESS
;
1310 else if (Feature
== PORT_RESET
)
1315 ASSERT((Value
& OHCI_RH_PORTSTATUS_CCS
));
1320 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_RH_PORT_STATUS(PortId
)), OHCI_RH_PORTSTATUS_PRS
);
1325 KeStallExecutionProcessor(100);
1328 // update cached settings
1330 m_PortStatus
[PortId
].PortChange
|= USB_PORT_STATUS_RESET
;
1331 m_PortStatus
[PortId
].PortStatus
&= ~USB_PORT_STATUS_ENABLE
;
1334 // is there a status change callback
1336 if (m_SCECallBack
!= NULL
)
1341 m_SCECallBack(m_SCEContext
);
1344 return STATUS_SUCCESS
;
1350 CUSBHardwareDevice::SetStatusChangeEndpointCallBack(
1354 m_SCECallBack
= (HD_INIT_CALLBACK
*)CallBack
;
1355 m_SCEContext
= Context
;
1359 CUSBHardwareDevice::AcquireDeviceLock(void)
1366 KeAcquireSpinLock(&m_Lock
, &OldLevel
);
1375 CUSBHardwareDevice::GetCurrentFrameNumber(
1382 Number
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_FRAME_INTERVAL_NUMBER_OFFSET
));
1383 DPRINT1("FrameNumberInterval %x Frame %x\n", Number
, m_HCCA
->CurrentFrameNumber
);
1386 // remove reserved bits
1391 // store frame number
1393 *FrameNumber
= Number
;
1396 // is the controller started
1398 Control
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)m_Base
+ OHCI_CONTROL_OFFSET
));
1399 ASSERT((Control
& OHCI_ENABLE_LIST
) == OHCI_ENABLE_LIST
);
1405 CUSBHardwareDevice::ReleaseDeviceLock(
1408 KeReleaseSpinLock(&m_Lock
, OldLevel
);
1413 InterruptServiceRoutine(
1414 IN PKINTERRUPT Interrupt
,
1415 IN PVOID ServiceContext
)
1417 CUSBHardwareDevice
*This
;
1418 ULONG DoneHead
, Status
, Acknowledge
= 0;
1423 This
= (CUSBHardwareDevice
*) ServiceContext
;
1425 DPRINT("InterruptServiceRoutine\n");
1430 DoneHead
= This
->m_HCCA
->DoneHead
;
1438 // the interrupt was not caused by DoneHead update
1439 // check if something important happened
1441 Status
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_INTERRUPT_STATUS_OFFSET
)) & READ_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_INTERRUPT_ENABLE_OFFSET
)) & (~OHCI_WRITEBACK_DONE_HEAD
);
1445 // nothing happened, appears to be shared interrupt
1453 // DoneHead update happened, check if there are other events too
1455 Status
= OHCI_WRITEBACK_DONE_HEAD
;
1458 // since ed descriptors are 16 byte aligned, the controller sets the lower bits if there were other interrupt requests
1460 if (DoneHead
& OHCI_DONE_INTERRUPTS
)
1465 Status
|= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_INTERRUPT_STATUS_OFFSET
)) & READ_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_INTERRUPT_ENABLE_OFFSET
));
1472 ASSERT(Status
!= 0);
1474 if (Status
& OHCI_WRITEBACK_DONE_HEAD
)
1479 Acknowledge
|= OHCI_WRITEBACK_DONE_HEAD
;
1480 This
->m_HCCA
->DoneHead
= 0;
1483 if (Status
& OHCI_RESUME_DETECTED
)
1488 DPRINT1("InterruptServiceRoutine> Resume\n");
1489 Acknowledge
|= OHCI_RESUME_DETECTED
;
1493 if (Status
& OHCI_UNRECOVERABLE_ERROR
)
1495 DPRINT1("InterruptServiceRoutine> Controller error\n");
1501 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_CONTROL_OFFSET
), OHCI_HC_FUNCTIONAL_STATE_RESET
);
1504 if (Status
& OHCI_ROOT_HUB_STATUS_CHANGE
)
1507 // new device has arrived
1511 // disable interrupt as it will fire untill the port has been reset
1513 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_INTERRUPT_DISABLE_OFFSET
), OHCI_ROOT_HUB_STATUS_CHANGE
);
1514 Acknowledge
|= OHCI_ROOT_HUB_STATUS_CHANGE
;
1518 // is there something to acknowledge
1525 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_INTERRUPT_STATUS_OFFSET
), Acknowledge
);
1531 DPRINT("Status %x Acknowledge %x FrameNumber %x\n", Status
, Acknowledge
, This
->m_HCCA
->CurrentFrameNumber
);
1532 KeInsertQueueDpc(&This
->m_IntDpcObject
, (PVOID
)Status
, (PVOID
)(DoneHead
& ~1));
1535 // interrupt handled
1542 OhciDefferedRoutine(
1544 IN PVOID DeferredContext
,
1545 IN PVOID SystemArgument1
,
1546 IN PVOID SystemArgument2
)
1548 CUSBHardwareDevice
*This
;
1549 ULONG CStatus
, Index
, PortStatus
;
1555 This
= (CUSBHardwareDevice
*)DeferredContext
;
1556 CStatus
= (ULONG
) SystemArgument1
;
1557 DoneHead
= (ULONG
)SystemArgument2
;
1559 DPRINT("OhciDefferedRoutine Status %x\n", CStatus
);
1561 if (CStatus
& OHCI_WRITEBACK_DONE_HEAD
)
1564 // notify queue of event
1566 This
->m_UsbQueue
->TransferDescriptorCompletionCallback(DoneHead
);
1568 if (CStatus
& OHCI_ROOT_HUB_STATUS_CHANGE
)
1571 // device connected, lets check which port
1573 for(Index
= 0; Index
< This
->m_NumberOfPorts
; Index
++)
1578 PortStatus
= READ_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_RH_PORT_STATUS(Index
)));
1581 // check if there is a status change
1583 if (PortStatus
& OHCI_RH_PORTSTATUS_CSC
)
1586 // did a device connect
1588 if (PortStatus
& OHCI_RH_PORTSTATUS_CCS
)
1593 DPRINT1("New device arrival at Port %d LowSpeed %x\n", Index
, (PortStatus
& OHCI_RH_PORTSTATUS_LSDA
));
1598 WRITE_REGISTER_ULONG((PULONG
)((PUCHAR
)This
->m_Base
+ OHCI_RH_PORT_STATUS(Index
)), OHCI_RH_PORTSTATUS_PES
);
1604 This
->m_PortStatus
[Index
].PortStatus
|= USB_PORT_STATUS_CONNECT
;
1605 This
->m_PortStatus
[Index
].PortChange
|= USB_PORT_STATUS_CONNECT
;
1607 if ((PortStatus
& OHCI_RH_PORTSTATUS_LSDA
))
1610 // low speed device connected
1612 This
->m_PortStatus
[Index
].PortStatus
|= USB_PORT_STATUS_LOW_SPEED
;
1618 // device disconnected
1620 DPRINT1("Device disconnected at Port %x\n", Index
);
1623 // update port status flags
1625 This
->m_PortStatus
[Index
].PortStatus
&= ~USB_PORT_STATUS_LOW_SPEED
;
1626 This
->m_PortStatus
[Index
].PortStatus
&= ~USB_PORT_STATUS_CONNECT
;
1627 This
->m_PortStatus
[Index
].PortChange
|= USB_PORT_STATUS_CONNECT
;
1631 // is there a status change callback
1633 if (This
->m_SCECallBack
!= NULL
)
1636 // queue work item for processing
1638 ExQueueWorkItem(&This
->m_StatusChangeWorkItem
, DelayedWorkQueue
);
1649 StatusChangeWorkItemRoutine(
1653 // cast to hardware object
1655 CUSBHardwareDevice
* This
= (CUSBHardwareDevice
*)Context
;
1658 // is there a callback
1660 if (This
->m_SCECallBack
)
1665 This
->m_SCECallBack(This
->m_SCEContext
);
1672 PUSBHARDWAREDEVICE
*OutHardware
)
1674 PUSBHARDWAREDEVICE This
;
1676 This
= new(NonPagedPool
, TAG_USBOHCI
) CUSBHardwareDevice(0);
1679 return STATUS_INSUFFICIENT_RESOURCES
;
1684 *OutHardware
= (PUSBHARDWAREDEVICE
)This
;
1686 return STATUS_SUCCESS
;