hal/halppc/include/ioapic.h

   1 /*
   2  *
   3  */
   4
   5 #pragma once
   6
   7 /* I/O APIC Register Address Map */
   8 #define IOAPIC_IOREGSEL 0x0000  /* I/O Register Select (index) (R/W) */
   9 #define IOAPIC_IOWIN    0x0010  /* I/O window (data) (R/W) */
  10
  11 #define IOAPIC_ID       0x0000  /* IO APIC ID (R/W) */
  12 #define IOAPIC_VER      0x0001  /* IO APIC Version (R) */
  13 #define IOAPIC_ARB      0x0002  /* IO APIC Arbitration ID (R) */
  14 #define IOAPIC_REDTBL   0x0010  /* Redirection Table (0-23 64-bit registers) (R/W) */
  15
  16 #define IOAPIC_ID_MASK        (0xF << 24)
  17 #define GET_IOAPIC_ID(x)            (((x) & IOAPIC_ID_MASK) >> 24)
  18 #define SET_IOAPIC_ID(x)            ((x) << 24)
  19
  20 #define IOAPIC_VER_MASK       (0xFF)
  21 #define GET_IOAPIC_VERSION(x) (((x) & IOAPIC_VER_MASK))
  22 #define IOAPIC_MRE_MASK       (0xFF << 16)  /* Maximum Redirection Entry */
  23 #define GET_IOAPIC_MRE(x)     (((x) & IOAPIC_MRE_MASK) >> 16)
  24
  25 #define IOAPIC_ARB_MASK       (0xF << 24)
  26 #define GET_IOAPIC_ARB(x)           (((x) & IOAPIC_ARB_MASK) >> 24)
  27
  28 #define IOAPIC_TBL_DELMOD   (0x7 << 10) /* Delivery Mode (see APIC_DM_*) */
  29 #define IOAPIC_TBL_DM       (0x1 << 11) /* Destination Mode */
  30 #define IOAPIC_TBL_DS       (0x1 << 12) /* Delivery Status */
  31 #define IOAPIC_TBL_INTPOL   (0x1 << 13) /* Interrupt Input Pin Polarity */
  32 #define IOAPIC_TBL_RIRR     (0x1 << 14) /* Remote IRR */
  33 #define IOAPIC_TBL_TM       (0x1 << 15) /* Trigger Mode */
  34 #define IOAPIC_TBL_IM       (0x1 << 16) /* Interrupt Mask */
  35 #define IOAPIC_TBL_DF0      (0xF << 56) /* Destination Field (physical mode) */
  36 #define IOAPIC_TBL_DF1      (0xFF<< 56) /* Destination Field (logical mode) */
  37 #define IOAPIC_TBL_VECTOR   (0xFF << 0) /* Vector (10h - FEh) */
  38
  39 #include <pshpack1.h>
  40 typedef struct _IOAPIC_ROUTE_ENTRY {
  41    ULONG vector     :  8,
  42    delivery_mode    :  3,   /* 000: FIXED
  43                              * 001: lowest priority
  44                              * 111: ExtINT
  45                              */
  46    dest_mode        :  1,   /* 0: physical, 1: logical */
  47    delivery_status  :  1,
  48    polarity         :  1,
  49    irr              :  1,
  50    trigger          :  1,   /* 0: edge, 1: level */
  51    mask             :  1,   /* 0: enabled, 1: disabled */
  52    __reserved_2     : 15;
  53
  54    union {
  55       struct {
  56          ULONG __reserved_1  : 24,
  57                physical_dest :  4,
  58                __reserved_2  :  4;
  59       } physical;
  60       struct {
  61          ULONG __reserved_1  : 24,
  62                logical_dest  :  8;
  63       } logical;
  64    } dest;
  65 } IOAPIC_ROUTE_ENTRY, *PIOAPIC_ROUTE_ENTRY;
  66 #include <poppack.h>
  67
  68 typedef struct _IOAPIC_INFO
  69 {
  70    ULONG  ApicId;         /* APIC ID */
  71    ULONG  ApicVersion;    /* APIC version */
  72    ULONG  ApicAddress;    /* APIC address */
  73    ULONG  EntryCount;     /* Number of redirection entries */
  74 } IOAPIC_INFO, *PIOAPIC_INFO;
  75
  76 #define IOAPIC_DEFAULT_BASE   0xFEC00000    /* Default I/O APIC Base Register Address */
  77
  78 extern ULONG IRQCount;                                  /* Number of IRQs  */
  79 extern UCHAR BUSMap[MAX_BUS];                           /* Map of all buses in the system */
  80 extern UCHAR PCIBUSMap[MAX_BUS];                        /* Map of all PCI buses in the system */
  81 extern IOAPIC_INFO IOAPICMap[MAX_IOAPIC];               /* Map of all I/O APICs in the system */
  82 extern ULONG IOAPICCount;                               /* Number of I/O APICs in the system */
  83 extern ULONG APICMode;                                  /* APIC mode at startup */
  84 extern MP_CONFIGURATION_INTSRC IRQMap[MAX_IRQ_SOURCE];  /* Map of all IRQs */
  85
  86 VOID IOAPICSetupIrqs(VOID);
  87 VOID IOAPICEnable(VOID);
  88 VOID IOAPICSetupIds(VOID);
  89 VOID IOAPICMaskIrq(ULONG Irq);
  90 VOID IOAPICUnmaskIrq(ULONG Irq);
  91
  92 VOID HaliReconfigurePciInterrupts(VOID);
  93
  94 /* For debugging */
  95 VOID IOAPICDump(VOID);
  96
  97 /* EOF */