013b8564d79a68a432ccb1343479b439d7418488
[reactos.git] / hal / halx86 / generic / legacy / bussupp.c
1 /*
2 * PROJECT: ReactOS HAL
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: hal/halx86/generic/legacy/bussupp.c
5 * PURPOSE: HAL Legacy Bus Support Code
6 * PROGRAMMERS: ReactOS Portable Systems Group
7 */
8
9 /* INCLUDES *******************************************************************/
10
11 #include <hal.h>
12 #define NDEBUG
13 #include <debug.h>
14
15 /* GLOBALS ********************************************************************/
16
17 extern KSPIN_LOCK HalpPCIConfigLock;
18 ULONG HalpPciIrqMask;
19
20 /* PRIVATE FUNCTIONS **********************************************************/
21
22 PBUS_HANDLER
23 NTAPI
24 HalpAllocateBusHandler(IN INTERFACE_TYPE InterfaceType,
25 IN BUS_DATA_TYPE BusDataType,
26 IN ULONG BusNumber,
27 IN INTERFACE_TYPE ParentBusInterfaceType,
28 IN ULONG ParentBusNumber,
29 IN ULONG BusSpecificData)
30 {
31 PBUS_HANDLER Bus;
32
33 /* Register the bus handler */
34 HalRegisterBusHandler(InterfaceType,
35 BusDataType,
36 BusNumber,
37 ParentBusInterfaceType,
38 ParentBusNumber,
39 BusSpecificData,
40 NULL,
41 &Bus);
42 if (!Bus) return NULL;
43
44 /* Check for a valid interface */
45 if (InterfaceType != InterfaceTypeUndefined)
46 {
47 /* Allocate address ranges and zero them out */
48 Bus->BusAddresses = ExAllocatePoolWithTag(NonPagedPool,
49 sizeof(SUPPORTED_RANGES),
50 ' laH');
51 RtlZeroMemory(Bus->BusAddresses, sizeof(SUPPORTED_RANGES));
52
53 /* Build the data structure */
54 Bus->BusAddresses->Version = HAL_SUPPORTED_RANGE_VERSION;
55 Bus->BusAddresses->Dma.Limit = 7;
56 Bus->BusAddresses->Memory.Limit = 0xFFFFFFFF;
57 Bus->BusAddresses->IO.Limit = 0xFFFF;
58 Bus->BusAddresses->IO.SystemAddressSpace = 1;
59 Bus->BusAddresses->PrefetchMemory.Base = 1;
60 }
61
62 /* Return the bus address */
63 return Bus;
64 }
65
66 VOID
67 NTAPI
68 INIT_FUNCTION
69 HalpRegisterInternalBusHandlers(VOID)
70 {
71 PBUS_HANDLER Bus;
72
73 /* Only do processor 1 */
74 if (KeGetCurrentPrcb()->Number) return;
75
76 /* Register root support */
77 HalpInitBusHandler();
78
79 /* Allocate the system bus */
80 Bus = HalpAllocateBusHandler(Internal,
81 ConfigurationSpaceUndefined,
82 0,
83 InterfaceTypeUndefined,
84 0,
85 0);
86 if (Bus)
87 {
88 /* Set it up */
89 Bus->GetInterruptVector = HalpGetSystemInterruptVector;
90 Bus->TranslateBusAddress = HalpTranslateSystemBusAddress;
91 }
92
93 /* Allocate the CMOS bus */
94 Bus = HalpAllocateBusHandler(InterfaceTypeUndefined,
95 Cmos,
96 0,
97 InterfaceTypeUndefined,
98 0,
99 0);
100 if (Bus)
101 {
102 /* Set it up */
103 Bus->GetBusData = HalpcGetCmosData;
104 Bus->SetBusData = HalpcSetCmosData;
105 }
106
107 /* Allocate the CMOS bus */
108 Bus = HalpAllocateBusHandler(InterfaceTypeUndefined,
109 Cmos,
110 1,
111 InterfaceTypeUndefined,
112 0,
113 0);
114 if (Bus)
115 {
116 /* Set it up */
117 Bus->GetBusData = HalpcGetCmosData;
118 Bus->SetBusData = HalpcSetCmosData;
119 }
120
121 /* Allocate ISA bus */
122 Bus = HalpAllocateBusHandler(Isa,
123 ConfigurationSpaceUndefined,
124 0,
125 Internal,
126 0,
127 0);
128 if (Bus)
129 {
130 /* Set it up */
131 Bus->GetBusData = HalpNoBusData;
132 Bus->BusAddresses->Memory.Limit = 0xFFFFFF;
133 Bus->TranslateBusAddress = HalpTranslateIsaBusAddress;
134 }
135
136 /* No support for EISA or MCA */
137 ASSERT(HalpBusType == MACHINE_TYPE_ISA);
138 }
139
140 #ifndef _MINIHAL_
141 NTSTATUS
142 NTAPI
143 INIT_FUNCTION
144 HalpMarkChipsetDecode(BOOLEAN OverrideEnable)
145 {
146 NTSTATUS Status;
147 UNICODE_STRING KeyString;
148 ULONG Data = OverrideEnable;
149 HANDLE KeyHandle, Handle;
150
151 /* Open CCS key */
152 RtlInitUnicodeString(&KeyString,
153 L"\\REGISTRY\\MACHINE\\SYSTEM\\CURRENTCONTROLSET");
154 Status = HalpOpenRegistryKey(&Handle, 0, &KeyString, KEY_ALL_ACCESS, FALSE);
155 if (NT_SUCCESS(Status))
156 {
157 /* Open PNP Bios key */
158 RtlInitUnicodeString(&KeyString, L"Control\\Biosinfo\\PNPBios");
159 Status = HalpOpenRegistryKey(&KeyHandle,
160 Handle,
161 &KeyString,
162 KEY_ALL_ACCESS,
163 TRUE);
164
165 /* Close root key */
166 ZwClose(Handle);
167
168 /* Check if PNP BIOS key exists */
169 if (NT_SUCCESS(Status))
170 {
171 /* Set the override value */
172 RtlInitUnicodeString(&KeyString, L"FullDecodeChipsetOverride");
173 Status = ZwSetValueKey(KeyHandle,
174 &KeyString,
175 0,
176 REG_DWORD,
177 &Data,
178 sizeof(Data));
179
180 /* Close subkey */
181 ZwClose(KeyHandle);
182 }
183 }
184
185 /* Return status */
186 return Status;
187 }
188
189 PBUS_HANDLER
190 NTAPI
191 INIT_FUNCTION
192 HalpAllocateAndInitPciBusHandler(IN ULONG PciType,
193 IN ULONG BusNo,
194 IN BOOLEAN TestAllocation)
195 {
196 PBUS_HANDLER Bus;
197 PPCIPBUSDATA BusData;
198
199 /* Allocate the bus handler */
200 Bus = HalpAllocateBusHandler(PCIBus,
201 PCIConfiguration,
202 BusNo,
203 Internal,
204 0,
205 sizeof(PCIPBUSDATA));
206
207 /* Set it up */
208 Bus->GetBusData = (PGETSETBUSDATA)HalpGetPCIData;
209 Bus->SetBusData = (PGETSETBUSDATA)HalpSetPCIData;
210 Bus->GetInterruptVector = (PGETINTERRUPTVECTOR)HalpGetPCIIntOnISABus;
211 Bus->AdjustResourceList = (PADJUSTRESOURCELIST)HalpAdjustPCIResourceList;
212 Bus->AssignSlotResources = (PASSIGNSLOTRESOURCES)HalpAssignPCISlotResources;
213 Bus->BusAddresses->Dma.Limit = 0;
214
215 /* Get our custom bus data */
216 BusData = (PPCIPBUSDATA)Bus->BusData;
217
218 /* Setup custom bus data */
219 BusData->CommonData.Tag = PCI_DATA_TAG;
220 BusData->CommonData.Version = PCI_DATA_VERSION;
221 BusData->CommonData.ReadConfig = (PciReadWriteConfig)HalpReadPCIConfig;
222 BusData->CommonData.WriteConfig = (PciReadWriteConfig)HalpWritePCIConfig;
223 BusData->CommonData.Pin2Line = (PciPin2Line)HalpPCIPin2ISALine;
224 BusData->CommonData.Line2Pin = (PciLine2Pin)HalpPCIISALine2Pin;
225 BusData->MaxDevice = PCI_MAX_DEVICES;
226 BusData->GetIrqRange = (PciIrqRange)HalpGetISAFixedPCIIrq;
227
228 /* Initialize the bitmap */
229 RtlInitializeBitMap(&BusData->DeviceConfigured, BusData->ConfiguredBits, 256);
230
231 /* Check the type of PCI bus */
232 switch (PciType)
233 {
234 /* Type 1 PCI Bus */
235 case 1:
236
237 /* Copy the Type 1 handler data */
238 RtlCopyMemory(&PCIConfigHandler,
239 &PCIConfigHandlerType1,
240 sizeof(PCIConfigHandler));
241
242 /* Set correct I/O Ports */
243 BusData->Config.Type1.Address = PCI_TYPE1_ADDRESS_PORT;
244 BusData->Config.Type1.Data = PCI_TYPE1_DATA_PORT;
245 break;
246
247 /* Type 2 PCI Bus */
248 case 2:
249
250 /* Copy the Type 1 handler data */
251 RtlCopyMemory(&PCIConfigHandler,
252 &PCIConfigHandlerType2,
253 sizeof (PCIConfigHandler));
254
255 /* Set correct I/O Ports */
256 BusData->Config.Type2.CSE = PCI_TYPE2_CSE_PORT;
257 BusData->Config.Type2.Forward = PCI_TYPE2_FORWARD_PORT;
258 BusData->Config.Type2.Base = PCI_TYPE2_ADDRESS_BASE;
259
260 /* Only 16 devices supported, not 32 */
261 BusData->MaxDevice = 16;
262 break;
263
264 default:
265
266 /* Invalid type */
267 DbgPrint("HAL: Unnkown PCI type\n");
268 }
269
270 /* Return the bus handler */
271 return Bus;
272 }
273
274 BOOLEAN
275 NTAPI
276 INIT_FUNCTION
277 HalpIsValidPCIDevice(IN PBUS_HANDLER BusHandler,
278 IN PCI_SLOT_NUMBER Slot)
279 {
280 UCHAR DataBuffer[PCI_COMMON_HDR_LENGTH];
281 PPCI_COMMON_CONFIG PciHeader = (PVOID)DataBuffer;
282 ULONG i;
283 ULONG_PTR Address;
284
285 /* Read the PCI header */
286 HalpReadPCIConfig(BusHandler, Slot, PciHeader, 0, PCI_COMMON_HDR_LENGTH);
287
288 /* Make sure it's a valid device */
289 if ((PciHeader->VendorID == PCI_INVALID_VENDORID) ||
290 (PCI_CONFIGURATION_TYPE(PciHeader) != PCI_DEVICE_TYPE))
291 {
292 /* Bail out */
293 return FALSE;
294 }
295
296 /* Make sure interrupt numbers make sense */
297 if (((PciHeader->u.type0.InterruptPin) &&
298 (PciHeader->u.type0.InterruptPin > 4)) ||
299 (PciHeader->u.type0.InterruptLine & 0x70))
300 {
301 /* Bail out */
302 return FALSE;
303 }
304
305 /* Now scan PCI BARs */
306 for (i = 0; i < PCI_TYPE0_ADDRESSES; i++)
307 {
308 /* Check what kind of address it is */
309 Address = PciHeader->u.type0.BaseAddresses[i];
310 if (Address & PCI_ADDRESS_IO_SPACE)
311 {
312 /* Highest I/O port is 65535 */
313 if (Address > 0xFFFF) return FALSE;
314 }
315 else
316 {
317 /* MMIO should be higher than 0x80000 */
318 if ((Address > 0xF) && (Address < 0x80000)) return FALSE;
319 }
320
321 /* Is this a 64-bit address? */
322 if (!(Address & PCI_ADDRESS_IO_SPACE) &&
323 ((Address & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_64BIT))
324 {
325 /* Check the next-next entry, since this one 64-bits wide */
326 i++;
327 }
328 }
329
330 /* Header, interrupt and address data all make sense */
331 return TRUE;
332 }
333
334 static BOOLEAN WarningsGiven[5];
335
336 NTSTATUS
337 NTAPI
338 INIT_FUNCTION
339 HalpGetChipHacks(IN USHORT VendorId,
340 IN USHORT DeviceId,
341 IN UCHAR RevisionId,
342 IN PULONG HackFlags)
343 {
344 UNICODE_STRING KeyName, ValueName;
345 NTSTATUS Status;
346 OBJECT_ATTRIBUTES ObjectAttributes;
347 HANDLE KeyHandle;
348 WCHAR Buffer[32];
349 KEY_VALUE_PARTIAL_INFORMATION PartialInfo;
350 ULONG ResultLength;
351
352 /* Setup the object attributes for the key */
353 RtlInitUnicodeString(&KeyName,
354 L"\\REGISTRY\\MACHINE\\SYSTEM\\CURRENTCONTROLSET\\"
355 L"Control\\HAL");
356 InitializeObjectAttributes(&ObjectAttributes,
357 &KeyName,
358 OBJ_CASE_INSENSITIVE,
359 NULL,
360 NULL);
361
362 /* Open the key */
363 Status = ZwOpenKey(&KeyHandle, KEY_READ, &ObjectAttributes);
364 if (!NT_SUCCESS(Status)) return Status;
365
366 /* Query value */
367 swprintf(Buffer, L"%04X%04X", VendorId, DeviceId);
368 RtlInitUnicodeString(&ValueName, Buffer);
369 Status = ZwQueryValueKey(KeyHandle,
370 &ValueName,
371 KeyValuePartialInformation,
372 &PartialInfo,
373 sizeof(PartialInfo),
374 &ResultLength);
375 if (NT_SUCCESS(Status))
376 {
377 /* Return the flags */
378 DbgPrint("\tFound HackFlags for your chipset\n");
379 *HackFlags = *(PULONG)PartialInfo.Data;
380 DbgPrint("\t\tHack Flags: %lx (Hack Revision: %lx-Your Revision: %lx)\n",
381 *HackFlags, HALP_REVISION_FROM_HACK_FLAGS(*HackFlags), RevisionId);
382
383 /* Does it apply to this revision? */
384 if ((RevisionId) && (RevisionId >= (HALP_REVISION_FROM_HACK_FLAGS(*HackFlags))))
385 {
386 /* Read the revision flags */
387 *HackFlags = HALP_REVISION_HACK_FLAGS(*HackFlags);
388 }
389
390 /* Throw out revision data */
391 *HackFlags = HALP_HACK_FLAGS(*HackFlags);
392 if (!*HackFlags) DbgPrint("\tNo HackFlags for your chipset's revision!\n");
393 }
394
395 /* Close the handle and return */
396 ZwClose(KeyHandle);
397 return Status;
398 }
399
400 BOOLEAN
401 NTAPI
402 INIT_FUNCTION
403 HalpIsRecognizedCard(IN PPCI_REGISTRY_INFO_INTERNAL PciRegistryInfo,
404 IN PPCI_COMMON_CONFIG PciData,
405 IN ULONG Flags)
406 {
407 ULONG ElementCount, i;
408 PPCI_CARD_DESCRIPTOR CardDescriptor;
409
410 /* How many PCI Cards that we know about? */
411 ElementCount = PciRegistryInfo->ElementCount;
412 if (!ElementCount) return FALSE;
413
414 /* Loop all descriptors */
415 CardDescriptor = &PciRegistryInfo->CardList[0];
416 for (i = 0; i < ElementCount; i++, CardDescriptor++)
417 {
418 /* Check for flag match */
419 if (CardDescriptor->Flags != Flags) continue;
420
421 /* Check for VID-PID match */
422 if ((CardDescriptor->VendorID != PciData->VendorID) ||
423 (CardDescriptor->DeviceID != PciData->DeviceID))
424 {
425 /* Skip */
426 continue;
427 }
428
429 /* Check for revision match, if requested */
430 if ((CardDescriptor->Flags & HALP_CHECK_CARD_REVISION_ID) &&
431 (CardDescriptor->RevisionID != PciData->RevisionID))
432 {
433 /* Skip */
434 continue;
435 }
436
437 /* Check what kind of device this is */
438 switch (PCI_CONFIGURATION_TYPE(PciData))
439 {
440 /* CardBUS Bridge */
441 case PCI_CARDBUS_BRIDGE_TYPE:
442
443 /* This means the real device header is in the device-specific data */
444 PciData = (PPCI_COMMON_CONFIG)PciData->DeviceSpecific;
445
446 /* Normal PCI device */
447 case PCI_DEVICE_TYPE:
448
449 /* Check for subvendor match, if requested */
450 if ((CardDescriptor->Flags & HALP_CHECK_CARD_SUBVENDOR_ID) &&
451 (CardDescriptor->SubsystemVendorID != PciData->u.type0.SubVendorID))
452 {
453 /* Skip */
454 continue;
455 }
456
457 /* Check for subsystem match, if requested */
458 if ((CardDescriptor->Flags & HALP_CHECK_CARD_SUBSYSTEM_ID) &&
459 (CardDescriptor->SubsystemID != PciData->u.type0.SubSystemID))
460 {
461 /* Skip */
462 continue;
463 }
464
465 /* You made it! */
466 return TRUE;
467
468 /* PCI Bridge -- don't bother */
469 case PCI_BRIDGE_TYPE:
470 default:
471
472 /* Recognize it */
473 return TRUE;
474 }
475 }
476
477 /* This means the card isn't recognized */
478 return FALSE;
479 }
480
481 BOOLEAN
482 NTAPI
483 INIT_FUNCTION
484 HalpIsIdeDevice(IN PPCI_COMMON_CONFIG PciData)
485 {
486 /* Simple test first */
487 if ((PciData->BaseClass == PCI_CLASS_MASS_STORAGE_CTLR) &&
488 (PciData->SubClass == PCI_SUBCLASS_MSC_IDE_CTLR))
489 {
490 /* The device is nice enough to admit it */
491 return TRUE;
492 }
493
494 /* Symphony 82C101 */
495 if (PciData->VendorID == 0x1C1C) return TRUE;
496
497 /* ALi MS4803 or M5219 */
498 if ((PciData->VendorID == 0x10B9) &&
499 ((PciData->DeviceID == 0x5215) || (PciData->DeviceID == 0x5219)))
500 {
501 return TRUE;
502 }
503
504 /* Appian Technology */
505 if ((PciData->VendorID == 0x1097) && (PciData->DeviceID == 0x38)) return TRUE;
506
507 /* Compaq Triflex Dual EIDE Controller */
508 if ((PciData->VendorID == 0xE11) && (PciData->DeviceID == 0xAE33)) return TRUE;
509
510 /* Micron PC Tech RZ1000 */
511 if ((PciData->VendorID == 0x1042) && (PciData->DeviceID == 0x1000)) return TRUE;
512
513 /* SiS 85C601 or 5513 [IDE] */
514 if ((PciData->VendorID == 0x1039) &&
515 ((PciData->DeviceID == 0x601) || (PciData->DeviceID == 0x5513)))
516 {
517 return TRUE;
518 }
519
520 /* Symphony Labs W83769F */
521 if ((PciData->VendorID == 0x10AD) &&
522 ((PciData->DeviceID == 0x1) || (PciData->DeviceID == 0x150)))
523 {
524 return TRUE;
525 }
526
527 /* UMC UM8673F */
528 if ((PciData->VendorID == 0x1060) && (PciData->DeviceID == 0x101)) return TRUE;
529
530 /* You've survived */
531 return FALSE;
532 }
533
534 BOOLEAN
535 NTAPI
536 INIT_FUNCTION
537 HalpIsBridgeDevice(IN PPCI_COMMON_CONFIG PciData)
538 {
539 /* Either this is a PCI-to-PCI Bridge, or a CardBUS Bridge */
540 return (((PCI_CONFIGURATION_TYPE(PciData) == PCI_BRIDGE_TYPE) &&
541 (PciData->BaseClass == PCI_CLASS_BRIDGE_DEV) &&
542 (PciData->SubClass == PCI_SUBCLASS_BR_PCI_TO_PCI)) ||
543 ((PCI_CONFIGURATION_TYPE(PciData) == PCI_CARDBUS_BRIDGE_TYPE) &&
544 (PciData->BaseClass == PCI_CLASS_BRIDGE_DEV) &&
545 (PciData->SubClass == PCI_SUBCLASS_BR_CARDBUS)));
546 }
547
548 BOOLEAN
549 NTAPI
550 INIT_FUNCTION
551 HalpGetPciBridgeConfig(IN ULONG PciType,
552 IN PUCHAR BusCount)
553 {
554 PCI_SLOT_NUMBER PciSlot;
555 ULONG i, j, k;
556 UCHAR DataBuffer[PCI_COMMON_HDR_LENGTH];
557 PPCI_COMMON_CONFIG PciData = (PPCI_COMMON_CONFIG)DataBuffer;
558 PBUS_HANDLER BusHandler;
559
560 /* Loop PCI buses */
561 PciSlot.u.bits.Reserved = 0;
562 for (i = 0; i < *BusCount; i++)
563 {
564 /* Get the bus handler */
565 BusHandler = HalHandlerForBus(PCIBus, i);
566
567 /* Loop every device */
568 for (j = 0; j < PCI_MAX_DEVICES; j++)
569 {
570 /* Loop every function */
571 PciSlot.u.bits.DeviceNumber = j;
572 for (k = 0; k < PCI_MAX_FUNCTION; k++)
573 {
574 /* Build the final slot structure */
575 PciSlot.u.bits.FunctionNumber = k;
576
577 /* Read the configuration information */
578 HalpReadPCIConfig(BusHandler,
579 PciSlot,
580 PciData,
581 0,
582 PCI_COMMON_HDR_LENGTH);
583
584 /* Skip if this is an invalid function */
585 if (PciData->VendorID == PCI_INVALID_VENDORID) continue;
586
587 /* Make sure that this is a PCI bridge or a cardbus bridge */
588 if (!HalpIsBridgeDevice(PciData)) continue;
589
590 /* Not supported */
591 if (!WarningsGiven[2]++) DPRINT1("Your machine has a PCI-to-PCI or CardBUS Bridge. PCI devices may fail!\n");
592 continue;
593 }
594 }
595 }
596
597 /* If we exited the loop, then there's no bridge to worry about */
598 return FALSE;
599 }
600
601 VOID
602 NTAPI
603 INIT_FUNCTION
604 HalpFixupPciSupportedRanges(IN ULONG BusCount)
605 {
606 ULONG i;
607 PBUS_HANDLER Bus, ParentBus;
608
609 /* Loop all buses */
610 for (i = 0; i < BusCount; i++)
611 {
612 /* Get PCI bus handler */
613 Bus = HalHandlerForBus(PCIBus, i);
614
615 /* Loop all parent buses */
616 ParentBus = Bus->ParentHandler;
617 while (ParentBus)
618 {
619 /* Should merge addresses */
620 if (!WarningsGiven[0]++) DPRINT1("Found parent bus (indicating PCI Bridge). PCI devices may fail!\n");
621
622 /* Check the next parent */
623 ParentBus = ParentBus->ParentHandler;
624 }
625 }
626
627 /* Loop all buses again */
628 for (i = 0; i < BusCount; i++)
629 {
630 /* Get PCI bus handler */
631 Bus = HalHandlerForBus(PCIBus, i);
632
633 /* Check if this is a PCI 2.2 Bus with Subtractive Decode */
634 if (!((PPCIPBUSDATA)Bus->BusData)->Subtractive)
635 {
636 /* Loop all parent buses */
637 ParentBus = Bus->ParentHandler;
638 while (ParentBus)
639 {
640 /* But check only PCI parent buses specifically */
641 if (ParentBus->InterfaceType == PCIBus)
642 {
643 /* Should trim addresses */
644 if (!WarningsGiven[1]++) DPRINT1("Found parent PCI Bus (indicating PCI-to-PCI Bridge). PCI devices may fail!\n");
645 }
646
647 /* Check the next parent */
648 ParentBus = ParentBus->ParentHandler;
649 }
650 }
651 }
652
653 /* Loop buses one last time */
654 for (i = 0; i < BusCount; i++)
655 {
656 /* Get the PCI bus handler */
657 Bus = HalHandlerForBus(PCIBus, i);
658
659 /* Sort and combine (trim) bus address range information */
660 DPRINT("Warning: Bus addresses not being optimized!\n");
661 }
662 }
663
664 VOID
665 NTAPI
666 INIT_FUNCTION
667 ShowSize(ULONG x)
668 {
669 if (!x) return;
670 DbgPrint(" [size=");
671 if (x < 1024)
672 {
673 DbgPrint("%d", (int) x);
674 }
675 else if (x < 1048576)
676 {
677 DbgPrint("%dK", (int)(x / 1024));
678 }
679 else if (x < 0x80000000)
680 {
681 DbgPrint("%dM", (int)(x / 1048576));
682 }
683 else
684 {
685 DbgPrint("%d", x);
686 }
687 DbgPrint("]\n");
688 }
689
690 VOID
691 NTAPI
692 INIT_FUNCTION
693 HalpDebugPciDumpBus(IN ULONG i,
694 IN ULONG j,
695 IN ULONG k,
696 IN PPCI_COMMON_CONFIG PciData)
697 {
698 extern CHAR ClassTable[3922];
699 extern CHAR VendorTable[642355];
700 PCHAR p, ClassName, SubClassName, VendorName, ProductName, SubVendorName;
701 ULONG Length;
702 CHAR LookupString[16] = "";
703 CHAR bSubClassName[32] = "";
704 CHAR bVendorName[32] = "";
705 CHAR bProductName[32] = "Unknown device";
706 CHAR bSubVendorName[32] = "Unknown";
707 ULONG Size, Mem, b;
708
709 /* Isolate the class name */
710 sprintf(LookupString, "C %02x", PciData->BaseClass);
711 ClassName = strstr(ClassTable, LookupString);
712 if (ClassName)
713 {
714 /* Isolate the subclass name */
715 ClassName += 6;
716 sprintf(LookupString, "\t%02x", PciData->SubClass);
717 SubClassName = strstr(ClassName, LookupString);
718 if (SubClassName)
719 {
720 /* Copy the subclass into our buffer */
721 SubClassName += 5;
722 p = strchr(SubClassName, '\r');
723 Length = p - SubClassName;
724 if (Length > sizeof(bSubClassName)) Length = sizeof(bSubClassName);
725 strncpy(bSubClassName, SubClassName, Length);
726 bSubClassName[Length] = '\0';
727 }
728 }
729
730 /* Isolate the vendor name */
731 sprintf(LookupString, "\n%04x ", PciData->VendorID);
732 VendorName = strstr(VendorTable, LookupString);
733 if (VendorName)
734 {
735 /* Copy the vendor name into our buffer */
736 VendorName += 7;
737 p = strchr(VendorName, '\r');
738 Length = p - VendorName;
739 if (Length > sizeof(bVendorName)) Length = sizeof(bVendorName);
740 strncpy(bVendorName, VendorName, Length);
741 bVendorName[Length ] = '\0';
742
743 /* Isolate the product name */
744 sprintf(LookupString, "\t%04x", PciData->DeviceID);
745 ProductName = strstr(VendorName, LookupString);
746 if (ProductName)
747 {
748 /* Copy the product name into our buffer */
749 ProductName += 7;
750 p = strchr(ProductName, '\r');
751 Length = p - ProductName;
752 if (Length > sizeof(bProductName)) Length = sizeof(bProductName);
753 strncpy(bProductName, ProductName, Length);
754 bProductName[Length] = '\0';
755
756 /* Isolate the subvendor and subsystem name */
757 sprintf(LookupString,
758 "\t\t%04x %04x ",
759 PciData->u.type0.SubVendorID,
760 PciData->u.type0.SubSystemID);
761 SubVendorName = strstr(ProductName, LookupString);
762 if (SubVendorName)
763 {
764 /* Copy the subvendor name into our buffer */
765 SubVendorName += 13;
766 p = strchr(SubVendorName, '\r');
767 Length = p - SubVendorName;
768 if (Length > sizeof(bSubVendorName)) Length = sizeof(bSubVendorName);
769 strncpy(bSubVendorName, SubVendorName, Length);
770 bSubVendorName[Length] = '\0';
771 }
772 }
773 }
774
775 /* Print out the data */
776 DbgPrint("%02x:%02x.%x %s [%02x%02x]: %s %s [%04x:%04x] (rev %02x)\n"
777 "\tSubsystem: %s [%04x:%04x]\n",
778 i,
779 j,
780 k,
781 bSubClassName,
782 PciData->BaseClass,
783 PciData->SubClass,
784 bVendorName,
785 bProductName,
786 PciData->VendorID,
787 PciData->DeviceID,
788 PciData->RevisionID,
789 bSubVendorName,
790 PciData->u.type0.SubVendorID,
791 PciData->u.type0.SubSystemID);
792
793 /* Print out and decode flags */
794 DbgPrint("\tFlags:");
795 if (PciData->Command & PCI_ENABLE_BUS_MASTER) DbgPrint(" bus master,");
796 if (PciData->Status & PCI_STATUS_66MHZ_CAPABLE) DbgPrint(" 66MHz,");
797 if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x200) DbgPrint(" medium devsel,");
798 if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x400) DbgPrint(" fast devsel,");
799 DbgPrint(" latency %d", PciData->LatencyTimer);
800 if (PciData->u.type0.InterruptPin != 0 &&
801 PciData->u.type0.InterruptLine != 0 &&
802 PciData->u.type0.InterruptLine != 0xFF) DbgPrint(", IRQ %02d", PciData->u.type0.InterruptLine);
803 DbgPrint("\n");
804
805 /* Scan addresses */
806 Size = 0;
807 for (b = 0; b < PCI_TYPE0_ADDRESSES; b++)
808 {
809 /* Check for a BAR */
810 Mem = PciData->u.type0.BaseAddresses[b];
811 if (Mem)
812 {
813 /* Decode the address type */
814 if (Mem & PCI_ADDRESS_IO_SPACE)
815 {
816 /* Decode the size */
817 Size = 1 << 2;
818 while (!(Mem & Size) && (Size)) Size <<= 1;
819
820 /* Print it out */
821 DbgPrint("\tI/O ports at %04lx", Mem & PCI_ADDRESS_IO_ADDRESS_MASK);
822 ShowSize(Size);
823 }
824 else
825 {
826 /* Decode the size */
827 Size = 1 << 8;
828 while (!(Mem & Size) && (Size)) Size <<= 1;
829
830 /* Print it out */
831 DbgPrint("\tMemory at %08lx (%d-bit, %sprefetchable)",
832 Mem & PCI_ADDRESS_MEMORY_ADDRESS_MASK,
833 (Mem & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_32BIT ? 32 : 64,
834 (Mem & PCI_ADDRESS_MEMORY_PREFETCHABLE) ? "" : "non-");
835 ShowSize(Size);
836 }
837 }
838 }
839 }
840 #endif
841
842 VOID
843 NTAPI
844 INIT_FUNCTION
845 HalpInitializePciBus(VOID)
846 {
847 #ifndef _MINIHAL_
848 PPCI_REGISTRY_INFO_INTERNAL PciRegistryInfo;
849 UCHAR PciType;
850 PCI_SLOT_NUMBER PciSlot;
851 ULONG i, j, k;
852 UCHAR DataBuffer[PCI_COMMON_HDR_LENGTH];
853 PPCI_COMMON_CONFIG PciData = (PPCI_COMMON_CONFIG)DataBuffer;
854 PBUS_HANDLER BusHandler;
855 ULONG HackFlags;
856 BOOLEAN ExtendedAddressDecoding = FALSE;
857 NTSTATUS Status;
858
859 /* Query registry information */
860 PciRegistryInfo = HalpQueryPciRegistryInfo();
861 if (!PciRegistryInfo) return;
862
863 /* Initialize the PCI configuration lock */
864 KeInitializeSpinLock(&HalpPCIConfigLock);
865
866 /* Get the type and free the info structure */
867 PciType = PciRegistryInfo->HardwareMechanism & 0xF;
868
869 /* Check if this is a type 2 PCI bus with at least one bus */
870 if ((PciRegistryInfo->NoBuses) && (PciType == 2))
871 {
872 /* Setup the PCI slot */
873 PciSlot.u.bits.Reserved = 0;
874 PciSlot.u.bits.FunctionNumber = 0;
875
876 /* Loop all slots */
877 for (i = 0; i < 32; i++)
878 {
879 /* Try to setup a Type 2 PCI slot */
880 PciType = 2;
881 BusHandler = HalpAllocateAndInitPciBusHandler(2, 0, TRUE);
882 if (!BusHandler) break;
883
884 /* Now check if it's valid */
885 if (HalpIsValidPCIDevice(BusHandler, PciSlot)) break;
886
887 /* Heh, the BIOS lied... try Type 1 */
888 PciType = 1;
889 BusHandler = HalpAllocateAndInitPciBusHandler(1, 0, TRUE);
890 if (!BusHandler) break;
891
892 /* Now check if it's valid */
893 if (HalpIsValidPCIDevice(BusHandler, PciSlot)) break;
894
895 /* Keep trying */
896 PciType = 2;
897 }
898
899 /* Now allocate the correct kind of handler */
900 HalpAllocateAndInitPciBusHandler(PciType, 0, FALSE);
901 }
902
903 /* Okay, now loop all PCI bridges */
904 do
905 {
906 /* Loop all PCI buses */
907 for (i = 0; i < PciRegistryInfo->NoBuses; i++)
908 {
909 /* Check if we have a handler for it */
910 if (!HalHandlerForBus(PCIBus, i))
911 {
912 /* Allocate it */
913 HalpAllocateAndInitPciBusHandler(PciType, i, FALSE);
914 }
915 }
916 /* Go to the next bridge */
917 } while (HalpGetPciBridgeConfig(PciType, &PciRegistryInfo->NoBuses));
918
919 /* Now build correct address range informaiton */
920 HalpFixupPciSupportedRanges(PciRegistryInfo->NoBuses);
921
922 /* Loop every bus */
923 DbgPrint("\n====== PCI BUS HARDWARE DETECTION =======\n\n");
924 PciSlot.u.bits.Reserved = 0;
925 for (i = 0; i < PciRegistryInfo->NoBuses; i++)
926 {
927 /* Get the bus handler */
928 BusHandler = HalHandlerForBus(PCIBus, i);
929
930 /* Loop every device */
931 for (j = 0; j < 32; j++)
932 {
933 /* Loop every function */
934 PciSlot.u.bits.DeviceNumber = j;
935 for (k = 0; k < 8; k++)
936 {
937 /* Build the final slot structure */
938 PciSlot.u.bits.FunctionNumber = k;
939
940 /* Read the configuration information */
941 HalpReadPCIConfig(BusHandler,
942 PciSlot,
943 PciData,
944 0,
945 PCI_COMMON_HDR_LENGTH);
946
947 /* Skip if this is an invalid function */
948 if (PciData->VendorID == PCI_INVALID_VENDORID) continue;
949
950 /* Print out the entry */
951 HalpDebugPciDumpBus(i, j, k, PciData);
952
953 /* Check if this is a Cardbus bridge */
954 if (PCI_CONFIGURATION_TYPE(PciData) == PCI_CARDBUS_BRIDGE_TYPE)
955 {
956 /* Not supported */
957 DbgPrint("\tDevice is a PCI Cardbus Bridge. It will not work!\n");
958 continue;
959 }
960
961 /* Check if this is a PCI device */
962 if (PCI_CONFIGURATION_TYPE(PciData) != PCI_BRIDGE_TYPE)
963 {
964 /* Check if it has an interrupt pin and line registered */
965 if ((PciData->u.type1.InterruptPin) &&
966 (PciData->u.type1.InterruptLine))
967 {
968 /* Check if this interrupt line is connected to the bus */
969 if (PciData->u.type1.InterruptLine < 16)
970 {
971 /* Is this an IDE device? */
972 if (!HalpIsIdeDevice(PciData))
973 {
974 /* We'll mask out this interrupt then */
975 DbgPrint("\tDevice is using IRQ %d! ISA Cards using that IRQ may fail!\n",
976 PciData->u.type1.InterruptLine);
977 HalpPciIrqMask |= (1 << PciData->u.type1.InterruptLine);
978 }
979 }
980 }
981 }
982
983 /* Check for broken Intel chips */
984 if (PciData->VendorID == 0x8086)
985 {
986 /* Check for broken 82830 PCI controller */
987 if ((PciData->DeviceID == 0x04A3) &&
988 (PciData->RevisionID < 0x11))
989 {
990 /* Skip */
991 DbgPrint("\tDevice is a broken Intel 82430 PCI Controller. It will not work!\n\n");
992 continue;
993 }
994
995 /* Check for broken 82378 PCI-to-ISA Bridge */
996 if ((PciData->DeviceID == 0x0484) &&
997 (PciData->RevisionID <= 3))
998 {
999 /* Skip */
1000 DbgPrint("\tDevice is a broken Intel 82378 PCI-to-ISA Bridge. It will not work!\n\n");
1001 continue;
1002 }
1003
1004 /* Check for broken 82450 PCI Bridge */
1005 if ((PciData->DeviceID == 0x84C4) &&
1006 (PciData->RevisionID <= 4))
1007 {
1008 DbgPrint("\tDevice is a Intel Orion 82450 PCI Bridge. It will not work!\n\n");
1009 continue;
1010 }
1011 }
1012
1013 /* Do we know this card? */
1014 if (!ExtendedAddressDecoding)
1015 {
1016 /* Check for it */
1017 if (HalpIsRecognizedCard(PciRegistryInfo,
1018 PciData,
1019 HALP_CARD_FEATURE_FULL_DECODE))
1020 {
1021 /* We'll do chipset checks later */
1022 DbgPrint("\tDevice has Extended Address Decoding. It may fail to work on older BIOSes!\n");
1023 ExtendedAddressDecoding = TRUE;
1024 }
1025 }
1026
1027 /* Check if this is a USB controller */
1028 if ((PciData->BaseClass == PCI_CLASS_SERIAL_BUS_CTLR) &&
1029 (PciData->SubClass == PCI_SUBCLASS_SB_USB))
1030 {
1031 /* Check if this is an OHCI controller */
1032 if (PciData->ProgIf == 0x10)
1033 {
1034 DbgPrint("\tDevice is an OHCI (USB) PCI Expansion Card. Turn off Legacy USB in your BIOS!\n\n");
1035 continue;
1036 }
1037
1038 /* Check for Intel UHCI controller */
1039 if (PciData->VendorID == 0x8086)
1040 {
1041 DbgPrint("\tDevice is an Intel UHCI (USB) Controller. Turn off Legacy USB in your BIOS!\n\n");
1042 continue;
1043 }
1044
1045 /* Check for VIA UHCI controller */
1046 if (PciData->VendorID == 0x1106)
1047 {
1048 DbgPrint("\tDevice is a VIA UHCI (USB) Controller. Turn off Legacy USB in your BIOS!\n\n");
1049 continue;
1050 }
1051 }
1052
1053 /* Now check the registry for chipset hacks */
1054 Status = HalpGetChipHacks(PciData->VendorID,
1055 PciData->DeviceID,
1056 PciData->RevisionID,
1057 &HackFlags);
1058 if (NT_SUCCESS(Status))
1059 {
1060 /* Check for broken ACPI routing */
1061 if (HackFlags & HAL_PCI_CHIP_HACK_DISABLE_ACPI_IRQ_ROUTING)
1062 {
1063 DbgPrint("This chipset has broken ACPI IRQ Routing! Be aware!\n\n");
1064 continue;
1065 }
1066
1067 /* Check for broken ACPI timer */
1068 if (HackFlags & HAL_PCI_CHIP_HACK_BROKEN_ACPI_TIMER)
1069 {
1070 DbgPrint("This chipset has a broken ACPI timer! Be aware!\n\n");
1071 continue;
1072 }
1073
1074 /* Check for hibernate-disable */
1075 if (HackFlags & HAL_PCI_CHIP_HACK_DISABLE_HIBERNATE)
1076 {
1077 DbgPrint("This chipset has a broken PCI device which is incompatible with hibernation. Be aware!\n\n");
1078 continue;
1079 }
1080
1081 /* Check for USB controllers that generate SMIs */
1082 if (HackFlags & HAL_PCI_CHIP_HACK_USB_SMI_DISABLE)
1083 {
1084 DbgPrint("This chipset has a USB controller which generates SMIs. ReactOS will likely fail to boot!\n\n");
1085 continue;
1086 }
1087 }
1088
1089 /* Terminate the entry */
1090 DbgPrint("\n");
1091 }
1092 }
1093 }
1094
1095 /* Initialize NMI Crash Flag */
1096 HalpGetNMICrashFlag();
1097
1098 /* Free the registry data */
1099 ExFreePool(PciRegistryInfo);
1100
1101 /* Tell PnP if this hard supports correct decoding */
1102 HalpMarkChipsetDecode(ExtendedAddressDecoding);
1103 DbgPrint("====== PCI BUS DETECTION COMPLETE =======\n\n");
1104 #endif
1105 }
1106
1107 VOID
1108 NTAPI
1109 INIT_FUNCTION
1110 HalpInitBusHandlers(VOID)
1111 {
1112 /* Register the HAL Bus Handler support */
1113 HalpRegisterInternalBusHandlers();
1114 }
1115
1116 VOID
1117 NTAPI
1118 INIT_FUNCTION
1119 HalpRegisterKdSupportFunctions(VOID)
1120 {
1121 /* Register PCI Device Functions */
1122 KdSetupPciDeviceForDebugging = HalpSetupPciDeviceForDebugging;
1123 KdReleasePciDeviceforDebugging = HalpReleasePciDeviceForDebugging;
1124
1125 /* Register memory functions */
1126 #ifndef _MINIHAL_
1127 KdMapPhysicalMemory64 = HalpMapPhysicalMemory64;
1128 KdUnmapVirtualAddress = HalpUnmapVirtualAddress;
1129 #endif
1130
1131 /* Register ACPI stub */
1132 KdCheckPowerButton = HalpCheckPowerButton;
1133 }
1134
1135 NTSTATUS
1136 NTAPI
1137 HalpAssignSlotResources(IN PUNICODE_STRING RegistryPath,
1138 IN PUNICODE_STRING DriverClassName,
1139 IN PDRIVER_OBJECT DriverObject,
1140 IN PDEVICE_OBJECT DeviceObject,
1141 IN INTERFACE_TYPE BusType,
1142 IN ULONG BusNumber,
1143 IN ULONG SlotNumber,
1144 IN OUT PCM_RESOURCE_LIST *AllocatedResources)
1145 {
1146 PBUS_HANDLER Handler;
1147 NTSTATUS Status;
1148 PAGED_CODE();
1149 DPRINT1("Slot assignment for %d on bus %d\n", BusType, BusNumber);
1150
1151 /* Find the handler */
1152 Handler = HalReferenceHandlerForBus(BusType, BusNumber);
1153 if (!Handler) return STATUS_NOT_FOUND;
1154
1155 /* Do the assignment */
1156 Status = Handler->AssignSlotResources(Handler,
1157 Handler,
1158 RegistryPath,
1159 DriverClassName,
1160 DriverObject,
1161 DeviceObject,
1162 SlotNumber,
1163 AllocatedResources);
1164
1165 /* Dereference the handler and return */
1166 HalDereferenceBusHandler(Handler);
1167 return Status;
1168 }
1169
1170 BOOLEAN
1171 NTAPI
1172 HaliFindBusAddressTranslation(IN PHYSICAL_ADDRESS BusAddress,
1173 IN OUT PULONG AddressSpace,
1174 OUT PPHYSICAL_ADDRESS TranslatedAddress,
1175 IN OUT PULONG_PTR Context,
1176 IN BOOLEAN NextBus)
1177 {
1178 PHAL_BUS_HANDLER BusHandler;
1179 PBUS_HANDLER Handler;
1180 PLIST_ENTRY NextEntry;
1181 ULONG ContextValue;
1182
1183 /* Make sure we have a context */
1184 if (!Context) return FALSE;
1185 ASSERT((*Context) || (NextBus == TRUE));
1186
1187 /* Read the context */
1188 ContextValue = *Context;
1189
1190 /* Find the bus handler */
1191 Handler = HalpContextToBusHandler(ContextValue);
1192 if (!Handler) return FALSE;
1193
1194 /* Check if this is an ongoing lookup */
1195 if (NextBus)
1196 {
1197 /* Get the HAL bus handler */
1198 BusHandler = CONTAINING_RECORD(Handler, HAL_BUS_HANDLER, Handler);
1199 NextEntry = &BusHandler->AllHandlers;
1200
1201 /* Get the next one if we were already with one */
1202 if (ContextValue) NextEntry = NextEntry->Flink;
1203
1204 /* Start scanning */
1205 while (TRUE)
1206 {
1207 /* Check if this is the last one */
1208 if (NextEntry == &HalpAllBusHandlers)
1209 {
1210 /* Quit */
1211 *Context = 1;
1212 return FALSE;
1213 }
1214
1215 /* Call this translator */
1216 BusHandler = CONTAINING_RECORD(NextEntry, HAL_BUS_HANDLER, AllHandlers);
1217 if (HalTranslateBusAddress(BusHandler->Handler.InterfaceType,
1218 BusHandler->Handler.BusNumber,
1219 BusAddress,
1220 AddressSpace,
1221 TranslatedAddress)) break;
1222
1223 /* Try the next one */
1224 NextEntry = NextEntry->Flink;
1225 }
1226
1227 /* If we made it, we're done */
1228 *Context = (ULONG_PTR)Handler;
1229 return TRUE;
1230 }
1231
1232 /* Try the first one through */
1233 if (!HalTranslateBusAddress(Handler->InterfaceType,
1234 Handler->BusNumber,
1235 BusAddress,
1236 AddressSpace,
1237 TranslatedAddress)) return FALSE;
1238
1239 /* Remember for next time */
1240 *Context = (ULONG_PTR)Handler;
1241 return TRUE;
1242 }
1243
1244 BOOLEAN
1245 NTAPI
1246 HaliTranslateBusAddress(IN INTERFACE_TYPE InterfaceType,
1247 IN ULONG BusNumber,
1248 IN PHYSICAL_ADDRESS BusAddress,
1249 IN OUT PULONG AddressSpace,
1250 OUT PPHYSICAL_ADDRESS TranslatedAddress)
1251 {
1252 PBUS_HANDLER Handler;
1253 BOOLEAN Status;
1254
1255 /* Find the handler */
1256 Handler = HalReferenceHandlerForBus(InterfaceType, BusNumber);
1257 if (!(Handler) || !(Handler->TranslateBusAddress))
1258 {
1259 DPRINT1("No translator!\n");
1260 return FALSE;
1261 }
1262
1263 /* Do the assignment */
1264 Status = Handler->TranslateBusAddress(Handler,
1265 Handler,
1266 BusAddress,
1267 AddressSpace,
1268 TranslatedAddress);
1269
1270 /* Dereference the handler and return */
1271 HalDereferenceBusHandler(Handler);
1272 return Status;
1273 }
1274
1275 /* PUBLIC FUNCTIONS **********************************************************/
1276
1277 /*
1278 * @implemented
1279 */
1280 NTSTATUS
1281 NTAPI
1282 HalAdjustResourceList(IN PIO_RESOURCE_REQUIREMENTS_LIST *ResourceList)
1283 {
1284 PBUS_HANDLER Handler;
1285 ULONG Status;
1286 PAGED_CODE();
1287
1288 /* Find the handler */
1289 Handler = HalReferenceHandlerForBus((*ResourceList)->InterfaceType,
1290 (*ResourceList)->BusNumber);
1291 if (!Handler) return STATUS_SUCCESS;
1292
1293 /* Do the assignment */
1294 Status = Handler->AdjustResourceList(Handler,
1295 Handler,
1296 ResourceList);
1297
1298 /* Dereference the handler and return */
1299 HalDereferenceBusHandler(Handler);
1300 return Status;
1301 }
1302
1303 /*
1304 * @implemented
1305 */
1306 NTSTATUS
1307 NTAPI
1308 HalAssignSlotResources(IN PUNICODE_STRING RegistryPath,
1309 IN PUNICODE_STRING DriverClassName,
1310 IN PDRIVER_OBJECT DriverObject,
1311 IN PDEVICE_OBJECT DeviceObject,
1312 IN INTERFACE_TYPE BusType,
1313 IN ULONG BusNumber,
1314 IN ULONG SlotNumber,
1315 IN OUT PCM_RESOURCE_LIST *AllocatedResources)
1316 {
1317 PAGED_CODE();
1318
1319 /* Check the bus type */
1320 if (BusType != PCIBus)
1321 {
1322 /* Call our internal handler */
1323 return HalpAssignSlotResources(RegistryPath,
1324 DriverClassName,
1325 DriverObject,
1326 DeviceObject,
1327 BusType,
1328 BusNumber,
1329 SlotNumber,
1330 AllocatedResources);
1331 }
1332 else
1333 {
1334 /* Call the PCI registered function */
1335 return HalPciAssignSlotResources(RegistryPath,
1336 DriverClassName,
1337 DriverObject,
1338 DeviceObject,
1339 PCIBus,
1340 BusNumber,
1341 SlotNumber,
1342 AllocatedResources);
1343 }
1344 }
1345
1346 /*
1347 * @implemented
1348 */
1349 ULONG
1350 NTAPI
1351 HalGetBusData(IN BUS_DATA_TYPE BusDataType,
1352 IN ULONG BusNumber,
1353 IN ULONG SlotNumber,
1354 IN PVOID Buffer,
1355 IN ULONG Length)
1356 {
1357 /* Call the extended function */
1358 return HalGetBusDataByOffset(BusDataType,
1359 BusNumber,
1360 SlotNumber,
1361 Buffer,
1362 0,
1363 Length);
1364 }
1365
1366 /*
1367 * @implemented
1368 */
1369 ULONG
1370 NTAPI
1371 HalGetBusDataByOffset(IN BUS_DATA_TYPE BusDataType,
1372 IN ULONG BusNumber,
1373 IN ULONG SlotNumber,
1374 IN PVOID Buffer,
1375 IN ULONG Offset,
1376 IN ULONG Length)
1377 {
1378 PBUS_HANDLER Handler;
1379 ULONG Status;
1380
1381 /* Find the handler */
1382 Handler = HaliReferenceHandlerForConfigSpace(BusDataType, BusNumber);
1383 if (!Handler) return 0;
1384
1385 /* Do the assignment */
1386 Status = Handler->GetBusData(Handler,
1387 Handler,
1388 SlotNumber,
1389 Buffer,
1390 Offset,
1391 Length);
1392
1393 /* Dereference the handler and return */
1394 HalDereferenceBusHandler(Handler);
1395 return Status;
1396 }
1397
1398 /*
1399 * @implemented
1400 */
1401 ULONG
1402 NTAPI
1403 HalGetInterruptVector(IN INTERFACE_TYPE InterfaceType,
1404 IN ULONG BusNumber,
1405 IN ULONG BusInterruptLevel,
1406 IN ULONG BusInterruptVector,
1407 OUT PKIRQL Irql,
1408 OUT PKAFFINITY Affinity)
1409 {
1410 PBUS_HANDLER Handler;
1411 ULONG Vector;
1412 PAGED_CODE();
1413
1414 /* Defaults */
1415 *Irql = 0;
1416 *Affinity = 0;
1417
1418 /* Find the handler */
1419 Handler = HalReferenceHandlerForBus(InterfaceType, BusNumber);
1420 if (!Handler) return 0;
1421
1422 /* Do the assignment */
1423 Vector = Handler->GetInterruptVector(Handler,
1424 Handler,
1425 BusInterruptLevel,
1426 BusInterruptVector,
1427 Irql,
1428 Affinity);
1429 if ((Vector != IRQ2VECTOR(BusInterruptLevel)) ||
1430 (*Irql != VECTOR2IRQL(IRQ2VECTOR(BusInterruptLevel))))
1431 {
1432 DPRINT1("Returning IRQL %lx, Vector %lx for Level/Vector: %lx/%lx\n",
1433 *Irql, Vector, BusInterruptLevel, BusInterruptVector);
1434 DPRINT1("Old HAL would've returned IRQL %lx and Vector %lx\n",
1435 VECTOR2IRQL(IRQ2VECTOR(BusInterruptLevel)),
1436 IRQ2VECTOR(BusInterruptLevel));
1437 }
1438
1439 /* Dereference the handler and return */
1440 HalDereferenceBusHandler(Handler);
1441 return Vector;
1442 }
1443
1444 /*
1445 * @implemented
1446 */
1447 ULONG
1448 NTAPI
1449 HalSetBusData(IN BUS_DATA_TYPE BusDataType,
1450 IN ULONG BusNumber,
1451 IN ULONG SlotNumber,
1452 IN PVOID Buffer,
1453 IN ULONG Length)
1454 {
1455 /* Call the extended function */
1456 return HalSetBusDataByOffset(BusDataType,
1457 BusNumber,
1458 SlotNumber,
1459 Buffer,
1460 0,
1461 Length);
1462 }
1463
1464 /*
1465 * @implemented
1466 */
1467 ULONG
1468 NTAPI
1469 HalSetBusDataByOffset(IN BUS_DATA_TYPE BusDataType,
1470 IN ULONG BusNumber,
1471 IN ULONG SlotNumber,
1472 IN PVOID Buffer,
1473 IN ULONG Offset,
1474 IN ULONG Length)
1475 {
1476 PBUS_HANDLER Handler;
1477 ULONG Status;
1478
1479 /* Find the handler */
1480 Handler = HaliReferenceHandlerForConfigSpace(BusDataType, BusNumber);
1481 if (!Handler) return 0;
1482
1483 /* Do the assignment */
1484 Status = Handler->SetBusData(Handler,
1485 Handler,
1486 SlotNumber,
1487 Buffer,
1488 Offset,
1489 Length);
1490
1491 /* Dereference the handler and return */
1492 HalDereferenceBusHandler(Handler);
1493 return Status;
1494 }
1495
1496 /*
1497 * @implemented
1498 */
1499 BOOLEAN
1500 NTAPI
1501 HalTranslateBusAddress(IN INTERFACE_TYPE InterfaceType,
1502 IN ULONG BusNumber,
1503 IN PHYSICAL_ADDRESS BusAddress,
1504 IN OUT PULONG AddressSpace,
1505 OUT PPHYSICAL_ADDRESS TranslatedAddress)
1506 {
1507 /* Look as the bus type */
1508 if (InterfaceType == PCIBus)
1509 {
1510 /* Call the PCI registered function */
1511 return HalPciTranslateBusAddress(PCIBus,
1512 BusNumber,
1513 BusAddress,
1514 AddressSpace,
1515 TranslatedAddress);
1516 }
1517 else
1518 {
1519 /* Call the bus handler */
1520 return HaliTranslateBusAddress(InterfaceType,
1521 BusNumber,
1522 BusAddress,
1523 AddressSpace,
1524 TranslatedAddress);
1525 }
1526 }
1527
1528 /* EOF */