include/ddk/ide.h

   1 /*
   2  * ide.h
   3  *
   4  * IDE driver interface
   5  *
   6  * This file is part of the w32api package.
   7  *
   8  * Contributors:
   9  *   Created by Hervé Poussineau <hpoussin@reactos.org>
  10  *
  11  * THIS SOFTWARE IS NOT COPYRIGHTED
  12  *
  13  * This source code is offered for use in the public domain. You may
  14  * use, modify or distribute it freely.
  15  *
  16  * This code is distributed in the hope that it will be useful but
  17  * WITHOUT ANY WARRANTY. ALL WARRANTIES, EXPRESS OR IMPLIED ARE HEREBY
  18  * DISCLAIMED. This includes but is not limited to warranties of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  20  *
  21  */
  22
  23 #ifndef __IDE_H
  24 #define __IDE_H
  25
  26 /* Helper macro to enable gcc's extension.  */
  27 #ifndef __GNU_EXTENSION
  28 #ifdef __GNUC__
  29 #define __GNU_EXTENSION __extension__
  30 #else
  31 #define __GNU_EXTENSION
  32 #endif
  33 #endif
  34
  35 #ifdef __cplusplus
  36 extern "C" {
  37 #endif
  38
  39 #define MAX_IDE_CHANNEL   2
  40 #define MAX_IDE_LINE      2
  41 #define MAX_IDE_DEVICE    2
  42
  43 #include <pshpack1.h>
  44 typedef struct _IDENTIFY_DATA {
  45   USHORT GeneralConfiguration;       /* 00 */
  46   USHORT NumCylinders;               /* 02 */
  47   USHORT Reserved1;                  /* 04 */
  48   USHORT NumHeads;                   /* 06 */
  49   USHORT UnformattedBytesPerTrack;   /* 08 */
  50   USHORT UnformattedBytesPerSector;  /* 10 */
  51   USHORT NumSectorsPerTrack;         /* 12 */
  52   USHORT VendorUnique1[3];           /* 14 */
  53   UCHAR  SerialNumber[20];           /* 20 */
  54   USHORT BufferType;                 /* 40 */
  55   USHORT BufferSectorSize;           /* 42 */
  56   USHORT NumberOfEccBytes;           /* 44 */
  57   UCHAR  FirmwareRevision[8];        /* 46 */
  58   UCHAR  ModelNumber[40];            /* 54 */
  59   UCHAR  MaximumBlockTransfer;       /* 94 */
  60   UCHAR  VendorUnique2;              /* 95 */
  61   USHORT DoubleWordIo;               /* 96 */
  62   USHORT Capabilities;               /* 98 */
  63   USHORT Reserved2;                  /* 100 */
  64   UCHAR  VendorUnique3;              /* 102 */
  65   UCHAR  PioCycleTimingMode;         /* 103 */
  66   UCHAR  VendorUnique4;              /* 104 */
  67   UCHAR  DmaCycleTimingMode;         /* 105 */
  68   USHORT TranslationFieldsValid:3;   /* 106 */
  69   USHORT Reserved3:13;               /*  -  */
  70   USHORT NumberOfCurrentCylinders;   /* 108 */
  71   USHORT NumberOfCurrentHeads;       /* 110 */
  72   USHORT CurrentSectorsPerTrack;     /* 112 */
  73   ULONG  CurrentSectorCapacity;      /* 114 */
  74   USHORT CurrentMultiSectorSetting;  /* 118 */
  75   ULONG  UserAddressableSectors;     /* 120 */
  76   USHORT SingleWordDMASupport:8;     /* 124 */
  77   USHORT SingleWordDMAActive:8;      /*  -  */
  78   USHORT MultiWordDMASupport:8;      /* 126 */
  79   USHORT MultiWordDMAActive:8;       /*  -  */
  80   USHORT AdvancedPIOModes:8;         /* 128 */
  81   USHORT Reserved4:8;                /*  -  */
  82   USHORT MinimumMWXferCycleTime;     /* 130 */
  83   USHORT RecommendedMWXferCycleTime; /* 132 */
  84   USHORT MinimumPIOCycleTime;        /* 134 */
  85   USHORT MinimumPIOCycleTimeIORDY;   /* 136 */
  86   USHORT Reserved5[11];              /* 138 */
  87   USHORT MajorRevision;              /* 160 */
  88   USHORT MinorRevision;              /* 162 */
  89   USHORT Reserved6;                  /* 164 */
  90   USHORT CommandSetSupport;          /* 166 */
  91   USHORT Reserved6a[2];              /* 168 */
  92   USHORT CommandSetActive;           /* 172 */
  93   USHORT Reserved6b;                 /* 174 */
  94   USHORT UltraDMASupport:8;          /* 176 */
  95   USHORT UltraDMAActive:8;           /*  -  */
  96   USHORT Reserved7[11];              /* 178 */
  97   ULONG  Max48BitLBA[2];             /* 200 */
  98   USHORT Reserved7a[22];             /* 208 */
  99   USHORT LastLun:3;                  /* 252 */
 100   USHORT Reserved8:13;               /*  -  */
 101   USHORT MediaStatusNotification:2;  /* 254 */
 102   USHORT Reserved9:6;                /*  -  */
 103   USHORT DeviceWriteProtect:1;       /*  -  */
 104   USHORT Reserved10:7;               /*  -  */
 105   USHORT Reserved11[128];            /* 256 */
 106 } IDENTIFY_DATA, *PIDENTIFY_DATA;
 107
 108 typedef struct _EXTENDED_IDENTIFY_DATA {
 109   USHORT GeneralConfiguration;       /* 00 */
 110   USHORT NumCylinders;               /* 02 */
 111   USHORT Reserved1;                  /* 04 */
 112   USHORT NumHeads;                   /* 06 */
 113   USHORT UnformattedBytesPerTrack;   /* 08 */
 114   USHORT UnformattedBytesPerSector;  /* 10 */
 115   USHORT NumSectorsPerTrack;         /* 12 */
 116   __GNU_EXTENSION union
 117   {
 118     USHORT VendorUnique1[3];         /* 14 */
 119     struct
 120     {
 121       UCHAR InterSectorGap;          /* 14 */
 122       UCHAR InterSectorGapSize;      /* -  */
 123       UCHAR Reserved16;              /* 16 */
 124       UCHAR BytesInPLO;              /* -  */
 125       USHORT VendorUniqueCnt;        /* 18 */
 126     } u;
 127   };
 128   UCHAR  SerialNumber[20];           /* 20 */
 129   USHORT BufferType;                 /* 40 */
 130   USHORT BufferSectorSize;           /* 42 */
 131   USHORT NumberOfEccBytes;           /* 44 */
 132   UCHAR  FirmwareRevision[8];        /* 46 */
 133   UCHAR  ModelNumber[40];            /* 54 */
 134   UCHAR  MaximumBlockTransfer;       /* 94 */
 135   UCHAR  VendorUnique2;              /* 95 */
 136   USHORT DoubleWordIo;               /* 96 */
 137   USHORT Capabilities;               /* 98 */
 138   USHORT Reserved2;                  /* 100 */
 139   UCHAR  VendorUnique3;              /* 102 */
 140   UCHAR  PioCycleTimingMode;         /* 103 */
 141   UCHAR  VendorUnique4;              /* 104 */
 142   UCHAR  DmaCycleTimingMode;         /* 105 */
 143   USHORT TranslationFieldsValid:3;   /* 106 */
 144   USHORT Reserved3:13;               /*  -  */
 145   USHORT NumberOfCurrentCylinders;   /* 108 */
 146   USHORT NumberOfCurrentHeads;       /* 110 */
 147   USHORT CurrentSectorsPerTrack;     /* 112 */
 148   ULONG  CurrentSectorCapacity;      /* 114 */
 149   USHORT CurrentMultiSectorSetting;  /* 118 */
 150   ULONG  UserAddressableSectors;     /* 120 */
 151   USHORT SingleWordDMASupport:8;     /* 124 */
 152   USHORT SingleWordDMAActive:8;      /*  -  */
 153   USHORT MultiWordDMASupport:8;      /* 126 */
 154   USHORT MultiWordDMAActive:8;       /*  -  */
 155   USHORT AdvancedPIOModes:8;         /* 128 */
 156   USHORT Reserved4:8;                /*  -  */
 157   USHORT MinimumMWXferCycleTime;     /* 130 */
 158   USHORT RecommendedMWXferCycleTime; /* 132 */
 159   USHORT MinimumPIOCycleTime;        /* 134 */
 160   USHORT MinimumPIOCycleTimeIORDY;   /* 136 */
 161   USHORT Reserved5[11];              /* 138 */
 162   USHORT MajorRevision;              /* 160 */
 163   USHORT MinorRevision;              /* 162 */
 164   USHORT Reserved6;                  /* 164 */
 165   USHORT CommandSetSupport;          /* 166 */
 166   USHORT Reserved6a[2];              /* 168 */
 167   USHORT CommandSetActive;           /* 172 */
 168   USHORT Reserved6b;                 /* 174 */
 169   USHORT UltraDMASupport:8;          /* 176 */
 170   USHORT UltraDMAActive:8;           /*  -  */
 171   USHORT Reserved7[11];              /* 178 */
 172   ULONG  Max48BitLBA[2];             /* 200 */
 173   USHORT Reserved7a[22];             /* 208 */
 174   USHORT LastLun:3;                  /* 252 */
 175   USHORT Reserved8:13;               /*  -  */
 176   USHORT MediaStatusNotification:2;  /* 254 */
 177   USHORT Reserved9:6;                /*  -  */
 178   USHORT DeviceWriteProtect:1;       /*  -  */
 179   USHORT Reserved10:7;               /*  -  */
 180   USHORT Reserved11[128];            /* 256 */
 181 } EXTENDED_IDENTIFY_DATA, *PEXTENDED_IDENTIFY_DATA;
 182 #include <poppack.h>
 183
 184 typedef struct _PCIIDE_TRANSFER_MODE_SELECT
 185 {
 186   ULONG Channel;
 187   BOOLEAN DevicePresent[MAX_IDE_DEVICE * MAX_IDE_LINE];
 188   BOOLEAN FixedDisk[MAX_IDE_DEVICE * MAX_IDE_LINE];
 189   BOOLEAN IoReadySupported[MAX_IDE_DEVICE * MAX_IDE_LINE];
 190   ULONG DeviceTransferModeSupported[MAX_IDE_DEVICE * MAX_IDE_LINE];
 191   ULONG BestPioCycleTime[MAX_IDE_DEVICE * MAX_IDE_LINE];
 192   ULONG BestSwDmaCycleTime[MAX_IDE_DEVICE * MAX_IDE_LINE];
 193   ULONG BestMwDmaCycleTime[MAX_IDE_DEVICE * MAX_IDE_LINE];
 194   ULONG BestUDmaCycleTime[MAX_IDE_DEVICE * MAX_IDE_LINE];
 195   ULONG DeviceTransferModeCurrent[MAX_IDE_DEVICE * MAX_IDE_LINE];
 196   ULONG UserChoiceTransferMode[MAX_IDE_DEVICE * MAX_IDE_LINE];
 197   ULONG EnableUDMA66;
 198   IDENTIFY_DATA IdentifyData[MAX_IDE_DEVICE];
 199   ULONG DeviceTransferModeSelected[MAX_IDE_DEVICE * MAX_IDE_LINE];
 200   PULONG TransferModeTimingTable;
 201   ULONG TransferModeTableLength;
 202 } PCIIDE_TRANSFER_MODE_SELECT, *PPCIIDE_TRANSFER_MODE_SELECT;
 203
 204 typedef enum
 205 {
 206   ChannelDisabled = 0,
 207   ChannelEnabled,
 208   ChannelStateUnknown
 209 } IDE_CHANNEL_STATE;
 210
 211 typedef IDE_CHANNEL_STATE
 212 (NTAPI *PCIIDE_CHANNEL_ENABLED)(
 213   IN PVOID DeviceExtension,
 214   IN ULONG Channel);
 215
 216 typedef BOOLEAN
 217 (NTAPI *PCIIDE_SYNC_ACCESS_REQUIRED)(
 218   IN PVOID DeviceExtension);
 219
 220 typedef NTSTATUS
 221 (NTAPI *PCIIDE_TRANSFER_MODE_SELECT_FUNC)(
 222   IN PVOID DeviceExtension,
 223   IN OUT PPCIIDE_TRANSFER_MODE_SELECT XferMode);
 224
 225 typedef ULONG
 226 (NTAPI *PCIIDE_USEDMA_FUNC)(
 227   IN PVOID DeviceExtension,
 228   IN PUCHAR CdbCommand,
 229   IN PUCHAR Slave);
 230
 231 typedef NTSTATUS
 232 (NTAPI *PCIIDE_UDMA_MODES_SUPPORTED)(
 233   IN IDENTIFY_DATA IdentifyData,
 234   OUT PULONG BestXferMode,
 235   OUT PULONG CurrentXferMode);
 236
 237 typedef struct _IDE_CONTROLLER_PROPERTIES
 238 {
 239   ULONG Size;
 240   ULONG ExtensionSize;
 241   ULONG SupportedTransferMode[MAX_IDE_CHANNEL][MAX_IDE_DEVICE];
 242   PCIIDE_CHANNEL_ENABLED PciIdeChannelEnabled;
 243   PCIIDE_SYNC_ACCESS_REQUIRED PciIdeSyncAccessRequired;
 244   PCIIDE_TRANSFER_MODE_SELECT_FUNC PciIdeTransferModeSelect;
 245   BOOLEAN IgnoreActiveBitForAtaDevice;
 246   BOOLEAN AlwaysClearBusMasterInterrupt;
 247   PCIIDE_USEDMA_FUNC PciIdeUseDma;
 248   ULONG AlignmentRequirement;
 249   ULONG DefaultPIO;
 250   PCIIDE_UDMA_MODES_SUPPORTED PciIdeUdmaModesSupported;
 251 } IDE_CONTROLLER_PROPERTIES, *PIDE_CONTROLLER_PROPERTIES;
 252
 253 typedef NTSTATUS
 254 (NTAPI *PCONTROLLER_PROPERTIES)(
 255   IN PVOID DeviceExtension,
 256   IN PIDE_CONTROLLER_PROPERTIES ControllerProperties);
 257
 258 NTSTATUS NTAPI
 259 PciIdeXInitialize(
 260   IN PDRIVER_OBJECT DriverObject,
 261   IN PUNICODE_STRING RegistryPath,
 262   IN PCONTROLLER_PROPERTIES HwGetControllerProperties,
 263   IN ULONG ExtensionSize);
 264
 265 NTSTATUS NTAPI
 266 PciIdeXGetBusData(
 267   IN PVOID DeviceExtension,
 268   IN PVOID Buffer,
 269   IN ULONG ConfigDataOffset,
 270   IN ULONG BufferLength);
 271
 272 NTSTATUS NTAPI
 273 PciIdeXSetBusData(
 274   IN PVOID DeviceExtension,
 275   IN PVOID Buffer,
 276   IN PVOID DataMask,
 277   IN ULONG ConfigDataOffset,
 278   IN ULONG BufferLength);
 279
 280 /* Bit field values for
 281  * PCIIDE_TRANSFER_MODE_SELECT.DeviceTransferModeSupported and
 282  * IDE_CONTROLLER_PROPERTIES.SupportedTransferMode
 283  */
 284 // PIO Modes
 285 #define PIO_MODE0   (1 << 0)
 286 #define PIO_MODE1   (1 << 1)
 287 #define PIO_MODE2   (1 << 2)
 288 #define PIO_MODE3   (1 << 3)
 289 #define PIO_MODE4   (1 << 4)
 290 // Single-word DMA Modes
 291 #define SWDMA_MODE0 (1 << 5)
 292 #define SWDMA_MODE1 (1 << 6)
 293 #define SWDMA_MODE2 (1 << 7)
 294 // Multi-word DMA Modes
 295 #define MWDMA_MODE0 (1 << 8)
 296 #define MWDMA_MODE1 (1 << 9)
 297 #define MWDMA_MODE2 (1 << 10)
 298 // Ultra DMA Modes
 299 #define UDMA_MODE0  (1 << 11)
 300 #define UDMA_MODE1  (1 << 12)
 301 #define UDMA_MODE2  (1 << 13)
 302 #define UDMA_MODE3  (1 << 14)
 303 #define UDMA_MODE4  (1 << 15)
 304 #define UDMA_MODE5  (1 << 16)
 305
 306 #ifdef __cplusplus
 307 }
 308 #endif
 309
 310 #endif /* __IDE_H */