Amine lost his bet, part 2 of x
[reactos.git] / include / reactos / drivers / pci / pci.h
1 /*
2 * PROJECT: ReactOS PCI Bus Driver
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: include/reactos/drivers/pci/pci.h
5 * PURPOSE: Internal, Shared, PCI Definitions
6 * PROGRAMMERS: ReactOS Portable Systems Group
7 */
8
9 //
10 // PCI Hack Flags
11 //
12 #define PCI_HACK_LOCK_RESOURCES 0x0000000000000004LL
13 #define PCI_HACK_NO_ENUM_AT_ALL 0x0000000000000008LL
14 #define PCI_HACK_ENUM_NO_RESOURCE 0x0000000000000010LL
15 #define PCI_HACK_AVOID_D1D2_FOR_SLD 0x0000000000000020LL
16 #define PCI_HACK_NEVER_DISCONNECT 0x0000000000000040LL
17 #define PCI_HACK_DONT_DISABLE 0x0000000000000080LL
18 #define PCI_HACK_MULTIFUNCTION 0x0000000000000100LL
19 #define PCI_HACK_UNUSED_200 0x0000000000000200LL
20 #define PCI_HACK_IGNORE_NON_STICKY_ISA 0x0000000000000400LL
21 #define PCI_HACK_UNUSED_800 0x0000000000000800LL
22 #define PCI_HACK_DOUBLE_DECKER 0x0000000000001000LL
23 #define PCI_HACK_ONE_CHILD 0x0000000000002000LL
24 #define PCI_HACK_PRESERVE_COMMAND 0x0000000000004000LL
25 #define PCI_HACK_DEFAULT_CARDBUS_WINDOWS 0x0000000000008000LL
26 #define PCI_HACK_CB_SHARE_CMD_BITS 0x0000000000010000LL
27 #define PCI_HACK_IGNORE_ROOT_TOPOLOGY 0x0000000000020000LL
28 #define PCI_HACK_SUBTRACTIVE_DECODE 0x0000000000040000LL
29 #define PCI_HACK_NO_EXPRESS_CAP 0x0000000000080000LL
30 #define PCI_HACK_NO_ASPM_FOR_EXPRESS_LINK 0x0000000000100000LL
31 #define PCI_HACK_CLEAR_INT_DISABLE_FOR_MSI 0x0000000000200000LL
32 #define PCI_HACK_NO_SUBSYSTEM 0x0000000000400000LL
33 #define PCI_HACK_COMMAND_REWRITE 0x0000000000800000LL
34 #define PCI_HACK_AVOID_HARDWARE_ISA_BIT 0x0000000001000000LL
35 #define PCI_HACK_FORCE_BRIDGE_WINDOW_ALIGNMENT 0x0000000002000000LL
36 #define PCI_HACK_NOT_MSI_HT_CONVERTER 0x0000000004000000LL
37 #define PCI_HACK_PCI_HACK_SBR_ON_LINK_STATE_CHANGE 0x0000000008000000LL
38 #define PCI_HACK_PCI_HACK_LINK_DISABLE_ON_SLOT_PWRDN 0x0000000010000000LL
39 #define PCI_HACK_NO_PM_CAPS 0x0000000020000000LL
40 #define PCI_HACK_DONT_DISABLE_DECODES 0x0000000040000000LL
41 #define PCI_HACK_NO_SUBSYSTEM_AFTER_D3 0x0000000080000000LL
42 #define PCI_HACK_VIDEO_LEGACY_DECODE 0x0000000100000000LL
43 #define PCI_HACK_FAKE_CLASS_CODE 0x0000000200000000LL
44 #define PCI_HACK_UNUSED_40000000 0x0000000400000000LL
45 #define PCI_HACK_UNUSED_80000000 0x0000000800000000LL
46 #define PCI_HACK_FAIL_QUERY_REMOVE 0x0000001000000000LL
47 #define PCI_HACK_CRITICAL_DEVICE 0x0000002000000000LL
48 #define PCI_HACK_UNUSED_4000000000 0x0000004000000000LL
49 #define PCI_HACK_BROKEN_SUBTRACTIVE_DECODE 0x0000008000000000LL
50 #define PCI_HACK_NO_REVISION_AFTER_D3 0x0000010000000000LL
51 #define PCI_HACK_ENABLE_MSI_MAPPING 0x0000020000000000LL
52 #define PCI_HACK_DISABLE_PM_DOWNSTREAM_PCI_BRIDGE 0x0000040000000000LL
53
54 //
55 // Bit encodes for PCI_COMMON_CONFIG.u.type1.BridgeControl
56 //
57 #define PCI_ENABLE_BRIDGE_PARITY_ERROR 0x0001
58 #define PCI_ENABLE_BRIDGE_SERR 0x0002
59 #define PCI_ENABLE_BRIDGE_ISA 0x0004
60 #define PCI_ENABLE_BRIDGE_VGA 0x0008
61 #define PCI_ENABLE_BRIDGE_MASTER_ABORT_SERR 0x0020
62 #define PCI_ASSERT_BRIDGE_RESET 0x0040
63 #define PCI_ENABLE_BRIDGE_VGA_16BIT 0x0010
64
65 //
66 // PCI IRQ Routing Table in BIOS/Registry (Signature: PIR$)
67 //
68 #include <pshpack1.h>
69 typedef struct _PIN_INFO
70 {
71 UCHAR Link;
72 USHORT InterruptMap;
73 } PIN_INFO, *PPIN_INFO;
74
75 typedef struct _SLOT_INFO
76 {
77 UCHAR BusNumber;
78 UCHAR DeviceNumber;
79 PIN_INFO PinInfo[4];
80 UCHAR SlotNumber;
81 UCHAR Reserved;
82 } SLOT_INFO, *PSLOT_INFO;
83
84 typedef struct _PCI_IRQ_ROUTING_TABLE
85 {
86 ULONG Signature;
87 USHORT Version;
88 USHORT TableSize;
89 UCHAR RouterBus;
90 UCHAR RouterDevFunc;
91 USHORT ExclusiveIRQs;
92 ULONG CompatibleRouter;
93 ULONG MiniportData;
94 UCHAR Reserved[11];
95 UCHAR Checksum;
96 SLOT_INFO Slot[ANYSIZE_ARRAY];
97 } PCI_IRQ_ROUTING_TABLE, *PPCI_IRQ_ROUTING_TABLE;
98 #include <poppack.h>
99
100 //
101 // PCI Registry Information
102 //
103 typedef struct _PCI_REGISTRY_INFO
104 {
105 UCHAR MajorRevision;
106 UCHAR MinorRevision;
107 UCHAR NoBuses; // Number Of Buses
108 UCHAR HardwareMechanism;
109 } PCI_REGISTRY_INFO, *PPCI_REGISTRY_INFO;
110
111 //
112 // PCI Card Descriptor in Registry
113 //
114 typedef struct _PCI_CARD_DESCRIPTOR
115 {
116 ULONG Flags;
117 USHORT VendorID;
118 USHORT DeviceID;
119 USHORT RevisionID;
120 USHORT SubsystemVendorID;
121 USHORT SubsystemID;
122 USHORT Reserved;
123 } PCI_CARD_DESCRIPTOR, *PPCI_CARD_DESCRIPTOR;
124
125 /* EOF */