c2501f7729a30cf8e5ec1f7d38784c6e0b3cd631
[reactos.git] / include / reactos / libs / fast486 / fast486.h
1 /*
2 * Fast486 386/486 CPU Emulation Library
3 * fast486.h
4 *
5 * Copyright (C) 2013 Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
20 */
21
22 #ifndef _FAST486_H_
23 #define _FAST486_H_
24
25 /* DEFINES ********************************************************************/
26
27 #define FAST486_NUM_GEN_REGS 8
28 #define FAST486_NUM_SEG_REGS 6
29 #define FAST486_NUM_CTRL_REGS 3
30 #define FAST486_NUM_DBG_REGS 6
31
32 #define FAST486_CR0_PE (1 << 0)
33 #define FAST486_CR0_MP (1 << 1)
34 #define FAST486_CR0_EM (1 << 2)
35 #define FAST486_CR0_TS (1 << 3)
36 #define FAST486_CR0_ET (1 << 4)
37 #define FAST486_CR0_NE (1 << 5)
38 #define FAST486_CR0_WP (1 << 16)
39 #define FAST486_CR0_AM (1 << 18)
40 #define FAST486_CR0_NW (1 << 29)
41 #define FAST486_CR0_CD (1 << 30)
42 #define FAST486_CR0_PG (1 << 31)
43
44 #define FAST486_DR4_B0 (1 << 0)
45 #define FAST486_DR4_B1 (1 << 1)
46 #define FAST486_DR4_B2 (1 << 2)
47 #define FAST486_DR4_B3 (1 << 3)
48 #define FAST486_DR4_BD (1 << 13)
49 #define FAST486_DR4_BS (1 << 14)
50 #define FAST486_DR4_BT (1 << 15)
51
52 #define FAST486_DR5_L0 (1 << 0)
53 #define FAST486_DR5_G0 (1 << 1)
54 #define FAST486_DR5_L1 (1 << 2)
55 #define FAST486_DR5_G1 (1 << 3)
56 #define FAST486_DR5_L2 (1 << 4)
57 #define FAST486_DR5_G2 (1 << 5)
58 #define FAST486_DR5_L3 (1 << 6)
59 #define FAST486_DR5_G3 (1 << 7)
60 #define FAST486_DR5_LE (1 << 8)
61 #define FAST486_DR5_GE (1 << 9)
62 #define FAST486_DR5_GD (1 << 13)
63
64 #define FAST486_DBG_BREAK_EXEC 0
65 #define FAST486_DBG_BREAK_WRITE 1
66 #define FAST486_DBG_BREAK_READWRITE 3
67
68 #define FAST486_DR4_RESERVED 0xFFFF1FF0
69 #define FAST486_DR5_RESERVED 0x0000DC00
70
71 #define FAST486_IDT_TASK_GATE 0x5
72 #define FAST486_IDT_INT_GATE 0x6
73 #define FAST486_IDT_TRAP_GATE 0x7
74 #define FAST486_IDT_INT_GATE_32 0xE
75 #define FAST486_IDT_TRAP_GATE_32 0xF
76
77 #define FAST486_PREFIX_SEG (1 << 0)
78 #define FAST486_PREFIX_OPSIZE (1 << 1)
79 #define FAST486_PREFIX_ADSIZE (1 << 2)
80 #define FAST486_PREFIX_LOCK (1 << 3)
81 #define FAST486_PREFIX_REPNZ (1 << 4)
82 #define FAST486_PREFIX_REP (1 << 5)
83
84 struct _FAST486_STATE;
85 typedef struct _FAST486_STATE FAST486_STATE, *PFAST486_STATE;
86
87 typedef enum _FAST486_GEN_REGS
88 {
89 FAST486_REG_EAX,
90 FAST486_REG_ECX,
91 FAST486_REG_EDX,
92 FAST486_REG_EBX,
93 FAST486_REG_ESP,
94 FAST486_REG_EBP,
95 FAST486_REG_ESI,
96 FAST486_REG_EDI
97 } FAST486_GEN_REGS, *PFAST486_GEN_REGS;
98
99 typedef enum _FAST486_SEG_REGS
100 {
101 FAST486_REG_ES,
102 FAST486_REG_CS,
103 FAST486_REG_SS,
104 FAST486_REG_DS,
105 FAST486_REG_FS,
106 FAST486_REG_GS
107 } FAST486_SEG_REGS, *PFAST486_SEG_REGS;
108
109 typedef enum _FAST486_CTRL_REGS
110 {
111 FAST486_REG_CR0 = 0,
112 FAST486_REG_CR2 = 1,
113 FAST486_REG_CR3 = 2,
114 } FAST486_CTRL_REGS, *PFAST486_CTRL_REGS;
115
116 typedef enum _FAST486_DBG_REGS
117 {
118 FAST486_REG_DR0 = 0,
119 FAST486_REG_DR1 = 1,
120 FAST486_REG_DR2 = 2,
121 FAST486_REG_DR3 = 3,
122 FAST486_REG_DR4 = 4,
123 FAST486_REG_DR5 = 5,
124 FAST486_REG_DR6 = 4, // alias to DR4
125 FAST486_REG_DR7 = 5 // alias to DR5
126 } FAST486_DBG_REGS, *PFAST486_DBG_REGS;
127
128 typedef enum _FAST486_EXCEPTIONS
129 {
130 FAST486_EXCEPTION_DE = 0x00,
131 FAST486_EXCEPTION_DB = 0x01,
132 FAST486_EXCEPTION_BP = 0x03,
133 FAST486_EXCEPTION_OF = 0x04,
134 FAST486_EXCEPTION_BR = 0x05,
135 FAST486_EXCEPTION_UD = 0x06,
136 FAST486_EXCEPTION_NM = 0x07,
137 FAST486_EXCEPTION_DF = 0x08,
138 FAST486_EXCEPTION_TS = 0x0A,
139 FAST486_EXCEPTION_NP = 0x0B,
140 FAST486_EXCEPTION_SS = 0x0C,
141 FAST486_EXCEPTION_GP = 0x0D,
142 FAST486_EXCEPTION_PF = 0x0E,
143 FAST486_EXCEPTION_MF = 0x10,
144 FAST486_EXCEPTION_AC = 0x11,
145 FAST486_EXCEPTION_MC = 0x12
146 } FAST486_EXCEPTIONS, *PFAST486_EXCEPTIONS;
147
148 typedef
149 BOOLEAN
150 (NTAPI *FAST486_MEM_READ_PROC)
151 (
152 PFAST486_STATE State,
153 ULONG Address,
154 PVOID Buffer,
155 ULONG Size
156 );
157
158 typedef
159 BOOLEAN
160 (NTAPI *FAST486_MEM_WRITE_PROC)
161 (
162 PFAST486_STATE State,
163 ULONG Address,
164 PVOID Buffer,
165 ULONG Size
166 );
167
168 typedef
169 VOID
170 (NTAPI *FAST486_IO_READ_PROC)
171 (
172 PFAST486_STATE State,
173 ULONG Port,
174 PVOID Buffer,
175 ULONG Size
176 );
177
178 typedef
179 VOID
180 (NTAPI *FAST486_IO_WRITE_PROC)
181 (
182 PFAST486_STATE State,
183 ULONG Port,
184 PVOID Buffer,
185 ULONG Size
186 );
187
188 typedef
189 VOID
190 (NTAPI *FAST486_IDLE_PROC)
191 (
192 PFAST486_STATE State
193 );
194
195 typedef
196 VOID
197 (NTAPI *FAST486_BOP_PROC)
198 (
199 PFAST486_STATE State,
200 USHORT BopCode
201 );
202
203 typedef union _FAST486_REG
204 {
205 union
206 {
207 struct
208 {
209 UCHAR LowByte;
210 UCHAR HighByte;
211 };
212 USHORT LowWord;
213 };
214 ULONG Long;
215 } FAST486_REG, *PFAST486_REG;
216
217 typedef struct _FAST486_SEG_REG
218 {
219 USHORT Selector;
220
221 /* Descriptor cache */
222 ULONG Accessed : 1;
223 ULONG ReadWrite : 1;
224 ULONG DirConf : 1;
225 ULONG Executable : 1;
226 ULONG SystemType : 1;
227 ULONG Dpl : 2;
228 ULONG Present : 1;
229 ULONG Size : 1;
230 ULONG Limit;
231 ULONG Base;
232 } FAST486_SEG_REG, *PFAST486_SEG_REG;
233
234 typedef struct
235 {
236 ULONG Limit : 16;
237 ULONG Base : 24;
238 ULONG Accessed : 1;
239 ULONG ReadWrite : 1;
240 ULONG DirConf : 1;
241 ULONG Executable : 1;
242 ULONG SystemType : 1;
243 ULONG Dpl : 2;
244 ULONG Present : 1;
245 ULONG LimitHigh : 4;
246 ULONG Avl : 1;
247 ULONG Reserved : 1;
248 ULONG Size : 1;
249 ULONG Granularity : 1;
250 ULONG BaseHigh : 8;
251 } FAST486_GDT_ENTRY, *PFAST486_GDT_ENTRY;
252
253 typedef struct
254 {
255 ULONG Offset : 16;
256 ULONG Selector : 16;
257 ULONG ParamCount : 5;
258 ULONG Reserved : 3;
259 ULONG Type : 4;
260 ULONG SystemType : 1;
261 ULONG Dpl : 2;
262 ULONG Present : 1;
263 ULONG OffsetHigh : 16;
264 } FAST486_CALL_GATE, *PFAST486_CALL_GATE;
265
266 typedef struct
267 {
268 ULONG Offset : 16;
269 ULONG Selector : 16;
270 ULONG Zero : 8;
271 ULONG Type : 4;
272 ULONG Storage : 1;
273 ULONG Dpl : 2;
274 ULONG Present : 1;
275 ULONG OffsetHigh : 16;
276 } FAST486_IDT_ENTRY, *PFAST486_IDT_ENTRY;
277
278 typedef struct _FAST486_TABLE_REG
279 {
280 USHORT Size;
281 ULONG Address;
282 } FAST486_TABLE_REG, *PFAST486_TABLE_REG;
283
284 typedef union _FAST486_FLAGS_REG
285 {
286 USHORT LowWord;
287 ULONG Long;
288
289 struct
290 {
291 ULONG Cf : 1;
292 ULONG AlwaysSet : 1;
293 ULONG Pf : 1;
294 ULONG Reserved0 : 1;
295 ULONG Af : 1;
296 ULONG Reserved1 : 1;
297 ULONG Zf : 1;
298 ULONG Sf : 1;
299 ULONG Tf : 1;
300 ULONG If : 1;
301 ULONG Df : 1;
302 ULONG Of : 1;
303 ULONG Iopl : 2;
304 ULONG Nt : 1;
305 ULONG Reserved2 : 1;
306 ULONG Rf : 1;
307 ULONG Vm : 1;
308 ULONG Ac : 1;
309 ULONG Vif : 1;
310 ULONG Vip : 1;
311 ULONG Id : 1;
312
313 // ULONG Reserved : 10;
314 };
315 } FAST486_FLAGS_REG, *PFAST486_FLAGS_REG;
316
317 typedef struct _FAST486_TSS
318 {
319 ULONG Link;
320 ULONG Esp0;
321 ULONG Ss0;
322 ULONG Esp1;
323 ULONG Ss1;
324 ULONG Esp2;
325 ULONG Ss2;
326 ULONG Cr3;
327 ULONG Eip;
328 ULONG Eflags;
329 ULONG Eax;
330 ULONG Ecx;
331 ULONG Edx;
332 ULONG Ebx;
333 ULONG Esp;
334 ULONG Ebp;
335 ULONG Esi;
336 ULONG Edi;
337 ULONG Es;
338 ULONG Cs;
339 ULONG Ss;
340 ULONG Ds;
341 ULONG Fs;
342 ULONG Gs;
343 ULONG Ldtr;
344 ULONG IopbOffset;
345 } FAST486_TSS, *PFAST486_TSS;
346
347 struct _FAST486_STATE
348 {
349 FAST486_MEM_READ_PROC MemReadCallback;
350 FAST486_MEM_WRITE_PROC MemWriteCallback;
351 FAST486_IO_READ_PROC IoReadCallback;
352 FAST486_IO_WRITE_PROC IoWriteCallback;
353 FAST486_IDLE_PROC IdleCallback;
354 FAST486_BOP_PROC BopCallback;
355 FAST486_REG GeneralRegs[FAST486_NUM_GEN_REGS];
356 FAST486_SEG_REG SegmentRegs[FAST486_NUM_SEG_REGS];
357 FAST486_REG InstPtr, SavedInstPtr;
358 FAST486_FLAGS_REG Flags;
359 FAST486_TABLE_REG Gdtr, Idtr, Ldtr, Tss;
360 ULONG ControlRegisters[FAST486_NUM_CTRL_REGS];
361 ULONG DebugRegisters[FAST486_NUM_DBG_REGS];
362 ULONG ExceptionCount;
363 ULONG PrefixFlags;
364 FAST486_SEG_REGS SegmentOverride;
365 BOOLEAN HardwareInt;
366 UCHAR PendingIntNum;
367 };
368
369 /* FUNCTIONS ******************************************************************/
370
371 VOID
372 NTAPI
373 Fast486Continue(PFAST486_STATE State);
374
375 VOID
376 NTAPI
377 Fast486StepInto(PFAST486_STATE State);
378
379 VOID
380 NTAPI
381 Fast486StepOver(PFAST486_STATE State);
382
383 VOID
384 NTAPI
385 Fast486StepOut(PFAST486_STATE State);
386
387 VOID
388 NTAPI
389 Fast486DumpState(PFAST486_STATE State);
390
391 VOID
392 NTAPI
393 Fast486Reset(PFAST486_STATE State);
394
395 VOID
396 NTAPI
397 Fast486Interrupt(PFAST486_STATE State, UCHAR Number);
398
399 VOID
400 NTAPI
401 Fast486ExecuteAt(PFAST486_STATE State, USHORT Segment, ULONG Offset);
402
403 VOID
404 NTAPI
405 Fast486SetStack(PFAST486_STATE State, USHORT Segment, ULONG Offset);
406
407 VOID
408 NTAPI
409 Fast486SetSegment
410 (
411 PFAST486_STATE State,
412 FAST486_SEG_REGS Segment,
413 USHORT Selector
414 );
415
416 #endif // _FAST486_H_
417
418 /* EOF */