[DDK]
[reactos.git] / include / xdk / haltypes.h
1 /* Hardware Abstraction Layer Types */
2
3 $if (_NTDDK_)
4 typedef BOOLEAN
5 (NTAPI *PHAL_RESET_DISPLAY_PARAMETERS)(
6 IN ULONG Columns,
7 IN ULONG Rows);
8
9 typedef PBUS_HANDLER
10 (FASTCALL *pHalHandlerForBus)(
11 IN INTERFACE_TYPE InterfaceType,
12 IN ULONG BusNumber);
13
14 typedef VOID
15 (FASTCALL *pHalReferenceBusHandler)(
16 IN PBUS_HANDLER BusHandler);
17
18 typedef enum _HAL_QUERY_INFORMATION_CLASS {
19 HalInstalledBusInformation,
20 HalProfileSourceInformation,
21 HalInformationClassUnused1,
22 HalPowerInformation,
23 HalProcessorSpeedInformation,
24 HalCallbackInformation,
25 HalMapRegisterInformation,
26 HalMcaLogInformation,
27 HalFrameBufferCachingInformation,
28 HalDisplayBiosInformation,
29 HalProcessorFeatureInformation,
30 HalNumaTopologyInterface,
31 HalErrorInformation,
32 HalCmcLogInformation,
33 HalCpeLogInformation,
34 HalQueryMcaInterface,
35 HalQueryAMLIIllegalIOPortAddresses,
36 HalQueryMaxHotPlugMemoryAddress,
37 HalPartitionIpiInterface,
38 HalPlatformInformation,
39 HalQueryProfileSourceList,
40 HalInitLogInformation,
41 HalFrequencyInformation,
42 HalProcessorBrandString,
43 HalHypervisorInformation,
44 HalPlatformTimerInformation,
45 HalAcpiAuditInformation
46 } HAL_QUERY_INFORMATION_CLASS, *PHAL_QUERY_INFORMATION_CLASS;
47
48 typedef enum _HAL_SET_INFORMATION_CLASS {
49 HalProfileSourceInterval,
50 HalProfileSourceInterruptHandler,
51 HalMcaRegisterDriver,
52 HalKernelErrorHandler,
53 HalCmcRegisterDriver,
54 HalCpeRegisterDriver,
55 HalMcaLog,
56 HalCmcLog,
57 HalCpeLog,
58 HalGenerateCmcInterrupt,
59 HalProfileSourceTimerHandler,
60 HalEnlightenment,
61 HalProfileDpgoSourceInterruptHandler
62 } HAL_SET_INFORMATION_CLASS, *PHAL_SET_INFORMATION_CLASS;
63
64 typedef NTSTATUS
65 (NTAPI *pHalQuerySystemInformation)(
66 IN HAL_QUERY_INFORMATION_CLASS InformationClass,
67 IN ULONG BufferSize,
68 IN OUT PVOID Buffer,
69 OUT PULONG ReturnedLength);
70
71 typedef NTSTATUS
72 (NTAPI *pHalSetSystemInformation)(
73 IN HAL_SET_INFORMATION_CLASS InformationClass,
74 IN ULONG BufferSize,
75 IN PVOID Buffer);
76
77 typedef VOID
78 (FASTCALL *pHalExamineMBR)(
79 IN PDEVICE_OBJECT DeviceObject,
80 IN ULONG SectorSize,
81 IN ULONG MBRTypeIdentifier,
82 OUT PVOID *Buffer);
83
84 typedef NTSTATUS
85 (FASTCALL *pHalIoReadPartitionTable)(
86 IN PDEVICE_OBJECT DeviceObject,
87 IN ULONG SectorSize,
88 IN BOOLEAN ReturnRecognizedPartitions,
89 OUT struct _DRIVE_LAYOUT_INFORMATION **PartitionBuffer);
90
91 typedef NTSTATUS
92 (FASTCALL *pHalIoSetPartitionInformation)(
93 IN PDEVICE_OBJECT DeviceObject,
94 IN ULONG SectorSize,
95 IN ULONG PartitionNumber,
96 IN ULONG PartitionType);
97
98 typedef NTSTATUS
99 (FASTCALL *pHalIoWritePartitionTable)(
100 IN PDEVICE_OBJECT DeviceObject,
101 IN ULONG SectorSize,
102 IN ULONG SectorsPerTrack,
103 IN ULONG NumberOfHeads,
104 IN struct _DRIVE_LAYOUT_INFORMATION *PartitionBuffer);
105
106 typedef NTSTATUS
107 (NTAPI *pHalQueryBusSlots)(
108 IN PBUS_HANDLER BusHandler,
109 IN ULONG BufferSize,
110 OUT PULONG SlotNumbers,
111 OUT PULONG ReturnedLength);
112
113 typedef NTSTATUS
114 (NTAPI *pHalInitPnpDriver)(
115 VOID);
116
117 typedef struct _PM_DISPATCH_TABLE {
118 ULONG Signature;
119 ULONG Version;
120 PVOID Function[1];
121 } PM_DISPATCH_TABLE, *PPM_DISPATCH_TABLE;
122
123 typedef NTSTATUS
124 (NTAPI *pHalInitPowerManagement)(
125 IN PPM_DISPATCH_TABLE PmDriverDispatchTable,
126 OUT PPM_DISPATCH_TABLE *PmHalDispatchTable);
127
128 typedef struct _DMA_ADAPTER*
129 (NTAPI *pHalGetDmaAdapter)(
130 IN PVOID Context,
131 IN struct _DEVICE_DESCRIPTION *DeviceDescriptor,
132 OUT PULONG NumberOfMapRegisters);
133
134 typedef NTSTATUS
135 (NTAPI *pHalGetInterruptTranslator)(
136 IN INTERFACE_TYPE ParentInterfaceType,
137 IN ULONG ParentBusNumber,
138 IN INTERFACE_TYPE BridgeInterfaceType,
139 IN USHORT Size,
140 IN USHORT Version,
141 OUT PTRANSLATOR_INTERFACE Translator,
142 OUT PULONG BridgeBusNumber);
143
144 typedef NTSTATUS
145 (NTAPI *pHalStartMirroring)(
146 VOID);
147
148 typedef NTSTATUS
149 (NTAPI *pHalEndMirroring)(
150 IN ULONG PassNumber);
151
152 typedef NTSTATUS
153 (NTAPI *pHalMirrorPhysicalMemory)(
154 IN PHYSICAL_ADDRESS PhysicalAddress,
155 IN LARGE_INTEGER NumberOfBytes);
156
157 typedef NTSTATUS
158 (NTAPI *pHalMirrorVerify)(
159 IN PHYSICAL_ADDRESS PhysicalAddress,
160 IN LARGE_INTEGER NumberOfBytes);
161
162 typedef BOOLEAN
163 (NTAPI *pHalTranslateBusAddress)(
164 IN INTERFACE_TYPE InterfaceType,
165 IN ULONG BusNumber,
166 IN PHYSICAL_ADDRESS BusAddress,
167 IN OUT PULONG AddressSpace,
168 OUT PPHYSICAL_ADDRESS TranslatedAddress);
169
170 typedef NTSTATUS
171 (NTAPI *pHalAssignSlotResources)(
172 IN PUNICODE_STRING RegistryPath,
173 IN PUNICODE_STRING DriverClassName OPTIONAL,
174 IN PDRIVER_OBJECT DriverObject,
175 IN PDEVICE_OBJECT DeviceObject,
176 IN INTERFACE_TYPE BusType,
177 IN ULONG BusNumber,
178 IN ULONG SlotNumber,
179 IN OUT PCM_RESOURCE_LIST *AllocatedResources);
180
181 typedef VOID
182 (NTAPI *pHalHaltSystem)(
183 VOID);
184
185 typedef BOOLEAN
186 (NTAPI *pHalResetDisplay)(
187 VOID);
188
189 typedef struct _MAP_REGISTER_ENTRY {
190 PVOID MapRegister;
191 BOOLEAN WriteToDevice;
192 } MAP_REGISTER_ENTRY, *PMAP_REGISTER_ENTRY;
193
194 typedef UCHAR
195 (NTAPI *pHalVectorToIDTEntry)(
196 ULONG Vector);
197
198 typedef BOOLEAN
199 (NTAPI *pHalFindBusAddressTranslation)(
200 IN PHYSICAL_ADDRESS BusAddress,
201 IN OUT PULONG AddressSpace,
202 OUT PPHYSICAL_ADDRESS TranslatedAddress,
203 IN OUT PULONG_PTR Context,
204 IN BOOLEAN NextBus);
205
206 typedef VOID
207 (NTAPI *pHalEndOfBoot)(
208 VOID);
209
210 typedef PVOID
211 (NTAPI *pHalGetAcpiTable)(
212 IN ULONG Signature,
213 IN PCSTR OemId OPTIONAL,
214 IN PCSTR OemTableId OPTIONAL);
215
216 #if defined(_IA64_)
217 typedef NTSTATUS
218 (*pHalGetErrorCapList)(
219 IN OUT PULONG CapsListLength,
220 IN OUT PUCHAR ErrorCapList);
221
222 typedef NTSTATUS
223 (*pHalInjectError)(
224 IN ULONG BufferLength,
225 IN PUCHAR Buffer);
226 #endif
227
228 typedef VOID
229 (NTAPI *PCI_ERROR_HANDLER_CALLBACK)(
230 VOID);
231
232 typedef VOID
233 (NTAPI *pHalSetPciErrorHandlerCallback)(
234 IN PCI_ERROR_HANDLER_CALLBACK Callback);
235
236 #if 1 /* Not present in WDK 7600 */
237 typedef VOID
238 (FASTCALL *pHalIoAssignDriveLetters)(
239 IN struct _LOADER_PARAMETER_BLOCK *LoaderBlock,
240 IN PSTRING NtDeviceName,
241 OUT PUCHAR NtSystemPath,
242 OUT PSTRING NtSystemPathString);
243 #endif
244
245 typedef struct {
246 ULONG Version;
247 pHalQuerySystemInformation HalQuerySystemInformation;
248 pHalSetSystemInformation HalSetSystemInformation;
249 pHalQueryBusSlots HalQueryBusSlots;
250 ULONG Spare1;
251 pHalExamineMBR HalExamineMBR;
252 #if 1 /* Not present in WDK 7600 */
253 pHalIoAssignDriveLetters HalIoAssignDriveLetters;
254 #endif
255 pHalIoReadPartitionTable HalIoReadPartitionTable;
256 pHalIoSetPartitionInformation HalIoSetPartitionInformation;
257 pHalIoWritePartitionTable HalIoWritePartitionTable;
258 pHalHandlerForBus HalReferenceHandlerForBus;
259 pHalReferenceBusHandler HalReferenceBusHandler;
260 pHalReferenceBusHandler HalDereferenceBusHandler;
261 pHalInitPnpDriver HalInitPnpDriver;
262 pHalInitPowerManagement HalInitPowerManagement;
263 pHalGetDmaAdapter HalGetDmaAdapter;
264 pHalGetInterruptTranslator HalGetInterruptTranslator;
265 pHalStartMirroring HalStartMirroring;
266 pHalEndMirroring HalEndMirroring;
267 pHalMirrorPhysicalMemory HalMirrorPhysicalMemory;
268 pHalEndOfBoot HalEndOfBoot;
269 pHalMirrorVerify HalMirrorVerify;
270 pHalGetAcpiTable HalGetCachedAcpiTable;
271 pHalSetPciErrorHandlerCallback HalSetPciErrorHandlerCallback;
272 #if defined(_IA64_)
273 pHalGetErrorCapList HalGetErrorCapList;
274 pHalInjectError HalInjectError;
275 #endif
276 } HAL_DISPATCH, *PHAL_DISPATCH;
277
278 /* GCC/MSVC and WDK compatible declaration */
279 extern NTKERNELAPI HAL_DISPATCH HalDispatchTable;
280
281 #if defined(_NTOSKRNL_) || defined(_BLDR_)
282 #define HALDISPATCH (&HalDispatchTable)
283 #else
284 /* This is a WDK compatibility definition */
285 #define HalDispatchTable (&HalDispatchTable)
286 #define HALDISPATCH HalDispatchTable
287 #endif
288
289 #define HAL_DISPATCH_VERSION 3 /* FIXME: when to use 4? */
290 #define HalDispatchTableVersion HALDISPATCH->Version
291 #define HalQuerySystemInformation HALDISPATCH->HalQuerySystemInformation
292 #define HalSetSystemInformation HALDISPATCH->HalSetSystemInformation
293 #define HalQueryBusSlots HALDISPATCH->HalQueryBusSlots
294 #define HalReferenceHandlerForBus HALDISPATCH->HalReferenceHandlerForBus
295 #define HalReferenceBusHandler HALDISPATCH->HalReferenceBusHandler
296 #define HalDereferenceBusHandler HALDISPATCH->HalDereferenceBusHandler
297 #define HalInitPnpDriver HALDISPATCH->HalInitPnpDriver
298 #define HalInitPowerManagement HALDISPATCH->HalInitPowerManagement
299 #define HalGetDmaAdapter HALDISPATCH->HalGetDmaAdapter
300 #define HalGetInterruptTranslator HALDISPATCH->HalGetInterruptTranslator
301 #define HalStartMirroring HALDISPATCH->HalStartMirroring
302 #define HalEndMirroring HALDISPATCH->HalEndMirroring
303 #define HalMirrorPhysicalMemory HALDISPATCH->HalMirrorPhysicalMemory
304 #define HalEndOfBoot HALDISPATCH->HalEndOfBoot
305 #define HalMirrorVerify HALDISPATCH->HalMirrorVerify
306 #define HalGetCachedAcpiTable HALDISPATCH->HalGetCachedAcpiTable
307 #define HalSetPciErrorHandlerCallback HALDISPATCH->HalSetPciErrorHandlerCallback
308 #if defined(_IA64_)
309 #define HalGetErrorCapList HALDISPATCH->HalGetErrorCapList
310 #define HalInjectError HALDISPATCH->HalInjectError
311 #endif
312
313 typedef struct _HAL_BUS_INFORMATION {
314 INTERFACE_TYPE BusType;
315 BUS_DATA_TYPE ConfigurationType;
316 ULONG BusNumber;
317 ULONG Reserved;
318 } HAL_BUS_INFORMATION, *PHAL_BUS_INFORMATION;
319
320 typedef struct _HAL_PROFILE_SOURCE_INFORMATION {
321 KPROFILE_SOURCE Source;
322 BOOLEAN Supported;
323 ULONG Interval;
324 } HAL_PROFILE_SOURCE_INFORMATION, *PHAL_PROFILE_SOURCE_INFORMATION;
325
326 typedef struct _HAL_PROFILE_SOURCE_INFORMATION_EX {
327 KPROFILE_SOURCE Source;
328 BOOLEAN Supported;
329 ULONG_PTR Interval;
330 ULONG_PTR DefInterval;
331 ULONG_PTR MaxInterval;
332 ULONG_PTR MinInterval;
333 } HAL_PROFILE_SOURCE_INFORMATION_EX, *PHAL_PROFILE_SOURCE_INFORMATION_EX;
334
335 typedef struct _HAL_PROFILE_SOURCE_INTERVAL {
336 KPROFILE_SOURCE Source;
337 ULONG_PTR Interval;
338 } HAL_PROFILE_SOURCE_INTERVAL, *PHAL_PROFILE_SOURCE_INTERVAL;
339
340 typedef struct _HAL_PROFILE_SOURCE_LIST {
341 KPROFILE_SOURCE Source;
342 PWSTR Description;
343 } HAL_PROFILE_SOURCE_LIST, *PHAL_PROFILE_SOURCE_LIST;
344
345 typedef enum _HAL_DISPLAY_BIOS_INFORMATION {
346 HalDisplayInt10Bios,
347 HalDisplayEmulatedBios,
348 HalDisplayNoBios
349 } HAL_DISPLAY_BIOS_INFORMATION, *PHAL_DISPLAY_BIOS_INFORMATION;
350
351 typedef struct _HAL_POWER_INFORMATION {
352 ULONG TBD;
353 } HAL_POWER_INFORMATION, *PHAL_POWER_INFORMATION;
354
355 typedef struct _HAL_PROCESSOR_SPEED_INFO {
356 ULONG ProcessorSpeed;
357 } HAL_PROCESSOR_SPEED_INFORMATION, *PHAL_PROCESSOR_SPEED_INFORMATION;
358
359 typedef struct _HAL_CALLBACKS {
360 PCALLBACK_OBJECT SetSystemInformation;
361 PCALLBACK_OBJECT BusCheck;
362 } HAL_CALLBACKS, *PHAL_CALLBACKS;
363
364 typedef struct _HAL_PROCESSOR_FEATURE {
365 ULONG UsableFeatureBits;
366 } HAL_PROCESSOR_FEATURE;
367
368 typedef NTSTATUS
369 (NTAPI *PHALIOREADWRITEHANDLER)(
370 IN BOOLEAN fRead,
371 IN ULONG dwAddr,
372 IN ULONG dwSize,
373 IN OUT PULONG pdwData);
374
375 typedef struct _HAL_AMLI_BAD_IO_ADDRESS_LIST {
376 ULONG BadAddrBegin;
377 ULONG BadAddrSize;
378 ULONG OSVersionTrigger;
379 PHALIOREADWRITEHANDLER IOHandler;
380 } HAL_AMLI_BAD_IO_ADDRESS_LIST, *PHAL_AMLI_BAD_IO_ADDRESS_LIST;
381
382 #if defined(_X86_) || defined(_IA64_) || defined(_AMD64_)
383
384 typedef VOID
385 (NTAPI *PHALMCAINTERFACELOCK)(
386 VOID);
387
388 typedef VOID
389 (NTAPI *PHALMCAINTERFACEUNLOCK)(
390 VOID);
391
392 typedef NTSTATUS
393 (NTAPI *PHALMCAINTERFACEREADREGISTER)(
394 IN UCHAR BankNumber,
395 IN OUT PVOID Exception);
396
397 typedef struct _HAL_MCA_INTERFACE {
398 PHALMCAINTERFACELOCK Lock;
399 PHALMCAINTERFACEUNLOCK Unlock;
400 PHALMCAINTERFACEREADREGISTER ReadRegister;
401 } HAL_MCA_INTERFACE;
402
403 typedef enum {
404 ApicDestinationModePhysical = 1,
405 ApicDestinationModeLogicalFlat,
406 ApicDestinationModeLogicalClustered,
407 ApicDestinationModeUnknown
408 } HAL_APIC_DESTINATION_MODE, *PHAL_APIC_DESTINATION_MODE;
409
410 #if defined(_AMD64_)
411
412 struct _KTRAP_FRAME;
413 struct _KEXCEPTION_FRAME;
414
415 typedef ERROR_SEVERITY
416 (NTAPI *PDRIVER_EXCPTN_CALLBACK)(
417 IN PVOID Context,
418 IN struct _KTRAP_FRAME *TrapFrame,
419 IN struct _KEXCEPTION_FRAME *ExceptionFrame,
420 IN PMCA_EXCEPTION Exception);
421
422 #endif
423
424 #if defined(_X86_) || defined(_IA64_)
425 typedef
426 #if defined(_IA64_)
427 ERROR_SEVERITY
428 #else
429 VOID
430 #endif
431 (NTAPI *PDRIVER_EXCPTN_CALLBACK)(
432 IN PVOID Context,
433 IN PMCA_EXCEPTION BankLog);
434 #endif
435
436 typedef PDRIVER_EXCPTN_CALLBACK PDRIVER_MCA_EXCEPTION_CALLBACK;
437
438 typedef struct _MCA_DRIVER_INFO {
439 PDRIVER_MCA_EXCEPTION_CALLBACK ExceptionCallback;
440 PKDEFERRED_ROUTINE DpcCallback;
441 PVOID DeviceContext;
442 } MCA_DRIVER_INFO, *PMCA_DRIVER_INFO;
443
444 typedef struct _HAL_ERROR_INFO {
445 ULONG Version;
446 ULONG InitMaxSize;
447 ULONG McaMaxSize;
448 ULONG McaPreviousEventsCount;
449 ULONG McaCorrectedEventsCount;
450 ULONG McaKernelDeliveryFails;
451 ULONG McaDriverDpcQueueFails;
452 ULONG McaReserved;
453 ULONG CmcMaxSize;
454 ULONG CmcPollingInterval;
455 ULONG CmcInterruptsCount;
456 ULONG CmcKernelDeliveryFails;
457 ULONG CmcDriverDpcQueueFails;
458 ULONG CmcGetStateFails;
459 ULONG CmcClearStateFails;
460 ULONG CmcReserved;
461 ULONGLONG CmcLogId;
462 ULONG CpeMaxSize;
463 ULONG CpePollingInterval;
464 ULONG CpeInterruptsCount;
465 ULONG CpeKernelDeliveryFails;
466 ULONG CpeDriverDpcQueueFails;
467 ULONG CpeGetStateFails;
468 ULONG CpeClearStateFails;
469 ULONG CpeInterruptSources;
470 ULONGLONG CpeLogId;
471 ULONGLONG KernelReserved[4];
472 } HAL_ERROR_INFO, *PHAL_ERROR_INFO;
473
474 #define HAL_MCE_INTERRUPTS_BASED ((ULONG)-1)
475 #define HAL_MCE_DISABLED ((ULONG)0)
476
477 #define HAL_CMC_INTERRUPTS_BASED HAL_MCE_INTERRUPTS_BASED
478 #define HAL_CMC_DISABLED HAL_MCE_DISABLED
479
480 #define HAL_CPE_INTERRUPTS_BASED HAL_MCE_INTERRUPTS_BASED
481 #define HAL_CPE_DISABLED HAL_MCE_DISABLED
482
483 #define HAL_MCA_INTERRUPTS_BASED HAL_MCE_INTERRUPTS_BASED
484 #define HAL_MCA_DISABLED HAL_MCE_DISABLED
485
486 typedef VOID
487 (NTAPI *PDRIVER_CMC_EXCEPTION_CALLBACK)(
488 IN PVOID Context,
489 IN PCMC_EXCEPTION CmcLog);
490
491 typedef VOID
492 (NTAPI *PDRIVER_CPE_EXCEPTION_CALLBACK)(
493 IN PVOID Context,
494 IN PCPE_EXCEPTION CmcLog);
495
496 typedef struct _CMC_DRIVER_INFO {
497 PDRIVER_CMC_EXCEPTION_CALLBACK ExceptionCallback;
498 PKDEFERRED_ROUTINE DpcCallback;
499 PVOID DeviceContext;
500 } CMC_DRIVER_INFO, *PCMC_DRIVER_INFO;
501
502 typedef struct _CPE_DRIVER_INFO {
503 PDRIVER_CPE_EXCEPTION_CALLBACK ExceptionCallback;
504 PKDEFERRED_ROUTINE DpcCallback;
505 PVOID DeviceContext;
506 } CPE_DRIVER_INFO, *PCPE_DRIVER_INFO;
507
508 #endif // defined(_X86_) || defined(_IA64_) || defined(_AMD64_)
509
510 #if defined(_IA64_)
511
512 typedef NTSTATUS
513 (*HALSENDCROSSPARTITIONIPI)(
514 IN USHORT ProcessorID,
515 IN UCHAR HardwareVector);
516
517 typedef NTSTATUS
518 (*HALRESERVECROSSPARTITIONINTERRUPTVECTOR)(
519 OUT PULONG Vector,
520 OUT PKIRQL Irql,
521 IN OUT PGROUP_AFFINITY Affinity,
522 OUT PUCHAR HardwareVector);
523
524 typedef VOID
525 (*HALFREECROSSPARTITIONINTERRUPTVECTOR)(
526 IN ULONG Vector,
527 IN PGROUP_AFFINITY Affinity);
528
529 typedef struct _HAL_CROSS_PARTITION_IPI_INTERFACE {
530 HALSENDCROSSPARTITIONIPI HalSendCrossPartitionIpi;
531 HALRESERVECROSSPARTITIONINTERRUPTVECTOR HalReserveCrossPartitionInterruptVector;
532 HALFREECROSSPARTITIONINTERRUPTVECTOR HalFreeCrossPartitionInterruptVector;
533 } HAL_CROSS_PARTITION_IPI_INTERFACE;
534
535 #define HAL_CROSS_PARTITION_IPI_INTERFACE_MINIMUM_SIZE \
536 FIELD_OFFSET(HAL_CROSS_PARTITION_IPI_INTERFACE, \
537 HalFreeCrossPartitionInterruptVector)
538
539 #endif /* defined(_IA64_) */
540
541 typedef struct _HAL_PLATFORM_INFORMATION {
542 ULONG PlatformFlags;
543 } HAL_PLATFORM_INFORMATION, *PHAL_PLATFORM_INFORMATION;
544
545 #define HAL_PLATFORM_DISABLE_WRITE_COMBINING 0x01L
546 #define HAL_PLATFORM_DISABLE_PTCG 0x04L
547 #define HAL_PLATFORM_DISABLE_UC_MAIN_MEMORY 0x08L
548 #define HAL_PLATFORM_ENABLE_WRITE_COMBINING_MMIO 0x10L
549 #define HAL_PLATFORM_ACPI_TABLES_CACHED 0x20L
550
551 $endif (_NTDDK_)