789887852a019b0b9ada7baf2c2b375331bd0279
[reactos.git] / include / xdk / iotypes.h
1 $if (_WDMDDK_ || _NTDDK_)
2 /******************************************************************************
3 * I/O Manager Types *
4 ******************************************************************************/
5 $endif
6
7 $if (_WDMDDK_)
8 #define WDM_MAJORVERSION 0x06
9 #define WDM_MINORVERSION 0x00
10
11 #if defined(_WIN64)
12
13 #ifndef USE_DMA_MACROS
14 #define USE_DMA_MACROS
15 #endif
16
17 #ifndef NO_LEGACY_DRIVERS
18 #define NO_LEGACY_DRIVERS
19 #endif
20
21 #endif /* defined(_WIN64) */
22
23 #define STATUS_CONTINUE_COMPLETION STATUS_SUCCESS
24
25 #define CONNECT_FULLY_SPECIFIED 0x1
26 #define CONNECT_LINE_BASED 0x2
27 #define CONNECT_MESSAGE_BASED 0x3
28 #define CONNECT_FULLY_SPECIFIED_GROUP 0x4
29 #define CONNECT_CURRENT_VERSION 0x4
30
31 #define POOL_COLD_ALLOCATION 256
32 #define POOL_QUOTA_FAIL_INSTEAD_OF_RAISE 8
33 #define POOL_RAISE_IF_ALLOCATION_FAILURE 16
34
35 #define IO_TYPE_ADAPTER 1
36 #define IO_TYPE_CONTROLLER 2
37 #define IO_TYPE_DEVICE 3
38 #define IO_TYPE_DRIVER 4
39 #define IO_TYPE_FILE 5
40 #define IO_TYPE_IRP 6
41 #define IO_TYPE_MASTER_ADAPTER 7
42 #define IO_TYPE_OPEN_PACKET 8
43 #define IO_TYPE_TIMER 9
44 #define IO_TYPE_VPB 10
45 #define IO_TYPE_ERROR_LOG 11
46 #define IO_TYPE_ERROR_MESSAGE 12
47 #define IO_TYPE_DEVICE_OBJECT_EXTENSION 13
48
49 #define IO_TYPE_CSQ_IRP_CONTEXT 1
50 #define IO_TYPE_CSQ 2
51 #define IO_TYPE_CSQ_EX 3
52
53 /* IO_RESOURCE_DESCRIPTOR.Option */
54 #define IO_RESOURCE_PREFERRED 0x01
55 #define IO_RESOURCE_DEFAULT 0x02
56 #define IO_RESOURCE_ALTERNATIVE 0x08
57 $endif
58
59 $if (_WDMDDK_ || _DEVIOCTL_)
60 #define FILE_DEVICE_BEEP 0x00000001
61 #define FILE_DEVICE_CD_ROM 0x00000002
62 #define FILE_DEVICE_CD_ROM_FILE_SYSTEM 0x00000003
63 #define FILE_DEVICE_CONTROLLER 0x00000004
64 #define FILE_DEVICE_DATALINK 0x00000005
65 #define FILE_DEVICE_DFS 0x00000006
66 #define FILE_DEVICE_DISK 0x00000007
67 #define FILE_DEVICE_DISK_FILE_SYSTEM 0x00000008
68 #define FILE_DEVICE_FILE_SYSTEM 0x00000009
69 #define FILE_DEVICE_INPORT_PORT 0x0000000a
70 #define FILE_DEVICE_KEYBOARD 0x0000000b
71 #define FILE_DEVICE_MAILSLOT 0x0000000c
72 #define FILE_DEVICE_MIDI_IN 0x0000000d
73 #define FILE_DEVICE_MIDI_OUT 0x0000000e
74 #define FILE_DEVICE_MOUSE 0x0000000f
75 #define FILE_DEVICE_MULTI_UNC_PROVIDER 0x00000010
76 #define FILE_DEVICE_NAMED_PIPE 0x00000011
77 #define FILE_DEVICE_NETWORK 0x00000012
78 #define FILE_DEVICE_NETWORK_BROWSER 0x00000013
79 #define FILE_DEVICE_NETWORK_FILE_SYSTEM 0x00000014
80 #define FILE_DEVICE_NULL 0x00000015
81 #define FILE_DEVICE_PARALLEL_PORT 0x00000016
82 #define FILE_DEVICE_PHYSICAL_NETCARD 0x00000017
83 #define FILE_DEVICE_PRINTER 0x00000018
84 #define FILE_DEVICE_SCANNER 0x00000019
85 #define FILE_DEVICE_SERIAL_MOUSE_PORT 0x0000001a
86 #define FILE_DEVICE_SERIAL_PORT 0x0000001b
87 #define FILE_DEVICE_SCREEN 0x0000001c
88 #define FILE_DEVICE_SOUND 0x0000001d
89 #define FILE_DEVICE_STREAMS 0x0000001e
90 #define FILE_DEVICE_TAPE 0x0000001f
91 #define FILE_DEVICE_TAPE_FILE_SYSTEM 0x00000020
92 #define FILE_DEVICE_TRANSPORT 0x00000021
93 #define FILE_DEVICE_UNKNOWN 0x00000022
94 #define FILE_DEVICE_VIDEO 0x00000023
95 #define FILE_DEVICE_VIRTUAL_DISK 0x00000024
96 #define FILE_DEVICE_WAVE_IN 0x00000025
97 #define FILE_DEVICE_WAVE_OUT 0x00000026
98 #define FILE_DEVICE_8042_PORT 0x00000027
99 #define FILE_DEVICE_NETWORK_REDIRECTOR 0x00000028
100 #define FILE_DEVICE_BATTERY 0x00000029
101 #define FILE_DEVICE_BUS_EXTENDER 0x0000002a
102 #define FILE_DEVICE_MODEM 0x0000002b
103 #define FILE_DEVICE_VDM 0x0000002c
104 #define FILE_DEVICE_MASS_STORAGE 0x0000002d
105 #define FILE_DEVICE_SMB 0x0000002e
106 #define FILE_DEVICE_KS 0x0000002f
107 #define FILE_DEVICE_CHANGER 0x00000030
108 #define FILE_DEVICE_SMARTCARD 0x00000031
109 #define FILE_DEVICE_ACPI 0x00000032
110 #define FILE_DEVICE_DVD 0x00000033
111 #define FILE_DEVICE_FULLSCREEN_VIDEO 0x00000034
112 #define FILE_DEVICE_DFS_FILE_SYSTEM 0x00000035
113 #define FILE_DEVICE_DFS_VOLUME 0x00000036
114 #define FILE_DEVICE_SERENUM 0x00000037
115 #define FILE_DEVICE_TERMSRV 0x00000038
116 #define FILE_DEVICE_KSEC 0x00000039
117 #define FILE_DEVICE_FIPS 0x0000003A
118 #define FILE_DEVICE_INFINIBAND 0x0000003B
119 #define FILE_DEVICE_VMBUS 0x0000003E
120 #define FILE_DEVICE_CRYPT_PROVIDER 0x0000003F
121 #define FILE_DEVICE_WPD 0x00000040
122 #define FILE_DEVICE_BLUETOOTH 0x00000041
123 #define FILE_DEVICE_MT_COMPOSITE 0x00000042
124 #define FILE_DEVICE_MT_TRANSPORT 0x00000043
125 #define FILE_DEVICE_BIOMETRIC 0x00000044
126 #define FILE_DEVICE_PMI 0x00000045
127 $endif
128 $if (_WDMDDK_)
129
130 #if defined(NT_PROCESSOR_GROUPS)
131
132 typedef USHORT IRQ_DEVICE_POLICY, *PIRQ_DEVICE_POLICY;
133
134 typedef enum _IRQ_DEVICE_POLICY_USHORT {
135 IrqPolicyMachineDefault = 0,
136 IrqPolicyAllCloseProcessors = 1,
137 IrqPolicyOneCloseProcessor = 2,
138 IrqPolicyAllProcessorsInMachine = 3,
139 IrqPolicyAllProcessorsInGroup = 3,
140 IrqPolicySpecifiedProcessors = 4,
141 IrqPolicySpreadMessagesAcrossAllProcessors = 5};
142
143 #else /* defined(NT_PROCESSOR_GROUPS) */
144
145 typedef enum _IRQ_DEVICE_POLICY {
146 IrqPolicyMachineDefault = 0,
147 IrqPolicyAllCloseProcessors,
148 IrqPolicyOneCloseProcessor,
149 IrqPolicyAllProcessorsInMachine,
150 IrqPolicySpecifiedProcessors,
151 IrqPolicySpreadMessagesAcrossAllProcessors
152 } IRQ_DEVICE_POLICY, *PIRQ_DEVICE_POLICY;
153
154 #endif
155
156 typedef enum _IRQ_PRIORITY {
157 IrqPriorityUndefined = 0,
158 IrqPriorityLow,
159 IrqPriorityNormal,
160 IrqPriorityHigh
161 } IRQ_PRIORITY, *PIRQ_PRIORITY;
162
163 typedef enum _IRQ_GROUP_POLICY {
164 GroupAffinityAllGroupZero = 0,
165 GroupAffinityDontCare
166 } IRQ_GROUP_POLICY, *PIRQ_GROUP_POLICY;
167
168 #define MAXIMUM_VOLUME_LABEL_LENGTH (32 * sizeof(WCHAR))
169
170 typedef struct _OBJECT_HANDLE_INFORMATION {
171 ULONG HandleAttributes;
172 ACCESS_MASK GrantedAccess;
173 } OBJECT_HANDLE_INFORMATION, *POBJECT_HANDLE_INFORMATION;
174
175 typedef struct _CLIENT_ID {
176 HANDLE UniqueProcess;
177 HANDLE UniqueThread;
178 } CLIENT_ID, *PCLIENT_ID;
179
180 typedef struct _VPB {
181 CSHORT Type;
182 CSHORT Size;
183 USHORT Flags;
184 USHORT VolumeLabelLength;
185 struct _DEVICE_OBJECT *DeviceObject;
186 struct _DEVICE_OBJECT *RealDevice;
187 ULONG SerialNumber;
188 ULONG ReferenceCount;
189 WCHAR VolumeLabel[MAXIMUM_VOLUME_LABEL_LENGTH / sizeof(WCHAR)];
190 } VPB, *PVPB;
191
192 typedef enum _IO_ALLOCATION_ACTION {
193 KeepObject = 1,
194 DeallocateObject,
195 DeallocateObjectKeepRegisters
196 } IO_ALLOCATION_ACTION, *PIO_ALLOCATION_ACTION;
197
198 typedef IO_ALLOCATION_ACTION
199 (NTAPI DRIVER_CONTROL)(
200 IN struct _DEVICE_OBJECT *DeviceObject,
201 IN struct _IRP *Irp,
202 IN PVOID MapRegisterBase,
203 IN PVOID Context);
204 typedef DRIVER_CONTROL *PDRIVER_CONTROL;
205
206 typedef struct _WAIT_CONTEXT_BLOCK {
207 KDEVICE_QUEUE_ENTRY WaitQueueEntry;
208 PDRIVER_CONTROL DeviceRoutine;
209 PVOID DeviceContext;
210 ULONG NumberOfMapRegisters;
211 PVOID DeviceObject;
212 PVOID CurrentIrp;
213 PKDPC BufferChainingDpc;
214 } WAIT_CONTEXT_BLOCK, *PWAIT_CONTEXT_BLOCK;
215
216 $endif
217 $if (_WDMDDK_ || _NTDDK_)
218 /* DEVICE_OBJECT.Flags */
219 $endif
220 $if (_NTDDK_)
221 #define DO_DEVICE_HAS_NAME 0x00000040
222 #define DO_SYSTEM_BOOT_PARTITION 0x00000100
223 #define DO_LONG_TERM_REQUESTS 0x00000200
224 #define DO_NEVER_LAST_DEVICE 0x00000400
225 #define DO_LOW_PRIORITY_FILESYSTEM 0x00010000
226 #define DO_SUPPORTS_TRANSACTIONS 0x00040000
227 #define DO_FORCE_NEITHER_IO 0x00080000
228 #define DO_VOLUME_DEVICE_OBJECT 0x00100000
229 #define DO_SYSTEM_SYSTEM_PARTITION 0x00200000
230 #define DO_SYSTEM_CRITICAL_PARTITION 0x00400000
231 #define DO_DISALLOW_EXECUTE 0x00800000
232 $endif
233 $if (_WDMDDK_)
234 #define DO_VERIFY_VOLUME 0x00000002
235 #define DO_BUFFERED_IO 0x00000004
236 #define DO_EXCLUSIVE 0x00000008
237 #define DO_DIRECT_IO 0x00000010
238 #define DO_MAP_IO_BUFFER 0x00000020
239 #define DO_DEVICE_INITIALIZING 0x00000080
240 #define DO_SHUTDOWN_REGISTERED 0x00000800
241 #define DO_BUS_ENUMERATED_DEVICE 0x00001000
242 #define DO_POWER_PAGABLE 0x00002000
243 #define DO_POWER_INRUSH 0x00004000
244
245 /* DEVICE_OBJECT.Characteristics */
246 #define FILE_REMOVABLE_MEDIA 0x00000001
247 #define FILE_READ_ONLY_DEVICE 0x00000002
248 #define FILE_FLOPPY_DISKETTE 0x00000004
249 #define FILE_WRITE_ONCE_MEDIA 0x00000008
250 #define FILE_REMOTE_DEVICE 0x00000010
251 #define FILE_DEVICE_IS_MOUNTED 0x00000020
252 #define FILE_VIRTUAL_VOLUME 0x00000040
253 #define FILE_AUTOGENERATED_DEVICE_NAME 0x00000080
254 #define FILE_DEVICE_SECURE_OPEN 0x00000100
255 #define FILE_CHARACTERISTIC_PNP_DEVICE 0x00000800
256 #define FILE_CHARACTERISTIC_TS_DEVICE 0x00001000
257 #define FILE_CHARACTERISTIC_WEBDAV_DEVICE 0x00002000
258
259 /* DEVICE_OBJECT.AlignmentRequirement */
260 #define FILE_BYTE_ALIGNMENT 0x00000000
261 #define FILE_WORD_ALIGNMENT 0x00000001
262 #define FILE_LONG_ALIGNMENT 0x00000003
263 #define FILE_QUAD_ALIGNMENT 0x00000007
264 #define FILE_OCTA_ALIGNMENT 0x0000000f
265 #define FILE_32_BYTE_ALIGNMENT 0x0000001f
266 #define FILE_64_BYTE_ALIGNMENT 0x0000003f
267 #define FILE_128_BYTE_ALIGNMENT 0x0000007f
268 #define FILE_256_BYTE_ALIGNMENT 0x000000ff
269 #define FILE_512_BYTE_ALIGNMENT 0x000001ff
270 $endif
271 $if (_WDMDDK_ || _DEVIOCTL_)
272
273 /* DEVICE_OBJECT.DeviceType */
274 #define DEVICE_TYPE ULONG
275 $endif
276 $if (_WDMDDK_)
277
278 typedef struct _DEVICE_OBJECT {
279 CSHORT Type;
280 USHORT Size;
281 LONG ReferenceCount;
282 struct _DRIVER_OBJECT *DriverObject;
283 struct _DEVICE_OBJECT *NextDevice;
284 struct _DEVICE_OBJECT *AttachedDevice;
285 struct _IRP *CurrentIrp;
286 PIO_TIMER Timer;
287 ULONG Flags;
288 ULONG Characteristics;
289 volatile PVPB Vpb;
290 PVOID DeviceExtension;
291 DEVICE_TYPE DeviceType;
292 CCHAR StackSize;
293 union {
294 LIST_ENTRY ListEntry;
295 WAIT_CONTEXT_BLOCK Wcb;
296 } Queue;
297 ULONG AlignmentRequirement;
298 KDEVICE_QUEUE DeviceQueue;
299 KDPC Dpc;
300 ULONG ActiveThreadCount;
301 PSECURITY_DESCRIPTOR SecurityDescriptor;
302 KEVENT DeviceLock;
303 USHORT SectorSize;
304 USHORT Spare1;
305 struct _DEVOBJ_EXTENSION *DeviceObjectExtension;
306 PVOID Reserved;
307 } DEVICE_OBJECT, *PDEVICE_OBJECT;
308
309 typedef enum _IO_SESSION_STATE {
310 IoSessionStateCreated = 1,
311 IoSessionStateInitialized,
312 IoSessionStateConnected,
313 IoSessionStateDisconnected,
314 IoSessionStateDisconnectedLoggedOn,
315 IoSessionStateLoggedOn,
316 IoSessionStateLoggedOff,
317 IoSessionStateTerminated,
318 IoSessionStateMax
319 } IO_SESSION_STATE, *PIO_SESSION_STATE;
320
321 typedef enum _IO_COMPLETION_ROUTINE_RESULT {
322 ContinueCompletion = STATUS_CONTINUE_COMPLETION,
323 StopCompletion = STATUS_MORE_PROCESSING_REQUIRED
324 } IO_COMPLETION_ROUTINE_RESULT, *PIO_COMPLETION_ROUTINE_RESULT;
325
326 typedef struct _IO_INTERRUPT_MESSAGE_INFO_ENTRY {
327 PHYSICAL_ADDRESS MessageAddress;
328 KAFFINITY TargetProcessorSet;
329 PKINTERRUPT InterruptObject;
330 ULONG MessageData;
331 ULONG Vector;
332 KIRQL Irql;
333 KINTERRUPT_MODE Mode;
334 KINTERRUPT_POLARITY Polarity;
335 } IO_INTERRUPT_MESSAGE_INFO_ENTRY, *PIO_INTERRUPT_MESSAGE_INFO_ENTRY;
336
337 typedef struct _IO_INTERRUPT_MESSAGE_INFO {
338 KIRQL UnifiedIrql;
339 ULONG MessageCount;
340 IO_INTERRUPT_MESSAGE_INFO_ENTRY MessageInfo[1];
341 } IO_INTERRUPT_MESSAGE_INFO, *PIO_INTERRUPT_MESSAGE_INFO;
342
343 typedef struct _IO_CONNECT_INTERRUPT_FULLY_SPECIFIED_PARAMETERS {
344 IN PDEVICE_OBJECT PhysicalDeviceObject;
345 OUT PKINTERRUPT *InterruptObject;
346 IN PKSERVICE_ROUTINE ServiceRoutine;
347 IN PVOID ServiceContext;
348 IN PKSPIN_LOCK SpinLock OPTIONAL;
349 IN KIRQL SynchronizeIrql;
350 IN BOOLEAN FloatingSave;
351 IN BOOLEAN ShareVector;
352 IN ULONG Vector;
353 IN KIRQL Irql;
354 IN KINTERRUPT_MODE InterruptMode;
355 IN KAFFINITY ProcessorEnableMask;
356 IN USHORT Group;
357 } IO_CONNECT_INTERRUPT_FULLY_SPECIFIED_PARAMETERS, *PIO_CONNECT_INTERRUPT_FULLY_SPECIFIED_PARAMETERS;
358
359 typedef struct _IO_CONNECT_INTERRUPT_LINE_BASED_PARAMETERS {
360 IN PDEVICE_OBJECT PhysicalDeviceObject;
361 OUT PKINTERRUPT *InterruptObject;
362 IN PKSERVICE_ROUTINE ServiceRoutine;
363 IN PVOID ServiceContext;
364 IN PKSPIN_LOCK SpinLock OPTIONAL;
365 IN KIRQL SynchronizeIrql OPTIONAL;
366 IN BOOLEAN FloatingSave;
367 } IO_CONNECT_INTERRUPT_LINE_BASED_PARAMETERS, *PIO_CONNECT_INTERRUPT_LINE_BASED_PARAMETERS;
368
369 typedef struct _IO_CONNECT_INTERRUPT_MESSAGE_BASED_PARAMETERS {
370 IN PDEVICE_OBJECT PhysicalDeviceObject;
371 union {
372 OUT PVOID *Generic;
373 OUT PIO_INTERRUPT_MESSAGE_INFO *InterruptMessageTable;
374 OUT PKINTERRUPT *InterruptObject;
375 } ConnectionContext;
376 IN PKMESSAGE_SERVICE_ROUTINE MessageServiceRoutine;
377 IN PVOID ServiceContext;
378 IN PKSPIN_LOCK SpinLock OPTIONAL;
379 IN KIRQL SynchronizeIrql OPTIONAL;
380 IN BOOLEAN FloatingSave;
381 IN PKSERVICE_ROUTINE FallBackServiceRoutine OPTIONAL;
382 } IO_CONNECT_INTERRUPT_MESSAGE_BASED_PARAMETERS, *PIO_CONNECT_INTERRUPT_MESSAGE_BASED_PARAMETERS;
383
384 typedef struct _IO_CONNECT_INTERRUPT_PARAMETERS {
385 IN OUT ULONG Version;
386 union {
387 IO_CONNECT_INTERRUPT_FULLY_SPECIFIED_PARAMETERS FullySpecified;
388 IO_CONNECT_INTERRUPT_LINE_BASED_PARAMETERS LineBased;
389 IO_CONNECT_INTERRUPT_MESSAGE_BASED_PARAMETERS MessageBased;
390 };
391 } IO_CONNECT_INTERRUPT_PARAMETERS, *PIO_CONNECT_INTERRUPT_PARAMETERS;
392
393 typedef struct _IO_DISCONNECT_INTERRUPT_PARAMETERS {
394 IN ULONG Version;
395 union {
396 IN PVOID Generic;
397 IN PKINTERRUPT InterruptObject;
398 IN PIO_INTERRUPT_MESSAGE_INFO InterruptMessageTable;
399 } ConnectionContext;
400 } IO_DISCONNECT_INTERRUPT_PARAMETERS, *PIO_DISCONNECT_INTERRUPT_PARAMETERS;
401
402 typedef enum _IO_ACCESS_TYPE {
403 ReadAccess,
404 WriteAccess,
405 ModifyAccess
406 } IO_ACCESS_TYPE;
407
408 typedef enum _IO_ACCESS_MODE {
409 SequentialAccess,
410 RandomAccess
411 } IO_ACCESS_MODE;
412
413 typedef enum _IO_CONTAINER_NOTIFICATION_CLASS {
414 IoSessionStateNotification,
415 IoMaxContainerNotificationClass
416 } IO_CONTAINER_NOTIFICATION_CLASS;
417
418 typedef struct _IO_SESSION_STATE_NOTIFICATION {
419 ULONG Size;
420 ULONG Flags;
421 PVOID IoObject;
422 ULONG EventMask;
423 PVOID Context;
424 } IO_SESSION_STATE_NOTIFICATION, *PIO_SESSION_STATE_NOTIFICATION;
425
426 typedef enum _IO_CONTAINER_INFORMATION_CLASS {
427 IoSessionStateInformation,
428 IoMaxContainerInformationClass
429 } IO_CONTAINER_INFORMATION_CLASS;
430
431 typedef struct _IO_SESSION_STATE_INFORMATION {
432 ULONG SessionId;
433 IO_SESSION_STATE SessionState;
434 BOOLEAN LocalSession;
435 } IO_SESSION_STATE_INFORMATION, *PIO_SESSION_STATE_INFORMATION;
436
437 #if (NTDDI_VERSION >= NTDDI_WIN7)
438
439 typedef NTSTATUS
440 (NTAPI *PIO_CONTAINER_NOTIFICATION_FUNCTION)(
441 VOID);
442
443 typedef NTSTATUS
444 (NTAPI IO_SESSION_NOTIFICATION_FUNCTION)(
445 IN PVOID SessionObject,
446 IN PVOID IoObject,
447 IN ULONG Event,
448 IN PVOID Context,
449 IN PVOID NotificationPayload,
450 IN ULONG PayloadLength);
451
452 typedef IO_SESSION_NOTIFICATION_FUNCTION *PIO_SESSION_NOTIFICATION_FUNCTION;
453
454 #endif
455
456 typedef struct _IO_REMOVE_LOCK_TRACKING_BLOCK * PIO_REMOVE_LOCK_TRACKING_BLOCK;
457
458 typedef struct _IO_REMOVE_LOCK_COMMON_BLOCK {
459 BOOLEAN Removed;
460 BOOLEAN Reserved[3];
461 volatile LONG IoCount;
462 KEVENT RemoveEvent;
463 } IO_REMOVE_LOCK_COMMON_BLOCK;
464
465 typedef struct _IO_REMOVE_LOCK_DBG_BLOCK {
466 LONG Signature;
467 LONG HighWatermark;
468 LONGLONG MaxLockedTicks;
469 LONG AllocateTag;
470 LIST_ENTRY LockList;
471 KSPIN_LOCK Spin;
472 volatile LONG LowMemoryCount;
473 ULONG Reserved1[4];
474 PVOID Reserved2;
475 PIO_REMOVE_LOCK_TRACKING_BLOCK Blocks;
476 } IO_REMOVE_LOCK_DBG_BLOCK;
477
478 typedef struct _IO_REMOVE_LOCK {
479 IO_REMOVE_LOCK_COMMON_BLOCK Common;
480 #if DBG
481 IO_REMOVE_LOCK_DBG_BLOCK Dbg;
482 #endif
483 } IO_REMOVE_LOCK, *PIO_REMOVE_LOCK;
484
485 typedef struct _IO_WORKITEM *PIO_WORKITEM;
486
487 typedef VOID
488 (NTAPI IO_WORKITEM_ROUTINE)(
489 IN PDEVICE_OBJECT DeviceObject,
490 IN PVOID Context);
491 typedef IO_WORKITEM_ROUTINE *PIO_WORKITEM_ROUTINE;
492
493 typedef VOID
494 (NTAPI IO_WORKITEM_ROUTINE_EX)(
495 IN PVOID IoObject,
496 IN PVOID Context OPTIONAL,
497 IN PIO_WORKITEM IoWorkItem);
498 typedef IO_WORKITEM_ROUTINE_EX *PIO_WORKITEM_ROUTINE_EX;
499
500 typedef struct _SHARE_ACCESS {
501 ULONG OpenCount;
502 ULONG Readers;
503 ULONG Writers;
504 ULONG Deleters;
505 ULONG SharedRead;
506 ULONG SharedWrite;
507 ULONG SharedDelete;
508 } SHARE_ACCESS, *PSHARE_ACCESS;
509
510 /* While MS WDK uses inheritance in C++, we cannot do this with gcc, as
511 inheritance, even from a struct renders the type non-POD. So we use
512 this hack */
513 #define PCI_COMMON_HEADER_LAYOUT \
514 USHORT VendorID; \
515 USHORT DeviceID; \
516 USHORT Command; \
517 USHORT Status; \
518 UCHAR RevisionID; \
519 UCHAR ProgIf; \
520 UCHAR SubClass; \
521 UCHAR BaseClass; \
522 UCHAR CacheLineSize; \
523 UCHAR LatencyTimer; \
524 UCHAR HeaderType; \
525 UCHAR BIST; \
526 union { \
527 struct _PCI_HEADER_TYPE_0 { \
528 ULONG BaseAddresses[PCI_TYPE0_ADDRESSES]; \
529 ULONG CIS; \
530 USHORT SubVendorID; \
531 USHORT SubSystemID; \
532 ULONG ROMBaseAddress; \
533 UCHAR CapabilitiesPtr; \
534 UCHAR Reserved1[3]; \
535 ULONG Reserved2; \
536 UCHAR InterruptLine; \
537 UCHAR InterruptPin; \
538 UCHAR MinimumGrant; \
539 UCHAR MaximumLatency; \
540 } type0; \
541 struct _PCI_HEADER_TYPE_1 { \
542 ULONG BaseAddresses[PCI_TYPE1_ADDRESSES]; \
543 UCHAR PrimaryBus; \
544 UCHAR SecondaryBus; \
545 UCHAR SubordinateBus; \
546 UCHAR SecondaryLatency; \
547 UCHAR IOBase; \
548 UCHAR IOLimit; \
549 USHORT SecondaryStatus; \
550 USHORT MemoryBase; \
551 USHORT MemoryLimit; \
552 USHORT PrefetchBase; \
553 USHORT PrefetchLimit; \
554 ULONG PrefetchBaseUpper32; \
555 ULONG PrefetchLimitUpper32; \
556 USHORT IOBaseUpper16; \
557 USHORT IOLimitUpper16; \
558 UCHAR CapabilitiesPtr; \
559 UCHAR Reserved1[3]; \
560 ULONG ROMBaseAddress; \
561 UCHAR InterruptLine; \
562 UCHAR InterruptPin; \
563 USHORT BridgeControl; \
564 } type1; \
565 struct _PCI_HEADER_TYPE_2 { \
566 ULONG SocketRegistersBaseAddress; \
567 UCHAR CapabilitiesPtr; \
568 UCHAR Reserved; \
569 USHORT SecondaryStatus; \
570 UCHAR PrimaryBus; \
571 UCHAR SecondaryBus; \
572 UCHAR SubordinateBus; \
573 UCHAR SecondaryLatency; \
574 struct { \
575 ULONG Base; \
576 ULONG Limit; \
577 } Range[PCI_TYPE2_ADDRESSES-1]; \
578 UCHAR InterruptLine; \
579 UCHAR InterruptPin; \
580 USHORT BridgeControl; \
581 } type2; \
582 } u;
583
584 typedef enum _CREATE_FILE_TYPE {
585 CreateFileTypeNone,
586 CreateFileTypeNamedPipe,
587 CreateFileTypeMailslot
588 } CREATE_FILE_TYPE;
589
590 #define IO_FORCE_ACCESS_CHECK 0x001
591 #define IO_NO_PARAMETER_CHECKING 0x100
592
593 #define IO_REPARSE 0x0
594 #define IO_REMOUNT 0x1
595
596 typedef struct _IO_STATUS_BLOCK {
597 _ANONYMOUS_UNION union {
598 NTSTATUS Status;
599 PVOID Pointer;
600 } DUMMYUNIONNAME;
601 ULONG_PTR Information;
602 } IO_STATUS_BLOCK, *PIO_STATUS_BLOCK;
603
604 #if defined(_WIN64)
605 typedef struct _IO_STATUS_BLOCK32 {
606 NTSTATUS Status;
607 ULONG Information;
608 } IO_STATUS_BLOCK32, *PIO_STATUS_BLOCK32;
609 #endif
610
611 typedef VOID
612 (NTAPI *PIO_APC_ROUTINE)(
613 IN PVOID ApcContext,
614 IN PIO_STATUS_BLOCK IoStatusBlock,
615 IN ULONG Reserved);
616
617 #define PIO_APC_ROUTINE_DEFINED
618
619 typedef enum _IO_SESSION_EVENT {
620 IoSessionEventIgnore = 0,
621 IoSessionEventCreated,
622 IoSessionEventTerminated,
623 IoSessionEventConnected,
624 IoSessionEventDisconnected,
625 IoSessionEventLogon,
626 IoSessionEventLogoff,
627 IoSessionEventMax
628 } IO_SESSION_EVENT, *PIO_SESSION_EVENT;
629
630 #define IO_SESSION_STATE_ALL_EVENTS 0xffffffff
631 #define IO_SESSION_STATE_CREATION_EVENT 0x00000001
632 #define IO_SESSION_STATE_TERMINATION_EVENT 0x00000002
633 #define IO_SESSION_STATE_CONNECT_EVENT 0x00000004
634 #define IO_SESSION_STATE_DISCONNECT_EVENT 0x00000008
635 #define IO_SESSION_STATE_LOGON_EVENT 0x00000010
636 #define IO_SESSION_STATE_LOGOFF_EVENT 0x00000020
637
638 #define IO_SESSION_STATE_VALID_EVENT_MASK 0x0000003f
639
640 #define IO_SESSION_MAX_PAYLOAD_SIZE 256L
641
642 typedef struct _IO_SESSION_CONNECT_INFO {
643 ULONG SessionId;
644 BOOLEAN LocalSession;
645 } IO_SESSION_CONNECT_INFO, *PIO_SESSION_CONNECT_INFO;
646
647 #define EVENT_INCREMENT 1
648 #define IO_NO_INCREMENT 0
649 #define IO_CD_ROM_INCREMENT 1
650 #define IO_DISK_INCREMENT 1
651 #define IO_KEYBOARD_INCREMENT 6
652 #define IO_MAILSLOT_INCREMENT 2
653 #define IO_MOUSE_INCREMENT 6
654 #define IO_NAMED_PIPE_INCREMENT 2
655 #define IO_NETWORK_INCREMENT 2
656 #define IO_PARALLEL_INCREMENT 1
657 #define IO_SERIAL_INCREMENT 2
658 #define IO_SOUND_INCREMENT 8
659 #define IO_VIDEO_INCREMENT 1
660 #define SEMAPHORE_INCREMENT 1
661
662 #define MM_MAXIMUM_DISK_IO_SIZE (0x10000)
663
664 typedef struct _BOOTDISK_INFORMATION {
665 LONGLONG BootPartitionOffset;
666 LONGLONG SystemPartitionOffset;
667 ULONG BootDeviceSignature;
668 ULONG SystemDeviceSignature;
669 } BOOTDISK_INFORMATION, *PBOOTDISK_INFORMATION;
670
671 typedef struct _BOOTDISK_INFORMATION_EX {
672 LONGLONG BootPartitionOffset;
673 LONGLONG SystemPartitionOffset;
674 ULONG BootDeviceSignature;
675 ULONG SystemDeviceSignature;
676 GUID BootDeviceGuid;
677 GUID SystemDeviceGuid;
678 BOOLEAN BootDeviceIsGpt;
679 BOOLEAN SystemDeviceIsGpt;
680 } BOOTDISK_INFORMATION_EX, *PBOOTDISK_INFORMATION_EX;
681
682 #if (NTDDI_VERSION >= NTDDI_WIN7)
683
684 typedef struct _LOADER_PARTITION_INFORMATION_EX {
685 ULONG PartitionStyle;
686 ULONG PartitionNumber;
687 union {
688 ULONG Signature;
689 GUID DeviceId;
690 };
691 ULONG Flags;
692 } LOADER_PARTITION_INFORMATION_EX, *PLOADER_PARTITION_INFORMATION_EX;
693
694 typedef struct _BOOTDISK_INFORMATION_LITE {
695 ULONG NumberEntries;
696 LOADER_PARTITION_INFORMATION_EX Entries[1];
697 } BOOTDISK_INFORMATION_LITE, *PBOOTDISK_INFORMATION_LITE;
698
699 #else
700
701 #if (NTDDI_VERSION >= NTDDI_VISTA)
702 typedef struct _BOOTDISK_INFORMATION_LITE {
703 ULONG BootDeviceSignature;
704 ULONG SystemDeviceSignature;
705 GUID BootDeviceGuid;
706 GUID SystemDeviceGuid;
707 BOOLEAN BootDeviceIsGpt;
708 BOOLEAN SystemDeviceIsGpt;
709 } BOOTDISK_INFORMATION_LITE, *PBOOTDISK_INFORMATION_LITE;
710 #endif /* (NTDDI_VERSION >= NTDDI_VISTA) */
711
712 #endif /* (NTDDI_VERSION >= NTDDI_WIN7) */
713
714 #include <pshpack1.h>
715
716 typedef struct _EISA_MEMORY_TYPE {
717 UCHAR ReadWrite:1;
718 UCHAR Cached:1;
719 UCHAR Reserved0:1;
720 UCHAR Type:2;
721 UCHAR Shared:1;
722 UCHAR Reserved1:1;
723 UCHAR MoreEntries:1;
724 } EISA_MEMORY_TYPE, *PEISA_MEMORY_TYPE;
725
726 typedef struct _EISA_MEMORY_CONFIGURATION {
727 EISA_MEMORY_TYPE ConfigurationByte;
728 UCHAR DataSize;
729 USHORT AddressLowWord;
730 UCHAR AddressHighByte;
731 USHORT MemorySize;
732 } EISA_MEMORY_CONFIGURATION, *PEISA_MEMORY_CONFIGURATION;
733
734 typedef struct _EISA_IRQ_DESCRIPTOR {
735 UCHAR Interrupt:4;
736 UCHAR Reserved:1;
737 UCHAR LevelTriggered:1;
738 UCHAR Shared:1;
739 UCHAR MoreEntries:1;
740 } EISA_IRQ_DESCRIPTOR, *PEISA_IRQ_DESCRIPTOR;
741
742 typedef struct _EISA_IRQ_CONFIGURATION {
743 EISA_IRQ_DESCRIPTOR ConfigurationByte;
744 UCHAR Reserved;
745 } EISA_IRQ_CONFIGURATION, *PEISA_IRQ_CONFIGURATION;
746
747 typedef struct _DMA_CONFIGURATION_BYTE0 {
748 UCHAR Channel:3;
749 UCHAR Reserved:3;
750 UCHAR Shared:1;
751 UCHAR MoreEntries:1;
752 } DMA_CONFIGURATION_BYTE0;
753
754 typedef struct _DMA_CONFIGURATION_BYTE1 {
755 UCHAR Reserved0:2;
756 UCHAR TransferSize:2;
757 UCHAR Timing:2;
758 UCHAR Reserved1:2;
759 } DMA_CONFIGURATION_BYTE1;
760
761 typedef struct _EISA_DMA_CONFIGURATION {
762 DMA_CONFIGURATION_BYTE0 ConfigurationByte0;
763 DMA_CONFIGURATION_BYTE1 ConfigurationByte1;
764 } EISA_DMA_CONFIGURATION, *PEISA_DMA_CONFIGURATION;
765
766 typedef struct _EISA_PORT_DESCRIPTOR {
767 UCHAR NumberPorts:5;
768 UCHAR Reserved:1;
769 UCHAR Shared:1;
770 UCHAR MoreEntries:1;
771 } EISA_PORT_DESCRIPTOR, *PEISA_PORT_DESCRIPTOR;
772
773 typedef struct _EISA_PORT_CONFIGURATION {
774 EISA_PORT_DESCRIPTOR Configuration;
775 USHORT PortAddress;
776 } EISA_PORT_CONFIGURATION, *PEISA_PORT_CONFIGURATION;
777
778 typedef struct _CM_EISA_SLOT_INFORMATION {
779 UCHAR ReturnCode;
780 UCHAR ReturnFlags;
781 UCHAR MajorRevision;
782 UCHAR MinorRevision;
783 USHORT Checksum;
784 UCHAR NumberFunctions;
785 UCHAR FunctionInformation;
786 ULONG CompressedId;
787 } CM_EISA_SLOT_INFORMATION, *PCM_EISA_SLOT_INFORMATION;
788
789 typedef struct _CM_EISA_FUNCTION_INFORMATION {
790 ULONG CompressedId;
791 UCHAR IdSlotFlags1;
792 UCHAR IdSlotFlags2;
793 UCHAR MinorRevision;
794 UCHAR MajorRevision;
795 UCHAR Selections[26];
796 UCHAR FunctionFlags;
797 UCHAR TypeString[80];
798 EISA_MEMORY_CONFIGURATION EisaMemory[9];
799 EISA_IRQ_CONFIGURATION EisaIrq[7];
800 EISA_DMA_CONFIGURATION EisaDma[4];
801 EISA_PORT_CONFIGURATION EisaPort[20];
802 UCHAR InitializationData[60];
803 } CM_EISA_FUNCTION_INFORMATION, *PCM_EISA_FUNCTION_INFORMATION;
804
805 #include <poppack.h>
806
807 /* CM_EISA_FUNCTION_INFORMATION.FunctionFlags */
808
809 #define EISA_FUNCTION_ENABLED 0x80
810 #define EISA_FREE_FORM_DATA 0x40
811 #define EISA_HAS_PORT_INIT_ENTRY 0x20
812 #define EISA_HAS_PORT_RANGE 0x10
813 #define EISA_HAS_DMA_ENTRY 0x08
814 #define EISA_HAS_IRQ_ENTRY 0x04
815 #define EISA_HAS_MEMORY_ENTRY 0x02
816 #define EISA_HAS_TYPE_ENTRY 0x01
817 #define EISA_HAS_INFORMATION \
818 (EISA_HAS_PORT_RANGE + EISA_HAS_DMA_ENTRY + EISA_HAS_IRQ_ENTRY \
819 + EISA_HAS_MEMORY_ENTRY + EISA_HAS_TYPE_ENTRY)
820
821 #define EISA_MORE_ENTRIES 0x80
822 #define EISA_SYSTEM_MEMORY 0x00
823 #define EISA_MEMORY_TYPE_RAM 0x01
824
825 /* CM_EISA_SLOT_INFORMATION.ReturnCode */
826
827 #define EISA_INVALID_SLOT 0x80
828 #define EISA_INVALID_FUNCTION 0x81
829 #define EISA_INVALID_CONFIGURATION 0x82
830 #define EISA_EMPTY_SLOT 0x83
831 #define EISA_INVALID_BIOS_CALL 0x86
832
833 /*
834 ** Plug and Play structures
835 */
836
837 typedef VOID
838 (NTAPI *PINTERFACE_REFERENCE)(
839 PVOID Context);
840
841 typedef VOID
842 (NTAPI *PINTERFACE_DEREFERENCE)(
843 PVOID Context);
844
845 typedef BOOLEAN
846 (NTAPI TRANSLATE_BUS_ADDRESS)(
847 IN PVOID Context,
848 IN PHYSICAL_ADDRESS BusAddress,
849 IN ULONG Length,
850 IN OUT PULONG AddressSpace,
851 OUT PPHYSICAL_ADDRESS TranslatedAddress);
852 typedef TRANSLATE_BUS_ADDRESS *PTRANSLATE_BUS_ADDRESS;
853
854 typedef struct _DMA_ADAPTER*
855 (NTAPI GET_DMA_ADAPTER)(
856 IN PVOID Context,
857 IN struct _DEVICE_DESCRIPTION *DeviceDescriptor,
858 OUT PULONG NumberOfMapRegisters);
859 typedef GET_DMA_ADAPTER *PGET_DMA_ADAPTER;
860
861 typedef ULONG
862 (NTAPI GET_SET_DEVICE_DATA)(
863 IN PVOID Context,
864 IN ULONG DataType,
865 IN PVOID Buffer,
866 IN ULONG Offset,
867 IN ULONG Length);
868 typedef GET_SET_DEVICE_DATA *PGET_SET_DEVICE_DATA;
869
870 typedef enum _DEVICE_INSTALL_STATE {
871 InstallStateInstalled,
872 InstallStateNeedsReinstall,
873 InstallStateFailedInstall,
874 InstallStateFinishInstall
875 } DEVICE_INSTALL_STATE, *PDEVICE_INSTALL_STATE;
876
877 typedef struct _LEGACY_BUS_INFORMATION {
878 GUID BusTypeGuid;
879 INTERFACE_TYPE LegacyBusType;
880 ULONG BusNumber;
881 } LEGACY_BUS_INFORMATION, *PLEGACY_BUS_INFORMATION;
882
883 typedef enum _DEVICE_REMOVAL_POLICY {
884 RemovalPolicyExpectNoRemoval = 1,
885 RemovalPolicyExpectOrderlyRemoval = 2,
886 RemovalPolicyExpectSurpriseRemoval = 3
887 } DEVICE_REMOVAL_POLICY, *PDEVICE_REMOVAL_POLICY;
888
889 typedef VOID
890 (NTAPI*PREENUMERATE_SELF)(
891 IN PVOID Context);
892
893 typedef struct _REENUMERATE_SELF_INTERFACE_STANDARD {
894 USHORT Size;
895 USHORT Version;
896 PVOID Context;
897 PINTERFACE_REFERENCE InterfaceReference;
898 PINTERFACE_DEREFERENCE InterfaceDereference;
899 PREENUMERATE_SELF SurpriseRemoveAndReenumerateSelf;
900 } REENUMERATE_SELF_INTERFACE_STANDARD, *PREENUMERATE_SELF_INTERFACE_STANDARD;
901
902 typedef VOID
903 (NTAPI *PIO_DEVICE_EJECT_CALLBACK)(
904 IN NTSTATUS Status,
905 IN OUT PVOID Context OPTIONAL);
906
907 #define PCI_DEVICE_PRESENT_INTERFACE_VERSION 1
908
909 /* PCI_DEVICE_PRESENCE_PARAMETERS.Flags */
910 #define PCI_USE_SUBSYSTEM_IDS 0x00000001
911 #define PCI_USE_REVISION 0x00000002
912 #define PCI_USE_VENDEV_IDS 0x00000004
913 #define PCI_USE_CLASS_SUBCLASS 0x00000008
914 #define PCI_USE_PROGIF 0x00000010
915 #define PCI_USE_LOCAL_BUS 0x00000020
916 #define PCI_USE_LOCAL_DEVICE 0x00000040
917
918 typedef struct _PCI_DEVICE_PRESENCE_PARAMETERS {
919 ULONG Size;
920 ULONG Flags;
921 USHORT VendorID;
922 USHORT DeviceID;
923 UCHAR RevisionID;
924 USHORT SubVendorID;
925 USHORT SubSystemID;
926 UCHAR BaseClass;
927 UCHAR SubClass;
928 UCHAR ProgIf;
929 } PCI_DEVICE_PRESENCE_PARAMETERS, *PPCI_DEVICE_PRESENCE_PARAMETERS;
930
931 typedef BOOLEAN
932 (NTAPI PCI_IS_DEVICE_PRESENT)(
933 IN USHORT VendorID,
934 IN USHORT DeviceID,
935 IN UCHAR RevisionID,
936 IN USHORT SubVendorID,
937 IN USHORT SubSystemID,
938 IN ULONG Flags);
939 typedef PCI_IS_DEVICE_PRESENT *PPCI_IS_DEVICE_PRESENT;
940
941 typedef BOOLEAN
942 (NTAPI PCI_IS_DEVICE_PRESENT_EX)(
943 IN PVOID Context,
944 IN PPCI_DEVICE_PRESENCE_PARAMETERS Parameters);
945 typedef PCI_IS_DEVICE_PRESENT_EX *PPCI_IS_DEVICE_PRESENT_EX;
946
947 typedef struct _BUS_INTERFACE_STANDARD {
948 USHORT Size;
949 USHORT Version;
950 PVOID Context;
951 PINTERFACE_REFERENCE InterfaceReference;
952 PINTERFACE_DEREFERENCE InterfaceDereference;
953 PTRANSLATE_BUS_ADDRESS TranslateBusAddress;
954 PGET_DMA_ADAPTER GetDmaAdapter;
955 PGET_SET_DEVICE_DATA SetBusData;
956 PGET_SET_DEVICE_DATA GetBusData;
957 } BUS_INTERFACE_STANDARD, *PBUS_INTERFACE_STANDARD;
958
959 typedef struct _PCI_DEVICE_PRESENT_INTERFACE {
960 USHORT Size;
961 USHORT Version;
962 PVOID Context;
963 PINTERFACE_REFERENCE InterfaceReference;
964 PINTERFACE_DEREFERENCE InterfaceDereference;
965 PPCI_IS_DEVICE_PRESENT IsDevicePresent;
966 PPCI_IS_DEVICE_PRESENT_EX IsDevicePresentEx;
967 } PCI_DEVICE_PRESENT_INTERFACE, *PPCI_DEVICE_PRESENT_INTERFACE;
968
969 typedef struct _DEVICE_CAPABILITIES {
970 USHORT Size;
971 USHORT Version;
972 ULONG DeviceD1:1;
973 ULONG DeviceD2:1;
974 ULONG LockSupported:1;
975 ULONG EjectSupported:1;
976 ULONG Removable:1;
977 ULONG DockDevice:1;
978 ULONG UniqueID:1;
979 ULONG SilentInstall:1;
980 ULONG RawDeviceOK:1;
981 ULONG SurpriseRemovalOK:1;
982 ULONG WakeFromD0:1;
983 ULONG WakeFromD1:1;
984 ULONG WakeFromD2:1;
985 ULONG WakeFromD3:1;
986 ULONG HardwareDisabled:1;
987 ULONG NonDynamic:1;
988 ULONG WarmEjectSupported:1;
989 ULONG NoDisplayInUI:1;
990 ULONG Reserved:14;
991 ULONG Address;
992 ULONG UINumber;
993 DEVICE_POWER_STATE DeviceState[PowerSystemMaximum];
994 SYSTEM_POWER_STATE SystemWake;
995 DEVICE_POWER_STATE DeviceWake;
996 ULONG D1Latency;
997 ULONG D2Latency;
998 ULONG D3Latency;
999 } DEVICE_CAPABILITIES, *PDEVICE_CAPABILITIES;
1000
1001 typedef struct _DEVICE_INTERFACE_CHANGE_NOTIFICATION {
1002 USHORT Version;
1003 USHORT Size;
1004 GUID Event;
1005 GUID InterfaceClassGuid;
1006 PUNICODE_STRING SymbolicLinkName;
1007 } DEVICE_INTERFACE_CHANGE_NOTIFICATION, *PDEVICE_INTERFACE_CHANGE_NOTIFICATION;
1008
1009 typedef struct _HWPROFILE_CHANGE_NOTIFICATION {
1010 USHORT Version;
1011 USHORT Size;
1012 GUID Event;
1013 } HWPROFILE_CHANGE_NOTIFICATION, *PHWPROFILE_CHANGE_NOTIFICATION;
1014
1015 #undef INTERFACE
1016
1017 typedef struct _INTERFACE {
1018 USHORT Size;
1019 USHORT Version;
1020 PVOID Context;
1021 PINTERFACE_REFERENCE InterfaceReference;
1022 PINTERFACE_DEREFERENCE InterfaceDereference;
1023 } INTERFACE, *PINTERFACE;
1024
1025 typedef struct _PLUGPLAY_NOTIFICATION_HEADER {
1026 USHORT Version;
1027 USHORT Size;
1028 GUID Event;
1029 } PLUGPLAY_NOTIFICATION_HEADER, *PPLUGPLAY_NOTIFICATION_HEADER;
1030
1031 typedef ULONG PNP_DEVICE_STATE, *PPNP_DEVICE_STATE;
1032
1033 /* PNP_DEVICE_STATE */
1034
1035 #define PNP_DEVICE_DISABLED 0x00000001
1036 #define PNP_DEVICE_DONT_DISPLAY_IN_UI 0x00000002
1037 #define PNP_DEVICE_FAILED 0x00000004
1038 #define PNP_DEVICE_REMOVED 0x00000008
1039 #define PNP_DEVICE_RESOURCE_REQUIREMENTS_CHANGED 0x00000010
1040 #define PNP_DEVICE_NOT_DISABLEABLE 0x00000020
1041
1042 typedef struct _TARGET_DEVICE_CUSTOM_NOTIFICATION {
1043 USHORT Version;
1044 USHORT Size;
1045 GUID Event;
1046 struct _FILE_OBJECT *FileObject;
1047 LONG NameBufferOffset;
1048 UCHAR CustomDataBuffer[1];
1049 } TARGET_DEVICE_CUSTOM_NOTIFICATION, *PTARGET_DEVICE_CUSTOM_NOTIFICATION;
1050
1051 typedef struct _TARGET_DEVICE_REMOVAL_NOTIFICATION {
1052 USHORT Version;
1053 USHORT Size;
1054 GUID Event;
1055 struct _FILE_OBJECT *FileObject;
1056 } TARGET_DEVICE_REMOVAL_NOTIFICATION, *PTARGET_DEVICE_REMOVAL_NOTIFICATION;
1057
1058 #if (NTDDI_VERSION >= NTDDI_VISTA)
1059 #include <devpropdef.h>
1060 #define PLUGPLAY_PROPERTY_PERSISTENT 0x00000001
1061 #endif
1062
1063 #define PNP_REPLACE_NO_MAP MAXLONGLONG
1064
1065 typedef NTSTATUS
1066 (NTAPI *PREPLACE_MAP_MEMORY)(
1067 IN PHYSICAL_ADDRESS TargetPhysicalAddress,
1068 IN PHYSICAL_ADDRESS SparePhysicalAddress,
1069 IN OUT PLARGE_INTEGER NumberOfBytes,
1070 OUT PVOID *TargetAddress,
1071 OUT PVOID *SpareAddress);
1072
1073 typedef struct _PNP_REPLACE_MEMORY_LIST {
1074 ULONG AllocatedCount;
1075 ULONG Count;
1076 ULONGLONG TotalLength;
1077 struct {
1078 PHYSICAL_ADDRESS Address;
1079 ULONGLONG Length;
1080 } Ranges[ANYSIZE_ARRAY];
1081 } PNP_REPLACE_MEMORY_LIST, *PPNP_REPLACE_MEMORY_LIST;
1082
1083 typedef struct _PNP_REPLACE_PROCESSOR_LIST {
1084 PKAFFINITY Affinity;
1085 ULONG GroupCount;
1086 ULONG AllocatedCount;
1087 ULONG Count;
1088 ULONG ApicIds[ANYSIZE_ARRAY];
1089 } PNP_REPLACE_PROCESSOR_LIST, *PPNP_REPLACE_PROCESSOR_LIST;
1090
1091 typedef struct _PNP_REPLACE_PROCESSOR_LIST_V1 {
1092 KAFFINITY AffinityMask;
1093 ULONG AllocatedCount;
1094 ULONG Count;
1095 ULONG ApicIds[ANYSIZE_ARRAY];
1096 } PNP_REPLACE_PROCESSOR_LIST_V1, *PPNP_REPLACE_PROCESSOR_LIST_V1;
1097
1098 #define PNP_REPLACE_PARAMETERS_VERSION 2
1099
1100 typedef struct _PNP_REPLACE_PARAMETERS {
1101 ULONG Size;
1102 ULONG Version;
1103 ULONG64 Target;
1104 ULONG64 Spare;
1105 PPNP_REPLACE_PROCESSOR_LIST TargetProcessors;
1106 PPNP_REPLACE_PROCESSOR_LIST SpareProcessors;
1107 PPNP_REPLACE_MEMORY_LIST TargetMemory;
1108 PPNP_REPLACE_MEMORY_LIST SpareMemory;
1109 PREPLACE_MAP_MEMORY MapMemory;
1110 } PNP_REPLACE_PARAMETERS, *PPNP_REPLACE_PARAMETERS;
1111
1112 typedef VOID
1113 (NTAPI *PREPLACE_UNLOAD)(
1114 VOID);
1115
1116 typedef NTSTATUS
1117 (NTAPI *PREPLACE_BEGIN)(
1118 IN PPNP_REPLACE_PARAMETERS Parameters,
1119 OUT PVOID *Context);
1120
1121 typedef NTSTATUS
1122 (NTAPI *PREPLACE_END)(
1123 IN PVOID Context);
1124
1125 typedef NTSTATUS
1126 (NTAPI *PREPLACE_MIRROR_PHYSICAL_MEMORY)(
1127 IN PVOID Context,
1128 IN PHYSICAL_ADDRESS PhysicalAddress,
1129 IN LARGE_INTEGER ByteCount);
1130
1131 typedef NTSTATUS
1132 (NTAPI *PREPLACE_SET_PROCESSOR_ID)(
1133 IN PVOID Context,
1134 IN ULONG ApicId,
1135 IN BOOLEAN Target);
1136
1137 typedef NTSTATUS
1138 (NTAPI *PREPLACE_SWAP)(
1139 IN PVOID Context);
1140
1141 typedef NTSTATUS
1142 (NTAPI *PREPLACE_INITIATE_HARDWARE_MIRROR)(
1143 IN PVOID Context);
1144
1145 typedef NTSTATUS
1146 (NTAPI *PREPLACE_MIRROR_PLATFORM_MEMORY)(
1147 IN PVOID Context);
1148
1149 typedef NTSTATUS
1150 (NTAPI *PREPLACE_GET_MEMORY_DESTINATION)(
1151 IN PVOID Context,
1152 IN PHYSICAL_ADDRESS SourceAddress,
1153 OUT PPHYSICAL_ADDRESS DestinationAddress);
1154
1155 typedef NTSTATUS
1156 (NTAPI *PREPLACE_ENABLE_DISABLE_HARDWARE_QUIESCE)(
1157 IN PVOID Context,
1158 IN BOOLEAN Enable);
1159
1160 #define PNP_REPLACE_DRIVER_INTERFACE_VERSION 1
1161 #define PNP_REPLACE_DRIVER_INTERFACE_MINIMUM_SIZE \
1162 FIELD_OFFSET(PNP_REPLACE_DRIVER_INTERFACE, InitiateHardwareMirror)
1163
1164 #define PNP_REPLACE_MEMORY_SUPPORTED 0x0001
1165 #define PNP_REPLACE_PROCESSOR_SUPPORTED 0x0002
1166 #define PNP_REPLACE_HARDWARE_MEMORY_MIRRORING 0x0004
1167 #define PNP_REPLACE_HARDWARE_PAGE_COPY 0x0008
1168 #define PNP_REPLACE_HARDWARE_QUIESCE 0x0010
1169
1170 typedef struct _PNP_REPLACE_DRIVER_INTERFACE {
1171 ULONG Size;
1172 ULONG Version;
1173 ULONG Flags;
1174 PREPLACE_UNLOAD Unload;
1175 PREPLACE_BEGIN BeginReplace;
1176 PREPLACE_END EndReplace;
1177 PREPLACE_MIRROR_PHYSICAL_MEMORY MirrorPhysicalMemory;
1178 PREPLACE_SET_PROCESSOR_ID SetProcessorId;
1179 PREPLACE_SWAP Swap;
1180 PREPLACE_INITIATE_HARDWARE_MIRROR InitiateHardwareMirror;
1181 PREPLACE_MIRROR_PLATFORM_MEMORY MirrorPlatformMemory;
1182 PREPLACE_GET_MEMORY_DESTINATION GetMemoryDestination;
1183 PREPLACE_ENABLE_DISABLE_HARDWARE_QUIESCE EnableDisableHardwareQuiesce;
1184 } PNP_REPLACE_DRIVER_INTERFACE, *PPNP_REPLACE_DRIVER_INTERFACE;
1185
1186 typedef NTSTATUS
1187 (NTAPI *PREPLACE_DRIVER_INIT)(
1188 IN OUT PPNP_REPLACE_DRIVER_INTERFACE Interface,
1189 IN PVOID Unused);
1190
1191 typedef enum _DEVICE_USAGE_NOTIFICATION_TYPE {
1192 DeviceUsageTypeUndefined,
1193 DeviceUsageTypePaging,
1194 DeviceUsageTypeHibernation,
1195 DeviceUsageTypeDumpFile
1196 } DEVICE_USAGE_NOTIFICATION_TYPE;
1197
1198 typedef struct _POWER_SEQUENCE {
1199 ULONG SequenceD1;
1200 ULONG SequenceD2;
1201 ULONG SequenceD3;
1202 } POWER_SEQUENCE, *PPOWER_SEQUENCE;
1203
1204 typedef enum {
1205 DevicePropertyDeviceDescription = 0x0,
1206 DevicePropertyHardwareID = 0x1,
1207 DevicePropertyCompatibleIDs = 0x2,
1208 DevicePropertyBootConfiguration = 0x3,
1209 DevicePropertyBootConfigurationTranslated = 0x4,
1210 DevicePropertyClassName = 0x5,
1211 DevicePropertyClassGuid = 0x6,
1212 DevicePropertyDriverKeyName = 0x7,
1213 DevicePropertyManufacturer = 0x8,
1214 DevicePropertyFriendlyName = 0x9,
1215 DevicePropertyLocationInformation = 0xa,
1216 DevicePropertyPhysicalDeviceObjectName = 0xb,
1217 DevicePropertyBusTypeGuid = 0xc,
1218 DevicePropertyLegacyBusType = 0xd,
1219 DevicePropertyBusNumber = 0xe,
1220 DevicePropertyEnumeratorName = 0xf,
1221 DevicePropertyAddress = 0x10,
1222 DevicePropertyUINumber = 0x11,
1223 DevicePropertyInstallState = 0x12,
1224 DevicePropertyRemovalPolicy = 0x13,
1225 DevicePropertyResourceRequirements = 0x14,
1226 DevicePropertyAllocatedResources = 0x15,
1227 DevicePropertyContainerID = 0x16
1228 } DEVICE_REGISTRY_PROPERTY;
1229
1230 typedef enum _IO_NOTIFICATION_EVENT_CATEGORY {
1231 EventCategoryReserved,
1232 EventCategoryHardwareProfileChange,
1233 EventCategoryDeviceInterfaceChange,
1234 EventCategoryTargetDeviceChange
1235 } IO_NOTIFICATION_EVENT_CATEGORY;
1236
1237 typedef enum _IO_PRIORITY_HINT {
1238 IoPriorityVeryLow = 0,
1239 IoPriorityLow,
1240 IoPriorityNormal,
1241 IoPriorityHigh,
1242 IoPriorityCritical,
1243 MaxIoPriorityTypes
1244 } IO_PRIORITY_HINT;
1245
1246 #define PNPNOTIFY_DEVICE_INTERFACE_INCLUDE_EXISTING_INTERFACES 0x00000001
1247
1248 typedef NTSTATUS
1249 (NTAPI DRIVER_NOTIFICATION_CALLBACK_ROUTINE)(
1250 IN PVOID NotificationStructure,
1251 IN PVOID Context);
1252 typedef DRIVER_NOTIFICATION_CALLBACK_ROUTINE *PDRIVER_NOTIFICATION_CALLBACK_ROUTINE;
1253
1254 typedef VOID
1255 (NTAPI DEVICE_CHANGE_COMPLETE_CALLBACK)(
1256 IN PVOID Context);
1257 typedef DEVICE_CHANGE_COMPLETE_CALLBACK *PDEVICE_CHANGE_COMPLETE_CALLBACK;
1258
1259 typedef enum _FILE_INFORMATION_CLASS {
1260 FileDirectoryInformation = 1,
1261 FileFullDirectoryInformation,
1262 FileBothDirectoryInformation,
1263 FileBasicInformation,
1264 FileStandardInformation,
1265 FileInternalInformation,
1266 FileEaInformation,
1267 FileAccessInformation,
1268 FileNameInformation,
1269 FileRenameInformation,
1270 FileLinkInformation,
1271 FileNamesInformation,
1272 FileDispositionInformation,
1273 FilePositionInformation,
1274 FileFullEaInformation,
1275 FileModeInformation,
1276 FileAlignmentInformation,
1277 FileAllInformation,
1278 FileAllocationInformation,
1279 FileEndOfFileInformation,
1280 FileAlternateNameInformation,
1281 FileStreamInformation,
1282 FilePipeInformation,
1283 FilePipeLocalInformation,
1284 FilePipeRemoteInformation,
1285 FileMailslotQueryInformation,
1286 FileMailslotSetInformation,
1287 FileCompressionInformation,
1288 FileObjectIdInformation,
1289 FileCompletionInformation,
1290 FileMoveClusterInformation,
1291 FileQuotaInformation,
1292 FileReparsePointInformation,
1293 FileNetworkOpenInformation,
1294 FileAttributeTagInformation,
1295 FileTrackingInformation,
1296 FileIdBothDirectoryInformation,
1297 FileIdFullDirectoryInformation,
1298 FileValidDataLengthInformation,
1299 FileShortNameInformation,
1300 FileIoCompletionNotificationInformation,
1301 FileIoStatusBlockRangeInformation,
1302 FileIoPriorityHintInformation,
1303 FileSfioReserveInformation,
1304 FileSfioVolumeInformation,
1305 FileHardLinkInformation,
1306 FileProcessIdsUsingFileInformation,
1307 FileNormalizedNameInformation,
1308 FileNetworkPhysicalNameInformation,
1309 FileIdGlobalTxDirectoryInformation,
1310 FileIsRemoteDeviceInformation,
1311 FileAttributeCacheInformation,
1312 FileNumaNodeInformation,
1313 FileStandardLinkInformation,
1314 FileRemoteProtocolInformation,
1315 FileMaximumInformation
1316 } FILE_INFORMATION_CLASS, *PFILE_INFORMATION_CLASS;
1317
1318 typedef struct _FILE_POSITION_INFORMATION {
1319 LARGE_INTEGER CurrentByteOffset;
1320 } FILE_POSITION_INFORMATION, *PFILE_POSITION_INFORMATION;
1321
1322 typedef struct _FILE_BASIC_INFORMATION {
1323 LARGE_INTEGER CreationTime;
1324 LARGE_INTEGER LastAccessTime;
1325 LARGE_INTEGER LastWriteTime;
1326 LARGE_INTEGER ChangeTime;
1327 ULONG FileAttributes;
1328 } FILE_BASIC_INFORMATION, *PFILE_BASIC_INFORMATION;
1329
1330 typedef struct _FILE_IO_PRIORITY_HINT_INFORMATION {
1331 IO_PRIORITY_HINT PriorityHint;
1332 } FILE_IO_PRIORITY_HINT_INFORMATION, *PFILE_IO_PRIORITY_HINT_INFORMATION;
1333
1334 typedef struct _FILE_IO_COMPLETION_NOTIFICATION_INFORMATION {
1335 ULONG Flags;
1336 } FILE_IO_COMPLETION_NOTIFICATION_INFORMATION, *PFILE_IO_COMPLETION_NOTIFICATION_INFORMATION;
1337
1338 typedef struct _FILE_IOSTATUSBLOCK_RANGE_INFORMATION {
1339 PUCHAR IoStatusBlockRange;
1340 ULONG Length;
1341 } FILE_IOSTATUSBLOCK_RANGE_INFORMATION, *PFILE_IOSTATUSBLOCK_RANGE_INFORMATION;
1342
1343 typedef struct _FILE_IS_REMOTE_DEVICE_INFORMATION {
1344 BOOLEAN IsRemote;
1345 } FILE_IS_REMOTE_DEVICE_INFORMATION, *PFILE_IS_REMOTE_DEVICE_INFORMATION;
1346
1347 typedef struct _FILE_NUMA_NODE_INFORMATION {
1348 USHORT NodeNumber;
1349 } FILE_NUMA_NODE_INFORMATION, *PFILE_NUMA_NODE_INFORMATION;
1350
1351 typedef struct _FILE_PROCESS_IDS_USING_FILE_INFORMATION {
1352 ULONG NumberOfProcessIdsInList;
1353 ULONG_PTR ProcessIdList[1];
1354 } FILE_PROCESS_IDS_USING_FILE_INFORMATION, *PFILE_PROCESS_IDS_USING_FILE_INFORMATION;
1355
1356 typedef struct _FILE_STANDARD_INFORMATION {
1357 LARGE_INTEGER AllocationSize;
1358 LARGE_INTEGER EndOfFile;
1359 ULONG NumberOfLinks;
1360 BOOLEAN DeletePending;
1361 BOOLEAN Directory;
1362 } FILE_STANDARD_INFORMATION, *PFILE_STANDARD_INFORMATION;
1363
1364 typedef struct _FILE_NETWORK_OPEN_INFORMATION {
1365 LARGE_INTEGER CreationTime;
1366 LARGE_INTEGER LastAccessTime;
1367 LARGE_INTEGER LastWriteTime;
1368 LARGE_INTEGER ChangeTime;
1369 LARGE_INTEGER AllocationSize;
1370 LARGE_INTEGER EndOfFile;
1371 ULONG FileAttributes;
1372 } FILE_NETWORK_OPEN_INFORMATION, *PFILE_NETWORK_OPEN_INFORMATION;
1373
1374 typedef enum _FSINFOCLASS {
1375 FileFsVolumeInformation = 1,
1376 FileFsLabelInformation,
1377 FileFsSizeInformation,
1378 FileFsDeviceInformation,
1379 FileFsAttributeInformation,
1380 FileFsControlInformation,
1381 FileFsFullSizeInformation,
1382 FileFsObjectIdInformation,
1383 FileFsDriverPathInformation,
1384 FileFsVolumeFlagsInformation,
1385 FileFsMaximumInformation
1386 } FS_INFORMATION_CLASS, *PFS_INFORMATION_CLASS;
1387
1388 typedef struct _FILE_FS_DEVICE_INFORMATION {
1389 DEVICE_TYPE DeviceType;
1390 ULONG Characteristics;
1391 } FILE_FS_DEVICE_INFORMATION, *PFILE_FS_DEVICE_INFORMATION;
1392
1393 typedef struct _FILE_FULL_EA_INFORMATION {
1394 ULONG NextEntryOffset;
1395 UCHAR Flags;
1396 UCHAR EaNameLength;
1397 USHORT EaValueLength;
1398 CHAR EaName[1];
1399 } FILE_FULL_EA_INFORMATION, *PFILE_FULL_EA_INFORMATION;
1400
1401 typedef struct _FILE_SFIO_RESERVE_INFORMATION {
1402 ULONG RequestsPerPeriod;
1403 ULONG Period;
1404 BOOLEAN RetryFailures;
1405 BOOLEAN Discardable;
1406 ULONG RequestSize;
1407 ULONG NumOutstandingRequests;
1408 } FILE_SFIO_RESERVE_INFORMATION, *PFILE_SFIO_RESERVE_INFORMATION;
1409
1410 typedef struct _FILE_SFIO_VOLUME_INFORMATION {
1411 ULONG MaximumRequestsPerPeriod;
1412 ULONG MinimumPeriod;
1413 ULONG MinimumTransferSize;
1414 } FILE_SFIO_VOLUME_INFORMATION, *PFILE_SFIO_VOLUME_INFORMATION;
1415
1416 #define FILE_SKIP_COMPLETION_PORT_ON_SUCCESS 0x1
1417 #define FILE_SKIP_SET_EVENT_ON_HANDLE 0x2
1418 #define FILE_SKIP_SET_USER_EVENT_ON_FAST_IO 0x4
1419
1420 #define FM_LOCK_BIT (0x1)
1421 #define FM_LOCK_BIT_V (0x0)
1422 #define FM_LOCK_WAITER_WOKEN (0x2)
1423 #define FM_LOCK_WAITER_INC (0x4)
1424
1425 typedef BOOLEAN
1426 (NTAPI FAST_IO_CHECK_IF_POSSIBLE)(
1427 IN struct _FILE_OBJECT *FileObject,
1428 IN PLARGE_INTEGER FileOffset,
1429 IN ULONG Length,
1430 IN BOOLEAN Wait,
1431 IN ULONG LockKey,
1432 IN BOOLEAN CheckForReadOperation,
1433 OUT PIO_STATUS_BLOCK IoStatus,
1434 IN struct _DEVICE_OBJECT *DeviceObject);
1435 typedef FAST_IO_CHECK_IF_POSSIBLE *PFAST_IO_CHECK_IF_POSSIBLE;
1436
1437 typedef BOOLEAN
1438 (NTAPI FAST_IO_READ)(
1439 IN struct _FILE_OBJECT *FileObject,
1440 IN PLARGE_INTEGER FileOffset,
1441 IN ULONG Length,
1442 IN BOOLEAN Wait,
1443 IN ULONG LockKey,
1444 OUT PVOID Buffer,
1445 OUT PIO_STATUS_BLOCK IoStatus,
1446 IN struct _DEVICE_OBJECT *DeviceObject);
1447 typedef FAST_IO_READ *PFAST_IO_READ;
1448
1449 typedef BOOLEAN
1450 (NTAPI FAST_IO_WRITE)(
1451 IN struct _FILE_OBJECT *FileObject,
1452 IN PLARGE_INTEGER FileOffset,
1453 IN ULONG Length,
1454 IN BOOLEAN Wait,
1455 IN ULONG LockKey,
1456 IN PVOID Buffer,
1457 OUT PIO_STATUS_BLOCK IoStatus,
1458 IN struct _DEVICE_OBJECT *DeviceObject);
1459 typedef FAST_IO_WRITE *PFAST_IO_WRITE;
1460
1461 typedef BOOLEAN
1462 (NTAPI FAST_IO_QUERY_BASIC_INFO)(
1463 IN struct _FILE_OBJECT *FileObject,
1464 IN BOOLEAN Wait,
1465 OUT PFILE_BASIC_INFORMATION Buffer,
1466 OUT PIO_STATUS_BLOCK IoStatus,
1467 IN struct _DEVICE_OBJECT *DeviceObject);
1468 typedef FAST_IO_QUERY_BASIC_INFO *PFAST_IO_QUERY_BASIC_INFO;
1469
1470 typedef BOOLEAN
1471 (NTAPI FAST_IO_QUERY_STANDARD_INFO)(
1472 IN struct _FILE_OBJECT *FileObject,
1473 IN BOOLEAN Wait,
1474 OUT PFILE_STANDARD_INFORMATION Buffer,
1475 OUT PIO_STATUS_BLOCK IoStatus,
1476 IN struct _DEVICE_OBJECT *DeviceObject);
1477 typedef FAST_IO_QUERY_STANDARD_INFO *PFAST_IO_QUERY_STANDARD_INFO;
1478
1479 typedef BOOLEAN
1480 (NTAPI FAST_IO_LOCK)(
1481 IN struct _FILE_OBJECT *FileObject,
1482 IN PLARGE_INTEGER FileOffset,
1483 IN PLARGE_INTEGER Length,
1484 PEPROCESS ProcessId,
1485 ULONG Key,
1486 BOOLEAN FailImmediately,
1487 BOOLEAN ExclusiveLock,
1488 OUT PIO_STATUS_BLOCK IoStatus,
1489 IN struct _DEVICE_OBJECT *DeviceObject);
1490 typedef FAST_IO_LOCK *PFAST_IO_LOCK;
1491
1492 typedef BOOLEAN
1493 (NTAPI FAST_IO_UNLOCK_SINGLE)(
1494 IN struct _FILE_OBJECT *FileObject,
1495 IN PLARGE_INTEGER FileOffset,
1496 IN PLARGE_INTEGER Length,
1497 PEPROCESS ProcessId,
1498 ULONG Key,
1499 OUT PIO_STATUS_BLOCK IoStatus,
1500 IN struct _DEVICE_OBJECT *DeviceObject);
1501 typedef FAST_IO_UNLOCK_SINGLE *PFAST_IO_UNLOCK_SINGLE;
1502
1503 typedef BOOLEAN
1504 (NTAPI FAST_IO_UNLOCK_ALL)(
1505 IN struct _FILE_OBJECT *FileObject,
1506 PEPROCESS ProcessId,
1507 OUT PIO_STATUS_BLOCK IoStatus,
1508 IN struct _DEVICE_OBJECT *DeviceObject);
1509 typedef FAST_IO_UNLOCK_ALL *PFAST_IO_UNLOCK_ALL;
1510
1511 typedef BOOLEAN
1512 (NTAPI FAST_IO_UNLOCK_ALL_BY_KEY)(
1513 IN struct _FILE_OBJECT *FileObject,
1514 PVOID ProcessId,
1515 ULONG Key,
1516 OUT PIO_STATUS_BLOCK IoStatus,
1517 IN struct _DEVICE_OBJECT *DeviceObject);
1518 typedef FAST_IO_UNLOCK_ALL_BY_KEY *PFAST_IO_UNLOCK_ALL_BY_KEY;
1519
1520 typedef BOOLEAN
1521 (NTAPI FAST_IO_DEVICE_CONTROL)(
1522 IN struct _FILE_OBJECT *FileObject,
1523 IN BOOLEAN Wait,
1524 IN PVOID InputBuffer OPTIONAL,
1525 IN ULONG InputBufferLength,
1526 OUT PVOID OutputBuffer OPTIONAL,
1527 IN ULONG OutputBufferLength,
1528 IN ULONG IoControlCode,
1529 OUT PIO_STATUS_BLOCK IoStatus,
1530 IN struct _DEVICE_OBJECT *DeviceObject);
1531 typedef FAST_IO_DEVICE_CONTROL *PFAST_IO_DEVICE_CONTROL;
1532
1533 typedef VOID
1534 (NTAPI FAST_IO_ACQUIRE_FILE)(
1535 IN struct _FILE_OBJECT *FileObject);
1536 typedef FAST_IO_ACQUIRE_FILE *PFAST_IO_ACQUIRE_FILE;
1537
1538 typedef VOID
1539 (NTAPI FAST_IO_RELEASE_FILE)(
1540 IN struct _FILE_OBJECT *FileObject);
1541 typedef FAST_IO_RELEASE_FILE *PFAST_IO_RELEASE_FILE;
1542
1543 typedef VOID
1544 (NTAPI FAST_IO_DETACH_DEVICE)(
1545 IN struct _DEVICE_OBJECT *SourceDevice,
1546 IN struct _DEVICE_OBJECT *TargetDevice);
1547 typedef FAST_IO_DETACH_DEVICE *PFAST_IO_DETACH_DEVICE;
1548
1549 typedef BOOLEAN
1550 (NTAPI FAST_IO_QUERY_NETWORK_OPEN_INFO)(
1551 IN struct _FILE_OBJECT *FileObject,
1552 IN BOOLEAN Wait,
1553 OUT struct _FILE_NETWORK_OPEN_INFORMATION *Buffer,
1554 OUT struct _IO_STATUS_BLOCK *IoStatus,
1555 IN struct _DEVICE_OBJECT *DeviceObject);
1556 typedef FAST_IO_QUERY_NETWORK_OPEN_INFO *PFAST_IO_QUERY_NETWORK_OPEN_INFO;
1557
1558 typedef NTSTATUS
1559 (NTAPI FAST_IO_ACQUIRE_FOR_MOD_WRITE)(
1560 IN struct _FILE_OBJECT *FileObject,
1561 IN PLARGE_INTEGER EndingOffset,
1562 OUT struct _ERESOURCE **ResourceToRelease,
1563 IN struct _DEVICE_OBJECT *DeviceObject);
1564 typedef FAST_IO_ACQUIRE_FOR_MOD_WRITE *PFAST_IO_ACQUIRE_FOR_MOD_WRITE;
1565
1566 typedef BOOLEAN
1567 (NTAPI FAST_IO_MDL_READ)(
1568 IN struct _FILE_OBJECT *FileObject,
1569 IN PLARGE_INTEGER FileOffset,
1570 IN ULONG Length,
1571 IN ULONG LockKey,
1572 OUT PMDL *MdlChain,
1573 OUT PIO_STATUS_BLOCK IoStatus,
1574 IN struct _DEVICE_OBJECT *DeviceObject);
1575 typedef FAST_IO_MDL_READ *PFAST_IO_MDL_READ;
1576
1577 typedef BOOLEAN
1578 (NTAPI FAST_IO_MDL_READ_COMPLETE)(
1579 IN struct _FILE_OBJECT *FileObject,
1580 IN PMDL MdlChain,
1581 IN struct _DEVICE_OBJECT *DeviceObject);
1582 typedef FAST_IO_MDL_READ_COMPLETE *PFAST_IO_MDL_READ_COMPLETE;
1583
1584 typedef BOOLEAN
1585 (NTAPI FAST_IO_PREPARE_MDL_WRITE)(
1586 IN struct _FILE_OBJECT *FileObject,
1587 IN PLARGE_INTEGER FileOffset,
1588 IN ULONG Length,
1589 IN ULONG LockKey,
1590 OUT PMDL *MdlChain,
1591 OUT PIO_STATUS_BLOCK IoStatus,
1592 IN struct _DEVICE_OBJECT *DeviceObject);
1593 typedef FAST_IO_PREPARE_MDL_WRITE *PFAST_IO_PREPARE_MDL_WRITE;
1594
1595 typedef BOOLEAN
1596 (NTAPI FAST_IO_MDL_WRITE_COMPLETE)(
1597 IN struct _FILE_OBJECT *FileObject,
1598 IN PLARGE_INTEGER FileOffset,
1599 IN PMDL MdlChain,
1600 IN struct _DEVICE_OBJECT *DeviceObject);
1601 typedef FAST_IO_MDL_WRITE_COMPLETE *PFAST_IO_MDL_WRITE_COMPLETE;
1602
1603 typedef BOOLEAN
1604 (NTAPI FAST_IO_READ_COMPRESSED)(
1605 IN struct _FILE_OBJECT *FileObject,
1606 IN PLARGE_INTEGER FileOffset,
1607 IN ULONG Length,
1608 IN ULONG LockKey,
1609 OUT PVOID Buffer,
1610 OUT PMDL *MdlChain,
1611 OUT PIO_STATUS_BLOCK IoStatus,
1612 OUT struct _COMPRESSED_DATA_INFO *CompressedDataInfo,
1613 IN ULONG CompressedDataInfoLength,
1614 IN struct _DEVICE_OBJECT *DeviceObject);
1615 typedef FAST_IO_READ_COMPRESSED *PFAST_IO_READ_COMPRESSED;
1616
1617 typedef BOOLEAN
1618 (NTAPI FAST_IO_WRITE_COMPRESSED)(
1619 IN struct _FILE_OBJECT *FileObject,
1620 IN PLARGE_INTEGER FileOffset,
1621 IN ULONG Length,
1622 IN ULONG LockKey,
1623 IN PVOID Buffer,
1624 OUT PMDL *MdlChain,
1625 OUT PIO_STATUS_BLOCK IoStatus,
1626 IN struct _COMPRESSED_DATA_INFO *CompressedDataInfo,
1627 IN ULONG CompressedDataInfoLength,
1628 IN struct _DEVICE_OBJECT *DeviceObject);
1629 typedef FAST_IO_WRITE_COMPRESSED *PFAST_IO_WRITE_COMPRESSED;
1630
1631 typedef BOOLEAN
1632 (NTAPI FAST_IO_MDL_READ_COMPLETE_COMPRESSED)(
1633 IN struct _FILE_OBJECT *FileObject,
1634 IN PMDL MdlChain,
1635 IN struct _DEVICE_OBJECT *DeviceObject);
1636 typedef FAST_IO_MDL_READ_COMPLETE_COMPRESSED *PFAST_IO_MDL_READ_COMPLETE_COMPRESSED;
1637
1638 typedef BOOLEAN
1639 (NTAPI FAST_IO_MDL_WRITE_COMPLETE_COMPRESSED)(
1640 IN struct _FILE_OBJECT *FileObject,
1641 IN PLARGE_INTEGER FileOffset,
1642 IN PMDL MdlChain,
1643 IN struct _DEVICE_OBJECT *DeviceObject);
1644 typedef FAST_IO_MDL_WRITE_COMPLETE_COMPRESSED *PFAST_IO_MDL_WRITE_COMPLETE_COMPRESSED;
1645
1646 typedef BOOLEAN
1647 (NTAPI FAST_IO_QUERY_OPEN)(
1648 IN struct _IRP *Irp,
1649 OUT PFILE_NETWORK_OPEN_INFORMATION NetworkInformation,
1650 IN struct _DEVICE_OBJECT *DeviceObject);
1651 typedef FAST_IO_QUERY_OPEN *PFAST_IO_QUERY_OPEN;
1652
1653 typedef NTSTATUS
1654 (NTAPI FAST_IO_RELEASE_FOR_MOD_WRITE)(
1655 IN struct _FILE_OBJECT *FileObject,
1656 IN struct _ERESOURCE *ResourceToRelease,
1657 IN struct _DEVICE_OBJECT *DeviceObject);
1658 typedef FAST_IO_RELEASE_FOR_MOD_WRITE *PFAST_IO_RELEASE_FOR_MOD_WRITE;
1659
1660 typedef NTSTATUS
1661 (NTAPI FAST_IO_ACQUIRE_FOR_CCFLUSH)(
1662 IN struct _FILE_OBJECT *FileObject,
1663 IN struct _DEVICE_OBJECT *DeviceObject);
1664 typedef FAST_IO_ACQUIRE_FOR_CCFLUSH *PFAST_IO_ACQUIRE_FOR_CCFLUSH;
1665
1666 typedef NTSTATUS
1667 (NTAPI FAST_IO_RELEASE_FOR_CCFLUSH)(
1668 IN struct _FILE_OBJECT *FileObject,
1669 IN struct _DEVICE_OBJECT *DeviceObject);
1670 typedef FAST_IO_RELEASE_FOR_CCFLUSH *PFAST_IO_RELEASE_FOR_CCFLUSH;
1671
1672 typedef struct _FAST_IO_DISPATCH {
1673 ULONG SizeOfFastIoDispatch;
1674 PFAST_IO_CHECK_IF_POSSIBLE FastIoCheckIfPossible;
1675 PFAST_IO_READ FastIoRead;
1676 PFAST_IO_WRITE FastIoWrite;
1677 PFAST_IO_QUERY_BASIC_INFO FastIoQueryBasicInfo;
1678 PFAST_IO_QUERY_STANDARD_INFO FastIoQueryStandardInfo;
1679 PFAST_IO_LOCK FastIoLock;
1680 PFAST_IO_UNLOCK_SINGLE FastIoUnlockSingle;
1681 PFAST_IO_UNLOCK_ALL FastIoUnlockAll;
1682 PFAST_IO_UNLOCK_ALL_BY_KEY FastIoUnlockAllByKey;
1683 PFAST_IO_DEVICE_CONTROL FastIoDeviceControl;
1684 PFAST_IO_ACQUIRE_FILE AcquireFileForNtCreateSection;
1685 PFAST_IO_RELEASE_FILE ReleaseFileForNtCreateSection;
1686 PFAST_IO_DETACH_DEVICE FastIoDetachDevice;
1687 PFAST_IO_QUERY_NETWORK_OPEN_INFO FastIoQueryNetworkOpenInfo;
1688 PFAST_IO_ACQUIRE_FOR_MOD_WRITE AcquireForModWrite;
1689 PFAST_IO_MDL_READ MdlRead;
1690 PFAST_IO_MDL_READ_COMPLETE MdlReadComplete;
1691 PFAST_IO_PREPARE_MDL_WRITE PrepareMdlWrite;
1692 PFAST_IO_MDL_WRITE_COMPLETE MdlWriteComplete;
1693 PFAST_IO_READ_COMPRESSED FastIoReadCompressed;
1694 PFAST_IO_WRITE_COMPRESSED FastIoWriteCompressed;
1695 PFAST_IO_MDL_READ_COMPLETE_COMPRESSED MdlReadCompleteCompressed;
1696 PFAST_IO_MDL_WRITE_COMPLETE_COMPRESSED MdlWriteCompleteCompressed;
1697 PFAST_IO_QUERY_OPEN FastIoQueryOpen;
1698 PFAST_IO_RELEASE_FOR_MOD_WRITE ReleaseForModWrite;
1699 PFAST_IO_ACQUIRE_FOR_CCFLUSH AcquireForCcFlush;
1700 PFAST_IO_RELEASE_FOR_CCFLUSH ReleaseForCcFlush;
1701 } FAST_IO_DISPATCH, *PFAST_IO_DISPATCH;
1702
1703 typedef struct _SECTION_OBJECT_POINTERS {
1704 PVOID DataSectionObject;
1705 PVOID SharedCacheMap;
1706 PVOID ImageSectionObject;
1707 } SECTION_OBJECT_POINTERS, *PSECTION_OBJECT_POINTERS;
1708
1709 typedef struct _IO_COMPLETION_CONTEXT {
1710 PVOID Port;
1711 PVOID Key;
1712 } IO_COMPLETION_CONTEXT, *PIO_COMPLETION_CONTEXT;
1713
1714 /* FILE_OBJECT.Flags */
1715 #define FO_FILE_OPEN 0x00000001
1716 #define FO_SYNCHRONOUS_IO 0x00000002
1717 #define FO_ALERTABLE_IO 0x00000004
1718 #define FO_NO_INTERMEDIATE_BUFFERING 0x00000008
1719 #define FO_WRITE_THROUGH 0x00000010
1720 #define FO_SEQUENTIAL_ONLY 0x00000020
1721 #define FO_CACHE_SUPPORTED 0x00000040
1722 #define FO_NAMED_PIPE 0x00000080
1723 #define FO_STREAM_FILE 0x00000100
1724 #define FO_MAILSLOT 0x00000200
1725 #define FO_GENERATE_AUDIT_ON_CLOSE 0x00000400
1726 #define FO_QUEUE_IRP_TO_THREAD 0x00000400
1727 #define FO_DIRECT_DEVICE_OPEN 0x00000800
1728 #define FO_FILE_MODIFIED 0x00001000
1729 #define FO_FILE_SIZE_CHANGED 0x00002000
1730 #define FO_CLEANUP_COMPLETE 0x00004000
1731 #define FO_TEMPORARY_FILE 0x00008000
1732 #define FO_DELETE_ON_CLOSE 0x00010000
1733 #define FO_OPENED_CASE_SENSITIVE 0x00020000
1734 #define FO_HANDLE_CREATED 0x00040000
1735 #define FO_FILE_FAST_IO_READ 0x00080000
1736 #define FO_RANDOM_ACCESS 0x00100000
1737 #define FO_FILE_OPEN_CANCELLED 0x00200000
1738 #define FO_VOLUME_OPEN 0x00400000
1739 #define FO_REMOTE_ORIGIN 0x01000000
1740 #define FO_DISALLOW_EXCLUSIVE 0x02000000
1741 #define FO_SKIP_COMPLETION_PORT 0x02000000
1742 #define FO_SKIP_SET_EVENT 0x04000000
1743 #define FO_SKIP_SET_FAST_IO 0x08000000
1744 #define FO_FLAGS_VALID_ONLY_DURING_CREATE FO_DISALLOW_EXCLUSIVE
1745
1746 /* VPB.Flags */
1747 #define VPB_MOUNTED 0x0001
1748 #define VPB_LOCKED 0x0002
1749 #define VPB_PERSISTENT 0x0004
1750 #define VPB_REMOVE_PENDING 0x0008
1751 #define VPB_RAW_MOUNT 0x0010
1752 #define VPB_DIRECT_WRITES_ALLOWED 0x0020
1753
1754 /* IRP.Flags */
1755
1756 #define SL_FORCE_ACCESS_CHECK 0x01
1757 #define SL_OPEN_PAGING_FILE 0x02
1758 #define SL_OPEN_TARGET_DIRECTORY 0x04
1759 #define SL_STOP_ON_SYMLINK 0x08
1760 #define SL_CASE_SENSITIVE 0x80
1761
1762 #define SL_KEY_SPECIFIED 0x01
1763 #define SL_OVERRIDE_VERIFY_VOLUME 0x02
1764 #define SL_WRITE_THROUGH 0x04
1765 #define SL_FT_SEQUENTIAL_WRITE 0x08
1766 #define SL_FORCE_DIRECT_WRITE 0x10
1767 #define SL_REALTIME_STREAM 0x20
1768
1769 #define SL_READ_ACCESS_GRANTED 0x01
1770 #define SL_WRITE_ACCESS_GRANTED 0x04
1771
1772 #define SL_FAIL_IMMEDIATELY 0x01
1773 #define SL_EXCLUSIVE_LOCK 0x02
1774
1775 #define SL_RESTART_SCAN 0x01
1776 #define SL_RETURN_SINGLE_ENTRY 0x02
1777 #define SL_INDEX_SPECIFIED 0x04
1778
1779 #define SL_WATCH_TREE 0x01
1780
1781 #define SL_ALLOW_RAW_MOUNT 0x01
1782 $endif
1783
1784 $if (_WDMDDK_ || _DEVIOCTL_)
1785 #define CTL_CODE(DeviceType, Function, Method, Access) \
1786 (((DeviceType) << 16) | ((Access) << 14) | ((Function) << 2) | (Method))
1787
1788 #define DEVICE_TYPE_FROM_CTL_CODE(ctl) (((ULONG) (ctl & 0xffff0000)) >> 16)
1789
1790 #define METHOD_FROM_CTL_CODE(ctrlCode) ((ULONG)(ctrlCode & 3))
1791 $endif
1792
1793 $if (_WDMDDK_)
1794 #define IRP_NOCACHE 0x00000001
1795 #define IRP_PAGING_IO 0x00000002
1796 #define IRP_MOUNT_COMPLETION 0x00000002
1797 #define IRP_SYNCHRONOUS_API 0x00000004
1798 #define IRP_ASSOCIATED_IRP 0x00000008
1799 #define IRP_BUFFERED_IO 0x00000010
1800 #define IRP_DEALLOCATE_BUFFER 0x00000020
1801 #define IRP_INPUT_OPERATION 0x00000040
1802 #define IRP_SYNCHRONOUS_PAGING_IO 0x00000040
1803 #define IRP_CREATE_OPERATION 0x00000080
1804 #define IRP_READ_OPERATION 0x00000100
1805 #define IRP_WRITE_OPERATION 0x00000200
1806 #define IRP_CLOSE_OPERATION 0x00000400
1807 #define IRP_DEFER_IO_COMPLETION 0x00000800
1808 #define IRP_OB_QUERY_NAME 0x00001000
1809 #define IRP_HOLD_DEVICE_QUEUE 0x00002000
1810
1811 #define IRP_QUOTA_CHARGED 0x01
1812 #define IRP_ALLOCATED_MUST_SUCCEED 0x02
1813 #define IRP_ALLOCATED_FIXED_SIZE 0x04
1814 #define IRP_LOOKASIDE_ALLOCATION 0x08
1815
1816 /*
1817 ** IRP function codes
1818 */
1819
1820 #define IRP_MJ_CREATE 0x00
1821 #define IRP_MJ_CREATE_NAMED_PIPE 0x01
1822 #define IRP_MJ_CLOSE 0x02
1823 #define IRP_MJ_READ 0x03
1824 #define IRP_MJ_WRITE 0x04
1825 #define IRP_MJ_QUERY_INFORMATION 0x05
1826 #define IRP_MJ_SET_INFORMATION 0x06
1827 #define IRP_MJ_QUERY_EA 0x07
1828 #define IRP_MJ_SET_EA 0x08
1829 #define IRP_MJ_FLUSH_BUFFERS 0x09
1830 #define IRP_MJ_QUERY_VOLUME_INFORMATION 0x0a
1831 #define IRP_MJ_SET_VOLUME_INFORMATION 0x0b
1832 #define IRP_MJ_DIRECTORY_CONTROL 0x0c
1833 #define IRP_MJ_FILE_SYSTEM_CONTROL 0x0d
1834 #define IRP_MJ_DEVICE_CONTROL 0x0e
1835 #define IRP_MJ_INTERNAL_DEVICE_CONTROL 0x0f
1836 #define IRP_MJ_SCSI 0x0f
1837 #define IRP_MJ_SHUTDOWN 0x10
1838 #define IRP_MJ_LOCK_CONTROL 0x11
1839 #define IRP_MJ_CLEANUP 0x12
1840 #define IRP_MJ_CREATE_MAILSLOT 0x13
1841 #define IRP_MJ_QUERY_SECURITY 0x14
1842 #define IRP_MJ_SET_SECURITY 0x15
1843 #define IRP_MJ_POWER 0x16
1844 #define IRP_MJ_SYSTEM_CONTROL 0x17
1845 #define IRP_MJ_DEVICE_CHANGE 0x18
1846 #define IRP_MJ_QUERY_QUOTA 0x19
1847 #define IRP_MJ_SET_QUOTA 0x1a
1848 #define IRP_MJ_PNP 0x1b
1849 #define IRP_MJ_PNP_POWER 0x1b
1850 #define IRP_MJ_MAXIMUM_FUNCTION 0x1b
1851
1852 #define IRP_MN_SCSI_CLASS 0x01
1853
1854 #define IRP_MN_START_DEVICE 0x00
1855 #define IRP_MN_QUERY_REMOVE_DEVICE 0x01
1856 #define IRP_MN_REMOVE_DEVICE 0x02
1857 #define IRP_MN_CANCEL_REMOVE_DEVICE 0x03
1858 #define IRP_MN_STOP_DEVICE 0x04
1859 #define IRP_MN_QUERY_STOP_DEVICE 0x05
1860 #define IRP_MN_CANCEL_STOP_DEVICE 0x06
1861
1862 #define IRP_MN_QUERY_DEVICE_RELATIONS 0x07
1863 #define IRP_MN_QUERY_INTERFACE 0x08
1864 #define IRP_MN_QUERY_CAPABILITIES 0x09
1865 #define IRP_MN_QUERY_RESOURCES 0x0A
1866 #define IRP_MN_QUERY_RESOURCE_REQUIREMENTS 0x0B
1867 #define IRP_MN_QUERY_DEVICE_TEXT 0x0C
1868 #define IRP_MN_FILTER_RESOURCE_REQUIREMENTS 0x0D
1869
1870 #define IRP_MN_READ_CONFIG 0x0F
1871 #define IRP_MN_WRITE_CONFIG 0x10
1872 #define IRP_MN_EJECT 0x11
1873 #define IRP_MN_SET_LOCK 0x12
1874 #define IRP_MN_QUERY_ID 0x13
1875 #define IRP_MN_QUERY_PNP_DEVICE_STATE 0x14
1876 #define IRP_MN_QUERY_BUS_INFORMATION 0x15
1877 #define IRP_MN_DEVICE_USAGE_NOTIFICATION 0x16
1878 #define IRP_MN_SURPRISE_REMOVAL 0x17
1879 #if (NTDDI_VERSION >= NTDDI_WIN7)
1880 #define IRP_MN_DEVICE_ENUMERATED 0x19
1881 #endif
1882
1883 #define IRP_MN_WAIT_WAKE 0x00
1884 #define IRP_MN_POWER_SEQUENCE 0x01
1885 #define IRP_MN_SET_POWER 0x02
1886 #define IRP_MN_QUERY_POWER 0x03
1887
1888 #define IRP_MN_QUERY_ALL_DATA 0x00
1889 #define IRP_MN_QUERY_SINGLE_INSTANCE 0x01
1890 #define IRP_MN_CHANGE_SINGLE_INSTANCE 0x02
1891 #define IRP_MN_CHANGE_SINGLE_ITEM 0x03
1892 #define IRP_MN_ENABLE_EVENTS 0x04
1893 #define IRP_MN_DISABLE_EVENTS 0x05
1894 #define IRP_MN_ENABLE_COLLECTION 0x06
1895 #define IRP_MN_DISABLE_COLLECTION 0x07
1896 #define IRP_MN_REGINFO 0x08
1897 #define IRP_MN_EXECUTE_METHOD 0x09
1898
1899 #define IRP_MN_REGINFO_EX 0x0b
1900
1901 typedef struct _FILE_OBJECT {
1902 CSHORT Type;
1903 CSHORT Size;
1904 PDEVICE_OBJECT DeviceObject;
1905 PVPB Vpb;
1906 PVOID FsContext;
1907 PVOID FsContext2;
1908 PSECTION_OBJECT_POINTERS SectionObjectPointer;
1909 PVOID PrivateCacheMap;
1910 NTSTATUS FinalStatus;
1911 struct _FILE_OBJECT *RelatedFileObject;
1912 BOOLEAN LockOperation;
1913 BOOLEAN DeletePending;
1914 BOOLEAN ReadAccess;
1915 BOOLEAN WriteAccess;
1916 BOOLEAN DeleteAccess;
1917 BOOLEAN SharedRead;
1918 BOOLEAN SharedWrite;
1919 BOOLEAN SharedDelete;
1920 ULONG Flags;
1921 UNICODE_STRING FileName;
1922 LARGE_INTEGER CurrentByteOffset;
1923 volatile ULONG Waiters;
1924 volatile ULONG Busy;
1925 PVOID LastLock;
1926 KEVENT Lock;
1927 KEVENT Event;
1928 volatile PIO_COMPLETION_CONTEXT CompletionContext;
1929 KSPIN_LOCK IrpListLock;
1930 LIST_ENTRY IrpList;
1931 volatile PVOID FileObjectExtension;
1932 } FILE_OBJECT, *PFILE_OBJECT;
1933
1934 typedef struct _IO_ERROR_LOG_PACKET {
1935 UCHAR MajorFunctionCode;
1936 UCHAR RetryCount;
1937 USHORT DumpDataSize;
1938 USHORT NumberOfStrings;
1939 USHORT StringOffset;
1940 USHORT EventCategory;
1941 NTSTATUS ErrorCode;
1942 ULONG UniqueErrorValue;
1943 NTSTATUS FinalStatus;
1944 ULONG SequenceNumber;
1945 ULONG IoControlCode;
1946 LARGE_INTEGER DeviceOffset;
1947 ULONG DumpData[1];
1948 } IO_ERROR_LOG_PACKET, *PIO_ERROR_LOG_PACKET;
1949
1950 typedef struct _IO_ERROR_LOG_MESSAGE {
1951 USHORT Type;
1952 USHORT Size;
1953 USHORT DriverNameLength;
1954 LARGE_INTEGER TimeStamp;
1955 ULONG DriverNameOffset;
1956 IO_ERROR_LOG_PACKET EntryData;
1957 } IO_ERROR_LOG_MESSAGE, *PIO_ERROR_LOG_MESSAGE;
1958
1959 #define ERROR_LOG_LIMIT_SIZE 240
1960 #define IO_ERROR_LOG_MESSAGE_HEADER_LENGTH (sizeof(IO_ERROR_LOG_MESSAGE) - \
1961 sizeof(IO_ERROR_LOG_PACKET) + \
1962 (sizeof(WCHAR) * 40))
1963 #define ERROR_LOG_MESSAGE_LIMIT_SIZE \
1964 (ERROR_LOG_LIMIT_SIZE + IO_ERROR_LOG_MESSAGE_HEADER_LENGTH)
1965 #define IO_ERROR_LOG_MESSAGE_LENGTH \
1966 ((PORT_MAXIMUM_MESSAGE_LENGTH > ERROR_LOG_MESSAGE_LIMIT_SIZE) ? \
1967 ERROR_LOG_MESSAGE_LIMIT_SIZE : \
1968 PORT_MAXIMUM_MESSAGE_LENGTH)
1969 #define ERROR_LOG_MAXIMUM_SIZE (IO_ERROR_LOG_MESSAGE_LENGTH - \
1970 IO_ERROR_LOG_MESSAGE_HEADER_LENGTH)
1971
1972 #ifdef _WIN64
1973 #define PORT_MAXIMUM_MESSAGE_LENGTH 512
1974 #else
1975 #define PORT_MAXIMUM_MESSAGE_LENGTH 256
1976 #endif
1977
1978 typedef enum _DMA_WIDTH {
1979 Width8Bits,
1980 Width16Bits,
1981 Width32Bits,
1982 MaximumDmaWidth
1983 } DMA_WIDTH, *PDMA_WIDTH;
1984
1985 typedef enum _DMA_SPEED {
1986 Compatible,
1987 TypeA,
1988 TypeB,
1989 TypeC,
1990 TypeF,
1991 MaximumDmaSpeed
1992 } DMA_SPEED, *PDMA_SPEED;
1993
1994 /* DEVICE_DESCRIPTION.Version */
1995
1996 #define DEVICE_DESCRIPTION_VERSION 0x0000
1997 #define DEVICE_DESCRIPTION_VERSION1 0x0001
1998 #define DEVICE_DESCRIPTION_VERSION2 0x0002
1999
2000 typedef struct _DEVICE_DESCRIPTION {
2001 ULONG Version;
2002 BOOLEAN Master;
2003 BOOLEAN ScatterGather;
2004 BOOLEAN DemandMode;
2005 BOOLEAN AutoInitialize;
2006 BOOLEAN Dma32BitAddresses;
2007 BOOLEAN IgnoreCount;
2008 BOOLEAN Reserved1;
2009 BOOLEAN Dma64BitAddresses;
2010 ULONG BusNumber;
2011 ULONG DmaChannel;
2012 INTERFACE_TYPE InterfaceType;
2013 DMA_WIDTH DmaWidth;
2014 DMA_SPEED DmaSpeed;
2015 ULONG MaximumLength;
2016 ULONG DmaPort;
2017 } DEVICE_DESCRIPTION, *PDEVICE_DESCRIPTION;
2018
2019 typedef enum _DEVICE_RELATION_TYPE {
2020 BusRelations,
2021 EjectionRelations,
2022 PowerRelations,
2023 RemovalRelations,
2024 TargetDeviceRelation,
2025 SingleBusRelations,
2026 TransportRelations
2027 } DEVICE_RELATION_TYPE, *PDEVICE_RELATION_TYPE;
2028
2029 typedef struct _DEVICE_RELATIONS {
2030 ULONG Count;
2031 PDEVICE_OBJECT Objects[1];
2032 } DEVICE_RELATIONS, *PDEVICE_RELATIONS;
2033
2034 typedef struct _DEVOBJ_EXTENSION {
2035 CSHORT Type;
2036 USHORT Size;
2037 PDEVICE_OBJECT DeviceObject;
2038 } DEVOBJ_EXTENSION, *PDEVOBJ_EXTENSION;
2039
2040 typedef struct _SCATTER_GATHER_ELEMENT {
2041 PHYSICAL_ADDRESS Address;
2042 ULONG Length;
2043 ULONG_PTR Reserved;
2044 } SCATTER_GATHER_ELEMENT, *PSCATTER_GATHER_ELEMENT;
2045
2046 #if defined(_MSC_EXTENSIONS)
2047
2048 #if _MSC_VER >= 1200
2049 #pragma warning(push)
2050 #endif
2051 #pragma warning(disable:4200)
2052 typedef struct _SCATTER_GATHER_LIST {
2053 ULONG NumberOfElements;
2054 ULONG_PTR Reserved;
2055 SCATTER_GATHER_ELEMENT Elements[1];
2056 } SCATTER_GATHER_LIST, *PSCATTER_GATHER_LIST;
2057
2058 #if _MSC_VER >= 1200
2059 #pragma warning(pop)
2060 #else
2061 #pragma warning(default:4200)
2062 #endif
2063
2064 #else
2065
2066 struct _SCATTER_GATHER_LIST;
2067 typedef struct _SCATTER_GATHER_LIST SCATTER_GATHER_LIST, *PSCATTER_GATHER_LIST;
2068
2069 #endif
2070
2071 typedef NTSTATUS
2072 (NTAPI DRIVER_ADD_DEVICE)(
2073 IN struct _DRIVER_OBJECT *DriverObject,
2074 IN struct _DEVICE_OBJECT *PhysicalDeviceObject);
2075 typedef DRIVER_ADD_DEVICE *PDRIVER_ADD_DEVICE;
2076
2077 typedef struct _DRIVER_EXTENSION {
2078 struct _DRIVER_OBJECT *DriverObject;
2079 PDRIVER_ADD_DEVICE AddDevice;
2080 ULONG Count;
2081 UNICODE_STRING ServiceKeyName;
2082 } DRIVER_EXTENSION, *PDRIVER_EXTENSION;
2083
2084 #define DRVO_UNLOAD_INVOKED 0x00000001
2085 #define DRVO_LEGACY_DRIVER 0x00000002
2086 #define DRVO_BUILTIN_DRIVER 0x00000004
2087
2088 typedef NTSTATUS
2089 (NTAPI DRIVER_INITIALIZE)(
2090 IN struct _DRIVER_OBJECT *DriverObject,
2091 IN PUNICODE_STRING RegistryPath);
2092 typedef DRIVER_INITIALIZE *PDRIVER_INITIALIZE;
2093
2094 typedef VOID
2095 (NTAPI DRIVER_STARTIO)(
2096 IN struct _DEVICE_OBJECT *DeviceObject,
2097 IN struct _IRP *Irp);
2098 typedef DRIVER_STARTIO *PDRIVER_STARTIO;
2099
2100 typedef VOID
2101 (NTAPI DRIVER_UNLOAD)(
2102 IN struct _DRIVER_OBJECT *DriverObject);
2103 typedef DRIVER_UNLOAD *PDRIVER_UNLOAD;
2104
2105 typedef NTSTATUS
2106 (NTAPI DRIVER_DISPATCH)(
2107 IN struct _DEVICE_OBJECT *DeviceObject,
2108 IN struct _IRP *Irp);
2109 typedef DRIVER_DISPATCH *PDRIVER_DISPATCH;
2110
2111 typedef struct _DRIVER_OBJECT {
2112 CSHORT Type;
2113 CSHORT Size;
2114 PDEVICE_OBJECT DeviceObject;
2115 ULONG Flags;
2116 PVOID DriverStart;
2117 ULONG DriverSize;
2118 PVOID DriverSection;
2119 PDRIVER_EXTENSION DriverExtension;
2120 UNICODE_STRING DriverName;
2121 PUNICODE_STRING HardwareDatabase;
2122 struct _FAST_IO_DISPATCH *FastIoDispatch;
2123 PDRIVER_INITIALIZE DriverInit;
2124 PDRIVER_STARTIO DriverStartIo;
2125 PDRIVER_UNLOAD DriverUnload;
2126 PDRIVER_DISPATCH MajorFunction[IRP_MJ_MAXIMUM_FUNCTION + 1];
2127 } DRIVER_OBJECT, *PDRIVER_OBJECT;
2128
2129 typedef struct _DMA_ADAPTER {
2130 USHORT Version;
2131 USHORT Size;
2132 struct _DMA_OPERATIONS* DmaOperations;
2133 } DMA_ADAPTER, *PDMA_ADAPTER;
2134
2135 typedef VOID
2136 (NTAPI *PPUT_DMA_ADAPTER)(
2137 IN PDMA_ADAPTER DmaAdapter);
2138
2139 typedef PVOID
2140 (NTAPI *PALLOCATE_COMMON_BUFFER)(
2141 IN PDMA_ADAPTER DmaAdapter,
2142 IN ULONG Length,
2143 OUT PPHYSICAL_ADDRESS LogicalAddress,
2144 IN BOOLEAN CacheEnabled);
2145
2146 typedef VOID
2147 (NTAPI *PFREE_COMMON_BUFFER)(
2148 IN PDMA_ADAPTER DmaAdapter,
2149 IN ULONG Length,
2150 IN PHYSICAL_ADDRESS LogicalAddress,
2151 IN PVOID VirtualAddress,
2152 IN BOOLEAN CacheEnabled);
2153
2154 typedef NTSTATUS
2155 (NTAPI *PALLOCATE_ADAPTER_CHANNEL)(
2156 IN PDMA_ADAPTER DmaAdapter,
2157 IN PDEVICE_OBJECT DeviceObject,
2158 IN ULONG NumberOfMapRegisters,
2159 IN PDRIVER_CONTROL ExecutionRoutine,
2160 IN PVOID Context);
2161
2162 typedef BOOLEAN
2163 (NTAPI *PFLUSH_ADAPTER_BUFFERS)(
2164 IN PDMA_ADAPTER DmaAdapter,
2165 IN PMDL Mdl,
2166 IN PVOID MapRegisterBase,
2167 IN PVOID CurrentVa,
2168 IN ULONG Length,
2169 IN BOOLEAN WriteToDevice);
2170
2171 typedef VOID
2172 (NTAPI *PFREE_ADAPTER_CHANNEL)(
2173 IN PDMA_ADAPTER DmaAdapter);
2174
2175 typedef VOID
2176 (NTAPI *PFREE_MAP_REGISTERS)(
2177 IN PDMA_ADAPTER DmaAdapter,
2178 PVOID MapRegisterBase,
2179 ULONG NumberOfMapRegisters);
2180
2181 typedef PHYSICAL_ADDRESS
2182 (NTAPI *PMAP_TRANSFER)(
2183 IN PDMA_ADAPTER DmaAdapter,
2184 IN PMDL Mdl,
2185 IN PVOID MapRegisterBase,
2186 IN PVOID CurrentVa,
2187 IN OUT PULONG Length,
2188 IN BOOLEAN WriteToDevice);
2189
2190 typedef ULONG
2191 (NTAPI *PGET_DMA_ALIGNMENT)(
2192 IN PDMA_ADAPTER DmaAdapter);
2193
2194 typedef ULONG
2195 (NTAPI *PREAD_DMA_COUNTER)(
2196 IN PDMA_ADAPTER DmaAdapter);
2197
2198 typedef VOID
2199 (NTAPI DRIVER_LIST_CONTROL)(
2200 IN struct _DEVICE_OBJECT *DeviceObject,
2201 IN struct _IRP *Irp,
2202 IN struct _SCATTER_GATHER_LIST *ScatterGather,
2203 IN PVOID Context);
2204 typedef DRIVER_LIST_CONTROL *PDRIVER_LIST_CONTROL;
2205
2206 typedef NTSTATUS
2207 (NTAPI *PGET_SCATTER_GATHER_LIST)(
2208 IN PDMA_ADAPTER DmaAdapter,
2209 IN PDEVICE_OBJECT DeviceObject,
2210 IN PMDL Mdl,
2211 IN PVOID CurrentVa,
2212 IN ULONG Length,
2213 IN PDRIVER_LIST_CONTROL ExecutionRoutine,
2214 IN PVOID Context,
2215 IN BOOLEAN WriteToDevice);
2216
2217 typedef VOID
2218 (NTAPI *PPUT_SCATTER_GATHER_LIST)(
2219 IN PDMA_ADAPTER DmaAdapter,
2220 IN PSCATTER_GATHER_LIST ScatterGather,
2221 IN BOOLEAN WriteToDevice);
2222
2223 typedef NTSTATUS
2224 (NTAPI *PCALCULATE_SCATTER_GATHER_LIST_SIZE)(
2225 IN PDMA_ADAPTER DmaAdapter,
2226 IN PMDL Mdl OPTIONAL,
2227 IN PVOID CurrentVa,
2228 IN ULONG Length,
2229 OUT PULONG ScatterGatherListSize,
2230 OUT PULONG pNumberOfMapRegisters OPTIONAL);
2231
2232 typedef NTSTATUS
2233 (NTAPI *PBUILD_SCATTER_GATHER_LIST)(
2234 IN PDMA_ADAPTER DmaAdapter,
2235 IN PDEVICE_OBJECT DeviceObject,
2236 IN PMDL Mdl,
2237 IN PVOID CurrentVa,
2238 IN ULONG Length,
2239 IN PDRIVER_LIST_CONTROL ExecutionRoutine,
2240 IN PVOID Context,
2241 IN BOOLEAN WriteToDevice,
2242 IN PVOID ScatterGatherBuffer,
2243 IN ULONG ScatterGatherLength);
2244
2245 typedef NTSTATUS
2246 (NTAPI *PBUILD_MDL_FROM_SCATTER_GATHER_LIST)(
2247 IN PDMA_ADAPTER DmaAdapter,
2248 IN PSCATTER_GATHER_LIST ScatterGather,
2249 IN PMDL OriginalMdl,
2250 OUT PMDL *TargetMdl);
2251
2252 typedef struct _DMA_OPERATIONS {
2253 ULONG Size;
2254 PPUT_DMA_ADAPTER PutDmaAdapter;
2255 PALLOCATE_COMMON_BUFFER AllocateCommonBuffer;
2256 PFREE_COMMON_BUFFER FreeCommonBuffer;
2257 PALLOCATE_ADAPTER_CHANNEL AllocateAdapterChannel;
2258 PFLUSH_ADAPTER_BUFFERS FlushAdapterBuffers;
2259 PFREE_ADAPTER_CHANNEL FreeAdapterChannel;
2260 PFREE_MAP_REGISTERS FreeMapRegisters;
2261 PMAP_TRANSFER MapTransfer;
2262 PGET_DMA_ALIGNMENT GetDmaAlignment;
2263 PREAD_DMA_COUNTER ReadDmaCounter;
2264 PGET_SCATTER_GATHER_LIST GetScatterGatherList;
2265 PPUT_SCATTER_GATHER_LIST PutScatterGatherList;
2266 PCALCULATE_SCATTER_GATHER_LIST_SIZE CalculateScatterGatherList;
2267 PBUILD_SCATTER_GATHER_LIST BuildScatterGatherList;
2268 PBUILD_MDL_FROM_SCATTER_GATHER_LIST BuildMdlFromScatterGatherList;
2269 } DMA_OPERATIONS, *PDMA_OPERATIONS;
2270
2271 typedef struct _IO_RESOURCE_DESCRIPTOR {
2272 UCHAR Option;
2273 UCHAR Type;
2274 UCHAR ShareDisposition;
2275 UCHAR Spare1;
2276 USHORT Flags;
2277 USHORT Spare2;
2278 union {
2279 struct {
2280 ULONG Length;
2281 ULONG Alignment;
2282 PHYSICAL_ADDRESS MinimumAddress;
2283 PHYSICAL_ADDRESS MaximumAddress;
2284 } Port;
2285 struct {
2286 ULONG Length;
2287 ULONG Alignment;
2288 PHYSICAL_ADDRESS MinimumAddress;
2289 PHYSICAL_ADDRESS MaximumAddress;
2290 } Memory;
2291 struct {
2292 ULONG MinimumVector;
2293 ULONG MaximumVector;
2294 } Interrupt;
2295 struct {
2296 ULONG MinimumChannel;
2297 ULONG MaximumChannel;
2298 } Dma;
2299 struct {
2300 ULONG Length;
2301 ULONG Alignment;
2302 PHYSICAL_ADDRESS MinimumAddress;
2303 PHYSICAL_ADDRESS MaximumAddress;
2304 } Generic;
2305 struct {
2306 ULONG Data[3];
2307 } DevicePrivate;
2308 struct {
2309 ULONG Length;
2310 ULONG MinBusNumber;
2311 ULONG MaxBusNumber;
2312 ULONG Reserved;
2313 } BusNumber;
2314 struct {
2315 ULONG Priority;
2316 ULONG Reserved1;
2317 ULONG Reserved2;
2318 } ConfigData;
2319 } u;
2320 } IO_RESOURCE_DESCRIPTOR, *PIO_RESOURCE_DESCRIPTOR;
2321
2322 typedef struct _IO_RESOURCE_LIST {
2323 USHORT Version;
2324 USHORT Revision;
2325 ULONG Count;
2326 IO_RESOURCE_DESCRIPTOR Descriptors[1];
2327 } IO_RESOURCE_LIST, *PIO_RESOURCE_LIST;
2328
2329 typedef struct _IO_RESOURCE_REQUIREMENTS_LIST {
2330 ULONG ListSize;
2331 INTERFACE_TYPE InterfaceType;
2332 ULONG BusNumber;
2333 ULONG SlotNumber;
2334 ULONG Reserved[3];
2335 ULONG AlternativeLists;
2336 IO_RESOURCE_LIST List[1];
2337 } IO_RESOURCE_REQUIREMENTS_LIST, *PIO_RESOURCE_REQUIREMENTS_LIST;
2338
2339 typedef VOID
2340 (NTAPI DRIVER_CANCEL)(
2341 IN struct _DEVICE_OBJECT *DeviceObject,
2342 IN struct _IRP *Irp);
2343 typedef DRIVER_CANCEL *PDRIVER_CANCEL;
2344
2345 typedef struct _IRP {
2346 CSHORT Type;
2347 USHORT Size;
2348 struct _MDL *MdlAddress;
2349 ULONG Flags;
2350 union {
2351 struct _IRP *MasterIrp;
2352 volatile LONG IrpCount;
2353 PVOID SystemBuffer;
2354 } AssociatedIrp;
2355 LIST_ENTRY ThreadListEntry;
2356 IO_STATUS_BLOCK IoStatus;
2357 KPROCESSOR_MODE RequestorMode;
2358 BOOLEAN PendingReturned;
2359 CHAR StackCount;
2360 CHAR CurrentLocation;
2361 BOOLEAN Cancel;
2362 KIRQL CancelIrql;
2363 CCHAR ApcEnvironment;
2364 UCHAR AllocationFlags;
2365 PIO_STATUS_BLOCK UserIosb;
2366 PKEVENT UserEvent;
2367 union {
2368 struct {
2369 _ANONYMOUS_UNION union {
2370 PIO_APC_ROUTINE UserApcRoutine;
2371 PVOID IssuingProcess;
2372 } DUMMYUNIONNAME;
2373 PVOID UserApcContext;
2374 } AsynchronousParameters;
2375 LARGE_INTEGER AllocationSize;
2376 } Overlay;
2377 volatile PDRIVER_CANCEL CancelRoutine;
2378 PVOID UserBuffer;
2379 union {
2380 struct {
2381 _ANONYMOUS_UNION union {
2382 KDEVICE_QUEUE_ENTRY DeviceQueueEntry;
2383 _ANONYMOUS_STRUCT struct {
2384 PVOID DriverContext[4];
2385 } DUMMYSTRUCTNAME;
2386 } DUMMYUNIONNAME;
2387 PETHREAD Thread;
2388 PCHAR AuxiliaryBuffer;
2389 _ANONYMOUS_STRUCT struct {
2390 LIST_ENTRY ListEntry;
2391 _ANONYMOUS_UNION union {
2392 struct _IO_STACK_LOCATION *CurrentStackLocation;
2393 ULONG PacketType;
2394 } DUMMYUNIONNAME;
2395 } DUMMYSTRUCTNAME;
2396 struct _FILE_OBJECT *OriginalFileObject;
2397 } Overlay;
2398 KAPC Apc;
2399 PVOID CompletionKey;
2400 } Tail;
2401 } IRP, *PIRP;
2402
2403 typedef enum _IO_PAGING_PRIORITY {
2404 IoPagingPriorityInvalid,
2405 IoPagingPriorityNormal,
2406 IoPagingPriorityHigh,
2407 IoPagingPriorityReserved1,
2408 IoPagingPriorityReserved2
2409 } IO_PAGING_PRIORITY;
2410
2411 typedef NTSTATUS
2412 (NTAPI IO_COMPLETION_ROUTINE)(
2413 IN struct _DEVICE_OBJECT *DeviceObject,
2414 IN struct _IRP *Irp,
2415 IN PVOID Context);
2416 typedef IO_COMPLETION_ROUTINE *PIO_COMPLETION_ROUTINE;
2417
2418 typedef VOID
2419 (NTAPI IO_DPC_ROUTINE)(
2420 IN struct _KDPC *Dpc,
2421 IN struct _DEVICE_OBJECT *DeviceObject,
2422 IN struct _IRP *Irp,
2423 IN PVOID Context);
2424 typedef IO_DPC_ROUTINE *PIO_DPC_ROUTINE;
2425
2426 typedef NTSTATUS
2427 (NTAPI *PMM_DLL_INITIALIZE)(
2428 IN PUNICODE_STRING RegistryPath);
2429
2430 typedef NTSTATUS
2431 (NTAPI *PMM_DLL_UNLOAD)(
2432 VOID);
2433
2434 typedef VOID
2435 (NTAPI IO_TIMER_ROUTINE)(
2436 IN struct _DEVICE_OBJECT *DeviceObject,
2437 IN PVOID Context);
2438 typedef IO_TIMER_ROUTINE *PIO_TIMER_ROUTINE;
2439
2440 typedef struct _IO_SECURITY_CONTEXT {
2441 PSECURITY_QUALITY_OF_SERVICE SecurityQos;
2442 PACCESS_STATE AccessState;
2443 ACCESS_MASK DesiredAccess;
2444 ULONG FullCreateOptions;
2445 } IO_SECURITY_CONTEXT, *PIO_SECURITY_CONTEXT;
2446
2447 struct _IO_CSQ;
2448
2449 typedef struct _IO_CSQ_IRP_CONTEXT {
2450 ULONG Type;
2451 struct _IRP *Irp;
2452 struct _IO_CSQ *Csq;
2453 } IO_CSQ_IRP_CONTEXT, *PIO_CSQ_IRP_CONTEXT;
2454
2455 typedef VOID
2456 (NTAPI *PIO_CSQ_INSERT_IRP)(
2457 IN struct _IO_CSQ *Csq,
2458 IN PIRP Irp);
2459
2460 typedef NTSTATUS
2461 (NTAPI IO_CSQ_INSERT_IRP_EX)(
2462 IN struct _IO_CSQ *Csq,
2463 IN PIRP Irp,
2464 IN PVOID InsertContext);
2465 typedef IO_CSQ_INSERT_IRP_EX *PIO_CSQ_INSERT_IRP_EX;
2466
2467 typedef VOID
2468 (NTAPI *PIO_CSQ_REMOVE_IRP)(
2469 IN struct _IO_CSQ *Csq,
2470 IN PIRP Irp);
2471
2472 typedef PIRP
2473 (NTAPI *PIO_CSQ_PEEK_NEXT_IRP)(
2474 IN struct _IO_CSQ *Csq,
2475 IN PIRP Irp,
2476 IN PVOID PeekContext);
2477
2478 typedef VOID
2479 (NTAPI *PIO_CSQ_ACQUIRE_LOCK)(
2480 IN struct _IO_CSQ *Csq,
2481 OUT PKIRQL Irql);
2482
2483 typedef VOID
2484 (NTAPI *PIO_CSQ_RELEASE_LOCK)(
2485 IN struct _IO_CSQ *Csq,
2486 IN KIRQL Irql);
2487
2488 typedef VOID
2489 (NTAPI *PIO_CSQ_COMPLETE_CANCELED_IRP)(
2490 IN struct _IO_CSQ *Csq,
2491 IN PIRP Irp);
2492
2493 typedef struct _IO_CSQ {
2494 ULONG Type;
2495 PIO_CSQ_INSERT_IRP CsqInsertIrp;
2496 PIO_CSQ_REMOVE_IRP CsqRemoveIrp;
2497 PIO_CSQ_PEEK_NEXT_IRP CsqPeekNextIrp;
2498 PIO_CSQ_ACQUIRE_LOCK CsqAcquireLock;
2499 PIO_CSQ_RELEASE_LOCK CsqReleaseLock;
2500 PIO_CSQ_COMPLETE_CANCELED_IRP CsqCompleteCanceledIrp;
2501 PVOID ReservePointer;
2502 } IO_CSQ, *PIO_CSQ;
2503
2504 typedef enum _BUS_QUERY_ID_TYPE {
2505 BusQueryDeviceID,
2506 BusQueryHardwareIDs,
2507 BusQueryCompatibleIDs,
2508 BusQueryInstanceID,
2509 BusQueryDeviceSerialNumber
2510 } BUS_QUERY_ID_TYPE, *PBUS_QUERY_ID_TYPE;
2511
2512 typedef enum _DEVICE_TEXT_TYPE {
2513 DeviceTextDescription,
2514 DeviceTextLocationInformation
2515 } DEVICE_TEXT_TYPE, *PDEVICE_TEXT_TYPE;
2516
2517 typedef BOOLEAN
2518 (NTAPI *PGPE_SERVICE_ROUTINE)(
2519 PVOID,
2520 PVOID);
2521
2522 typedef NTSTATUS
2523 (NTAPI *PGPE_CONNECT_VECTOR)(
2524 PDEVICE_OBJECT,
2525 ULONG,
2526 KINTERRUPT_MODE,
2527 BOOLEAN,
2528 PGPE_SERVICE_ROUTINE,
2529 PVOID,
2530 PVOID);
2531
2532 typedef NTSTATUS
2533 (NTAPI *PGPE_DISCONNECT_VECTOR)(
2534 PVOID);
2535
2536 typedef NTSTATUS
2537 (NTAPI *PGPE_ENABLE_EVENT)(
2538 PDEVICE_OBJECT,
2539 PVOID);
2540
2541 typedef NTSTATUS
2542 (NTAPI *PGPE_DISABLE_EVENT)(
2543 PDEVICE_OBJECT,
2544 PVOID);
2545
2546 typedef NTSTATUS
2547 (NTAPI *PGPE_CLEAR_STATUS)(
2548 PDEVICE_OBJECT,
2549 PVOID);
2550
2551 typedef VOID
2552 (NTAPI *PDEVICE_NOTIFY_CALLBACK)(
2553 PVOID,
2554 ULONG);
2555
2556 typedef NTSTATUS
2557 (NTAPI *PREGISTER_FOR_DEVICE_NOTIFICATIONS)(
2558 PDEVICE_OBJECT,
2559 PDEVICE_NOTIFY_CALLBACK,
2560 PVOID);
2561
2562 typedef VOID
2563 (NTAPI *PUNREGISTER_FOR_DEVICE_NOTIFICATIONS)(
2564 PDEVICE_OBJECT,
2565 PDEVICE_NOTIFY_CALLBACK);
2566
2567 typedef struct _ACPI_INTERFACE_STANDARD {
2568 USHORT Size;
2569 USHORT Version;
2570 PVOID Context;
2571 PINTERFACE_REFERENCE InterfaceReference;
2572 PINTERFACE_DEREFERENCE InterfaceDereference;
2573 PGPE_CONNECT_VECTOR GpeConnectVector;
2574 PGPE_DISCONNECT_VECTOR GpeDisconnectVector;
2575 PGPE_ENABLE_EVENT GpeEnableEvent;
2576 PGPE_DISABLE_EVENT GpeDisableEvent;
2577 PGPE_CLEAR_STATUS GpeClearStatus;
2578 PREGISTER_FOR_DEVICE_NOTIFICATIONS RegisterForDeviceNotifications;
2579 PUNREGISTER_FOR_DEVICE_NOTIFICATIONS UnregisterForDeviceNotifications;
2580 } ACPI_INTERFACE_STANDARD, *PACPI_INTERFACE_STANDARD;
2581
2582 typedef BOOLEAN
2583 (NTAPI *PGPE_SERVICE_ROUTINE2)(
2584 PVOID ObjectContext,
2585 PVOID ServiceContext);
2586
2587 typedef NTSTATUS
2588 (NTAPI *PGPE_CONNECT_VECTOR2)(
2589 PVOID Context,
2590 ULONG GpeNumber,
2591 KINTERRUPT_MODE Mode,
2592 BOOLEAN Shareable,
2593 PGPE_SERVICE_ROUTINE ServiceRoutine,
2594 PVOID ServiceContext,
2595 PVOID *ObjectContext);
2596
2597 typedef NTSTATUS
2598 (NTAPI *PGPE_DISCONNECT_VECTOR2)(
2599 PVOID Context,
2600 PVOID ObjectContext);
2601
2602 typedef NTSTATUS
2603 (NTAPI *PGPE_ENABLE_EVENT2)(
2604 PVOID Context,
2605 PVOID ObjectContext);
2606
2607 typedef NTSTATUS
2608 (NTAPI *PGPE_DISABLE_EVENT2)(
2609 PVOID Context,
2610 PVOID ObjectContext);
2611
2612 typedef NTSTATUS
2613 (NTAPI *PGPE_CLEAR_STATUS2)(
2614 PVOID Context,
2615 PVOID ObjectContext);
2616
2617 typedef VOID
2618 (NTAPI *PDEVICE_NOTIFY_CALLBACK2)(
2619 PVOID NotificationContext,
2620 ULONG NotifyCode);
2621
2622 typedef NTSTATUS
2623 (NTAPI *PREGISTER_FOR_DEVICE_NOTIFICATIONS2)(
2624 PVOID Context,
2625 PDEVICE_NOTIFY_CALLBACK2 NotificationHandler,
2626 PVOID NotificationContext);
2627
2628 typedef VOID
2629 (NTAPI *PUNREGISTER_FOR_DEVICE_NOTIFICATIONS2)(
2630 PVOID Context);
2631
2632 typedef struct _ACPI_INTERFACE_STANDARD2 {
2633 USHORT Size;
2634 USHORT Version;
2635 PVOID Context;
2636 PINTERFACE_REFERENCE InterfaceReference;
2637 PINTERFACE_DEREFERENCE InterfaceDereference;
2638 PGPE_CONNECT_VECTOR2 GpeConnectVector;
2639 PGPE_DISCONNECT_VECTOR2 GpeDisconnectVector;
2640 PGPE_ENABLE_EVENT2 GpeEnableEvent;
2641 PGPE_DISABLE_EVENT2 GpeDisableEvent;
2642 PGPE_CLEAR_STATUS2 GpeClearStatus;
2643 PREGISTER_FOR_DEVICE_NOTIFICATIONS2 RegisterForDeviceNotifications;
2644 PUNREGISTER_FOR_DEVICE_NOTIFICATIONS2 UnregisterForDeviceNotifications;
2645 } ACPI_INTERFACE_STANDARD2, *PACPI_INTERFACE_STANDARD2;
2646
2647 #if !defined(_AMD64_) && !defined(_IA64_)
2648 #include <pshpack4.h>
2649 #endif
2650 typedef struct _IO_STACK_LOCATION {
2651 UCHAR MajorFunction;
2652 UCHAR MinorFunction;
2653 UCHAR Flags;
2654 UCHAR Control;
2655 union {
2656 struct {
2657 PIO_SECURITY_CONTEXT SecurityContext;
2658 ULONG Options;
2659 USHORT POINTER_ALIGNMENT FileAttributes;
2660 USHORT ShareAccess;
2661 ULONG POINTER_ALIGNMENT EaLength;
2662 } Create;
2663 struct {
2664 ULONG Length;
2665 ULONG POINTER_ALIGNMENT Key;
2666 LARGE_INTEGER ByteOffset;
2667 } Read;
2668 struct {
2669 ULONG Length;
2670 ULONG POINTER_ALIGNMENT Key;
2671 LARGE_INTEGER ByteOffset;
2672 } Write;
2673 struct {
2674 ULONG Length;
2675 PUNICODE_STRING FileName;
2676 FILE_INFORMATION_CLASS FileInformationClass;
2677 ULONG FileIndex;
2678 } QueryDirectory;
2679 struct {
2680 ULONG Length;
2681 ULONG CompletionFilter;
2682 } NotifyDirectory;
2683 struct {
2684 ULONG Length;
2685 FILE_INFORMATION_CLASS POINTER_ALIGNMENT FileInformationClass;
2686 } QueryFile;
2687 struct {
2688 ULONG Length;
2689 FILE_INFORMATION_CLASS POINTER_ALIGNMENT FileInformationClass;
2690 PFILE_OBJECT FileObject;
2691 _ANONYMOUS_UNION union {
2692 _ANONYMOUS_STRUCT struct {
2693 BOOLEAN ReplaceIfExists;
2694 BOOLEAN AdvanceOnly;
2695 } DUMMYSTRUCTNAME;
2696 ULONG ClusterCount;
2697 HANDLE DeleteHandle;
2698 } DUMMYUNIONNAME;
2699 } SetFile;
2700 struct {
2701 ULONG Length;
2702 PVOID EaList;
2703 ULONG EaListLength;
2704 ULONG EaIndex;
2705 } QueryEa;
2706 struct {
2707 ULONG Length;
2708 } SetEa;
2709 struct {
2710 ULONG Length;
2711 FS_INFORMATION_CLASS POINTER_ALIGNMENT FsInformationClass;
2712 } QueryVolume;
2713 struct {
2714 ULONG Length;
2715 FS_INFORMATION_CLASS FsInformationClass;
2716 } SetVolume;
2717 struct {
2718 ULONG OutputBufferLength;
2719 ULONG InputBufferLength;
2720 ULONG FsControlCode;
2721 PVOID Type3InputBuffer;
2722 } FileSystemControl;
2723 struct {
2724 PLARGE_INTEGER Length;
2725 ULONG Key;
2726 LARGE_INTEGER ByteOffset;
2727 } LockControl;
2728 struct {
2729 ULONG OutputBufferLength;
2730 ULONG POINTER_ALIGNMENT InputBufferLength;
2731 ULONG POINTER_ALIGNMENT IoControlCode;
2732 PVOID Type3InputBuffer;
2733 } DeviceIoControl;
2734 struct {
2735 SECURITY_INFORMATION SecurityInformation;
2736 ULONG POINTER_ALIGNMENT Length;
2737 } QuerySecurity;
2738 struct {
2739 SECURITY_INFORMATION SecurityInformation;
2740 PSECURITY_DESCRIPTOR SecurityDescriptor;
2741 } SetSecurity;
2742 struct {
2743 PVPB Vpb;
2744 PDEVICE_OBJECT DeviceObject;
2745 } MountVolume;
2746 struct {
2747 PVPB Vpb;
2748 PDEVICE_OBJECT DeviceObject;
2749 } VerifyVolume;
2750 struct {
2751 struct _SCSI_REQUEST_BLOCK *Srb;
2752 } Scsi;
2753 struct {
2754 ULONG Length;
2755 PSID StartSid;
2756 struct _FILE_GET_QUOTA_INFORMATION *SidList;
2757 ULONG SidListLength;
2758 } QueryQuota;
2759 struct {
2760 ULONG Length;
2761 } SetQuota;
2762 struct {
2763 DEVICE_RELATION_TYPE Type;
2764 } QueryDeviceRelations;
2765 struct {
2766 CONST GUID *InterfaceType;
2767 USHORT Size;
2768 USHORT Version;
2769 PINTERFACE Interface;
2770 PVOID InterfaceSpecificData;
2771 } QueryInterface;
2772 struct {
2773 PDEVICE_CAPABILITIES Capabilities;
2774 } DeviceCapabilities;
2775 struct {
2776 PIO_RESOURCE_REQUIREMENTS_LIST IoResourceRequirementList;
2777 } FilterResourceRequirements;
2778 struct {
2779 ULONG WhichSpace;
2780 PVOID Buffer;
2781 ULONG Offset;
2782 ULONG POINTER_ALIGNMENT Length;
2783 } ReadWriteConfig;
2784 struct {
2785 BOOLEAN Lock;
2786 } SetLock;
2787 struct {
2788 BUS_QUERY_ID_TYPE IdType;
2789 } QueryId;
2790 struct {
2791 DEVICE_TEXT_TYPE DeviceTextType;
2792 LCID POINTER_ALIGNMENT LocaleId;
2793 } QueryDeviceText;
2794 struct {
2795 BOOLEAN InPath;
2796 BOOLEAN Reserved[3];
2797 DEVICE_USAGE_NOTIFICATION_TYPE POINTER_ALIGNMENT Type;
2798 } UsageNotification;
2799 struct {
2800 SYSTEM_POWER_STATE PowerState;
2801 } WaitWake;
2802 struct {
2803 PPOWER_SEQUENCE PowerSequence;
2804 } PowerSequence;
2805 struct {
2806 ULONG SystemContext;
2807 POWER_STATE_TYPE POINTER_ALIGNMENT Type;
2808 POWER_STATE POINTER_ALIGNMENT State;
2809 POWER_ACTION POINTER_ALIGNMENT ShutdownType;
2810 } Power;
2811 struct {
2812 PCM_RESOURCE_LIST AllocatedResources;
2813 PCM_RESOURCE_LIST AllocatedResourcesTranslated;
2814 } StartDevice;
2815 struct {
2816 ULONG_PTR ProviderId;
2817 PVOID DataPath;
2818 ULONG BufferSize;
2819 PVOID Buffer;
2820 } WMI;
2821 struct {
2822 PVOID Argument1;
2823 PVOID Argument2;
2824 PVOID Argument3;
2825 PVOID Argument4;
2826 } Others;
2827 } Parameters;
2828 PDEVICE_OBJECT DeviceObject;
2829 PFILE_OBJECT FileObject;
2830 PIO_COMPLETION_ROUTINE CompletionRoutine;
2831 PVOID Context;
2832 } IO_STACK_LOCATION, *PIO_STACK_LOCATION;
2833 #if !defined(_AMD64_) && !defined(_IA64_)
2834 #include <poppack.h>
2835 #endif
2836
2837 /* IO_STACK_LOCATION.Control */
2838
2839 #define SL_PENDING_RETURNED 0x01
2840 #define SL_ERROR_RETURNED 0x02
2841 #define SL_INVOKE_ON_CANCEL 0x20
2842 #define SL_INVOKE_ON_SUCCESS 0x40
2843 #define SL_INVOKE_ON_ERROR 0x80
2844 $endif
2845
2846 $if (_WDMDDK_ || _DEVIOCTL_)
2847 #define METHOD_BUFFERED 0
2848 #define METHOD_IN_DIRECT 1
2849 #define METHOD_OUT_DIRECT 2
2850 #define METHOD_NEITHER 3
2851
2852 #define METHOD_DIRECT_TO_HARDWARE METHOD_IN_DIRECT
2853 #define METHOD_DIRECT_FROM_HARDWARE METHOD_OUT_DIRECT
2854 $endif
2855
2856 $if (_WDMDDK_)
2857 #define FILE_SUPERSEDED 0x00000000
2858 #define FILE_OPENED 0x00000001
2859 #define FILE_CREATED 0x00000002
2860 #define FILE_OVERWRITTEN 0x00000003
2861 #define FILE_EXISTS 0x00000004
2862 #define FILE_DOES_NOT_EXIST 0x00000005
2863
2864 #define FILE_USE_FILE_POINTER_POSITION 0xfffffffe
2865 #define FILE_WRITE_TO_END_OF_FILE 0xffffffff
2866
2867 /* also in winnt.h */
2868 #define FILE_LIST_DIRECTORY 0x00000001
2869 #define FILE_READ_DATA 0x00000001
2870 #define FILE_ADD_FILE 0x00000002
2871 #define FILE_WRITE_DATA 0x00000002
2872 #define FILE_ADD_SUBDIRECTORY 0x00000004
2873 #define FILE_APPEND_DATA 0x00000004
2874 #define FILE_CREATE_PIPE_INSTANCE 0x00000004
2875 #define FILE_READ_EA 0x00000008
2876 #define FILE_WRITE_EA 0x00000010
2877 #define FILE_EXECUTE 0x00000020
2878 #define FILE_TRAVERSE 0x00000020
2879 #define FILE_DELETE_CHILD 0x00000040
2880 #define FILE_READ_ATTRIBUTES 0x00000080
2881 #define FILE_WRITE_ATTRIBUTES 0x00000100
2882
2883 #define FILE_SHARE_READ 0x00000001
2884 #define FILE_SHARE_WRITE 0x00000002
2885 #define FILE_SHARE_DELETE 0x00000004
2886 #define FILE_SHARE_VALID_FLAGS 0x00000007
2887
2888 #define FILE_ATTRIBUTE_READONLY 0x00000001
2889 #define FILE_ATTRIBUTE_HIDDEN 0x00000002
2890 #define FILE_ATTRIBUTE_SYSTEM 0x00000004
2891 #define FILE_ATTRIBUTE_DIRECTORY 0x00000010
2892 #define FILE_ATTRIBUTE_ARCHIVE 0x00000020
2893 #define FILE_ATTRIBUTE_DEVICE 0x00000040
2894 #define FILE_ATTRIBUTE_NORMAL 0x00000080
2895 #define FILE_ATTRIBUTE_TEMPORARY 0x00000100
2896 #define FILE_ATTRIBUTE_SPARSE_FILE 0x00000200
2897 #define FILE_ATTRIBUTE_REPARSE_POINT 0x00000400
2898 #define FILE_ATTRIBUTE_COMPRESSED 0x00000800
2899 #define FILE_ATTRIBUTE_OFFLINE 0x00001000
2900 #define FILE_ATTRIBUTE_NOT_CONTENT_INDEXED 0x00002000
2901 #define FILE_ATTRIBUTE_ENCRYPTED 0x00004000
2902 #define FILE_ATTRIBUTE_VIRTUAL 0x00010000
2903
2904 #define FILE_ATTRIBUTE_VALID_FLAGS 0x00007fb7
2905 #define FILE_ATTRIBUTE_VALID_SET_FLAGS 0x000031a7
2906
2907 #define FILE_VALID_OPTION_FLAGS 0x00ffffff
2908 #define FILE_VALID_PIPE_OPTION_FLAGS 0x00000032
2909 #define FILE_VALID_MAILSLOT_OPTION_FLAGS 0x00000032
2910 #define FILE_VALID_SET_FLAGS 0x00000036
2911
2912 #define FILE_SUPERSEDE 0x00000000
2913 #define FILE_OPEN 0x00000001
2914 #define FILE_CREATE 0x00000002
2915 #define FILE_OPEN_IF 0x00000003
2916 #define FILE_OVERWRITE 0x00000004
2917 #define FILE_OVERWRITE_IF 0x00000005
2918 #define FILE_MAXIMUM_DISPOSITION 0x00000005
2919
2920 #define FILE_DIRECTORY_FILE 0x00000001
2921 #define FILE_WRITE_THROUGH 0x00000002
2922 #define FILE_SEQUENTIAL_ONLY 0x00000004
2923 #define FILE_NO_INTERMEDIATE_BUFFERING 0x00000008
2924 #define FILE_SYNCHRONOUS_IO_ALERT 0x00000010
2925 #define FILE_SYNCHRONOUS_IO_NONALERT 0x00000020
2926 #define FILE_NON_DIRECTORY_FILE 0x00000040
2927 #define FILE_CREATE_TREE_CONNECTION 0x00000080
2928 #define FILE_COMPLETE_IF_OPLOCKED 0x00000100
2929 #define FILE_NO_EA_KNOWLEDGE 0x00000200
2930 #define FILE_OPEN_REMOTE_INSTANCE 0x00000400
2931 #define FILE_RANDOM_ACCESS 0x00000800
2932 #define FILE_DELETE_ON_CLOSE 0x00001000
2933 #define FILE_OPEN_BY_FILE_ID 0x00002000
2934 #define FILE_OPEN_FOR_BACKUP_INTENT 0x00004000
2935 #define FILE_NO_COMPRESSION 0x00008000
2936 #if (NTDDI_VERSION >= NTDDI_WIN7)
2937 #define FILE_OPEN_REQUIRING_OPLOCK 0x00010000
2938 #define FILE_DISALLOW_EXCLUSIVE 0x00020000
2939 #endif /* (NTDDI_VERSION >= NTDDI_WIN7) */
2940 #define FILE_RESERVE_OPFILTER 0x00100000
2941 #define FILE_OPEN_REPARSE_POINT 0x00200000
2942 #define FILE_OPEN_NO_RECALL 0x00400000
2943 #define FILE_OPEN_FOR_FREE_SPACE_QUERY 0x00800000
2944 $endif
2945
2946 $if (_WDMDDK_ || _DEVIOCTL_)
2947 #define FILE_ANY_ACCESS 0x00000000
2948 #define FILE_SPECIAL_ACCESS FILE_ANY_ACCESS
2949 #define FILE_READ_ACCESS 0x00000001
2950 #define FILE_WRITE_ACCESS 0x00000002
2951 $endif
2952
2953 $if (_WDMDDK_)
2954 #define FILE_ALL_ACCESS \
2955 (STANDARD_RIGHTS_REQUIRED | \
2956 SYNCHRONIZE | \
2957 0x1FF)
2958
2959 #define FILE_GENERIC_EXECUTE \
2960 (STANDARD_RIGHTS_EXECUTE | \
2961 FILE_READ_ATTRIBUTES | \
2962 FILE_EXECUTE | \
2963 SYNCHRONIZE)
2964
2965 #define FILE_GENERIC_READ \
2966 (STANDARD_RIGHTS_READ | \
2967 FILE_READ_DATA | \
2968 FILE_READ_ATTRIBUTES | \
2969 FILE_READ_EA | \
2970 SYNCHRONIZE)
2971
2972 #define FILE_GENERIC_WRITE \
2973 (STANDARD_RIGHTS_WRITE | \
2974 FILE_WRITE_DATA | \
2975 FILE_WRITE_ATTRIBUTES | \
2976 FILE_WRITE_EA | \
2977 FILE_APPEND_DATA | \
2978 SYNCHRONIZE)
2979
2980 /* end winnt.h */
2981
2982 #define WMIREG_ACTION_REGISTER 1
2983 #define WMIREG_ACTION_DEREGISTER 2
2984 #define WMIREG_ACTION_REREGISTER 3
2985 #define WMIREG_ACTION_UPDATE_GUIDS 4
2986 #define WMIREG_ACTION_BLOCK_IRPS 5
2987
2988 #define WMIREGISTER 0
2989 #define WMIUPDATE 1
2990
2991 typedef VOID
2992 (NTAPI FWMI_NOTIFICATION_CALLBACK)(
2993 PVOID Wnode,
2994 PVOID Context);
2995 typedef FWMI_NOTIFICATION_CALLBACK *WMI_NOTIFICATION_CALLBACK;
2996
2997 #ifndef _PCI_X_
2998 #define _PCI_X_
2999
3000 typedef struct _PCI_SLOT_NUMBER {
3001 union {
3002 struct {
3003 ULONG DeviceNumber:5;
3004 ULONG FunctionNumber:3;
3005 ULONG Reserved:24;
3006 } bits;
3007 ULONG AsULONG;
3008 } u;
3009 } PCI_SLOT_NUMBER, *PPCI_SLOT_NUMBER;
3010
3011 #define PCI_TYPE0_ADDRESSES 6
3012 #define PCI_TYPE1_ADDRESSES 2
3013 #define PCI_TYPE2_ADDRESSES 5
3014
3015 typedef struct _PCI_COMMON_HEADER {
3016 PCI_COMMON_HEADER_LAYOUT
3017 } PCI_COMMON_HEADER, *PPCI_COMMON_HEADER;
3018
3019 #ifdef __cplusplus
3020 typedef struct _PCI_COMMON_CONFIG {
3021 PCI_COMMON_HEADER_LAYOUT
3022 UCHAR DeviceSpecific[192];
3023 } PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;
3024 #else
3025 typedef struct _PCI_COMMON_CONFIG {
3026 PCI_COMMON_HEADER DUMMYSTRUCTNAME;
3027 UCHAR DeviceSpecific[192];
3028 } PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;
3029 #endif
3030
3031 #define PCI_COMMON_HDR_LENGTH (FIELD_OFFSET(PCI_COMMON_CONFIG, DeviceSpecific))
3032
3033 #define PCI_EXTENDED_CONFIG_LENGTH 0x1000
3034
3035 #define PCI_MAX_DEVICES 32
3036 #define PCI_MAX_FUNCTION 8
3037 #define PCI_MAX_BRIDGE_NUMBER 0xFF
3038 #define PCI_INVALID_VENDORID 0xFFFF
3039
3040 /* PCI_COMMON_CONFIG.HeaderType */
3041 #define PCI_MULTIFUNCTION 0x80
3042 #define PCI_DEVICE_TYPE 0x00
3043 #define PCI_BRIDGE_TYPE 0x01
3044 #define PCI_CARDBUS_BRIDGE_TYPE 0x02
3045
3046 #define PCI_CONFIGURATION_TYPE(PciData) \
3047 (((PPCI_COMMON_CONFIG) (PciData))->HeaderType & ~PCI_MULTIFUNCTION)
3048
3049 #define PCI_MULTIFUNCTION_DEVICE(PciData) \
3050 ((((PPCI_COMMON_CONFIG) (PciData))->HeaderType & PCI_MULTIFUNCTION) != 0)
3051
3052 /* PCI_COMMON_CONFIG.Command */
3053 #define PCI_ENABLE_IO_SPACE 0x0001
3054 #define PCI_ENABLE_MEMORY_SPACE 0x0002
3055 #define PCI_ENABLE_BUS_MASTER 0x0004
3056 #define PCI_ENABLE_SPECIAL_CYCLES 0x0008
3057 #define PCI_ENABLE_WRITE_AND_INVALIDATE 0x0010
3058 #define PCI_ENABLE_VGA_COMPATIBLE_PALETTE 0x0020
3059 #define PCI_ENABLE_PARITY 0x0040
3060 #define PCI_ENABLE_WAIT_CYCLE 0x0080
3061 #define PCI_ENABLE_SERR 0x0100
3062 #define PCI_ENABLE_FAST_BACK_TO_BACK 0x0200
3063 #define PCI_DISABLE_LEVEL_INTERRUPT 0x0400
3064
3065 /* PCI_COMMON_CONFIG.Status */
3066 #define PCI_STATUS_INTERRUPT_PENDING 0x0008
3067 #define PCI_STATUS_CAPABILITIES_LIST 0x0010
3068 #define PCI_STATUS_66MHZ_CAPABLE 0x0020
3069 #define PCI_STATUS_UDF_SUPPORTED 0x0040
3070 #define PCI_STATUS_FAST_BACK_TO_BACK 0x0080
3071 #define PCI_STATUS_DATA_PARITY_DETECTED 0x0100
3072 #define PCI_STATUS_DEVSEL 0x0600
3073 #define PCI_STATUS_SIGNALED_TARGET_ABORT 0x0800
3074 #define PCI_STATUS_RECEIVED_TARGET_ABORT 0x1000
3075 #define PCI_STATUS_RECEIVED_MASTER_ABORT 0x2000
3076 #define PCI_STATUS_SIGNALED_SYSTEM_ERROR 0x4000
3077 #define PCI_STATUS_DETECTED_PARITY_ERROR 0x8000
3078
3079 /* IO_STACK_LOCATION.Parameters.ReadWriteControl.WhichSpace */
3080
3081 #define PCI_WHICHSPACE_CONFIG 0x0
3082 #define PCI_WHICHSPACE_ROM 0x52696350 /* 'PciR' */
3083
3084 #define PCI_CAPABILITY_ID_POWER_MANAGEMENT 0x01
3085 #define PCI_CAPABILITY_ID_AGP 0x02
3086 #define PCI_CAPABILITY_ID_VPD 0x03
3087 #define PCI_CAPABILITY_ID_SLOT_ID 0x04
3088 #define PCI_CAPABILITY_ID_MSI 0x05
3089 #define PCI_CAPABILITY_ID_CPCI_HOTSWAP 0x06
3090 #define PCI_CAPABILITY_ID_PCIX 0x07
3091 #define PCI_CAPABILITY_ID_HYPERTRANSPORT 0x08
3092 #define PCI_CAPABILITY_ID_VENDOR_SPECIFIC 0x09
3093 #define PCI_CAPABILITY_ID_DEBUG_PORT 0x0A
3094 #define PCI_CAPABILITY_ID_CPCI_RES_CTRL 0x0B
3095 #define PCI_CAPABILITY_ID_SHPC 0x0C
3096 #define PCI_CAPABILITY_ID_P2P_SSID 0x0D
3097 #define PCI_CAPABILITY_ID_AGP_TARGET 0x0E
3098 #define PCI_CAPABILITY_ID_SECURE 0x0F
3099 #define PCI_CAPABILITY_ID_PCI_EXPRESS 0x10
3100 #define PCI_CAPABILITY_ID_MSIX 0x11
3101
3102 typedef struct _PCI_CAPABILITIES_HEADER {
3103 UCHAR CapabilityID;
3104 UCHAR Next;
3105 } PCI_CAPABILITIES_HEADER, *PPCI_CAPABILITIES_HEADER;
3106
3107 typedef struct _PCI_PMC {
3108 UCHAR Version:3;
3109 UCHAR PMEClock:1;
3110 UCHAR Rsvd1:1;
3111 UCHAR DeviceSpecificInitialization:1;
3112 UCHAR Rsvd2:2;
3113 struct _PM_SUPPORT {
3114 UCHAR Rsvd2:1;
3115 UCHAR D1:1;
3116 UCHAR D2:1;
3117 UCHAR PMED0:1;
3118 UCHAR PMED1:1;
3119 UCHAR PMED2:1;
3120 UCHAR PMED3Hot:1;
3121 UCHAR PMED3Cold:1;
3122 } Support;
3123 } PCI_PMC, *PPCI_PMC;
3124
3125 typedef struct _PCI_PMCSR {
3126 USHORT PowerState:2;
3127 USHORT Rsvd1:6;
3128 USHORT PMEEnable:1;
3129 USHORT DataSelect:4;
3130 USHORT DataScale:2;
3131 USHORT PMEStatus:1;
3132 } PCI_PMCSR, *PPCI_PMCSR;
3133
3134 typedef struct _PCI_PMCSR_BSE {
3135 UCHAR Rsvd1:6;
3136 UCHAR D3HotSupportsStopClock:1;
3137 UCHAR BusPowerClockControlEnabled:1;
3138 } PCI_PMCSR_BSE, *PPCI_PMCSR_BSE;
3139
3140 typedef struct _PCI_PM_CAPABILITY {
3141 PCI_CAPABILITIES_HEADER Header;
3142 union {
3143 PCI_PMC Capabilities;
3144 USHORT AsUSHORT;
3145 } PMC;
3146 union {
3147 PCI_PMCSR ControlStatus;
3148 USHORT AsUSHORT;
3149 } PMCSR;
3150 union {
3151 PCI_PMCSR_BSE BridgeSupport;
3152 UCHAR AsUCHAR;
3153 } PMCSR_BSE;
3154 UCHAR Data;
3155 } PCI_PM_CAPABILITY, *PPCI_PM_CAPABILITY;
3156
3157 typedef struct {
3158 PCI_CAPABILITIES_HEADER Header;
3159 union {
3160 struct {
3161 USHORT DataParityErrorRecoveryEnable:1;
3162 USHORT EnableRelaxedOrdering:1;
3163 USHORT MaxMemoryReadByteCount:2;
3164 USHORT MaxOutstandingSplitTransactions:3;
3165 USHORT Reserved:9;
3166 } bits;
3167 USHORT AsUSHORT;
3168 } Command;
3169 union {
3170 struct {
3171 ULONG FunctionNumber:3;
3172 ULONG DeviceNumber:5;
3173 ULONG BusNumber:8;
3174 ULONG Device64Bit:1;
3175 ULONG Capable133MHz:1;
3176 ULONG SplitCompletionDiscarded:1;
3177 ULONG UnexpectedSplitCompletion:1;
3178 ULONG DeviceComplexity:1;
3179 ULONG DesignedMaxMemoryReadByteCount:2;
3180 ULONG DesignedMaxOutstandingSplitTransactions:3;
3181 ULONG DesignedMaxCumulativeReadSize:3;
3182 ULONG ReceivedSplitCompletionErrorMessage:1;
3183 ULONG CapablePCIX266:1;
3184 ULONG CapablePCIX533:1;
3185 } bits;
3186 ULONG AsULONG;
3187 } Status;
3188 } PCI_X_CAPABILITY, *PPCI_X_CAPABILITY;
3189
3190 #define PCI_EXPRESS_ADVANCED_ERROR_REPORTING_CAP_ID 0x0001
3191 #define PCI_EXPRESS_VIRTUAL_CHANNEL_CAP_ID 0x0002
3192 #define PCI_EXPRESS_DEVICE_SERIAL_NUMBER_CAP_ID 0x0003
3193 #define PCI_EXPRESS_POWER_BUDGETING_CAP_ID 0x0004
3194 #define PCI_EXPRESS_RC_LINK_DECLARATION_CAP_ID 0x0005
3195 #define PCI_EXPRESS_RC_INTERNAL_LINK_CONTROL_CAP_ID 0x0006
3196 #define PCI_EXPRESS_RC_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION_CAP_ID 0x0007
3197 #define PCI_EXPRESS_MFVC_CAP_ID 0x0008
3198 #define PCI_EXPRESS_VC_AND_MFVC_CAP_ID 0x0009
3199 #define PCI_EXPRESS_RCRB_HEADER_CAP_ID 0x000A
3200 #define PCI_EXPRESS_SINGLE_ROOT_IO_VIRTUALIZATION_CAP_ID 0x0010
3201
3202 typedef struct _PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER {
3203 USHORT CapabilityID;
3204 USHORT Version:4;
3205 USHORT Next:12;
3206 } PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER, *PPCI_EXPRESS_ENHANCED_CAPABILITY_HEADER;
3207
3208 typedef struct _PCI_EXPRESS_SERIAL_NUMBER_CAPABILITY {
3209 PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER Header;
3210 ULONG LowSerialNumber;
3211 ULONG HighSerialNumber;
3212 } PCI_EXPRESS_SERIAL_NUMBER_CAPABILITY, *PPCI_EXPRESS_SERIAL_NUMBER_CAPABILITY;
3213
3214 typedef union _PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS {
3215 struct {
3216 ULONG Undefined:1;
3217 ULONG Reserved1:3;
3218 ULONG DataLinkProtocolError:1;
3219 ULONG SurpriseDownError:1;
3220 ULONG Reserved2:6;
3221 ULONG PoisonedTLP:1;
3222 ULONG FlowControlProtocolError:1;
3223 ULONG CompletionTimeout:1;
3224 ULONG CompleterAbort:1;
3225 ULONG UnexpectedCompletion:1;
3226 ULONG ReceiverOverflow:1;
3227 ULONG MalformedTLP:1;
3228 ULONG ECRCError:1;
3229 ULONG UnsupportedRequestError:1;
3230 ULONG Reserved3:11;
3231 } DUMMYSTRUCTNAME;
3232 ULONG AsULONG;
3233 } PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS, *PPCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS;
3234
3235 typedef union _PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK {
3236 struct {
3237 ULONG Undefined:1;
3238 ULONG Reserved1:3;
3239 ULONG DataLinkProtocolError:1;
3240 ULONG SurpriseDownError:1;
3241 ULONG Reserved2:6;
3242 ULONG PoisonedTLP:1;
3243 ULONG FlowControlProtocolError:1;
3244 ULONG CompletionTimeout:1;
3245 ULONG CompleterAbort:1;
3246 ULONG UnexpectedCompletion:1;
3247 ULONG ReceiverOverflow:1;
3248 ULONG MalformedTLP:1;
3249 ULONG ECRCError:1;
3250 ULONG UnsupportedRequestError:1;
3251 ULONG Reserved3:11;
3252 } DUMMYSTRUCTNAME;
3253 ULONG AsULONG;
3254 } PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK, *PPCI_EXPRESS_UNCORRECTABLE_ERROR_MASK;
3255
3256 typedef union _PCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY {
3257 struct {
3258 ULONG Undefined:1;
3259 ULONG Reserved1:3;
3260 ULONG DataLinkProtocolError:1;
3261 ULONG SurpriseDownError:1;
3262 ULONG Reserved2:6;
3263 ULONG PoisonedTLP:1;
3264 ULONG FlowControlProtocolError:1;
3265 ULONG CompletionTimeout:1;
3266 ULONG CompleterAbort:1;
3267 ULONG UnexpectedCompletion:1;
3268 ULONG ReceiverOverflow:1;
3269 ULONG MalformedTLP:1;
3270 ULONG ECRCError:1;
3271 ULONG UnsupportedRequestError:1;
3272 ULONG Reserved3:11;
3273 } DUMMYSTRUCTNAME;
3274 ULONG AsULONG;
3275 } PCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY, *PPCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY;
3276
3277 typedef union _PCI_EXPRESS_CORRECTABLE_ERROR_STATUS {
3278 struct {
3279 ULONG ReceiverError:1;
3280 ULONG Reserved1:5;
3281 ULONG BadTLP:1;
3282 ULONG BadDLLP:1;
3283 ULONG ReplayNumRollover:1;
3284 ULONG Reserved2:3;
3285 ULONG ReplayTimerTimeout:1;
3286 ULONG AdvisoryNonFatalError:1;
3287 ULONG Reserved3:18;
3288 } DUMMYSTRUCTNAME;
3289 ULONG AsULONG;
3290 } PCI_EXPRESS_CORRECTABLE_ERROR_STATUS, *PPCI_CORRECTABLE_ERROR_STATUS;
3291
3292 typedef union _PCI_EXPRESS_CORRECTABLE_ERROR_MASK {
3293 struct {
3294 ULONG ReceiverError:1;
3295 ULONG Reserved1:5;
3296 ULONG BadTLP:1;
3297 ULONG BadDLLP:1;
3298 ULONG ReplayNumRollover:1;
3299 ULONG Reserved2:3;
3300 ULONG ReplayTimerTimeout:1;
3301 ULONG AdvisoryNonFatalError:1;
3302 ULONG Reserved3:18;
3303 } DUMMYSTRUCTNAME;
3304 ULONG AsULONG;
3305 } PCI_EXPRESS_CORRECTABLE_ERROR_MASK, *PPCI_CORRECTABLE_ERROR_MASK;
3306
3307 typedef union _PCI_EXPRESS_AER_CAPABILITIES {
3308 struct {
3309 ULONG FirstErrorPointer:5;
3310 ULONG ECRCGenerationCapable:1;
3311 ULONG ECRCGenerationEnable:1;
3312 ULONG ECRCCheckCapable:1;
3313 ULONG ECRCCheckEnable:1;
3314 ULONG Reserved:23;
3315 } DUMMYSTRUCTNAME;
3316 ULONG AsULONG;
3317 } PCI_EXPRESS_AER_CAPABILITIES, *PPCI_EXPRESS_AER_CAPABILITIES;
3318
3319 typedef union _PCI_EXPRESS_ROOT_ERROR_COMMAND {
3320 struct {
3321 ULONG CorrectableErrorReportingEnable:1;
3322 ULONG NonFatalErrorReportingEnable:1;
3323 ULONG FatalErrorReportingEnable:1;
3324 ULONG Reserved:29;
3325 } DUMMYSTRUCTNAME;
3326 ULONG AsULONG;
3327 } PCI_EXPRESS_ROOT_ERROR_COMMAND, *PPCI_EXPRESS_ROOT_ERROR_COMMAND;
3328
3329 typedef union _PCI_EXPRESS_ROOT_ERROR_STATUS {
3330 struct {
3331 ULONG CorrectableErrorReceived:1;
3332 ULONG MultipleCorrectableErrorsReceived:1;
3333 ULONG UncorrectableErrorReceived:1;
3334 ULONG MultipleUncorrectableErrorsReceived:1;
3335 ULONG FirstUncorrectableFatal:1;
3336 ULONG NonFatalErrorMessagesReceived:1;
3337 ULONG FatalErrorMessagesReceived:1;
3338 ULONG Reserved:20;
3339 ULONG AdvancedErrorInterruptMessageNumber:5;
3340 } DUMMYSTRUCTNAME;
3341 ULONG AsULONG;
3342 } PCI_EXPRESS_ROOT_ERROR_STATUS, *PPCI_EXPRESS_ROOT_ERROR_STATUS;
3343
3344 typedef union _PCI_EXPRESS_ERROR_SOURCE_ID {
3345 struct {
3346 USHORT CorrectableSourceIdFun:3;
3347 USHORT CorrectableSourceIdDev:5;
3348 USHORT CorrectableSourceIdBus:8;
3349 USHORT UncorrectableSourceIdFun:3;
3350 USHORT UncorrectableSourceIdDev:5;
3351 USHORT UncorrectableSourceIdBus:8;
3352 } DUMMYSTRUCTNAME;
3353 ULONG AsULONG;
3354 } PCI_EXPRESS_ERROR_SOURCE_ID, *PPCI_EXPRESS_ERROR_SOURCE_ID;
3355
3356 typedef union _PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_STATUS {
3357 struct {
3358 ULONG TargetAbortOnSplitCompletion:1;
3359 ULONG MasterAbortOnSplitCompletion:1;
3360 ULONG ReceivedTargetAbort:1;
3361 ULONG ReceivedMasterAbort:1;
3362 ULONG RsvdZ:1;
3363 ULONG UnexpectedSplitCompletionError:1;
3364 ULONG UncorrectableSplitCompletion:1;
3365 ULONG UncorrectableDataError:1;
3366 ULONG UncorrectableAttributeError:1;
3367 ULONG UncorrectableAddressError:1;
3368 ULONG DelayedTransactionDiscardTimerExpired:1;
3369 ULONG PERRAsserted:1;
3370 ULONG SERRAsserted:1;
3371 ULONG InternalBridgeError:1;
3372 ULONG Reserved:18;
3373 } DUMMYSTRUCTNAME;
3374 ULONG AsULONG;
3375 } PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_STATUS, *PPCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_STATUS;
3376
3377 typedef union _PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_MASK {
3378 struct {
3379 ULONG TargetAbortOnSplitCompletion:1;
3380 ULONG MasterAbortOnSplitCompletion:1;
3381 ULONG ReceivedTargetAbort:1;
3382 ULONG ReceivedMasterAbort:1;
3383 ULONG RsvdZ:1;
3384 ULONG UnexpectedSplitCompletionError:1;
3385 ULONG UncorrectableSplitCompletion:1;
3386 ULONG UncorrectableDataError:1;
3387 ULONG UncorrectableAttributeError:1;
3388 ULONG UncorrectableAddressError:1;
3389 ULONG DelayedTransactionDiscardTimerExpired:1;
3390 ULONG PERRAsserted:1;
3391 ULONG SERRAsserted:1;
3392 ULONG InternalBridgeError:1;
3393 ULONG Reserved:18;
3394 } DUMMYSTRUCTNAME;
3395 ULONG AsULONG;
3396 } PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_MASK, *PPCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_MASK;
3397
3398 typedef union _PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_SEVERITY {
3399 struct {
3400 ULONG TargetAbortOnSplitCompletion:1;
3401 ULONG MasterAbortOnSplitCompletion:1;
3402 ULONG ReceivedTargetAbort:1;
3403 ULONG ReceivedMasterAbort:1;
3404 ULONG RsvdZ:1;
3405 ULONG UnexpectedSplitCompletionError:1;
3406 ULONG UncorrectableSplitCompletion:1;
3407 ULONG UncorrectableDataError:1;
3408 ULONG UncorrectableAttributeError:1;
3409 ULONG UncorrectableAddressError:1;
3410 ULONG DelayedTransactionDiscardTimerExpired:1;
3411 ULONG PERRAsserted:1;
3412 ULONG SERRAsserted:1;
3413 ULONG InternalBridgeError:1;
3414 ULONG Reserved:18;
3415 } DUMMYSTRUCTNAME;
3416 ULONG AsULONG;
3417 } PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_SEVERITY, *PPCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_SEVERITY;
3418
3419 typedef union _PCI_EXPRESS_SEC_AER_CAPABILITIES {
3420 struct {
3421 ULONG SecondaryUncorrectableFirstErrorPtr:5;
3422 ULONG Reserved:27;
3423 } DUMMYSTRUCTNAME;
3424 ULONG AsULONG;
3425 } PCI_EXPRESS_SEC_AER_CAPABILITIES, *PPCI_EXPRESS_SEC_AER_CAPABILITIES;
3426
3427 #define ROOT_CMD_ENABLE_CORRECTABLE_ERROR_REPORTING 0x00000001
3428 #define ROOT_CMD_ENABLE_NONFATAL_ERROR_REPORTING 0x00000002
3429 #define ROOT_CMD_ENABLE_FATAL_ERROR_REPORTING 0x00000004
3430
3431 #define ROOT_CMD_ERROR_REPORTING_ENABLE_MASK \
3432 (ROOT_CMD_ENABLE_FATAL_ERROR_REPORTING | \
3433 ROOT_CMD_ENABLE_NONFATAL_ERROR_REPORTING | \
3434 ROOT_CMD_ENABLE_CORRECTABLE_ERROR_REPORTING)
3435
3436 typedef struct _PCI_EXPRESS_AER_CAPABILITY {
3437 PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER Header;
3438 PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS UncorrectableErrorStatus;
3439 PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK UncorrectableErrorMask;
3440 PCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY UncorrectableErrorSeverity;
3441 PCI_EXPRESS_CORRECTABLE_ERROR_STATUS CorrectableErrorStatus;
3442 PCI_EXPRESS_CORRECTABLE_ERROR_MASK CorrectableErrorMask;
3443 PCI_EXPRESS_AER_CAPABILITIES CapabilitiesAndControl;
3444 ULONG HeaderLog[4];
3445 PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_STATUS SecUncorrectableErrorStatus;
3446 PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_MASK SecUncorrectableErrorMask;
3447 PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_SEVERITY SecUncorrectableErrorSeverity;
3448 PCI_EXPRESS_SEC_AER_CAPABILITIES SecCapabilitiesAndControl;
3449 ULONG SecHeaderLog[4];
3450 } PCI_EXPRESS_AER_CAPABILITY, *PPCI_EXPRESS_AER_CAPABILITY;
3451
3452 typedef struct _PCI_EXPRESS_ROOTPORT_AER_CAPABILITY {
3453 PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER Header;
3454 PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS UncorrectableErrorStatus;
3455 PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK UncorrectableErrorMask;
3456 PCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY UncorrectableErrorSeverity;
3457 PCI_EXPRESS_CORRECTABLE_ERROR_STATUS CorrectableErrorStatus;
3458 PCI_EXPRESS_CORRECTABLE_ERROR_MASK CorrectableErrorMask;
3459 PCI_EXPRESS_AER_CAPABILITIES CapabilitiesAndControl;
3460 ULONG HeaderLog[4];
3461 PCI_EXPRESS_ROOT_ERROR_COMMAND RootErrorCommand;
3462 PCI_EXPRESS_ROOT_ERROR_STATUS RootErrorStatus;
3463 PCI_EXPRESS_ERROR_SOURCE_ID ErrorSourceId;
3464 } PCI_EXPRESS_ROOTPORT_AER_CAPABILITY, *PPCI_EXPRESS_ROOTPORT_AER_CAPABILITY;
3465
3466 typedef struct _PCI_EXPRESS_BRIDGE_AER_CAPABILITY {
3467 PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER Header;
3468 PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS UncorrectableErrorStatus;
3469 PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK UncorrectableErrorMask;
3470 PCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY UncorrectableErrorSeverity;
3471 PCI_EXPRESS_CORRECTABLE_ERROR_STATUS CorrectableErrorStatus;
3472 PCI_EXPRESS_CORRECTABLE_ERROR_MASK CorrectableErrorMask;
3473 PCI_EXPRESS_AER_CAPABILITIES CapabilitiesAndControl;
3474 ULONG HeaderLog[4];
3475 PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_STATUS SecUncorrectableErrorStatus;
3476 PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_MASK SecUncorrectableErrorMask;
3477 PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_SEVERITY SecUncorrectableErrorSeverity;
3478 PCI_EXPRESS_SEC_AER_CAPABILITIES SecCapabilitiesAndControl;
3479 ULONG SecHeaderLog[4];
3480 } PCI_EXPRESS_BRIDGE_AER_CAPABILITY, *PPCI_EXPRESS_BRIDGE_AER_CAPABILITY;
3481
3482 typedef union _PCI_EXPRESS_SRIOV_CAPS {
3483 struct {
3484 ULONG VFMigrationCapable:1;
3485 ULONG Reserved1:20;
3486 ULONG VFMigrationInterruptNumber:11;
3487 } DUMMYSTRUCTNAME;
3488 ULONG AsULONG;
3489 } PCI_EXPRESS_SRIOV_CAPS, *PPCI_EXPRESS_SRIOV_CAPS;
3490
3491 typedef union _PCI_EXPRESS_SRIOV_CONTROL {
3492 struct {
3493 USHORT VFEnable:1;
3494 USHORT VFMigrationEnable:1;
3495 USHORT VFMigrationInterruptEnable:1;
3496 USHORT VFMemorySpaceEnable:1;
3497 USHORT ARICapableHierarchy:1;
3498 USHORT Reserved1:11;
3499 } DUMMYSTRUCTNAME;
3500 USHORT AsUSHORT;
3501 } PCI_EXPRESS_SRIOV_CONTROL, *PPCI_EXPRESS_SRIOV_CONTROL;
3502
3503 typedef union _PCI_EXPRESS_SRIOV_STATUS {
3504 struct {
3505 USHORT VFMigrationStatus:1;
3506 USHORT Reserved1:15;
3507 } DUMMYSTRUCTNAME;
3508 USHORT AsUSHORT;
3509 } PCI_EXPRESS_SRIOV_STATUS, *PPCI_EXPRESS_SRIOV_STATUS;
3510
3511 typedef union _PCI_EXPRESS_SRIOV_MIGRATION_STATE_ARRAY {
3512 struct {
3513 ULONG VFMigrationStateBIR:3;
3514 ULONG VFMigrationStateOffset:29;
3515 } DUMMYSTRUCTNAME;
3516 ULONG AsULONG;
3517 } PCI_EXPRESS_SRIOV_MIGRATION_STATE_ARRAY, *PPCI_EXPRESS_SRIOV_MIGRATION_STATE_ARRAY;
3518
3519 typedef struct _PCI_EXPRESS_SRIOV_CAPABILITY {
3520 PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER Header;
3521 PCI_EXPRESS_SRIOV_CAPS SRIOVCapabilities;
3522 PCI_EXPRESS_SRIOV_CONTROL SRIOVControl;
3523 PCI_EXPRESS_SRIOV_STATUS SRIOVStatus;
3524 USHORT InitialVFs;
3525 USHORT TotalVFs;
3526 USHORT NumVFs;
3527 UCHAR FunctionDependencyLink;
3528 UCHAR RsvdP1;
3529 USHORT FirstVFOffset;
3530 USHORT VFStride;
3531 USHORT RsvdP2;
3532 USHORT VFDeviceId;
3533 ULONG SupportedPageSizes;
3534 ULONG SystemPageSize;
3535 ULONG BaseAddresses[PCI_TYPE0_ADDRESSES];
3536 PCI_EXPRESS_SRIOV_MIGRATION_STATE_ARRAY VFMigrationStateArrayOffset;
3537 } PCI_EXPRESS_SRIOV_CAPABILITY, *PPCI_EXPRESS_SRIOV_CAPABILITY;
3538
3539 /* PCI device classes */
3540 #define PCI_CLASS_PRE_20 0x00
3541 #define PCI_CLASS_MASS_STORAGE_CTLR 0x01
3542 #define PCI_CLASS_NETWORK_CTLR 0x02
3543 #define PCI_CLASS_DISPLAY_CTLR 0x03
3544 #define PCI_CLASS_MULTIMEDIA_DEV 0x04
3545 #define PCI_CLASS_MEMORY_CTLR 0x05
3546 #define PCI_CLASS_BRIDGE_DEV 0x06
3547 #define PCI_CLASS_SIMPLE_COMMS_CTLR 0x07
3548 #define PCI_CLASS_BASE_SYSTEM_DEV 0x08
3549 #define PCI_CLASS_INPUT_DEV 0x09
3550 #define PCI_CLASS_DOCKING_STATION 0x0a
3551 #define PCI_CLASS_PROCESSOR 0x0b
3552 #define PCI_CLASS_SERIAL_BUS_CTLR 0x0c
3553 #define PCI_CLASS_WIRELESS_CTLR 0x0d
3554 #define PCI_CLASS_INTELLIGENT_IO_CTLR 0x0e
3555 #define PCI_CLASS_SATELLITE_COMMS_CTLR 0x0f
3556 #define PCI_CLASS_ENCRYPTION_DECRYPTION 0x10
3557 #define PCI_CLASS_DATA_ACQ_SIGNAL_PROC 0x11
3558 #define PCI_CLASS_NOT_DEFINED 0xff
3559
3560 /* PCI device subclasses for class 0 */
3561 #define PCI_SUBCLASS_PRE_20_NON_VGA 0x00
3562 #define PCI_SUBCLASS_PRE_20_VGA 0x01
3563
3564 /* PCI device subclasses for class 1 (mass storage controllers)*/
3565 #define PCI_SUBCLASS_MSC_SCSI_BUS_CTLR 0x00
3566 #define PCI_SUBCLASS_MSC_IDE_CTLR 0x01
3567 #define PCI_SUBCLASS_MSC_FLOPPY_CTLR 0x02
3568 #define PCI_SUBCLASS_MSC_IPI_CTLR 0x03
3569 #define PCI_SUBCLASS_MSC_RAID_CTLR 0x04
3570 #define PCI_SUBCLASS_MSC_OTHER 0x80
3571
3572 /* PCI device subclasses for class 2 (network controllers)*/
3573 #define PCI_SUBCLASS_NET_ETHERNET_CTLR 0x00
3574 #define PCI_SUBCLASS_NET_TOKEN_RING_CTLR 0x01
3575 #define PCI_SUBCLASS_NET_FDDI_CTLR 0x02
3576 #define PCI_SUBCLASS_NET_ATM_CTLR 0x03
3577 #define PCI_SUBCLASS_NET_ISDN_CTLR 0x04
3578 #define PCI_SUBCLASS_NET_OTHER 0x80
3579
3580 /* PCI device subclasses for class 3 (display controllers)*/
3581 #define PCI_SUBCLASS_VID_VGA_CTLR 0x00
3582 #define PCI_SUBCLASS_VID_XGA_CTLR 0x01
3583 #define PCI_SUBCLASS_VID_3D_CTLR 0x02
3584 #define PCI_SUBCLASS_VID_OTHER 0x80
3585
3586 /* PCI device subclasses for class 4 (multimedia device)*/
3587 #define PCI_SUBCLASS_MM_VIDEO_DEV 0x00
3588 #define PCI_SUBCLASS_MM_AUDIO_DEV 0x01
3589 #define PCI_SUBCLASS_MM_TELEPHONY_DEV 0x02
3590 #define PCI_SUBCLASS_MM_OTHER 0x80
3591
3592 /* PCI device subclasses for class 5 (memory controller)*/
3593 #define PCI_SUBCLASS_MEM_RAM 0x00
3594 #define PCI_SUBCLASS_MEM_FLASH 0x01
3595 #define PCI_SUBCLASS_MEM_OTHER 0x80
3596
3597 /* PCI device subclasses for class 6 (bridge device)*/
3598 #define PCI_SUBCLASS_BR_HOST 0x00
3599 #define PCI_SUBCLASS_BR_ISA 0x01
3600 #define PCI_SUBCLASS_BR_EISA 0x02
3601 #define PCI_SUBCLASS_BR_MCA 0x03
3602 #define PCI_SUBCLASS_BR_PCI_TO_PCI 0x04
3603 #define PCI_SUBCLASS_BR_PCMCIA 0x05
3604 #define PCI_SUBCLASS_BR_NUBUS 0x06
3605 #define PCI_SUBCLASS_BR_CARDBUS 0x07
3606 #define PCI_SUBCLASS_BR_RACEWAY 0x08
3607 #define PCI_SUBCLASS_BR_OTHER 0x80
3608
3609 #define PCI_SUBCLASS_COM_SERIAL 0x00
3610 #define PCI_SUBCLASS_COM_PARALLEL 0x01
3611 #define PCI_SUBCLASS_COM_MULTIPORT 0x02
3612 #define PCI_SUBCLASS_COM_MODEM 0x03
3613 #define PCI_SUBCLASS_COM_OTHER 0x80
3614
3615 #define PCI_SUBCLASS_SYS_INTERRUPT_CTLR 0x00
3616 #define PCI_SUBCLASS_SYS_DMA_CTLR 0x01
3617 #define PCI_SUBCLASS_SYS_SYSTEM_TIMER 0x02
3618 #define PCI_SUBCLASS_SYS_REAL_TIME_CLOCK 0x03
3619 #define PCI_SUBCLASS_SYS_GEN_HOTPLUG_CTLR 0x04
3620 #define PCI_SUBCLASS_SYS_SDIO_CTRL 0x05
3621 #define PCI_SUBCLASS_SYS_OTHER 0x80
3622
3623 #define PCI_SUBCLASS_INP_KEYBOARD 0x00
3624 #define PCI_SUBCLASS_INP_DIGITIZER 0x01
3625 #define PCI_SUBCLASS_INP_MOUSE 0x02
3626 #define PCI_SUBCLASS_INP_SCANNER 0x03
3627 #define PCI_SUBCLASS_INP_GAMEPORT 0x04
3628 #define PCI_SUBCLASS_INP_OTHER 0x80
3629
3630 #define PCI_SUBCLASS_DOC_GENERIC 0x00
3631 #define PCI_SUBCLASS_DOC_OTHER 0x80
3632
3633 #define PCI_SUBCLASS_PROC_386 0x00
3634 #define PCI_SUBCLASS_PROC_486 0x01
3635 #define PCI_SUBCLASS_PROC_PENTIUM 0x02
3636 #define PCI_SUBCLASS_PROC_ALPHA 0x10
3637 #define PCI_SUBCLASS_PROC_POWERPC 0x20
3638 #define PCI_SUBCLASS_PROC_COPROCESSOR 0x40
3639
3640 /* PCI device subclasses for class C (serial bus controller)*/
3641 #define PCI_SUBCLASS_SB_IEEE1394 0x00
3642 #define PCI_SUBCLASS_SB_ACCESS 0x01
3643 #define PCI_SUBCLASS_SB_SSA 0x02
3644 #define PCI_SUBCLASS_SB_USB 0x03
3645 #define PCI_SUBCLASS_SB_FIBRE_CHANNEL 0x04
3646 #define PCI_SUBCLASS_SB_SMBUS 0x05
3647
3648 #define PCI_SUBCLASS_WIRELESS_IRDA 0x00
3649 #define PCI_SUBCLASS_WIRELESS_CON_IR 0x01
3650 #define PCI_SUBCLASS_WIRELESS_RF 0x10
3651 #define PCI_SUBCLASS_WIRELESS_OTHER 0x80
3652
3653 #define PCI_SUBCLASS_INTIO_I2O 0x00
3654
3655 #define PCI_SUBCLASS_SAT_TV 0x01
3656 #define PCI_SUBCLASS_SAT_AUDIO 0x02
3657 #define PCI_SUBCLASS_SAT_VOICE 0x03
3658 #define PCI_SUBCLASS_SAT_DATA 0x04
3659
3660 #define PCI_SUBCLASS_CRYPTO_NET_COMP 0x00
3661 #define PCI_SUBCLASS_CRYPTO_ENTERTAINMENT 0x10
3662 #define PCI_SUBCLASS_CRYPTO_OTHER 0x80
3663
3664 #define PCI_SUBCLASS_DASP_DPIO 0x00
3665 #define PCI_SUBCLASS_DASP_OTHER 0x80
3666
3667 #define PCI_ADDRESS_IO_SPACE 0x00000001
3668 #define PCI_ADDRESS_MEMORY_TYPE_MASK 0x00000006
3669 #define PCI_ADDRESS_MEMORY_PREFETCHABLE 0x00000008
3670 #define PCI_ADDRESS_IO_ADDRESS_MASK 0xfffffffc
3671 #define PCI_ADDRESS_MEMORY_ADDRESS_MASK 0xfffffff0
3672 #define PCI_ADDRESS_ROM_ADDRESS_MASK 0xfffff800
3673
3674 #define PCI_TYPE_32BIT 0
3675 #define PCI_TYPE_20BIT 2
3676 #define PCI_TYPE_64BIT 4
3677
3678 #define PCI_ROMADDRESS_ENABLED 0x00000001
3679
3680 #endif /* _PCI_X_ */
3681
3682 #define PCI_EXPRESS_LINK_QUIESCENT_INTERFACE_VERSION 1
3683
3684 typedef NTSTATUS
3685 (NTAPI PCI_EXPRESS_ENTER_LINK_QUIESCENT_MODE)(
3686 IN OUT PVOID Context);
3687 typedef PCI_EXPRESS_ENTER_LINK_QUIESCENT_MODE *PPCI_EXPRESS_ENTER_LINK_QUIESCENT_MODE;
3688
3689 typedef NTSTATUS
3690 (NTAPI PCI_EXPRESS_EXIT_LINK_QUIESCENT_MODE)(
3691 IN OUT PVOID Context);
3692 typedef PCI_EXPRESS_EXIT_LINK_QUIESCENT_MODE *PPCI_EXPRESS_EXIT_LINK_QUIESCENT_MODE;
3693
3694 typedef struct _PCI_EXPRESS_LINK_QUIESCENT_INTERFACE {
3695 USHORT Size;
3696 USHORT Version;
3697 PVOID Context;
3698 PINTERFACE_REFERENCE InterfaceReference;
3699 PINTERFACE_DEREFERENCE InterfaceDereference;
3700 PPCI_EXPRESS_ENTER_LINK_QUIESCENT_MODE PciExpressEnterLinkQuiescentMode;
3701 PPCI_EXPRESS_EXIT_LINK_QUIESCENT_MODE PciExpressExitLinkQuiescentMode;
3702 } PCI_EXPRESS_LINK_QUIESCENT_INTERFACE, *PPCI_EXPRESS_LINK_QUIESCENT_INTERFACE;
3703
3704 #define PCI_EXPRESS_ROOT_PORT_INTERFACE_VERSION 1
3705
3706 typedef ULONG
3707 (NTAPI *PPCI_EXPRESS_ROOT_PORT_READ_CONFIG_SPACE)(
3708 IN PVOID Context,
3709 OUT PVOID Buffer,
3710 IN ULONG Offset,
3711 IN ULONG Length);
3712
3713 typedef ULONG
3714 (NTAPI *PPCI_EXPRESS_ROOT_PORT_WRITE_CONFIG_SPACE)(
3715 IN PVOID Context,
3716 IN PVOID Buffer,
3717 IN ULONG Offset,
3718 IN ULONG Length);
3719
3720 typedef struct _PCI_EXPRESS_ROOT_PORT_INTERFACE {
3721 USHORT Size;
3722 USHORT Version;
3723 PVOID Context;
3724 PINTERFACE_REFERENCE InterfaceReference;
3725 PINTERFACE_DEREFERENCE InterfaceDereference;
3726 PPCI_EXPRESS_ROOT_PORT_READ_CONFIG_SPACE ReadConfigSpace;
3727 PPCI_EXPRESS_ROOT_PORT_WRITE_CONFIG_SPACE WriteConfigSpace;
3728 } PCI_EXPRESS_ROOT_PORT_INTERFACE, *PPCI_EXPRESS_ROOT_PORT_INTERFACE;
3729
3730 #define PCI_MSIX_TABLE_CONFIG_INTERFACE_VERSION 1
3731
3732 typedef NTSTATUS
3733 (NTAPI PCI_MSIX_SET_ENTRY)(
3734 IN PVOID Context,
3735 IN ULONG TableEntry,
3736 IN ULONG MessageNumber);
3737 typedef PCI_MSIX_SET_ENTRY *PPCI_MSIX_SET_ENTRY;
3738
3739 typedef NTSTATUS
3740 (NTAPI PCI_MSIX_MASKUNMASK_ENTRY)(
3741 IN PVOID Context,
3742 IN ULONG TableEntry);
3743 typedef PCI_MSIX_MASKUNMASK_ENTRY *PPCI_MSIX_MASKUNMASK_ENTRY;
3744
3745 typedef NTSTATUS
3746 (NTAPI PCI_MSIX_GET_ENTRY)(
3747 IN PVOID Context,
3748 IN ULONG TableEntry,
3749 OUT PULONG MessageNumber,
3750 OUT PBOOLEAN Masked);
3751 typedef PCI_MSIX_GET_ENTRY *PPCI_MSIX_GET_ENTRY;
3752
3753 typedef NTSTATUS
3754 (NTAPI PCI_MSIX_GET_TABLE_SIZE)(
3755 IN PVOID Context,
3756 OUT PULONG TableSize);
3757 typedef PCI_MSIX_GET_TABLE_SIZE *PPCI_MSIX_GET_TABLE_SIZE;
3758
3759 typedef struct _PCI_MSIX_TABLE_CONFIG_INTERFACE {
3760 USHORT Size;
3761 USHORT Version;
3762 PVOID Context;
3763 PINTERFACE_REFERENCE InterfaceReference;
3764 PINTERFACE_DEREFERENCE InterfaceDereference;
3765 PPCI_MSIX_SET_ENTRY SetTableEntry;
3766 PPCI_MSIX_MASKUNMASK_ENTRY MaskTableEntry;
3767 PPCI_MSIX_MASKUNMASK_ENTRY UnmaskTableEntry;
3768 PPCI_MSIX_GET_ENTRY GetTableEntry;
3769 PPCI_MSIX_GET_TABLE_SIZE GetTableSize;
3770 } PCI_MSIX_TABLE_CONFIG_INTERFACE, *PPCI_MSIX_TABLE_CONFIG_INTERFACE;
3771
3772 #define PCI_MSIX_TABLE_CONFIG_MINIMUM_SIZE \
3773 RTL_SIZEOF_THROUGH_FIELD(PCI_MSIX_TABLE_CONFIG_INTERFACE, UnmaskTableEntry)
3774 $endif
3775 $if (_NTDDK_)
3776 #ifndef _ARC_DDK_
3777 #define _ARC_DDK_
3778 typedef enum _CONFIGURATION_TYPE {
3779 ArcSystem,
3780 CentralProcessor,
3781 FloatingPointProcessor,
3782 PrimaryIcache,
3783 PrimaryDcache,
3784 SecondaryIcache,
3785 SecondaryDcache,
3786 SecondaryCache,
3787 EisaAdapter,
3788 TcAdapter,
3789 ScsiAdapter,
3790 DtiAdapter,
3791 MultiFunctionAdapter,
3792 DiskController,
3793 TapeController,
3794 CdromController,
3795 WormController,
3796 SerialController,
3797 NetworkController,
3798 DisplayController,
3799 ParallelController,
3800 PointerController,
3801 KeyboardController,
3802 AudioController,
3803 OtherController,
3804 DiskPeripheral,
3805 FloppyDiskPeripheral,
3806 TapePeripheral,
3807 ModemPeripheral,
3808 MonitorPeripheral,
3809 PrinterPeripheral,
3810 PointerPeripheral,
3811 KeyboardPeripheral,
3812 TerminalPeripheral,
3813 OtherPeripheral,
3814 LinePeripheral,
3815 NetworkPeripheral,
3816 SystemMemory,
3817 DockingInformation,
3818 RealModeIrqRoutingTable,
3819 RealModePCIEnumeration,
3820 MaximumType
3821 } CONFIGURATION_TYPE, *PCONFIGURATION_TYPE;
3822 #endif /* !_ARC_DDK_ */
3823
3824 /*
3825 ** IRP function codes
3826 */
3827
3828 #define IRP_MN_QUERY_DIRECTORY 0x01
3829 #define IRP_MN_NOTIFY_CHANGE_DIRECTORY 0x02
3830
3831 #define IRP_MN_USER_FS_REQUEST 0x00
3832 #define IRP_MN_MOUNT_VOLUME 0x01
3833 #define IRP_MN_VERIFY_VOLUME 0x02
3834 #define IRP_MN_LOAD_FILE_SYSTEM 0x03
3835 #define IRP_MN_TRACK_LINK 0x04
3836 #define IRP_MN_KERNEL_CALL 0x04
3837
3838 #define IRP_MN_LOCK 0x01
3839 #define IRP_MN_UNLOCK_SINGLE 0x02
3840 #define IRP_MN_UNLOCK_ALL 0x03
3841 #define IRP_MN_UNLOCK_ALL_BY_KEY 0x04
3842
3843 #define IRP_MN_FLUSH_AND_PURGE 0x01
3844
3845 #define IRP_MN_NORMAL 0x00
3846 #define IRP_MN_DPC 0x01
3847 #define IRP_MN_MDL 0x02
3848 #define IRP_MN_COMPLETE 0x04
3849 #define IRP_MN_COMPRESSED 0x08
3850
3851 #define IRP_MN_MDL_DPC (IRP_MN_MDL | IRP_MN_DPC)
3852 #define IRP_MN_COMPLETE_MDL (IRP_MN_COMPLETE | IRP_MN_MDL)
3853 #define IRP_MN_COMPLETE_MDL_DPC (IRP_MN_COMPLETE_MDL | IRP_MN_DPC)
3854
3855 #define IRP_MN_QUERY_LEGACY_BUS_INFORMATION 0x18
3856
3857 #define IO_CHECK_CREATE_PARAMETERS 0x0200
3858 #define IO_ATTACH_DEVICE 0x0400
3859 #define IO_IGNORE_SHARE_ACCESS_CHECK 0x0800
3860
3861 typedef
3862 NTSTATUS
3863 (NTAPI *PIO_QUERY_DEVICE_ROUTINE)(
3864 IN PVOID Context,
3865 IN PUNICODE_STRING PathName,
3866 IN INTERFACE_TYPE BusType,
3867 IN ULONG BusNumber,
3868 IN PKEY_VALUE_FULL_INFORMATION *BusInformation,
3869 IN CONFIGURATION_TYPE ControllerType,
3870 IN ULONG ControllerNumber,
3871 IN PKEY_VALUE_FULL_INFORMATION *ControllerInformation,
3872 IN CONFIGURATION_TYPE PeripheralType,
3873 IN ULONG PeripheralNumber,
3874 IN PKEY_VALUE_FULL_INFORMATION *PeripheralInformation);
3875
3876 typedef enum _IO_QUERY_DEVICE_DATA_FORMAT {
3877 IoQueryDeviceIdentifier = 0,
3878 IoQueryDeviceConfigurationData,
3879 IoQueryDeviceComponentInformation,
3880 IoQueryDeviceMaxData
3881 } IO_QUERY_DEVICE_DATA_FORMAT, *PIO_QUERY_DEVICE_DATA_FORMAT;
3882
3883 typedef VOID
3884 (NTAPI *PDRIVER_REINITIALIZE)(
3885 IN struct _DRIVER_OBJECT *DriverObject,
3886 IN PVOID Context OPTIONAL,
3887 IN ULONG Count);
3888
3889 typedef struct _CONTROLLER_OBJECT {
3890 CSHORT Type;
3891 CSHORT Size;
3892 PVOID ControllerExtension;
3893 KDEVICE_QUEUE DeviceWaitQueue;
3894 ULONG Spare1;
3895 LARGE_INTEGER Spare2;
3896 } CONTROLLER_OBJECT, *PCONTROLLER_OBJECT;
3897
3898 #define DRVO_REINIT_REGISTERED 0x00000008
3899 #define DRVO_INITIALIZED 0x00000010
3900 #define DRVO_BOOTREINIT_REGISTERED 0x00000020
3901 #define DRVO_LEGACY_RESOURCES 0x00000040
3902
3903 typedef struct _CONFIGURATION_INFORMATION {
3904 ULONG DiskCount;
3905 ULONG FloppyCount;
3906 ULONG CdRomCount;
3907 ULONG TapeCount;
3908 ULONG ScsiPortCount;
3909 ULONG SerialCount;
3910 ULONG ParallelCount;
3911 BOOLEAN AtDiskPrimaryAddressClaimed;
3912 BOOLEAN AtDiskSecondaryAddressClaimed;
3913 ULONG Version;
3914 ULONG MediumChangerCount;
3915 } CONFIGURATION_INFORMATION, *PCONFIGURATION_INFORMATION;
3916
3917 typedef struct _DISK_SIGNATURE {
3918 ULONG PartitionStyle;
3919 _ANONYMOUS_UNION union {
3920 struct {
3921 ULONG Signature;
3922 ULONG CheckSum;
3923 } Mbr;
3924 struct {
3925 GUID DiskId;
3926 } Gpt;
3927 } DUMMYUNIONNAME;
3928 } DISK_SIGNATURE, *PDISK_SIGNATURE;
3929
3930 typedef struct _TXN_PARAMETER_BLOCK {
3931 USHORT Length;
3932 USHORT TxFsContext;
3933 PVOID TransactionObject;
3934 } TXN_PARAMETER_BLOCK, *PTXN_PARAMETER_BLOCK;
3935
3936 #define TXF_MINIVERSION_DEFAULT_VIEW (0xFFFE)
3937
3938 typedef struct _IO_DRIVER_CREATE_CONTEXT {
3939 CSHORT Size;
3940 struct _ECP_LIST *ExtraCreateParameter;
3941 PVOID DeviceObjectHint;
3942 PTXN_PARAMETER_BLOCK TxnParameters;
3943 } IO_DRIVER_CREATE_CONTEXT, *PIO_DRIVER_CREATE_CONTEXT;
3944
3945 typedef struct _AGP_TARGET_BUS_INTERFACE_STANDARD {
3946 USHORT Size;
3947 USHORT Version;
3948 PVOID Context;
3949 PINTERFACE_REFERENCE InterfaceReference;
3950 PINTERFACE_DEREFERENCE InterfaceDereference;
3951 PGET_SET_DEVICE_DATA SetBusData;
3952 PGET_SET_DEVICE_DATA GetBusData;
3953 UCHAR CapabilityID;
3954 } AGP_TARGET_BUS_INTERFACE_STANDARD, *PAGP_TARGET_BUS_INTERFACE_STANDARD;
3955
3956 typedef NTSTATUS
3957 (NTAPI *PGET_LOCATION_STRING)(
3958 IN OUT PVOID Context OPTIONAL,
3959 OUT PWCHAR *LocationStrings);
3960
3961 typedef struct _PNP_LOCATION_INTERFACE {
3962 USHORT Size;
3963 USHORT Version;
3964 PVOID Context;
3965 PINTERFACE_REFERENCE InterfaceReference;
3966 PINTERFACE_DEREFERENCE InterfaceDereference;
3967 PGET_LOCATION_STRING GetLocationString;
3968 } PNP_LOCATION_INTERFACE, *PPNP_LOCATION_INTERFACE;
3969
3970 typedef enum _ARBITER_ACTION {
3971 ArbiterActionTestAllocation,
3972 ArbiterActionRetestAllocation,
3973 ArbiterActionCommitAllocation,
3974 ArbiterActionRollbackAllocation,
3975 ArbiterActionQueryAllocatedResources,
3976 ArbiterActionWriteReservedResources,
3977 ArbiterActionQueryConflict,
3978 ArbiterActionQueryArbitrate,
3979 ArbiterActionAddReserved,
3980 ArbiterActionBootAllocation
3981 } ARBITER_ACTION, *PARBITER_ACTION;
3982
3983 typedef struct _ARBITER_CONFLICT_INFO {
3984 PDEVICE_OBJECT OwningObject;
3985 ULONGLONG Start;
3986 ULONGLONG End;
3987 } ARBITER_CONFLICT_INFO, *PARBITER_CONFLICT_INFO;
3988
3989 typedef struct _ARBITER_TEST_ALLOCATION_PARAMETERS {
3990 IN OUT PLIST_ENTRY ArbitrationList;
3991 IN ULONG AllocateFromCount;
3992 IN PCM_PARTIAL_RESOURCE_DESCRIPTOR AllocateFrom;
3993 } ARBITER_TEST_ALLOCATION_PARAMETERS, *PARBITER_TEST_ALLOCATION_PARAMETERS;
3994
3995 typedef struct _ARBITER_RETEST_ALLOCATION_PARAMETERS {
3996 IN OUT PLIST_ENTRY ArbitrationList;
3997 IN ULONG AllocateFromCount;
3998 IN PCM_PARTIAL_RESOURCE_DESCRIPTOR AllocateFrom;
3999 } ARBITER_RETEST_ALLOCATION_PARAMETERS, *PARBITER_RETEST_ALLOCATION_PARAMETERS;
4000
4001 typedef struct _ARBITER_BOOT_ALLOCATION_PARAMETERS {
4002 IN OUT PLIST_ENTRY ArbitrationList;
4003 } ARBITER_BOOT_ALLOCATION_PARAMETERS, *PARBITER_BOOT_ALLOCATION_PARAMETERS;
4004
4005 typedef struct _ARBITER_QUERY_ALLOCATED_RESOURCES_PARAMETERS {
4006 OUT PCM_PARTIAL_RESOURCE_LIST *AllocatedResources;
4007 } ARBITER_QUERY_ALLOCATED_RESOURCES_PARAMETERS, *PARBITER_QUERY_ALLOCATED_RESOURCES_PARAMETERS;
4008
4009 typedef struct _ARBITER_QUERY_CONFLICT_PARAMETERS {
4010 IN PDEVICE_OBJECT PhysicalDeviceObject;
4011 IN PIO_RESOURCE_DESCRIPTOR ConflictingResource;
4012 OUT PULONG ConflictCount;
4013 OUT PARBITER_CONFLICT_INFO *Conflicts;
4014 } ARBITER_QUERY_CONFLICT_PARAMETERS, *PARBITER_QUERY_CONFLICT_PARAMETERS;
4015
4016 typedef struct _ARBITER_QUERY_ARBITRATE_PARAMETERS {
4017 IN PLIST_ENTRY ArbitrationList;
4018 } ARBITER_QUERY_ARBITRATE_PARAMETERS, *PARBITER_QUERY_ARBITRATE_PARAMETERS;
4019
4020 typedef struct _ARBITER_ADD_RESERVED_PARAMETERS {
4021 IN PDEVICE_OBJECT ReserveDevice;
4022 } ARBITER_ADD_RESERVED_PARAMETERS, *PARBITER_ADD_RESERVED_PARAMETERS;
4023
4024 typedef struct _ARBITER_PARAMETERS {
4025 union {
4026 ARBITER_TEST_ALLOCATION_PARAMETERS TestAllocation;
4027 ARBITER_RETEST_ALLOCATION_PARAMETERS RetestAllocation;
4028 ARBITER_BOOT_ALLOCATION_PARAMETERS BootAllocation;
4029 ARBITER_QUERY_ALLOCATED_RESOURCES_PARAMETERS QueryAllocatedResources;
4030 ARBITER_QUERY_CONFLICT_PARAMETERS QueryConflict;
4031 ARBITER_QUERY_ARBITRATE_PARAMETERS QueryArbitrate;
4032 ARBITER_ADD_RESERVED_PARAMETERS AddReserved;
4033 } Parameters;
4034 } ARBITER_PARAMETERS, *PARBITER_PARAMETERS;
4035
4036 typedef enum _ARBITER_REQUEST_SOURCE {
4037 ArbiterRequestUndefined = -1,
4038 ArbiterRequestLegacyReported,
4039 ArbiterRequestHalReported,
4040 ArbiterRequestLegacyAssigned,
4041 ArbiterRequestPnpDetected,
4042 ArbiterRequestPnpEnumerated
4043 } ARBITER_REQUEST_SOURCE;
4044
4045 typedef enum _ARBITER_RESULT {
4046 ArbiterResultUndefined = -1,
4047 ArbiterResultSuccess,
4048 ArbiterResultExternalConflict,
4049 ArbiterResultNullRequest
4050 } ARBITER_RESULT;
4051
4052 #define ARBITER_FLAG_BOOT_CONFIG 0x00000001
4053
4054 typedef struct _ARBITER_LIST_ENTRY {
4055 LIST_ENTRY ListEntry;
4056 ULONG AlternativeCount;
4057 PIO_RESOURCE_DESCRIPTOR Alternatives;
4058 PDEVICE_OBJECT PhysicalDeviceObject;
4059 ARBITER_REQUEST_SOURCE RequestSource;
4060 ULONG Flags;
4061 LONG_PTR WorkSpace;
4062 INTERFACE_TYPE InterfaceType;
4063 ULONG SlotNumber;
4064 ULONG BusNumber;
4065 PCM_PARTIAL_RESOURCE_DESCRIPTOR Assignment;
4066 PIO_RESOURCE_DESCRIPTOR SelectedAlternative;
4067 ARBITER_RESULT Result;
4068 } ARBITER_LIST_ENTRY, *PARBITER_LIST_ENTRY;
4069
4070 typedef NTSTATUS
4071 (NTAPI *PARBITER_HANDLER)(
4072 IN OUT PVOID Context,
4073 IN ARBITER_ACTION Action,
4074 IN OUT PARBITER_PARAMETERS Parameters);
4075
4076 #define ARBITER_PARTIAL 0x00000001
4077
4078 typedef struct _ARBITER_INTERFACE {
4079 USHORT Size;
4080 USHORT Version;
4081 PVOID Context;
4082 PINTERFACE_REFERENCE InterfaceReference;
4083 PINTERFACE_DEREFERENCE InterfaceDereference;
4084 PARBITER_HANDLER ArbiterHandler;
4085 ULONG Flags;
4086 } ARBITER_INTERFACE, *PARBITER_INTERFACE;
4087
4088 typedef enum _RESOURCE_TRANSLATION_DIRECTION {
4089 TranslateChildToParent,
4090 TranslateParentToChild
4091 } RESOURCE_TRANSLATION_DIRECTION;
4092
4093 typedef NTSTATUS
4094 (NTAPI *PTRANSLATE_RESOURCE_HANDLER)(
4095 IN OUT PVOID Context OPTIONAL,
4096 IN PCM_PARTIAL_RESOURCE_DESCRIPTOR Source,
4097 IN RESOURCE_TRANSLATION_DIRECTION Direction,
4098 IN ULONG AlternativesCount OPTIONAL,
4099 IN IO_RESOURCE_DESCRIPTOR Alternatives[],
4100 IN PDEVICE_OBJECT PhysicalDeviceObject,
4101 OUT PCM_PARTIAL_RESOURCE_DESCRIPTOR Target);
4102
4103 typedef NTSTATUS
4104 (NTAPI *PTRANSLATE_RESOURCE_REQUIREMENTS_HANDLER)(
4105 IN OUT PVOID Context OPTIONAL,
4106 IN PIO_RESOURCE_DESCRIPTOR Source,
4107 IN PDEVICE_OBJECT PhysicalDeviceObject,
4108 OUT PULONG TargetCount,
4109 OUT PIO_RESOURCE_DESCRIPTOR *Target);
4110
4111 typedef struct _TRANSLATOR_INTERFACE {
4112 USHORT Size;
4113 USHORT Version;
4114 PVOID Context;
4115 PINTERFACE_REFERENCE InterfaceReference;
4116 PINTERFACE_DEREFERENCE InterfaceDereference;
4117 PTRANSLATE_RESOURCE_HANDLER TranslateResources;
4118 PTRANSLATE_RESOURCE_REQUIREMENTS_HANDLER TranslateResourceRequirements;
4119 } TRANSLATOR_INTERFACE, *PTRANSLATOR_INTERFACE;
4120
4121 typedef struct _PCI_AGP_CAPABILITY {
4122 PCI_CAPABILITIES_HEADER Header;
4123 USHORT Minor:4;
4124 USHORT Major:4;
4125 USHORT Rsvd1:8;
4126 struct _PCI_AGP_STATUS {
4127 ULONG Rate:3;
4128 ULONG Agp3Mode:1;
4129 ULONG FastWrite:1;
4130 ULONG FourGB:1;
4131 ULONG HostTransDisable:1;
4132 ULONG Gart64:1;
4133 ULONG ITA_Coherent:1;
4134 ULONG SideBandAddressing:1;
4135 ULONG CalibrationCycle:3;
4136 ULONG AsyncRequestSize:3;
4137 ULONG Rsvd1:1;
4138 ULONG Isoch:1;
4139 ULONG Rsvd2:6;
4140 ULONG RequestQueueDepthMaximum:8;
4141 } AGPStatus;
4142 struct _PCI_AGP_COMMAND {
4143 ULONG Rate:3;
4144 ULONG Rsvd1:1;
4145 ULONG FastWriteEnable:1;
4146 ULONG FourGBEnable:1;
4147 ULONG Rsvd2:1;
4148 ULONG Gart64:1;
4149 ULONG AGPEnable:1;
4150 ULONG SBAEnable:1;
4151 ULONG CalibrationCycle:3;
4152 ULONG AsyncReqSize:3;
4153 ULONG Rsvd3:8;
4154 ULONG RequestQueueDepth:8;
4155 } AGPCommand;
4156 } PCI_AGP_CAPABILITY, *PPCI_AGP_CAPABILITY;
4157
4158 typedef enum _EXTENDED_AGP_REGISTER {
4159 IsochStatus,
4160 AgpControl,
4161 ApertureSize,
4162 AperturePageSize,
4163 GartLow,
4164 GartHigh,
4165 IsochCommand
4166 } EXTENDED_AGP_REGISTER, *PEXTENDED_AGP_REGISTER;
4167
4168 typedef struct _PCI_AGP_ISOCH_STATUS {
4169 ULONG ErrorCode:2;
4170 ULONG Rsvd1:1;
4171 ULONG Isoch_L:3;
4172 ULONG Isoch_Y:2;
4173 ULONG Isoch_N:8;
4174 ULONG Rsvd2:16;
4175 } PCI_AGP_ISOCH_STATUS, *PPCI_AGP_ISOCH_STATUS;
4176
4177 typedef struct _PCI_AGP_CONTROL {
4178 ULONG Rsvd1:7;
4179 ULONG GTLB_Enable:1;
4180 ULONG AP_Enable:1;
4181 ULONG CAL_Disable:1;
4182 ULONG Rsvd2:22;
4183 } PCI_AGP_CONTROL, *PPCI_AGP_CONTROL;
4184
4185 typedef struct _PCI_AGP_APERTURE_PAGE_SIZE {
4186 USHORT PageSizeMask:11;
4187 USHORT Rsvd1:1;
4188 USHORT PageSizeSelect:4;
4189 } PCI_AGP_APERTURE_PAGE_SIZE, *PPCI_AGP_APERTURE_PAGE_SIZE;
4190
4191 typedef struct _PCI_AGP_ISOCH_COMMAND {
4192 USHORT Rsvd1:6;
4193 USHORT Isoch_Y:2;
4194 USHORT Isoch_N:8;
4195 } PCI_AGP_ISOCH_COMMAND, *PPCI_AGP_ISOCH_COMMAND;
4196
4197 typedef struct PCI_AGP_EXTENDED_CAPABILITY {
4198 PCI_AGP_ISOCH_STATUS IsochStatus;
4199 PCI_AGP_CONTROL AgpControl;
4200 USHORT ApertureSize;
4201 PCI_AGP_APERTURE_PAGE_SIZE AperturePageSize;
4202 ULONG GartLow;
4203 ULONG GartHigh;
4204 PCI_AGP_ISOCH_COMMAND IsochCommand;
4205 } PCI_AGP_EXTENDED_CAPABILITY, *PPCI_AGP_EXTENDED_CAPABILITY;
4206
4207 #define PCI_AGP_RATE_1X 0x1
4208 #define PCI_AGP_RATE_2X 0x2
4209 #define PCI_AGP_RATE_4X 0x4
4210
4211 #define PCIX_MODE_CONVENTIONAL_PCI 0x0
4212 #define PCIX_MODE1_66MHZ 0x1
4213 #define PCIX_MODE1_100MHZ 0x2
4214 #define PCIX_MODE1_133MHZ 0x3
4215 #define PCIX_MODE2_266_66MHZ 0x9
4216 #define PCIX_MODE2_266_100MHZ 0xA
4217 #define PCIX_MODE2_266_133MHZ 0xB
4218 #define PCIX_MODE2_533_66MHZ 0xD
4219 #define PCIX_MODE2_533_100MHZ 0xE
4220 #define PCIX_MODE2_533_133MHZ 0xF
4221
4222 #define PCIX_VERSION_MODE1_ONLY 0x0
4223 #define PCIX_VERSION_MODE2_ECC 0x1
4224 #define PCIX_VERSION_DUAL_MODE_ECC 0x2
4225
4226 typedef struct _PCIX_BRIDGE_CAPABILITY {
4227 PCI_CAPABILITIES_HEADER Header;
4228 union {
4229 struct {
4230 USHORT Bus64Bit:1;
4231 USHORT Bus133MHzCapable:1;
4232 USHORT SplitCompletionDiscarded:1;
4233 USHORT UnexpectedSplitCompletion:1;
4234 USHORT SplitCompletionOverrun:1;
4235 USHORT SplitRequestDelayed:1;
4236 USHORT BusModeFrequency:4;
4237 USHORT Rsvd:2;
4238 USHORT Version:2;
4239 USHORT Bus266MHzCapable:1;
4240 USHORT Bus533MHzCapable:1;
4241 } DUMMYSTRUCTNAME;
4242 USHORT AsUSHORT;
4243 } SecondaryStatus;
4244 union {
4245 struct {
4246 ULONG FunctionNumber:3;
4247 ULONG DeviceNumber:5;
4248 ULONG BusNumber:8;
4249 ULONG Device64Bit:1;
4250 ULONG Device133MHzCapable:1;
4251 ULONG SplitCompletionDiscarded:1;
4252 ULONG UnexpectedSplitCompletion:1;
4253 ULONG SplitCompletionOverrun:1;
4254 ULONG SplitRequestDelayed:1;
4255 ULONG Rsvd:7;
4256 ULONG DIMCapable:1;
4257 ULONG Device266MHzCapable:1;
4258 ULONG Device533MHzCapable:1;
4259 } DUMMYSTRUCTNAME;
4260 ULONG AsULONG;
4261 } BridgeStatus;
4262 USHORT UpstreamSplitTransactionCapacity;
4263 USHORT UpstreamSplitTransactionLimit;
4264 USHORT DownstreamSplitTransactionCapacity;
4265 USHORT DownstreamSplitTransactionLimit;
4266 union {
4267 struct {
4268 ULONG SelectSecondaryRegisters:1;
4269 ULONG ErrorPresentInOtherBank:1;
4270 ULONG AdditionalCorrectableError:1;
4271 ULONG AdditionalUncorrectableError:1;
4272 ULONG ErrorPhase:3;
4273 ULONG ErrorCorrected:1;
4274 ULONG Syndrome:8;
4275 ULONG ErrorFirstCommand:4;
4276 ULONG ErrorSecondCommand:4;
4277 ULONG ErrorUpperAttributes:4;
4278 ULONG ControlUpdateEnable:1;
4279 ULONG Rsvd:1;
4280 ULONG DisableSingleBitCorrection:1;
4281 ULONG EccMode:1;
4282 } DUMMYSTRUCTNAME;
4283 ULONG AsULONG;
4284 } EccControlStatus;
4285 ULONG EccFirstAddress;
4286 ULONG EccSecondAddress;
4287 ULONG EccAttribute;
4288 } PCIX_BRIDGE_CAPABILITY, *PPCIX_BRIDGE_CAPABILITY;
4289
4290 typedef struct _PCI_SUBSYSTEM_IDS_CAPABILITY {
4291 PCI_CAPABILITIES_HEADER Header;
4292 USHORT Reserved;
4293 USHORT SubVendorID;
4294 USHORT SubSystemID;
4295 } PCI_SUBSYSTEM_IDS_CAPABILITY, *PPCI_SUBSYSTEM_IDS_CAPABILITY;
4296
4297 #define OSC_FIRMWARE_FAILURE 0x02
4298 #define OSC_UNRECOGNIZED_UUID 0x04
4299 #define OSC_UNRECOGNIZED_REVISION 0x08
4300 #define OSC_CAPABILITIES_MASKED 0x10
4301
4302 #define PCI_ROOT_BUS_OSC_METHOD_CAPABILITY_REVISION 0x01
4303
4304 typedef struct _PCI_ROOT_BUS_OSC_SUPPORT_FIELD {
4305 union {
4306 struct {
4307 ULONG ExtendedConfigOpRegions:1;
4308 ULONG ActiveStatePowerManagement:1;
4309 ULONG ClockPowerManagement:1;
4310 ULONG SegmentGroups:1;
4311 ULONG MessageSignaledInterrupts:1;
4312 ULONG WindowsHardwareErrorArchitecture:1;
4313 ULONG Reserved:26;
4314 } DUMMYSTRUCTNAME;
4315 ULONG AsULONG;
4316 } u;
4317 } PCI_ROOT_BUS_OSC_SUPPORT_FIELD, *PPCI_ROOT_BUS_OSC_SUPPORT_FIELD;
4318
4319 typedef struct _PCI_ROOT_BUS_OSC_CONTROL_FIELD {
4320 union {
4321 struct {
4322 ULONG ExpressNativeHotPlug:1;
4323 ULONG ShpcNativeHotPlug:1;
4324 ULONG ExpressNativePME:1;
4325 ULONG ExpressAdvancedErrorReporting:1;
4326 ULONG ExpressCapabilityStructure:1;
4327 ULONG Reserved:27;
4328 } DUMMYSTRUCTNAME;
4329 ULONG AsULONG;
4330 } u;
4331 } PCI_ROOT_BUS_OSC_CONTROL_FIELD, *PPCI_ROOT_BUS_OSC_CONTROL_FIELD;
4332
4333 typedef enum _PCI_HARDWARE_INTERFACE {
4334 PciConventional,
4335 PciXMode1,
4336 PciXMode2,
4337 PciExpress
4338 } PCI_HARDWARE_INTERFACE, *PPCI_HARDWARE_INTERFACE;
4339
4340 typedef enum {
4341 BusWidth32Bits,
4342 BusWidth64Bits
4343 } PCI_BUS_WIDTH;
4344
4345 typedef struct _PCI_ROOT_BUS_HARDWARE_CAPABILITY {
4346 PCI_HARDWARE_INTERFACE SecondaryInterface;
4347 struct {
4348 BOOLEAN BusCapabilitiesFound;
4349 ULONG CurrentSpeedAndMode;
4350 ULONG SupportedSpeedsAndModes;
4351 BOOLEAN DeviceIDMessagingCapable;
4352 PCI_BUS_WIDTH SecondaryBusWidth;
4353 } DUMMYSTRUCTNAME;
4354 PCI_ROOT_BUS_OSC_SUPPORT_FIELD OscFeatureSupport;
4355 PCI_ROOT_BUS_OSC_CONTROL_FIELD OscControlRequest;
4356 PCI_ROOT_BUS_OSC_CONTROL_FIELD OscControlGranted;
4357 } PCI_ROOT_BUS_HARDWARE_CAPABILITY, *PPCI_ROOT_BUS_HARDWARE_CAPABILITY;
4358
4359 typedef union _PCI_EXPRESS_CAPABILITIES_REGISTER {
4360 struct {
4361 USHORT CapabilityVersion:4;
4362 USHORT DeviceType:4;
4363 USHORT SlotImplemented:1;
4364 USHORT InterruptMessageNumber:5;
4365 USHORT Rsvd:2;
4366 } DUMMYSTRUCTNAME;
4367 USHORT AsUSHORT;
4368 } PCI_EXPRESS_CAPABILITIES_REGISTER, *PPCI_EXPRESS_CAPABILITIES_REGISTER;
4369
4370 typedef union _PCI_EXPRESS_DEVICE_CAPABILITIES_REGISTER {
4371 struct {
4372 ULONG MaxPayloadSizeSupported:3;
4373 ULONG PhantomFunctionsSupported:2;
4374 ULONG ExtendedTagSupported:1;
4375 ULONG L0sAcceptableLatency:3;
4376 ULONG L1AcceptableLatency:3;
4377 ULONG Undefined:3;
4378 ULONG RoleBasedErrorReporting:1;
4379 ULONG Rsvd1:2;
4380 ULONG CapturedSlotPowerLimit:8;
4381 ULONG CapturedSlotPowerLimitScale:2;
4382 ULONG Rsvd2:4;
4383 } DUMMYSTRUCTNAME;
4384 ULONG AsULONG;
4385 } PCI_EXPRESS_DEVICE_CAPABILITIES_REGISTER, *PPCI_EXPRESS_DEVICE_CAPABILITIES_REGISTER;
4386
4387 #define PCI_EXPRESS_AER_DEVICE_CONTROL_MASK 0x07;
4388
4389 typedef union _PCI_EXPRESS_DEVICE_CONTROL_REGISTER {
4390 struct {
4391 USHORT CorrectableErrorEnable:1;
4392 USHORT NonFatalErrorEnable:1;
4393 USHORT FatalErrorEnable:1;
4394 USHORT UnsupportedRequestErrorEnable:1;
4395 USHORT EnableRelaxedOrder:1;
4396 USHORT MaxPayloadSize:3;
4397 USHORT ExtendedTagEnable:1;
4398 USHORT PhantomFunctionsEnable:1;
4399 USHORT AuxPowerEnable:1;
4400 USHORT NoSnoopEnable:1;
4401 USHORT MaxReadRequestSize:3;
4402 USHORT BridgeConfigRetryEnable:1;
4403 } DUMMYSTRUCTNAME;
4404 USHORT AsUSHORT;
4405 } PCI_EXPRESS_DEVICE_CONTROL_REGISTER, *PPCI_EXPRESS_DEVICE_CONTROL_REGISTER;
4406
4407 #define PCI_EXPRESS_AER_DEVICE_STATUS_MASK 0x0F;
4408
4409 typedef union _PCI_EXPRESS_DEVICE_STATUS_REGISTER {
4410 struct {
4411 USHORT CorrectableErrorDetected:1;
4412 USHORT NonFatalErrorDetected:1;
4413 USHORT FatalErrorDetected:1;
4414 USHORT UnsupportedRequestDetected:1;
4415 USHORT AuxPowerDetected:1;
4416 USHORT TransactionsPending:1;
4417 USHORT Rsvd:10;
4418 } DUMMYSTRUCTNAME;
4419 USHORT AsUSHORT;
4420 } PCI_EXPRESS_DEVICE_STATUS_REGISTER, *PPCI_EXPRESS_DEVICE_STATUS_REGISTER;
4421
4422 typedef union _PCI_EXPRESS_LINK_CAPABILITIES_REGISTER {
4423 struct {
4424 ULONG MaximumLinkSpeed:4;
4425 ULONG MaximumLinkWidth:6;
4426 ULONG ActiveStatePMSupport:2;
4427 ULONG L0sExitLatency:3;
4428 ULONG L1ExitLatency:3;
4429 ULONG ClockPowerManagement:1;
4430 ULONG SurpriseDownErrorReportingCapable:1;
4431 ULONG DataLinkLayerActiveReportingCapable:1;
4432 ULONG Rsvd:3;
4433 ULONG PortNumber:8;
4434 } DUMMYSTRUCTNAME;
4435 ULONG AsULONG;
4436 } PCI_EXPRESS_LINK_CAPABILITIES_REGISTER, *PPCI_EXPRESS_LINK_CAPABILITIES_REGISTER;
4437
4438 typedef union _PCI_EXPRESS_LINK_CONTROL_REGISTER {
4439 struct {
4440 USHORT ActiveStatePMControl:2;
4441 USHORT Rsvd1:1;
4442 USHORT ReadCompletionBoundary:1;
4443 USHORT LinkDisable:1;
4444 USHORT RetrainLink:1;
4445 USHORT CommonClockConfig:1;
4446 USHORT ExtendedSynch:1;
4447 USHORT EnableClockPowerManagement:1;
4448 USHORT Rsvd2:7;
4449 } DUMMYSTRUCTNAME;
4450 USHORT AsUSHORT;
4451 } PCI_EXPRESS_LINK_CONTROL_REGISTER, *PPCI_EXPRESS_LINK_CONTROL_REGISTER;