lib/3rdparty/softx86/softx86/inc.c

   1 /*
   2  * inc.c
   3  *
   4  * Copyright (C) 2003, 2004 Jonathan Campbell <jcampbell@mdjk.com>
   5  *
   6  * Decompiler and executioneer for the INC/DEC instructions.
   7  *
   8  ***********************************************************************************
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version 2
  12  * of the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  22  ************************************************************************************/
  23
  24 #include <softx86.h>
  25 #include <memory.h>
  26 #include <stdio.h>
  27 #include <string.h>
  28 #include "optable.h"
  29 #include "inc.h"
  30
  31 sx86_ubyte op_dec8(softx86_ctx* ctx,sx86_ubyte src)
  32 {
  33         sx86_ubyte ret;
  34
  35 /* peform the subtraction */
  36         ret = src-1;
  37
  38 /* apparently CF is not touched by this instruction */
  39
  40 /* if result treated as signed value is negative */
  41         if (ret & 0x80) ctx->state->reg_flags.val |=  SX86_CPUFLAG_SIGN;
  42         else            ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN;
  43
  44 /* if result is zero */
  45         if (!ret)       ctx->state->reg_flags.val |=  SX86_CPUFLAG_ZERO;
  46         else            ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO;
  47
  48 /* auxiliary flag emulation (not defined by Intel's documentation, but observed
  49    from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around
  50    as a web server :)
  51
  52    apparently aux is set if:
  53    given operation a - b = c, ((a AND 0Fh) - (b AND 0Fh) < 0).
  54    in other words, if the lowest nibbles subtracted cause carry. */
  55         if ((src&0xF) < 1)
  56                 ctx->state->reg_flags.val |=  SX86_CPUFLAG_AUX;
  57         else
  58                 ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX;
  59
  60 /* finally, compute parity for parity bit */
  61         if (softx86_parity8(ret))
  62                 ctx->state->reg_flags.val |=  SX86_CPUFLAG_PARITY;
  63         else
  64                 ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY;
  65
  66         return ret;
  67 }
  68
  69 sx86_uword op_dec16(softx86_ctx* ctx,sx86_uword src)
  70 {
  71         sx86_uword ret;
  72
  73 /* peform the subtraction */
  74         ret = src-1;
  75
  76 /* apparently CF is not touched by this instruction */
  77
  78 /* if result treated as signed value is negative */
  79         if (ret & 0x8000)
  80                 ctx->state->reg_flags.val |=  SX86_CPUFLAG_SIGN;
  81         else
  82                 ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN;
  83
  84 /* if result is zero */
  85         if (!ret)       ctx->state->reg_flags.val |=  SX86_CPUFLAG_ZERO;
  86         else            ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO;
  87
  88 /* auxiliary flag emulation (not defined by Intel's documentation, but observed
  89    from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around
  90    as a web server :)
  91
  92    apparently aux is set if:
  93    given operation a - b = c, ((a AND 0Fh) - (b AND 0Fh) < 0).
  94    in other words, if the lowest nibbles subtracted cause carry. */
  95         if ((src&0xF) < 1)
  96                 ctx->state->reg_flags.val |=  SX86_CPUFLAG_AUX;
  97         else
  98                 ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX;
  99
 100 /* finally, compute parity for parity bit */
 101         if (softx86_parity16(ret))
 102                 ctx->state->reg_flags.val |=  SX86_CPUFLAG_PARITY;
 103         else
 104                 ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY;
 105
 106         return ret;
 107 }
 108
 109 sx86_udword op_dec32(softx86_ctx* ctx,sx86_udword src)
 110 {
 111         sx86_udword ret;
 112
 113 /* peform the subtraction */
 114         ret = src-1;
 115
 116 /* apparently CF is not touched by this instruction */
 117
 118 /* if result treated as signed value is negative */
 119         if (ret & 0x80000000)
 120                 ctx->state->reg_flags.val |=  SX86_CPUFLAG_SIGN;
 121         else
 122                 ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN;
 123
 124 /* if result is zero */
 125         if (!ret)       ctx->state->reg_flags.val |=  SX86_CPUFLAG_ZERO;
 126         else            ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO;
 127
 128 /* auxiliary flag emulation (not defined by Intel's documentation, but observed
 129    from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around
 130    as a web server :)
 131
 132    apparently aux is set if:
 133    given operation a - b = c, ((a AND 0Fh) - (b AND 0Fh) < 0).
 134    in other words, if the lowest nibbles subtracted cause carry. */
 135         if ((src&0xF) < 1)
 136                 ctx->state->reg_flags.val |=  SX86_CPUFLAG_AUX;
 137         else
 138                 ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX;
 139
 140 /* finally, compute parity for parity bit */
 141         if (softx86_parity16(ret))
 142                 ctx->state->reg_flags.val |=  SX86_CPUFLAG_PARITY;
 143         else
 144                 ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY;
 145
 146         return ret;
 147 }
 148
 149 sx86_ubyte op_inc8(softx86_ctx* ctx,sx86_ubyte src)
 150 {
 151         sx86_ubyte ret;
 152
 153 /* peform the addition */
 154         ret = src+1;
 155
 156 /* apparently CF is not touched by this instruction */
 157
 158 /* if result treated as signed value is negative */
 159         if (ret & 0x80) ctx->state->reg_flags.val |=  SX86_CPUFLAG_SIGN;
 160         else            ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN;
 161
 162 /* if result is zero */
 163         if (!ret)       ctx->state->reg_flags.val |=  SX86_CPUFLAG_ZERO;
 164         else            ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO;
 165
 166 /* auxiliary flag emulation (not defined by Intel's documentation, but observed
 167    from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around
 168    as a web server :)
 169
 170    apparently aux is set if:
 171    given operation a + b = c, ((b AND 0Fh) + (a AND 0Fh) >= 0x10).
 172    in other words, if the lowest nibbles added together overflow. */
 173         if ((1+(src&0xF)) >= 0x10)
 174                 ctx->state->reg_flags.val |=  SX86_CPUFLAG_AUX;
 175         else
 176                 ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX;
 177
 178 /* finally, compute parity for parity bit */
 179         if (softx86_parity8(ret))
 180                 ctx->state->reg_flags.val |=  SX86_CPUFLAG_PARITY;
 181         else
 182                 ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY;
 183
 184         return ret;
 185 }
 186
 187 sx86_uword op_inc16(softx86_ctx* ctx,sx86_uword src)
 188 {
 189         sx86_uword ret;
 190
 191 /* peform the addition */
 192         ret = src+1;
 193
 194 /* apparently CF is not touched by this instruction */
 195
 196 /* if result treated as signed value is negative */
 197         if (ret & 0x8000)
 198                 ctx->state->reg_flags.val |=  SX86_CPUFLAG_SIGN;
 199         else
 200                 ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN;
 201
 202 /* if result is zero */
 203         if (!ret)       ctx->state->reg_flags.val |=  SX86_CPUFLAG_ZERO;
 204         else            ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO;
 205
 206 /* auxiliary flag emulation (not defined by Intel's documentation, but observed
 207    from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around
 208    as a web server :)
 209
 210    apparently aux is set if:
 211    given operation a + b = c, ((b AND 0Fh) + (a AND 0Fh) >= 0x10).
 212    in other words, if the lowest nibbles added together overflow. */
 213         if ((1+(src&0xF)) >= 0x10)
 214                 ctx->state->reg_flags.val |=  SX86_CPUFLAG_AUX;
 215         else
 216                 ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX;
 217
 218 /* finally, compute parity for parity bit */
 219         if (softx86_parity16(ret))
 220                 ctx->state->reg_flags.val |=  SX86_CPUFLAG_PARITY;
 221         else
 222                 ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY;
 223
 224         return ret;
 225 }
 226
 227 sx86_udword op_inc32(softx86_ctx* ctx,sx86_udword src)
 228 {
 229         sx86_udword ret;
 230
 231 /* peform the addition */
 232         ret = src+1;
 233
 234 /* apparently CF is not touched by this instruction */
 235
 236 /* if result treated as signed value is negative */
 237         if (ret & 0x80000000)
 238                 ctx->state->reg_flags.val |=  SX86_CPUFLAG_SIGN;
 239         else
 240                 ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN;
 241
 242 /* if result is zero */
 243         if (!ret)       ctx->state->reg_flags.val |=  SX86_CPUFLAG_ZERO;
 244         else            ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO;
 245
 246 /* auxiliary flag emulation (not defined by Intel's documentation, but observed
 247    from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around
 248    as a web server :)
 249
 250    apparently aux is set if:
 251    given operation a + b = c, ((b AND 0Fh) + (a AND 0Fh) >= 0x10).
 252    in other words, if the lowest nibbles added together overflow. */
 253         if ((1+(src&0xF)) >= 0x10)
 254                 ctx->state->reg_flags.val |=  SX86_CPUFLAG_AUX;
 255         else
 256                 ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX;
 257
 258 /* finally, compute parity for parity bit */
 259         if (softx86_parity16(ret))
 260                 ctx->state->reg_flags.val |=  SX86_CPUFLAG_PARITY;
 261         else
 262                 ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY;
 263
 264         return ret;
 265 }
 266
 267 int Sfx86OpcodeExec_inc(sx86_ubyte opcode,softx86_ctx* ctx)
 268 {
 269         if ((opcode&0xF8) == 0x40) {                                    // INC [reg]
 270                 sx86_uword w,i;
 271
 272                 i = opcode-0x40;
 273                 w = ctx->state->general_reg[i].w.lo;
 274                 ctx->state->general_reg[i].w.lo = op_inc16(ctx,w);
 275                 return 1;
 276         }
 277         else if ((opcode&0xF8) == 0x48) {                               // DEC [reg]
 278                 sx86_uword w,i;
 279
 280                 i = opcode-0x48;
 281                 w = ctx->state->general_reg[i].w.lo;
 282                 ctx->state->general_reg[i].w.lo = op_dec16(ctx,w);
 283                 return 1;
 284         }
 285
 286         return 0;
 287 }
 288
 289 int Sfx86OpcodeDec_inc(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128])
 290 {
 291         if ((opcode&0xF8) == 0x40) {                                    // INC [reg]
 292                 sprintf(buf,"INC %s",sx86_regs16[opcode-0x40]);
 293                 return 1;
 294         }
 295         else if ((opcode&0xF8) == 0x48) {                               // DEC [reg]
 296                 sprintf(buf,"DEC %s",sx86_regs16[opcode-0x48]);
 297                 return 1;
 298         }
 299
 300         return 0;
 301 }