* Sync up to trunk head (r64829).
[reactos.git] / lib / fast486 / common.c
1 /*
2 * Fast486 386/486 CPU Emulation Library
3 * common.c
4 *
5 * Copyright (C) 2014 Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
20 */
21
22 /* INCLUDES *******************************************************************/
23
24 #include <windef.h>
25
26 // #define NDEBUG
27 #include <debug.h>
28
29 #include <fast486.h>
30 #include "common.h"
31
32 /* PUBLIC FUNCTIONS ***********************************************************/
33
34 BOOLEAN
35 Fast486ReadMemory(PFAST486_STATE State,
36 FAST486_SEG_REGS SegmentReg,
37 ULONG Offset,
38 BOOLEAN InstFetch,
39 PVOID Buffer,
40 ULONG Size)
41 {
42 ULONG LinearAddress;
43 PFAST486_SEG_REG CachedDescriptor;
44
45 ASSERT(SegmentReg < FAST486_NUM_SEG_REGS);
46
47 /* Get the cached descriptor */
48 CachedDescriptor = &State->SegmentRegs[SegmentReg];
49
50 if ((Offset + Size - 1) > CachedDescriptor->Limit)
51 {
52 /* Read beyond limit */
53 Fast486Exception(State, FAST486_EXCEPTION_GP);
54 return FALSE;
55 }
56
57 /* Check for protected mode */
58 if (State->ControlRegisters[0] & FAST486_CR0_PE)
59 {
60 /* Privilege checks */
61
62 if (!CachedDescriptor->Present)
63 {
64 Fast486Exception(State, FAST486_EXCEPTION_NP);
65 return FALSE;
66 }
67
68 if ((!InstFetch && (CachedDescriptor->Rpl > CachedDescriptor->Dpl))
69 || (Fast486GetCurrentPrivLevel(State) > CachedDescriptor->Dpl))
70 {
71 Fast486Exception(State, FAST486_EXCEPTION_GP);
72 return FALSE;
73 }
74
75 if (InstFetch)
76 {
77 if (!CachedDescriptor->Executable)
78 {
79 /* Data segment not executable */
80 Fast486Exception(State, FAST486_EXCEPTION_GP);
81 return FALSE;
82 }
83 }
84 else
85 {
86 if (CachedDescriptor->Executable && (!CachedDescriptor->ReadWrite))
87 {
88 /* Code segment not readable */
89 Fast486Exception(State, FAST486_EXCEPTION_GP);
90 return FALSE;
91 }
92 }
93 }
94
95 /* Find the linear address */
96 LinearAddress = CachedDescriptor->Base + Offset;
97
98 /* Read from the linear address */
99 return Fast486ReadLinearMemory(State, LinearAddress, Buffer, Size);
100 }
101
102 BOOLEAN
103 Fast486WriteMemory(PFAST486_STATE State,
104 FAST486_SEG_REGS SegmentReg,
105 ULONG Offset,
106 PVOID Buffer,
107 ULONG Size)
108 {
109 ULONG LinearAddress;
110 PFAST486_SEG_REG CachedDescriptor;
111
112 ASSERT(SegmentReg < FAST486_NUM_SEG_REGS);
113
114 /* Get the cached descriptor */
115 CachedDescriptor = &State->SegmentRegs[SegmentReg];
116
117 if ((Offset + Size - 1) > CachedDescriptor->Limit)
118 {
119 /* Write beyond limit */
120 Fast486Exception(State, FAST486_EXCEPTION_GP);
121 return FALSE;
122 }
123
124 /* Check for protected mode */
125 if (State->ControlRegisters[0] & FAST486_CR0_PE)
126 {
127 /* Privilege checks */
128
129 if (!CachedDescriptor->Present)
130 {
131 Fast486Exception(State, FAST486_EXCEPTION_NP);
132 return FALSE;
133 }
134
135 if ((CachedDescriptor->Rpl > CachedDescriptor->Dpl)
136 || (Fast486GetCurrentPrivLevel(State) > CachedDescriptor->Dpl))
137 {
138 Fast486Exception(State, FAST486_EXCEPTION_GP);
139 return FALSE;
140 }
141
142 if (CachedDescriptor->Executable)
143 {
144 /* Code segment not writable */
145 Fast486Exception(State, FAST486_EXCEPTION_GP);
146 return FALSE;
147 }
148 else if (!CachedDescriptor->ReadWrite)
149 {
150 /* Data segment not writeable */
151 Fast486Exception(State, FAST486_EXCEPTION_GP);
152 return FALSE;
153 }
154 }
155
156 /* Find the linear address */
157 LinearAddress = CachedDescriptor->Base + Offset;
158
159 /* Write to the linear address */
160 return Fast486WriteLinearMemory(State, LinearAddress, Buffer, Size);
161 }
162
163 static inline BOOLEAN
164 FASTCALL
165 Fast486GetIntVector(PFAST486_STATE State,
166 UCHAR Number,
167 PFAST486_IDT_ENTRY IdtEntry)
168 {
169 /* Check for protected mode */
170 if (State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PE)
171 {
172 /* Read from the IDT */
173 if (!Fast486ReadLinearMemory(State,
174 State->Idtr.Address
175 + Number * sizeof(*IdtEntry),
176 IdtEntry,
177 sizeof(*IdtEntry)))
178 {
179 /* Exception occurred */
180 return FALSE;
181 }
182 }
183 else
184 {
185 /* Read from the real-mode IVT */
186 ULONG FarPointer;
187
188 /* Paging is always disabled in real mode */
189 State->MemReadCallback(State,
190 State->Idtr.Address
191 + Number * sizeof(FarPointer),
192 &FarPointer,
193 sizeof(FarPointer));
194
195 /* Fill a fake IDT entry */
196 IdtEntry->Offset = LOWORD(FarPointer);
197 IdtEntry->Selector = HIWORD(FarPointer);
198 IdtEntry->Zero = 0;
199 IdtEntry->Type = FAST486_IDT_INT_GATE;
200 IdtEntry->Storage = FALSE;
201 IdtEntry->Dpl = 0;
202 IdtEntry->Present = TRUE;
203 IdtEntry->OffsetHigh = 0;
204 }
205
206 return TRUE;
207 }
208
209 static inline BOOLEAN
210 FASTCALL
211 Fast486InterruptInternal(PFAST486_STATE State,
212 PFAST486_IDT_ENTRY IdtEntry)
213 {
214 USHORT SegmentSelector = IdtEntry->Selector;
215 ULONG Offset = MAKELONG(IdtEntry->Offset, IdtEntry->OffsetHigh);
216 ULONG GateType = IdtEntry->Type;
217 BOOLEAN GateSize = (GateType == FAST486_IDT_INT_GATE_32) ||
218 (GateType == FAST486_IDT_TRAP_GATE_32);
219
220 BOOLEAN Success = FALSE;
221 ULONG OldPrefixFlags = State->PrefixFlags;
222
223 /* Check for protected mode */
224 if (State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PE)
225 {
226 FAST486_TSS Tss;
227 USHORT OldSs = State->SegmentRegs[FAST486_REG_SS].Selector;
228 ULONG OldEsp = State->GeneralRegs[FAST486_REG_ESP].Long;
229
230 if (GateSize != (State->SegmentRegs[FAST486_REG_CS].Size))
231 {
232 /*
233 * The gate size doesn't match the current operand size, so toggle
234 * the OPSIZE flag.
235 */
236 State->PrefixFlags ^= FAST486_PREFIX_OPSIZE;
237 }
238
239 /* Check if the interrupt handler is more privileged */
240 if (Fast486GetCurrentPrivLevel(State) > GET_SEGMENT_RPL(SegmentSelector))
241 {
242 /* Read the TSS */
243 if (!Fast486ReadLinearMemory(State,
244 State->TaskReg.Base,
245 &Tss,
246 sizeof(Tss)))
247 {
248 /* Exception occurred */
249 goto Cleanup;
250 }
251
252 /* Check the new (higher) privilege level */
253 switch (GET_SEGMENT_RPL(SegmentSelector))
254 {
255 case 0:
256 {
257 if (!Fast486LoadSegment(State, FAST486_REG_SS, Tss.Ss0))
258 {
259 /* Exception occurred */
260 goto Cleanup;
261 }
262 State->GeneralRegs[FAST486_REG_ESP].Long = Tss.Esp0;
263
264 break;
265 }
266
267 case 1:
268 {
269 if (!Fast486LoadSegment(State, FAST486_REG_SS, Tss.Ss1))
270 {
271 /* Exception occurred */
272 goto Cleanup;
273 }
274 State->GeneralRegs[FAST486_REG_ESP].Long = Tss.Esp1;
275
276 break;
277 }
278
279 case 2:
280 {
281 if (!Fast486LoadSegment(State, FAST486_REG_SS, Tss.Ss2))
282 {
283 /* Exception occurred */
284 goto Cleanup;
285 }
286 State->GeneralRegs[FAST486_REG_ESP].Long = Tss.Esp2;
287
288 break;
289 }
290
291 default:
292 {
293 /* Should never reach here! */
294 ASSERT(FALSE);
295 }
296 }
297
298 /* Push SS selector */
299 if (!Fast486StackPush(State, OldSs)) goto Cleanup;
300
301 /* Push stack pointer */
302 if (!Fast486StackPush(State, OldEsp)) goto Cleanup;
303 }
304 }
305 else
306 {
307 if (State->SegmentRegs[FAST486_REG_CS].Size)
308 {
309 /* Set OPSIZE, because INT always pushes 16-bit values in real mode */
310 State->PrefixFlags |= FAST486_PREFIX_OPSIZE;
311 }
312 }
313
314 /* Push EFLAGS */
315 if (!Fast486StackPush(State, State->Flags.Long)) goto Cleanup;
316
317 /* Push CS selector */
318 if (!Fast486StackPush(State, State->SegmentRegs[FAST486_REG_CS].Selector)) goto Cleanup;
319
320 /* Push the instruction pointer */
321 if (!Fast486StackPush(State, State->InstPtr.Long)) goto Cleanup;
322
323 if ((GateType == FAST486_IDT_INT_GATE) || (GateType == FAST486_IDT_INT_GATE_32))
324 {
325 /* Disable interrupts after a jump to an interrupt gate handler */
326 State->Flags.If = FALSE;
327 }
328
329 /* Load new CS */
330 if (!Fast486LoadSegment(State, FAST486_REG_CS, SegmentSelector))
331 {
332 /* An exception occurred during the jump */
333 goto Cleanup;
334 }
335
336 if (GateSize)
337 {
338 /* 32-bit code segment, use EIP */
339 State->InstPtr.Long = Offset;
340 }
341 else
342 {
343 /* 16-bit code segment, use IP */
344 State->InstPtr.LowWord = LOWORD(Offset);
345 }
346
347 Success = TRUE;
348
349 Cleanup:
350 /* Restore the prefix flags */
351 State->PrefixFlags = OldPrefixFlags;
352
353 return Success;
354 }
355
356 BOOLEAN
357 FASTCALL
358 Fast486PerformInterrupt(PFAST486_STATE State,
359 UCHAR Number)
360 {
361 FAST486_IDT_ENTRY IdtEntry;
362
363 /* Get the interrupt vector */
364 if (!Fast486GetIntVector(State, Number, &IdtEntry))
365 {
366 /* Exception occurred */
367 return FALSE;
368 }
369
370 /* Perform the interrupt */
371 if (!Fast486InterruptInternal(State, &IdtEntry))
372 {
373 /* Exception occurred */
374 return FALSE;
375 }
376
377 return TRUE;
378 }
379
380 VOID
381 FASTCALL
382 Fast486ExceptionWithErrorCode(PFAST486_STATE State,
383 FAST486_EXCEPTIONS ExceptionCode,
384 ULONG ErrorCode)
385 {
386 /* Increment the exception count */
387 State->ExceptionCount++;
388
389 /* Check if the exception occurred more than once */
390 if (State->ExceptionCount > 1)
391 {
392 /* Then this is a double fault */
393 ExceptionCode = FAST486_EXCEPTION_DF;
394 }
395
396 /* Check if this is a triple fault */
397 if (State->ExceptionCount == 3)
398 {
399 DPRINT("Fast486ExceptionWithErrorCode(%04X:%08X) -- Triple fault\n",
400 State->SegmentRegs[FAST486_REG_CS].Selector,
401 State->InstPtr.Long);
402
403 /* Reset the CPU */
404 Fast486Reset(State);
405 return;
406 }
407
408 /* Restore the IP to the saved IP */
409 State->InstPtr = State->SavedInstPtr;
410
411 /* Perform the interrupt */
412 if (!Fast486PerformInterrupt(State, ExceptionCode))
413 {
414 /*
415 * If this function failed, that means Fast486Exception
416 * was called again, so just return in this case.
417 */
418 return;
419 }
420
421 if (EXCEPTION_HAS_ERROR_CODE(ExceptionCode)
422 && (State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PE))
423 {
424 /* Push the error code */
425 if (!Fast486StackPush(State, ErrorCode))
426 {
427 /*
428 * If this function failed, that means Fast486Exception
429 * was called again, so just return in this case.
430 */
431 return;
432 }
433 }
434
435 /* Reset the exception count */
436 State->ExceptionCount = 0;
437 }
438
439 /* EOF */