lib/fast486/common.inl

   1 /*
   2  * Fast486 386/486 CPU Emulation Library
   3  * common.inl
   4  *
   5  * Copyright (C) 2013 Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * as published by the Free Software Foundation; either version 2
  10  * of the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  20  */
  21
  22 #include "common.h"
  23
  24 /* PUBLIC FUNCTIONS ***********************************************************/
  25
  26 FORCEINLINE
  27 INT
  28 Fast486GetCurrentPrivLevel(PFAST486_STATE State)
  29 {
  30     /* Return the CPL, or 3 if we're in virtual 8086 mode */
  31     return (!State->Flags.Vm) ? State->Cpl : 3;
  32 }
  33
  34 FORCEINLINE
  35 ULONG
  36 Fast486GetPageTableEntry(PFAST486_STATE State,
  37                          ULONG VirtualAddress,
  38                          BOOLEAN MarkAsDirty)
  39 {
  40     ULONG PdeIndex = GET_ADDR_PDE(VirtualAddress);
  41     ULONG PteIndex = GET_ADDR_PTE(VirtualAddress);
  42     FAST486_PAGE_DIR DirectoryEntry;
  43     FAST486_PAGE_TABLE TableEntry;
  44     ULONG PageDirectory = State->ControlRegisters[FAST486_REG_CR3];
  45
  46     if ((State->Tlb != NULL)
  47         && (State->Tlb[VirtualAddress >> 12] != INVALID_TLB_FIELD))
  48     {
  49         /* Return the cached entry */
  50         return State->Tlb[VirtualAddress >> 12];
  51     }
  52
  53     /* Read the directory entry */
  54     State->MemReadCallback(State,
  55                            PageDirectory + PdeIndex * sizeof(ULONG),
  56                            &DirectoryEntry.Value,
  57                            sizeof(DirectoryEntry));
  58
  59     /* Make sure it is present */
  60     if (!DirectoryEntry.Present) return 0;
  61
  62     /* Was the directory entry accessed before? */
  63     if (!DirectoryEntry.Accessed)
  64     {
  65         /* Well, it is now */
  66         DirectoryEntry.Accessed = TRUE;
  67
  68         /* Write back the directory entry */
  69         State->MemWriteCallback(State,
  70                                 PageDirectory + PdeIndex * sizeof(ULONG),
  71                                 &DirectoryEntry.Value,
  72                                 sizeof(DirectoryEntry));
  73     }
  74
  75     /* Read the table entry */
  76     State->MemReadCallback(State,
  77                            (DirectoryEntry.TableAddress << 12)
  78                            + PteIndex * sizeof(ULONG),
  79                            &TableEntry.Value,
  80                            sizeof(TableEntry));
  81
  82     /* Make sure it is present */
  83     if (!TableEntry.Present) return 0;
  84
  85     if (MarkAsDirty) TableEntry.Dirty = TRUE;
  86
  87     /* Was the table entry accessed before? */
  88     if (!TableEntry.Accessed)
  89     {
  90         /* Well, it is now */
  91         TableEntry.Accessed = TRUE;
  92
  93         /* Write back the table entry */
  94         State->MemWriteCallback(State,
  95                                 (DirectoryEntry.TableAddress << 12)
  96                                 + PteIndex * sizeof(ULONG),
  97                                 &TableEntry.Value,
  98                                 sizeof(TableEntry));
  99     }
 100
 101     /*
 102      * The resulting permissions depend on the permissions
 103      * in the page directory table too
 104      */
 105     TableEntry.Writeable &= DirectoryEntry.Writeable;
 106     TableEntry.Usermode &= DirectoryEntry.Usermode;
 107
 108     if (State->Tlb != NULL)
 109     {
 110         /* Set the TLB entry */
 111         State->Tlb[VirtualAddress >> 12] = TableEntry.Value;
 112     }
 113
 114     /* Return the table entry */
 115     return TableEntry.Value;
 116 }
 117
 118 FORCEINLINE
 119 BOOLEAN
 120 Fast486ReadLinearMemory(PFAST486_STATE State,
 121                         ULONG LinearAddress,
 122                         PVOID Buffer,
 123                         ULONG Size)
 124 {
 125     INT Cpl = Fast486GetCurrentPrivLevel(State);
 126
 127     /* Check if paging is enabled */
 128     if (State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PG)
 129     {
 130         ULONG Page;
 131         FAST486_PAGE_TABLE TableEntry;
 132
 133         for (Page = PAGE_ALIGN(LinearAddress);
 134              Page <= PAGE_ALIGN(LinearAddress + Size - 1);
 135              Page += PAGE_SIZE)
 136         {
 137             ULONG PageOffset = 0, PageLength = PAGE_SIZE;
 138
 139             /* Get the table entry */
 140             TableEntry.Value = Fast486GetPageTableEntry(State, Page, FALSE);
 141
 142             if (!TableEntry.Present || (!TableEntry.Usermode && (Cpl > 0)))
 143             {
 144                 /* Exception */
 145                 Fast486ExceptionWithErrorCode(State,
 146                                               FAST486_EXCEPTION_PF,
 147                                               TableEntry.Value & 0x07);
 148                 return FALSE;
 149             }
 150
 151             /* Check if this is the first page */
 152             if (Page == PAGE_ALIGN(LinearAddress))
 153             {
 154                 /* Start copying from the offset from the beginning of the page */
 155                 PageOffset = PAGE_OFFSET(LinearAddress);
 156             }
 157
 158             /* Check if this is the last page */
 159             if (Page == PAGE_ALIGN(LinearAddress + Size - 1))
 160             {
 161                 /* Copy only a part of the page */
 162                 PageLength = PAGE_OFFSET(LinearAddress + Size);
 163             }
 164
 165             /* Read the memory */
 166             State->MemReadCallback(State,
 167                                    (TableEntry.Address << 12) | PageOffset,
 168                                    Buffer,
 169                                    PageLength);
 170         }
 171     }
 172     else
 173     {
 174         /* Read the memory */
 175         State->MemReadCallback(State, LinearAddress, Buffer, Size);
 176     }
 177
 178     return TRUE;
 179 }
 180
 181 FORCEINLINE
 182 BOOLEAN
 183 Fast486WriteLinearMemory(PFAST486_STATE State,
 184                          ULONG LinearAddress,
 185                          PVOID Buffer,
 186                          ULONG Size)
 187 {
 188     INT Cpl = Fast486GetCurrentPrivLevel(State);
 189
 190     /* Check if paging is enabled */
 191     if (State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PG)
 192     {
 193         ULONG Page;
 194         FAST486_PAGE_TABLE TableEntry;
 195
 196         for (Page = PAGE_ALIGN(LinearAddress);
 197              Page <= PAGE_ALIGN(LinearAddress + Size - 1);
 198              Page += PAGE_SIZE)
 199         {
 200             ULONG PageOffset = 0, PageLength = PAGE_SIZE;
 201
 202             /* Get the table entry */
 203             TableEntry.Value = Fast486GetPageTableEntry(State, Page, TRUE);
 204
 205             if ((!TableEntry.Present || (!TableEntry.Usermode && (Cpl > 0)))
 206                 || ((State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_WP)
 207                 && !TableEntry.Writeable))
 208             {
 209                 /* Exception */
 210                 Fast486ExceptionWithErrorCode(State,
 211                                               FAST486_EXCEPTION_PF,
 212                                               TableEntry.Value & 0x07);
 213                 return FALSE;
 214             }
 215
 216             /* Check if this is the first page */
 217             if (Page == PAGE_ALIGN(LinearAddress))
 218             {
 219                 /* Start copying from the offset from the beginning of the page */
 220                 PageOffset = PAGE_OFFSET(LinearAddress);
 221             }
 222
 223             /* Check if this is the last page */
 224             if (Page == PAGE_ALIGN(LinearAddress + Size - 1))
 225             {
 226                 /* Copy only a part of the page */
 227                 PageLength = PAGE_OFFSET(LinearAddress + Size);
 228             }
 229
 230             /* Write the memory */
 231             State->MemWriteCallback(State,
 232                                     (TableEntry.Address << 12) | PageOffset,
 233                                     Buffer,
 234                                     PageLength);
 235         }
 236     }
 237     else
 238     {
 239         /* Write the memory */
 240         State->MemWriteCallback(State, LinearAddress, Buffer, Size);
 241     }
 242
 243     return TRUE;
 244 }
 245
 246 FORCEINLINE
 247 VOID
 248 Fast486Exception(PFAST486_STATE State,
 249                  FAST486_EXCEPTIONS ExceptionCode)
 250 {
 251     /* Call the internal function */
 252     Fast486ExceptionWithErrorCode(State, ExceptionCode, 0);
 253 }
 254
 255 FORCEINLINE
 256 BOOLEAN
 257 Fast486StackPush(PFAST486_STATE State,
 258                  ULONG Value)
 259 {
 260     BOOLEAN Size = State->SegmentRegs[FAST486_REG_CS].Size;
 261
 262     /* The OPSIZE prefix toggles the size */
 263     if (State->PrefixFlags & FAST486_PREFIX_OPSIZE) Size = !Size;
 264
 265     if (Size)
 266     {
 267         /* 32-bit size */
 268
 269         /* Check if ESP is between 1 and 3 */
 270         if (State->GeneralRegs[FAST486_REG_ESP].Long >= 1
 271             && State->GeneralRegs[FAST486_REG_ESP].Long <= 3)
 272         {
 273             Fast486Exception(State, FAST486_EXCEPTION_SS);
 274             return FALSE;
 275         }
 276
 277         /* Subtract ESP by 4 */
 278         State->GeneralRegs[FAST486_REG_ESP].Long -= 4;
 279
 280         /* Store the value in SS:ESP */
 281         return Fast486WriteMemory(State,
 282                                   FAST486_REG_SS,
 283                                   State->GeneralRegs[FAST486_REG_ESP].Long,
 284                                   &Value,
 285                                   sizeof(ULONG));
 286     }
 287     else
 288     {
 289         /* 16-bit size */
 290         USHORT ShortValue = LOWORD(Value);
 291
 292         /* Check if SP is 1 */
 293         if (State->GeneralRegs[FAST486_REG_ESP].Long == 1)
 294         {
 295             Fast486Exception(State, FAST486_EXCEPTION_SS);
 296             return FALSE;
 297         }
 298
 299         /* Subtract SP by 2 */
 300         State->GeneralRegs[FAST486_REG_ESP].LowWord -= 2;
 301
 302         /* Store the value in SS:SP */
 303         return Fast486WriteMemory(State,
 304                                   FAST486_REG_SS,
 305                                   State->GeneralRegs[FAST486_REG_ESP].LowWord,
 306                                   &ShortValue,
 307                                   sizeof(USHORT));
 308     }
 309 }
 310
 311 FORCEINLINE
 312 BOOLEAN
 313 Fast486StackPop(PFAST486_STATE State,
 314                 PULONG Value)
 315 {
 316     ULONG LongValue;
 317     USHORT ShortValue;
 318     BOOLEAN Size = State->SegmentRegs[FAST486_REG_CS].Size;
 319
 320     /* The OPSIZE prefix toggles the size */
 321     TOGGLE_OPSIZE(Size);
 322
 323     if (Size)
 324     {
 325         /* 32-bit size */
 326
 327         /* Check if ESP is 0xFFFFFFFF */
 328         if (State->GeneralRegs[FAST486_REG_ESP].Long == 0xFFFFFFFF)
 329         {
 330             Fast486Exception(State, FAST486_EXCEPTION_SS);
 331             return FALSE;
 332         }
 333
 334         /* Read the value from SS:ESP */
 335         if (!Fast486ReadMemory(State,
 336                                FAST486_REG_SS,
 337                                State->GeneralRegs[FAST486_REG_ESP].Long,
 338                                FALSE,
 339                                &LongValue,
 340                                sizeof(LongValue)))
 341         {
 342             /* An exception occurred */
 343             return FALSE;
 344         }
 345
 346         /* Increment ESP by 4 */
 347         State->GeneralRegs[FAST486_REG_ESP].Long += 4;
 348
 349         /* Store the value in the result */
 350         *Value = LongValue;
 351     }
 352     else
 353     {
 354         /* 16-bit size */
 355
 356         /* Check if SP is 0xFFFF */
 357         if (State->GeneralRegs[FAST486_REG_ESP].LowWord == 0xFFFF)
 358         {
 359             Fast486Exception(State, FAST486_EXCEPTION_SS);
 360             return FALSE;
 361         }
 362
 363         /* Read the value from SS:SP */
 364         if (!Fast486ReadMemory(State,
 365                                FAST486_REG_SS,
 366                                State->GeneralRegs[FAST486_REG_ESP].LowWord,
 367                                FALSE,
 368                                &ShortValue,
 369                                sizeof(ShortValue)))
 370         {
 371             /* An exception occurred */
 372             return FALSE;
 373         }
 374
 375         /* Increment SP by 2 */
 376         State->GeneralRegs[FAST486_REG_ESP].LowWord += 2;
 377
 378         /* Store the value in the result */
 379         *Value = ShortValue;
 380     }
 381
 382     return TRUE;
 383 }
 384
 385 FORCEINLINE
 386 BOOLEAN
 387 Fast486LoadSegment(PFAST486_STATE State,
 388                    INT Segment,
 389                    USHORT Selector)
 390 {
 391     PFAST486_SEG_REG CachedDescriptor;
 392     FAST486_GDT_ENTRY GdtEntry;
 393
 394     ASSERT(Segment < FAST486_NUM_SEG_REGS);
 395
 396     /* Get the cached descriptor */
 397     CachedDescriptor = &State->SegmentRegs[Segment];
 398
 399     /* Check for protected mode */
 400     if ((State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PE) && !State->Flags.Vm)
 401     {
 402         /* Make sure the GDT contains the entry */
 403         if (GET_SEGMENT_INDEX(Selector) >= (State->Gdtr.Size + 1))
 404         {
 405             Fast486Exception(State, FAST486_EXCEPTION_GP);
 406             return FALSE;
 407         }
 408
 409         /* Read the GDT */
 410         if (!Fast486ReadLinearMemory(State,
 411                                      State->Gdtr.Address
 412                                      + GET_SEGMENT_INDEX(Selector),
 413                                      &GdtEntry,
 414                                      sizeof(GdtEntry)))
 415         {
 416             /* Exception occurred */
 417             return FALSE;
 418         }
 419
 420         if (Segment == FAST486_REG_SS)
 421         {
 422             /* Loading the stack segment */
 423
 424             if (GET_SEGMENT_INDEX(Selector) == 0)
 425             {
 426                 Fast486Exception(State, FAST486_EXCEPTION_GP);
 427                 return FALSE;
 428             }
 429
 430             if (!GdtEntry.SystemType)
 431             {
 432                 /* This is a special descriptor */
 433                 Fast486Exception(State, FAST486_EXCEPTION_GP);
 434                 return FALSE;
 435             }
 436
 437             if (GdtEntry.Executable || !GdtEntry.ReadWrite)
 438             {
 439                 Fast486Exception(State, FAST486_EXCEPTION_GP);
 440                 return FALSE;
 441             }
 442
 443             if ((GET_SEGMENT_RPL(Selector) != Fast486GetCurrentPrivLevel(State))
 444                 || (GET_SEGMENT_RPL(Selector) != GdtEntry.Dpl))
 445             {
 446                 Fast486Exception(State, FAST486_EXCEPTION_GP);
 447                 return FALSE;
 448             }
 449
 450             if (!GdtEntry.Present)
 451             {
 452                 Fast486Exception(State, FAST486_EXCEPTION_SS);
 453                 return FALSE;
 454             }
 455         }
 456         else if (Segment == FAST486_REG_CS)
 457         {
 458             /* Loading the code segment */
 459             // TODO: Implement security checks, call gates, etc...
 460
 461             /* Update CPL */
 462             State->Cpl = GET_SEGMENT_RPL(Selector);
 463         }
 464         else
 465         {
 466             /* Loading a data segment */
 467
 468             if (!GdtEntry.SystemType)
 469             {
 470                 /* This is a special descriptor */
 471                 Fast486Exception(State, FAST486_EXCEPTION_GP);
 472                 return FALSE;
 473             }
 474
 475             if ((GET_SEGMENT_RPL(Selector) > GdtEntry.Dpl)
 476                 || (Fast486GetCurrentPrivLevel(State) > GdtEntry.Dpl))
 477             {
 478                 Fast486Exception(State, FAST486_EXCEPTION_GP);
 479                 return FALSE;
 480             }
 481
 482             if (!GdtEntry.Present)
 483             {
 484                 Fast486Exception(State, FAST486_EXCEPTION_NP);
 485                 return FALSE;
 486             }
 487         }
 488
 489         /* Update the cache entry */
 490         CachedDescriptor->Selector = Selector;
 491         CachedDescriptor->Base = GdtEntry.Base | (GdtEntry.BaseMid << 16) | (GdtEntry.BaseHigh << 24);
 492         CachedDescriptor->Limit = GdtEntry.Limit | (GdtEntry.LimitHigh << 16);
 493         CachedDescriptor->Accessed = GdtEntry.Accessed;
 494         CachedDescriptor->ReadWrite = GdtEntry.ReadWrite;
 495         CachedDescriptor->DirConf = GdtEntry.DirConf;
 496         CachedDescriptor->Executable = GdtEntry.Executable;
 497         CachedDescriptor->SystemType = GdtEntry.SystemType;
 498         CachedDescriptor->Dpl = GdtEntry.Dpl;
 499         CachedDescriptor->Present = GdtEntry.Present;
 500         CachedDescriptor->Size = GdtEntry.Size;
 501
 502         /* Check for page granularity */
 503         if (GdtEntry.Granularity) CachedDescriptor->Limit <<= 12;
 504     }
 505     else
 506     {
 507         /* Update the selector and base */
 508         CachedDescriptor->Selector = Selector;
 509         CachedDescriptor->Base = Selector << 4;
 510     }
 511
 512     return TRUE;
 513 }
 514
 515 FORCEINLINE
 516 BOOLEAN
 517 Fast486FetchByte(PFAST486_STATE State,
 518                  PUCHAR Data)
 519 {
 520     PFAST486_SEG_REG CachedDescriptor;
 521
 522     /* Get the cached descriptor of CS */
 523     CachedDescriptor = &State->SegmentRegs[FAST486_REG_CS];
 524
 525     /* Read from memory */
 526     if (!Fast486ReadMemory(State,
 527                            FAST486_REG_CS,
 528                            (CachedDescriptor->Size) ? State->InstPtr.Long
 529                                                     : State->InstPtr.LowWord,
 530                            TRUE,
 531                            Data,
 532                            sizeof(UCHAR)))
 533     {
 534         /* Exception occurred during instruction fetch */
 535         return FALSE;
 536     }
 537
 538     /* Advance the instruction pointer */
 539     if (CachedDescriptor->Size) State->InstPtr.Long++;
 540     else State->InstPtr.LowWord++;
 541
 542     return TRUE;
 543 }
 544
 545 FORCEINLINE
 546 BOOLEAN
 547 Fast486FetchWord(PFAST486_STATE State,
 548                  PUSHORT Data)
 549 {
 550     PFAST486_SEG_REG CachedDescriptor;
 551
 552     /* Get the cached descriptor of CS */
 553     CachedDescriptor = &State->SegmentRegs[FAST486_REG_CS];
 554
 555     /* Read from memory */
 556     // FIXME: Fix byte order on big-endian machines
 557     if (!Fast486ReadMemory(State,
 558                            FAST486_REG_CS,
 559                            (CachedDescriptor->Size) ? State->InstPtr.Long
 560                                                     : State->InstPtr.LowWord,
 561                            TRUE,
 562                            Data,
 563                            sizeof(USHORT)))
 564     {
 565         /* Exception occurred during instruction fetch */
 566         return FALSE;
 567     }
 568
 569     /* Advance the instruction pointer */
 570     if (CachedDescriptor->Size) State->InstPtr.Long += sizeof(USHORT);
 571     else State->InstPtr.LowWord += sizeof(USHORT);
 572
 573     return TRUE;
 574 }
 575
 576 FORCEINLINE
 577 BOOLEAN
 578 Fast486FetchDword(PFAST486_STATE State,
 579                   PULONG Data)
 580 {
 581     PFAST486_SEG_REG CachedDescriptor;
 582
 583     /* Get the cached descriptor of CS */
 584     CachedDescriptor = &State->SegmentRegs[FAST486_REG_CS];
 585
 586     /* Read from memory */
 587     // FIXME: Fix byte order on big-endian machines
 588     if (!Fast486ReadMemory(State,
 589                            FAST486_REG_CS,
 590                            (CachedDescriptor->Size) ? State->InstPtr.Long
 591                                                     : State->InstPtr.LowWord,
 592                            TRUE,
 593                            Data,
 594                            sizeof(ULONG)))
 595     {
 596         /* Exception occurred during instruction fetch */
 597         return FALSE;
 598     }
 599
 600     /* Advance the instruction pointer */
 601     if (CachedDescriptor->Size) State->InstPtr.Long += sizeof(ULONG);
 602     else State->InstPtr.LowWord += sizeof(ULONG);
 603
 604     return TRUE;
 605 }
 606
 607 FORCEINLINE
 608 BOOLEAN
 609 Fast486GetIntVector(PFAST486_STATE State,
 610                     UCHAR Number,
 611                     PFAST486_IDT_ENTRY IdtEntry)
 612 {
 613     ULONG FarPointer;
 614
 615     /* Check for protected mode */
 616     if (State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PE)
 617     {
 618         /* Read from the IDT */
 619         if (!Fast486ReadLinearMemory(State,
 620                                      State->Idtr.Address
 621                                      + Number * sizeof(*IdtEntry),
 622                                      IdtEntry,
 623                                      sizeof(*IdtEntry)))
 624         {
 625             /* Exception occurred */
 626             return FALSE;
 627         }
 628     }
 629     else
 630     {
 631         /* Read from the real-mode IVT */
 632
 633         /* Paging is always disabled in real mode */
 634         State->MemReadCallback(State,
 635                                State->Idtr.Address
 636                                + Number * sizeof(FarPointer),
 637                                &FarPointer,
 638                                sizeof(FarPointer));
 639
 640         /* Fill a fake IDT entry */
 641         IdtEntry->Offset = LOWORD(FarPointer);
 642         IdtEntry->Selector = HIWORD(FarPointer);
 643         IdtEntry->Zero = 0;
 644         IdtEntry->Type = FAST486_IDT_INT_GATE;
 645         IdtEntry->Storage = FALSE;
 646         IdtEntry->Dpl = 0;
 647         IdtEntry->Present = TRUE;
 648         IdtEntry->OffsetHigh = 0;
 649     }
 650
 651     return TRUE;
 652 }
 653
 654 FORCEINLINE
 655 BOOLEAN
 656 Fast486CalculateParity(UCHAR Number)
 657 {
 658     // See http://graphics.stanford.edu/~seander/bithacks.html#ParityLookupTable too...
 659     return (0x9669 >> ((Number & 0x0F) ^ (Number >> 4))) & 1;
 660 }
 661
 662 FORCEINLINE
 663 BOOLEAN
 664 Fast486ParseModRegRm(PFAST486_STATE State,
 665                      BOOLEAN AddressSize,
 666                      PFAST486_MOD_REG_RM ModRegRm)
 667 {
 668     UCHAR ModRmByte, Mode, RegMem;
 669
 670     /* Fetch the MOD REG R/M byte */
 671     if (!Fast486FetchByte(State, &ModRmByte))
 672     {
 673         /* Exception occurred */
 674         return FALSE;
 675     }
 676
 677     /* Unpack the mode and R/M */
 678     Mode = ModRmByte >> 6;
 679     RegMem = ModRmByte & 0x07;
 680
 681     /* Set the register operand */
 682     ModRegRm->Register = (ModRmByte >> 3) & 0x07;
 683
 684     /* Check the mode */
 685     if ((ModRmByte >> 6) == 3)
 686     {
 687         /* The second operand is also a register */
 688         ModRegRm->Memory = FALSE;
 689         ModRegRm->SecondRegister = RegMem;
 690
 691         /* Done parsing */
 692         return TRUE;
 693     }
 694
 695     /* The second operand is memory */
 696     ModRegRm->Memory = TRUE;
 697
 698     if (AddressSize)
 699     {
 700         if (RegMem == FAST486_REG_ESP)
 701         {
 702             UCHAR SibByte;
 703             ULONG Scale, Index, Base;
 704
 705             /* Fetch the SIB byte */
 706             if (!Fast486FetchByte(State, &SibByte))
 707             {
 708                 /* Exception occurred */
 709                 return FALSE;
 710             }
 711
 712             /* Unpack the scale, index and base */
 713             Scale = 1 << (SibByte >> 6);
 714             Index = (SibByte >> 3) & 0x07;
 715             if (Index != FAST486_REG_ESP) Index = State->GeneralRegs[Index].Long;
 716             else Index = 0;
 717
 718             if (((SibByte & 0x07) != FAST486_REG_EBP) || (Mode != 0))
 719             {
 720                 /* Use the register a base */
 721                 Base = State->GeneralRegs[SibByte & 0x07].Long;
 722             }
 723             else
 724             {
 725                 /* Fetch the base */
 726                 if (!Fast486FetchDword(State, &Base))
 727                 {
 728                     /* Exception occurred */
 729                     return FALSE;
 730                 }
 731             }
 732
 733             /* Calculate the address */
 734             ModRegRm->MemoryAddress = Base + Index * Scale;
 735         }
 736         else if (RegMem == FAST486_REG_EBP)
 737         {
 738             if (Mode) ModRegRm->MemoryAddress = State->GeneralRegs[FAST486_REG_EBP].Long;
 739             else ModRegRm->MemoryAddress = 0;
 740         }
 741         else
 742         {
 743             /* Get the base from the register */
 744             ModRegRm->MemoryAddress = State->GeneralRegs[RegMem].Long;
 745         }
 746
 747         /* Check if there is no segment override */
 748         if (!(State->PrefixFlags & FAST486_PREFIX_SEG))
 749         {
 750             /* Check if the default segment should be SS */
 751             if ((RegMem == FAST486_REG_EBP) && Mode)
 752             {
 753                 /* Add a SS: prefix */
 754                 State->PrefixFlags |= FAST486_PREFIX_SEG;
 755                 State->SegmentOverride = FAST486_REG_SS;
 756             }
 757         }
 758
 759         if (Mode == 1)
 760         {
 761             CHAR Offset;
 762
 763             /* Fetch the byte */
 764             if (!Fast486FetchByte(State, (PUCHAR)&Offset))
 765             {
 766                 /* Exception occurred */
 767                 return FALSE;
 768             }
 769
 770             /* Add the signed offset to the address */
 771             ModRegRm->MemoryAddress += (LONG)Offset;
 772         }
 773         else if ((Mode == 2) || ((Mode == 0) && (RegMem == FAST486_REG_EBP)))
 774         {
 775             LONG Offset;
 776
 777             /* Fetch the dword */
 778             if (!Fast486FetchDword(State, (PULONG)&Offset))
 779             {
 780                 /* Exception occurred */
 781                 return FALSE;
 782             }
 783
 784             /* Add the signed offset to the address */
 785             ModRegRm->MemoryAddress += Offset;
 786         }
 787     }
 788     else
 789     {
 790         /* Check the operand */
 791         switch (RegMem)
 792         {
 793             case 0:
 794             {
 795                 /* [BX + SI] */
 796                 ModRegRm->MemoryAddress = State->GeneralRegs[FAST486_REG_EBX].LowWord
 797                                            + State->GeneralRegs[FAST486_REG_ESI].LowWord;
 798
 799                 break;
 800             }
 801
 802             case 1:
 803             {
 804                 /* [BX + DI] */
 805                 ModRegRm->MemoryAddress = State->GeneralRegs[FAST486_REG_EBX].LowWord
 806                                            + State->GeneralRegs[FAST486_REG_EDI].LowWord;
 807
 808                 break;
 809             }
 810
 811             case 2:
 812             {
 813                 /* SS:[BP + SI] */
 814                 ModRegRm->MemoryAddress = State->GeneralRegs[FAST486_REG_EBP].LowWord
 815                                            + State->GeneralRegs[FAST486_REG_ESI].LowWord;
 816
 817                 break;
 818             }
 819
 820             case 3:
 821             {
 822                 /* SS:[BP + DI] */
 823                 ModRegRm->MemoryAddress = State->GeneralRegs[FAST486_REG_EBP].LowWord
 824                                            + State->GeneralRegs[FAST486_REG_EDI].LowWord;
 825
 826                 break;
 827             }
 828
 829             case 4:
 830             {
 831                 /* [SI] */
 832                 ModRegRm->MemoryAddress = State->GeneralRegs[FAST486_REG_ESI].LowWord;
 833
 834                 break;
 835             }
 836
 837             case 5:
 838             {
 839                 /* [DI] */
 840                 ModRegRm->MemoryAddress = State->GeneralRegs[FAST486_REG_EDI].LowWord;
 841
 842                 break;
 843             }
 844
 845             case 6:
 846             {
 847                 if (Mode)
 848                 {
 849                     /* [BP] */
 850                     ModRegRm->MemoryAddress = State->GeneralRegs[FAST486_REG_EBP].LowWord;
 851                 }
 852                 else
 853                 {
 854                     /* [constant] (added later) */
 855                     ModRegRm->MemoryAddress = 0;
 856                 }
 857
 858                 break;
 859             }
 860
 861             case 7:
 862             {
 863                 /* [BX] */
 864                 ModRegRm->MemoryAddress = State->GeneralRegs[FAST486_REG_EBX].LowWord;
 865
 866                 break;
 867             }
 868         }
 869
 870         /* Check if there is no segment override */
 871         if (!(State->PrefixFlags & FAST486_PREFIX_SEG))
 872         {
 873             /* Check if the default segment should be SS */
 874             if ((RegMem == 2) || (RegMem == 3) || ((RegMem == 6) && Mode))
 875             {
 876                 /* Add a SS: prefix */
 877                 State->PrefixFlags |= FAST486_PREFIX_SEG;
 878                 State->SegmentOverride = FAST486_REG_SS;
 879             }
 880         }
 881
 882         if (Mode == 1)
 883         {
 884             CHAR Offset;
 885
 886             /* Fetch the byte */
 887             if (!Fast486FetchByte(State, (PUCHAR)&Offset))
 888             {
 889                 /* Exception occurred */
 890                 return FALSE;
 891             }
 892
 893             /* Add the signed offset to the address */
 894             ModRegRm->MemoryAddress += (LONG)Offset;
 895         }
 896         else if ((Mode == 2) || ((Mode == 0) && (RegMem == 6)))
 897         {
 898             SHORT Offset;
 899
 900             /* Fetch the word */
 901             if (!Fast486FetchWord(State, (PUSHORT)&Offset))
 902             {
 903                 /* Exception occurred */
 904                 return FALSE;
 905             }
 906
 907             /* Add the signed offset to the address */
 908             ModRegRm->MemoryAddress += (LONG)Offset;
 909         }
 910
 911         /* Clear the top 16 bits */
 912         ModRegRm->MemoryAddress &= 0x0000FFFF;
 913     }
 914
 915     return TRUE;
 916 }
 917
 918 FORCEINLINE
 919 BOOLEAN
 920 Fast486ReadModrmByteOperands(PFAST486_STATE State,
 921                              PFAST486_MOD_REG_RM ModRegRm,
 922                              PUCHAR RegValue,
 923                              PUCHAR RmValue)
 924 {
 925     FAST486_SEG_REGS Segment = FAST486_REG_DS;
 926
 927     /* Get the register value */
 928     if (ModRegRm->Register & 0x04)
 929     {
 930         /* AH, CH, DH, BH */
 931         *RegValue = State->GeneralRegs[ModRegRm->Register & 0x03].HighByte;
 932     }
 933     else
 934     {
 935         /* AL, CL, DL, BL */
 936         *RegValue = State->GeneralRegs[ModRegRm->Register & 0x03].LowByte;
 937     }
 938
 939     if (!ModRegRm->Memory)
 940     {
 941         /* Get the second register value */
 942         if (ModRegRm->SecondRegister & 0x04)
 943         {
 944             /* AH, CH, DH, BH */
 945             *RmValue = State->GeneralRegs[ModRegRm->SecondRegister & 0x03].HighByte;
 946         }
 947         else
 948         {
 949             /* AL, CL, DL, BL */
 950             *RmValue = State->GeneralRegs[ModRegRm->SecondRegister & 0x03].LowByte;
 951         }
 952     }
 953     else
 954     {
 955         /* Check for the segment override */
 956         if (State->PrefixFlags & FAST486_PREFIX_SEG)
 957         {
 958             /* Use the override segment instead */
 959             Segment = State->SegmentOverride;
 960         }
 961
 962         /* Read memory */
 963         if (!Fast486ReadMemory(State,
 964                                Segment,
 965                                ModRegRm->MemoryAddress,
 966                                FALSE,
 967                                RmValue,
 968                                sizeof(UCHAR)))
 969         {
 970             /* Exception occurred */
 971             return FALSE;
 972         }
 973     }
 974
 975     return TRUE;
 976 }
 977
 978 FORCEINLINE
 979 BOOLEAN
 980 Fast486ReadModrmWordOperands(PFAST486_STATE State,
 981                              PFAST486_MOD_REG_RM ModRegRm,
 982                              PUSHORT RegValue,
 983                              PUSHORT RmValue)
 984 {
 985     FAST486_SEG_REGS Segment = FAST486_REG_DS;
 986
 987     /* Get the register value */
 988     *RegValue = State->GeneralRegs[ModRegRm->Register].LowWord;
 989
 990     if (!ModRegRm->Memory)
 991     {
 992         /* Get the second register value */
 993         *RmValue = State->GeneralRegs[ModRegRm->SecondRegister].LowWord;
 994     }
 995     else
 996     {
 997         /* Check for the segment override */
 998         if (State->PrefixFlags & FAST486_PREFIX_SEG)
 999         {
1000             /* Use the override segment instead */
1001             Segment = State->SegmentOverride;
1002         }
1003
1004         /* Read memory */
1005         if (!Fast486ReadMemory(State,
1006                                Segment,
1007                                ModRegRm->MemoryAddress,
1008                                FALSE,
1009                                RmValue,
1010                                sizeof(USHORT)))
1011         {
1012             /* Exception occurred */
1013             return FALSE;
1014         }
1015     }
1016
1017     return TRUE;
1018 }
1019
1020 FORCEINLINE
1021 BOOLEAN
1022 Fast486ReadModrmDwordOperands(PFAST486_STATE State,
1023                               PFAST486_MOD_REG_RM ModRegRm,
1024                               PULONG RegValue,
1025                               PULONG RmValue)
1026 {
1027     FAST486_SEG_REGS Segment = FAST486_REG_DS;
1028
1029     /* Get the register value */
1030     *RegValue = State->GeneralRegs[ModRegRm->Register].Long;
1031
1032     if (!ModRegRm->Memory)
1033     {
1034         /* Get the second register value */
1035         *RmValue = State->GeneralRegs[ModRegRm->SecondRegister].Long;
1036     }
1037     else
1038     {
1039         /* Check for the segment override */
1040         if (State->PrefixFlags & FAST486_PREFIX_SEG)
1041         {
1042             /* Use the override segment instead */
1043             Segment = State->SegmentOverride;
1044         }
1045
1046         /* Read memory */
1047         if (!Fast486ReadMemory(State,
1048                                Segment,
1049                                ModRegRm->MemoryAddress,
1050                                FALSE,
1051                                RmValue,
1052                                sizeof(ULONG)))
1053         {
1054             /* Exception occurred */
1055             return FALSE;
1056         }
1057     }
1058
1059     return TRUE;
1060 }
1061
1062 FORCEINLINE
1063 BOOLEAN
1064 Fast486WriteModrmByteOperands(PFAST486_STATE State,
1065                               PFAST486_MOD_REG_RM ModRegRm,
1066                               BOOLEAN WriteRegister,
1067                               UCHAR Value)
1068 {
1069     FAST486_SEG_REGS Segment = FAST486_REG_DS;
1070
1071     if (WriteRegister)
1072     {
1073         /* Store the value in the register */
1074         if (ModRegRm->Register & 0x04)
1075         {
1076             /* AH, CH, DH, BH */
1077             State->GeneralRegs[ModRegRm->Register & 0x03].HighByte = Value;
1078         }
1079         else
1080         {
1081             /* AL, CL, DL, BL */
1082             State->GeneralRegs[ModRegRm->Register & 0x03].LowByte = Value;
1083         }
1084     }
1085     else
1086     {
1087         if (!ModRegRm->Memory)
1088         {
1089             /* Store the value in the second register */
1090             if (ModRegRm->SecondRegister & 0x04)
1091             {
1092                 /* AH, CH, DH, BH */
1093                 State->GeneralRegs[ModRegRm->SecondRegister & 0x03].HighByte = Value;
1094             }
1095             else
1096             {
1097                 /* AL, CL, DL, BL */
1098                 State->GeneralRegs[ModRegRm->SecondRegister & 0x03].LowByte = Value;
1099             }
1100         }
1101         else
1102         {
1103             /* Check for the segment override */
1104             if (State->PrefixFlags & FAST486_PREFIX_SEG)
1105             {
1106                 /* Use the override segment instead */
1107                 Segment = State->SegmentOverride;
1108             }
1109
1110             /* Write memory */
1111             if (!Fast486WriteMemory(State,
1112                                     Segment,
1113                                     ModRegRm->MemoryAddress,
1114                                     &Value,
1115                                     sizeof(UCHAR)))
1116             {
1117                 /* Exception occurred */
1118                 return FALSE;
1119             }
1120         }
1121     }
1122
1123     return TRUE;
1124 }
1125
1126 FORCEINLINE
1127 BOOLEAN
1128 Fast486WriteModrmWordOperands(PFAST486_STATE State,
1129                               PFAST486_MOD_REG_RM ModRegRm,
1130                               BOOLEAN WriteRegister,
1131                               USHORT Value)
1132 {
1133     FAST486_SEG_REGS Segment = FAST486_REG_DS;
1134
1135     if (WriteRegister)
1136     {
1137         /* Store the value in the register */
1138         State->GeneralRegs[ModRegRm->Register].LowWord = Value;
1139     }
1140     else
1141     {
1142         if (!ModRegRm->Memory)
1143         {
1144             /* Store the value in the second register */
1145             State->GeneralRegs[ModRegRm->SecondRegister].LowWord = Value;
1146         }
1147         else
1148         {
1149             /* Check for the segment override */
1150             if (State->PrefixFlags & FAST486_PREFIX_SEG)
1151             {
1152                 /* Use the override segment instead */
1153                 Segment = State->SegmentOverride;
1154             }
1155
1156             /* Write memory */
1157             if (!Fast486WriteMemory(State,
1158                                     Segment,
1159                                     ModRegRm->MemoryAddress,
1160                                     &Value,
1161                                     sizeof(USHORT)))
1162             {
1163                 /* Exception occurred */
1164                 return FALSE;
1165             }
1166         }
1167     }
1168
1169     return TRUE;
1170 }
1171
1172 FORCEINLINE
1173 BOOLEAN
1174 Fast486WriteModrmDwordOperands(PFAST486_STATE State,
1175                                PFAST486_MOD_REG_RM ModRegRm,
1176                                BOOLEAN WriteRegister,
1177                                ULONG Value)
1178 {
1179     FAST486_SEG_REGS Segment = FAST486_REG_DS;
1180
1181     if (WriteRegister)
1182     {
1183         /* Store the value in the register */
1184         State->GeneralRegs[ModRegRm->Register].Long = Value;
1185     }
1186     else
1187     {
1188         if (!ModRegRm->Memory)
1189         {
1190             /* Store the value in the second register */
1191             State->GeneralRegs[ModRegRm->SecondRegister].Long = Value;
1192         }
1193         else
1194         {
1195             /* Check for the segment override */
1196             if (State->PrefixFlags & FAST486_PREFIX_SEG)
1197             {
1198                 /* Use the override segment instead */
1199                 Segment = State->SegmentOverride;
1200             }
1201
1202             /* Write memory */
1203             if (!Fast486WriteMemory(State,
1204                                     Segment,
1205                                     ModRegRm->MemoryAddress,
1206                                     &Value,
1207                                     sizeof(ULONG)))
1208             {
1209                 /* Exception occurred */
1210                 return FALSE;
1211             }
1212         }
1213     }
1214
1215     return TRUE;
1216 }
1217
1218 /* EOF */