1 #ifndef __NTOSKRNL_INCLUDE_INTERNAL_AMD64_KE_H
2 #define __NTOSKRNL_INCLUDE_INTERNAL_AMD64_KE_H
4 #define X86_EFLAGS_TF 0x00000100 /* Trap flag */
5 #define X86_EFLAGS_IF 0x00000200 /* Interrupt Enable flag */
6 #define X86_EFLAGS_IOPL 0x00003000 /* I/O Privilege Level bits */
7 #define X86_EFLAGS_NT 0x00004000 /* Nested Task flag */
8 #define X86_EFLAGS_RF 0x00010000 /* Resume flag */
9 #define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */
10 #define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */
12 #define X86_CR0_PE 0x00000001 /* enable Protected Mode */
13 #define X86_CR0_NE 0x00000020 /* enable native FPU error reporting */
14 #define X86_CR0_TS 0x00000008 /* enable exception on FPU instruction for task switch */
15 #define X86_CR0_EM 0x00000004 /* enable FPU emulation (disable FPU) */
16 #define X86_CR0_MP 0x00000002 /* enable FPU monitoring */
17 #define X86_CR0_WP 0x00010000 /* enable Write Protect (copy on write) */
18 #define X86_CR0_PG 0x80000000 /* enable Paging */
20 #define X86_CR4_PAE 0x00000020 /* enable physical address extensions */
21 #define X86_CR4_PGE 0x00000080 /* enable global pages */
22 #define X86_CR4_OSFXSR 0x00000200 /* enable FXSAVE/FXRSTOR instructions */
23 #define X86_CR4_OSXMMEXCPT 0x00000400 /* enable #XF exception */
26 #define X86_FEATURE_FPU 0x00000001 /* x87 FPU is present */
27 #define X86_FEATURE_VME 0x00000002 /* Virtual 8086 Extensions are present */
28 #define X86_FEATURE_DBG 0x00000004 /* Debugging extensions are present */
29 #define X86_FEATURE_PSE 0x00000008 /* Page Size Extension is present */
30 #define X86_FEATURE_TSC 0x00000010 /* time stamp counters are present */
31 #define X86_FEATURE_PAE 0x00000040 /* physical address extension is present */
32 #define X86_FEATURE_CX8 0x00000100 /* CMPXCHG8B instruction present */
33 #define X86_FEATURE_SYSCALL 0x00000800 /* SYSCALL/SYSRET support present */
34 #define X86_FEATURE_MTTR 0x00001000 /* Memory type range registers are present */
35 #define X86_FEATURE_PGE 0x00002000 /* Page Global Enable */
36 #define X86_FEATURE_CMOV 0x00008000 /* "Conditional move" instruction supported */
37 #define X86_FEATURE_PAT 0x00010000 /* Page Attribute Table is supported */
38 #define X86_FEATURE_DS 0x00200000 /* Debug Store is present */
39 #define X86_FEATURE_MMX 0x00800000 /* MMX extension present */
40 #define X86_FEATURE_FXSR 0x01000000 /* FXSAVE/FXRSTOR instructions present */
41 #define X86_FEATURE_SSE 0x02000000 /* SSE extension present */
42 #define X86_FEATURE_SSE2 0x04000000 /* SSE2 extension present */
43 #define X86_FEATURE_HT 0x10000000 /* Hyper-Threading present */
46 #define X86_FEATURE_SSE3 0x00000001 /* SSE3 is supported */
47 #define X86_FEATURE_MONITOR 0x00000008 /* SSE3 Monitor instructions supported */
48 #define X86_FEATURE_VMX 0x00000020 /* Virtual Machine eXtensions are available */
49 #define X86_FEATURE_SSSE3 0x00000200 /* Supplemental SSE3 are available */
50 #define X86_FEATURE_FMA3 0x00001000 /* Fused multiple-add supported */
51 #define X86_FEATURE_CX16 0x00002000 /* CMPXCHG16B instruction are available */
52 #define X86_FEATURE_PCID 0x00020000 /* Process Context IDentifiers are supported */
53 #define X86_FEATURE_SSE41 0x00080000 /* SSE 4.1 is supported */
54 #define X86_FEATURE_SSE42 0x00100000 /* SSE 4.2 is supported */
55 #define X86_FEATURE_POPCNT 0x00800000 /* POPCNT instruction is available */
56 #define X86_FEATURE_XSAVE 0x04000000 /* XSAVE family are available */
58 /* EDX extended flags */
59 #define X86_FEATURE_NX 0x00100000 /* NX support present */
61 #define X86_EXT_FEATURE_SSE3 0x00000001 /* SSE3 extension present */
62 #define X86_EXT_FEATURE_3DNOW 0x40000000 /* 3DNOW! extension present */
64 #define FRAME_EDITED 0xFFF8
66 #define X86_MSR_GSBASE 0xC0000101
67 #define X86_MSR_KERNEL_GSBASE 0xC0000102
68 #define X86_MSR_EFER 0xC0000080
69 #define X86_MSR_STAR 0xC0000081
70 #define X86_MSR_LSTAR 0xC0000082
71 #define X86_MSR_CSTAR 0xC0000083
72 #define X86_MSR_SFMASK 0xC0000084
74 #define EFER_SCE 0x0001
75 #define EFER_LME 0x0100
76 #define EFER_LMA 0x0400
77 #define EFER_NXE 0x0800
78 #define EFER_SVME 0x1000
79 #define EFER_FFXSR 0x4000
83 #define APIC_EOI_REGISTER 0xFFFFFFFFFFFE00B0ULL
89 typedef struct _KIDT_INIT
95 } KIDT_INIT
, *PKIDT_INIT
;
98 typedef struct _KI_INTERRUPT_DISPATCH_ENTRY
104 ULONG RelativeAddress
;
105 } KI_INTERRUPT_DISPATCH_ENTRY
, *PKI_INTERRUPT_DISPATCH_ENTRY
;
108 extern ULONG KeI386NpxPresent
;
109 extern ULONG KeI386XMMIPresent
;
110 extern ULONG KeI386FxsrPresent
;
111 extern ULONG KeI386CpuType
;
112 extern ULONG KeI386CpuStep
;
115 // INT3 is 1 byte long
117 #define KD_BREAKPOINT_TYPE UCHAR
118 #define KD_BREAKPOINT_SIZE sizeof(UCHAR)
119 #define KD_BREAKPOINT_VALUE 0xCC
122 // Macros for getting and setting special purpose registers in portable code
124 #define KeGetContextPc(Context) \
127 #define KeSetContextPc(Context, ProgramCounter) \
128 ((Context)->Rip = (ProgramCounter))
130 #define KeGetTrapFramePc(TrapFrame) \
133 #define KiGetLinkedTrapFrame(x) \
134 (PKTRAP_FRAME)((x)->TrapFrame)
136 #define KeGetContextReturnRegister(Context) \
139 #define KeSetContextReturnRegister(Context, ReturnValue) \
140 ((Context)->Rax = (ReturnValue))
143 // Macro to get trap and exception frame from a thread stack
145 #define KeGetTrapFrame(Thread) \
146 (PKTRAP_FRAME)((ULONG_PTR)((Thread)->InitialStack) - \
150 // Macro to get context switches from the PRCB
151 // All architectures but x86 have it in the PRCB's KeContextSwitches
153 #define KeGetContextSwitches(Prcb) \
154 (Prcb->KeContextSwitches)
157 // Macro to get the second level cache size field name which differs between
158 // CISC and RISC architectures, as the former has unified I/D cache
160 #define KiGetSecondLevelDCacheSize() ((PKIPCR)KeGetPcr())->SecondLevelCacheSize
162 #define KeGetExceptionFrame(Thread) \
163 (PKEXCEPTION_FRAME)((ULONG_PTR)KeGetTrapFrame(Thread) - \
164 sizeof(KEXCEPTION_FRAME))
167 // Returns the Interrupt State from a Trap Frame.
168 // ON = TRUE, OFF = FALSE
170 #define KeGetTrapFrameInterruptState(TrapFrame) \
171 BooleanFlagOn((TrapFrame)->EFlags, EFLAGS_INTERRUPT_MASK)
173 /* Diable interrupts and return whether they were enabled before */
176 KeDisableInterrupts(VOID
)
180 /* Get EFLAGS and check if the interrupt bit is set */
181 Flags
= __readeflags();
183 /* Disable interrupts */
185 return (Flags
& EFLAGS_INTERRUPT_MASK
) ? TRUE
: FALSE
;
188 /* Restore previous interrupt state */
191 KeRestoreInterrupts(BOOLEAN WereEnabled
)
193 if (WereEnabled
) _enable();
197 // Invalidates the TLB entry for a specified address
201 KeInvalidateTlbEntry(IN PVOID Address
)
203 /* Invalidate the TLB entry for this address */
209 KeFlushProcessTb(VOID
)
211 /* Flush the TLB by resetting CR3 */
212 __writecr3(__readcr3());
217 KeSweepICache(IN PVOID BaseAddress
,
221 // Always sweep the whole cache
223 UNREFERENCED_PARAMETER(BaseAddress
);
224 UNREFERENCED_PARAMETER(FlushSize
);
230 KiRundownThread(IN PKTHREAD Thread
)
233 DbgPrint("KiRundownThread is unimplemented\n");
239 /* Registers an interrupt handler with an IDT vector */
242 KeRegisterInterruptHandler(IN ULONG Vector
,
248 /* Get the entry from the HAL */
249 Entry
= HalVectorToIDTEntry(Vector
);
251 /* Now set the data */
252 Idt
= &KeGetPcr()->IdtBase
[Entry
];
253 Idt
->OffsetLow
= (ULONG_PTR
)Handler
& 0xffff;
254 Idt
->OffsetMiddle
= ((ULONG_PTR
)Handler
>> 16) & 0xffff;
255 Idt
->OffsetHigh
= (ULONG_PTR
)Handler
>> 32;
256 Idt
->Selector
= KGDT64_R0_CODE
;
265 /* Returns the registered interrupt handler for a given IDT vector */
268 KeQueryInterruptHandler(IN ULONG Vector
)
273 /* Get the entry from the HAL */
274 Entry
= HalVectorToIDTEntry(Vector
);
276 /* Get the IDT entry */
277 Idt
= &KeGetPcr()->IdtBase
[Entry
];
279 /* Return the address */
280 return (PVOID
)((ULONG64
)Idt
->OffsetHigh
<< 32 |
281 (ULONG64
)Idt
->OffsetMiddle
<< 16 |
282 (ULONG64
)Idt
->OffsetLow
);
289 /* Write 0 to the apic EOI register */
290 *((volatile ULONG
*)APIC_EOI_REGISTER
) = 0;
295 KiEndInterrupt(IN KIRQL Irql
,
296 IN PKTRAP_FRAME TrapFrame
)
298 /* Make sure this is from the clock handler */
299 ASSERT(TrapFrame
->ErrorCode
== 0xc10c4);
305 KiUserTrap(IN PKTRAP_FRAME TrapFrame
)
307 /* Anything else but Ring 0 is Ring 3 */
308 return !!(TrapFrame
->SegCs
& MODE_MASK
);
311 #define Ki386PerfEnd()
315 //VOID KiInitializeTss(IN PKTSS Tss, IN UINT64 Stack);
317 VOID
KiSwitchToBootStack(IN ULONG_PTR InitialStack
);
318 VOID
KiDivideErrorFault(VOID
);
319 VOID
KiDebugTrapOrFault(VOID
);
320 VOID
KiNmiInterrupt(VOID
);
321 VOID
KiBreakpointTrap(VOID
);
322 VOID
KiOverflowTrap(VOID
);
323 VOID
KiBoundFault(VOID
);
324 VOID
KiInvalidOpcodeFault(VOID
);
325 VOID
KiNpxNotAvailableFault(VOID
);
326 VOID
KiDoubleFaultAbort(VOID
);
327 VOID
KiNpxSegmentOverrunAbort(VOID
);
328 VOID
KiInvalidTssFault(VOID
);
329 VOID
KiSegmentNotPresentFault(VOID
);
330 VOID
KiStackFault(VOID
);
331 VOID
KiGeneralProtectionFault(VOID
);
332 VOID
KiPageFault(VOID
);
333 VOID
KiFloatingErrorFault(VOID
);
334 VOID
KiAlignmentFault(VOID
);
335 VOID
KiMcheckAbort(VOID
);
336 VOID
KiXmmException(VOID
);
337 VOID
KiApcInterrupt(VOID
);
338 VOID
KiRaiseAssertion(VOID
);
339 VOID
KiDebugServiceTrap(VOID
);
340 VOID
KiDpcInterrupt(VOID
);
341 VOID
KiIpiInterrupt(VOID
);
343 VOID
KiGdtPrepareForApplicationProcessorInit(ULONG Id
);
344 VOID
Ki386InitializeLdt(VOID
);
345 VOID
Ki386SetProcessorFeatures(VOID
);
346 VOID
KiGetCacheInformation(VOID
);
347 VOID
KiSetProcessorType(VOID
);
348 ULONG
KiGetFeatureBits(VOID
);
349 VOID
KiInitializeCpuFeatures(VOID
);
351 ULONG
KeAllocateGdtSelector(ULONG Desc
[2]);
352 VOID
KeFreeGdtSelector(ULONG Entry
);
353 VOID
NtEarlyInitVdm(VOID
);
354 VOID
KeApplicationProcessorInitDispatcher(VOID
);
355 VOID
KeCreateApplicationProcessorIdleThread(ULONG Id
);
358 Ke386InitThreadWithContext(PKTHREAD Thread
,
359 PKSYSTEM_ROUTINE SystemRoutine
,
360 PKSTART_ROUTINE StartRoutine
,
363 #define KeArchInitThreadWithContext(Thread,SystemRoutine,StartRoutine,StartContext,Context) \
364 Ke386InitThreadWithContext(Thread,SystemRoutine,StartRoutine,StartContext,Context)
366 #ifdef _NTOSKRNL_ /* FIXME: Move flags above to NDK instead of here */
368 KiThreadStartup(PKSYSTEM_ROUTINE SystemRoutine
,
369 PKSTART_ROUTINE StartRoutine
,
372 KTRAP_FRAME TrapFrame
);
378 extern NTKERNELAPI
volatile KSYSTEM_TIME KeTickCount
;
380 // win64 uses DMA macros, this one is not defined
384 HalAllocateAdapterChannel(
385 IN PADAPTER_OBJECT AdapterObject
,
386 IN PWAIT_CONTEXT_BLOCK Wcb
,
387 IN ULONG NumberOfMapRegisters
,
388 IN PDRIVER_CONTROL ExecutionRoutine
);
390 #endif /* __NTOSKRNL_INCLUDE_INTERNAL_AMD64_KE_H */