ntoskrnl/include/internal/i386/mm.h

   1 /*
   2  * Lowlevel memory managment definitions
   3  */
   4
   5 #pragma once
   6
   7 struct _EPROCESS;
   8 PULONG MmGetPageDirectory(VOID);
   9
  10 #ifdef _PAE_
  11 #define _MI_PAGING_LEVELS 3
  12 #else
  13 #define _MI_PAGING_LEVELS 2
  14 #endif
  15
  16 #define PAGE_MASK(x)            ((x)&(~0xfff))
  17 #define PAE_PAGE_MASK(x)        ((x)&(~0xfffLL))
  18
  19 /* MMPTE related defines */
  20 #define MM_EMPTY_PTE_LIST  ((ULONG)0xFFFFF)
  21 #define MM_EMPTY_LIST  ((ULONG_PTR)-1)
  22
  23 /* Base addresses of PTE and PDE */
  24 #define PAGETABLE_MAP       (0xc0000000)
  25 #define PAGEDIRECTORY_MAP   (0xc0000000 + (PAGETABLE_MAP / (1024)))
  26
  27 /* FIXME: These are different for PAE */
  28 #define PTE_BASE    0xC0000000
  29 #define PDE_BASE    0xC0300000
  30 #define PDE_TOP     0xC0300FFF
  31 #define PTE_TOP     0xC03FFFFF
  32 #define HYPER_SPACE 0xC0400000
  33 #define HYPER_SPACE_END 0xC07FFFFF
  34
  35 #define PTE_PER_PAGE 0x400
  36
  37 /* Converting address to a corresponding PDE or PTE entry */
  38 #define MiAddressToPde(x) \
  39     ((PMMPDE)(((((ULONG)(x)) >> 22) << 2) + PAGEDIRECTORY_MAP))
  40 #define MiAddressToPte(x) \
  41     ((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PAGETABLE_MAP))
  42 #define MiAddressToPteOffset(x) \
  43     ((((ULONG)(x)) << 10) >> 22)
  44
  45 //
  46 // Convert a PTE into a corresponding address
  47 //
  48 #define MiPteToAddress(PTE) ((PVOID)((ULONG)(PTE) << 10))
  49 #define MiPdeToAddress(PDE) ((PVOID)((ULONG)(PDE) << 20))
  50 #define MiPdeToPte(PDE) ((PMMPTE)MiPteToAddress(PDE))
  51 #define MiPteToPde(PTE) ((PMMPDE)MiAddressToPte(PTE))
  52
  53 #define ADDR_TO_PAGE_TABLE(v)  (((ULONG)(v)) / (1024 * PAGE_SIZE))
  54 #define ADDR_TO_PDE_OFFSET(v)  (((ULONG)(v)) / (1024 * PAGE_SIZE))
  55 #define ADDR_TO_PTE_OFFSET(v) ((((ULONG)(v)) % (1024 * PAGE_SIZE)) / PAGE_SIZE)
  56
  57 #define MiGetPdeOffset ADDR_TO_PDE_OFFSET
  58
  59 /* Easy accessing PFN in PTE */
  60 #define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber)
  61
  62 #define MI_MAKE_LOCAL_PAGE(x)      ((x)->u.Hard.Global = 0)
  63 #define MI_MAKE_DIRTY_PAGE(x)      ((x)->u.Hard.Dirty = 1)
  64 #define MI_MAKE_ACCESSED_PAGE(x)   ((x)->u.Hard.Accessed = 1)
  65 #define MI_PAGE_DISABLE_CACHE(x)   ((x)->u.Hard.CacheDisable = 1)
  66 #define MI_PAGE_WRITE_THROUGH(x)   ((x)->u.Hard.WriteThrough = 1)
  67 #define MI_PAGE_WRITE_COMBINED(x)  ((x)->u.Hard.WriteThrough = 0)
  68 #define MI_IS_PAGE_LARGE(x)        ((x)->u.Hard.LargePage == 1)
  69 #if !defined(CONFIG_SMP)
  70 #define MI_IS_PAGE_WRITEABLE(x)    ((x)->u.Hard.Write == 1)
  71 #else
  72 #define MI_IS_PAGE_WRITEABLE(x)    ((x)->u.Hard.Writable == 1)
  73 #endif
  74 #define MI_IS_PAGE_COPY_ON_WRITE(x)((x)->u.Hard.CopyOnWrite == 1)
  75 #define MI_IS_PAGE_DIRTY(x)        ((x)->u.Hard.Dirty == 1)
  76 #define MI_MAKE_OWNER_PAGE(x)      ((x)->u.Hard.Owner = 1)
  77 #if !defined(CONFIG_SMP)
  78 #define MI_MAKE_WRITE_PAGE(x)      ((x)->u.Hard.Write = 1)
  79 #else
  80 #define MI_MAKE_WRITE_PAGE(x)      ((x)->u.Hard.Writable = 1)
  81 #endif
  82
  83 #define PAGE_TO_SECTION_PAGE_DIRECTORY_OFFSET(x) \
  84     ((x) / (4*1024*1024))
  85
  86 #define PAGE_TO_SECTION_PAGE_TABLE_OFFSET(x) \
  87     ((((x)) % (4*1024*1024)) / (4*1024))
  88
  89 #define NR_SECTION_PAGE_TABLES              1024
  90 #define NR_SECTION_PAGE_ENTRIES             1024
  91
  92 #define TEB_BASE                            0x7FFDE000
  93
  94 #define MI_HYPERSPACE_PTES                  (256 - 1)
  95 #define MI_ZERO_PTES                        (32)
  96 #define MI_MAPPING_RANGE_START              (ULONG)HYPER_SPACE
  97 #define MI_MAPPING_RANGE_END                (MI_MAPPING_RANGE_START + \
  98                                                       MI_HYPERSPACE_PTES * PAGE_SIZE)
  99 #define MI_DUMMY_PTE                        (PMMPTE)((ULONG_PTR)MI_MAPPING_RANGE_END + \
 100                                                       PAGE_SIZE)
 101 #define MI_VAD_BITMAP                       (PMMPTE)((ULONG_PTR)MI_DUMMY_PTE + \
 102                                                       PAGE_SIZE)
 103 #define MI_WORKING_SET_LIST                 (PMMPTE)((ULONG_PTR)MI_VAD_BITMAP + \
 104                                                       PAGE_SIZE)
 105
 106 /* On x86, these two are the same */
 107 #define MMPDE MMPTE
 108 #define PMMPDE PMMPTE
 109
 110 /*
 111 * FIXME - different architectures have different cache line sizes...
 112 */
 113 #define MM_CACHE_LINE_SIZE                  32