2 * PROJECT: ReactOS Kernel
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: drivers/base/kdcom/arm/kdbg.c
5 * PURPOSE: Serial Port Kernel Debugging Transport Library
6 * PROGRAMMERS: ReactOS Portable Systems Group
9 /* INCLUDES *******************************************************************/
12 #include <arm/peripherals/pl011.h>
16 /* GLOBALS ********************************************************************/
18 CPPORT DefaultPort
= {0, 0, 0};
21 // We need to build this in the configuration root and use KeFindConfigurationEntry
22 // to recover it later.
26 /* REACTOS FUNCTIONS **********************************************************/
30 KdDebuggerInitialize1(IN PLOADER_PARAMETER_BLOCK LoaderBlock OPTIONAL
)
32 return STATUS_NOT_IMPLEMENTED
;
37 KdPortInitializeEx(IN PCPPORT PortInformation
,
38 IN ULONG ComPortNumber
)
40 ULONG Divider
, Remainder
, Fraction
;
41 ULONG Baudrate
= PortInformation
->BaudRate
;
44 // Calculate baudrate clock divider and remainder
46 Divider
= HACK
/ (16 * Baudrate
);
47 Remainder
= HACK
% (16 * Baudrate
);
50 // Calculate the fractional part
52 Fraction
= (8 * Remainder
/ Baudrate
) >> 1;
53 Fraction
+= (8 * Remainder
/ Baudrate
) & 1;
58 WRITE_REGISTER_ULONG(UART_PL011_CR
, 0);
63 WRITE_REGISTER_ULONG(UART_PL011_IBRD
, Divider
);
64 WRITE_REGISTER_ULONG(UART_PL011_FBRD
, Fraction
);
67 // Set 8 bits for data, 1 stop bit, no parity, FIFO enabled
69 WRITE_REGISTER_ULONG(UART_PL011_LCRH
,
70 UART_PL011_LCRH_WLEN_8
| UART_PL011_LCRH_FEN
);
73 // Clear and enable FIFO
75 WRITE_REGISTER_ULONG(UART_PL011_CR
,
76 UART_PL011_CR_UARTEN
|
88 KdPortGetByteEx(IN PCPPORT PortInformation
,
89 OUT PUCHAR ByteReceived
)
98 KdPortPutByteEx(IN PCPPORT PortInformation
,
104 while ((READ_REGISTER_ULONG(UART_PL01x_FR
) & UART_PL01x_FR_TXFF
) != 0);
107 // Send the character
109 WRITE_REGISTER_ULONG(UART_PL01x_DR
, ByteToSend
);