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[CLT2012]
[reactos.git] / ntoskrnl / kdbg / i386 / i386-dis.c
1 /*
2 * COPYRIGHT: See COPYING in the top level directory
3 * PROJECT: ReactOS kernel
4 * FILE: ntoskrnl/kdbg/i386/i386-dis.c
5 * PURPOSE: No purpose listed.
6 *
7 * PROGRAMMERS: No programmer listed.
8 */
9
10 #include <ntoskrnl.h>
11 #define NDEBUG
12 #include <debug.h>
13
14 /* ReactOS compatibility stuff. */
15 #define PARAMS(X) X
16 #define PTR void*
17 typedef enum bfd_flavour
18 {
19 bfd_target_unknown_flavour,
20 } bfd_flavour;
21 typedef enum bfd_architecture
22 {
23 bfd_arch_i386,
24 } bfd_arch;
25 typedef unsigned int bfd_vma;
26 typedef unsigned char bfd_byte;
27 enum bfd_endian { BFD_ENDIAN_BIG, BIG_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
28 typedef void* bfd;
29 typedef signed int bfd_signed_vma;
30 #define bfd_mach_x86_64_intel_syntax 0
31 #define bfd_mach_x86_64 1
32 #define bfd_mach_i386_i386_intel_syntax 2
33 #define bfd_mach_i386_i386 3
34 #define bfd_mach_i386_i8086 4
35 #define abort() DbgBreakPoint();
36 #define _(X) X
37 #define ATTRIBUTE_UNUSED
38 extern int sprintf(char *str, const char *format, ...);
39 #define sprintf_vma(BUF, VMA) sprintf(BUF, "0x%X", VMA)
40 struct disassemble_info;
41
42 int
43 print_insn_i386 (bfd_vma pc, struct disassemble_info *info);
44
45 int
46 KdbpPrintDisasm(void* Ignored, const char* fmt, ...)
47 {
48 va_list ap;
49 static char buffer[256];
50 int ret;
51
52 va_start(ap, fmt);
53 ret = vsprintf(buffer, fmt, ap);
54 DbgPrint("%s", buffer);
55 va_end(ap);
56 return(ret);
57 }
58
59 int
60 KdbpNopPrintDisasm(void* Ignored, const char* fmt, ...)
61 {
62 return(0);
63 }
64
65 static int
66 KdbpReadMemory(unsigned int Addr, unsigned char* Data, unsigned int Length,
67 struct disassemble_info * Ignored)
68 {
69 return KdbpSafeReadMemory(Data, (void *)Addr, Length); /* 0 means no error */
70 }
71
72 static void
73 KdbpMemoryError(int Status, unsigned int Addr,
74 struct disassemble_info * Ignored)
75 {
76 }
77
78 static void
79 KdbpPrintAddressInCode(unsigned int Addr, struct disassemble_info * Ignored)
80 {
81 if (!KdbSymPrintAddress((void*)Addr, NULL))
82 {
83 DbgPrint("<%08x>", Addr);
84 }
85 }
86
87 static void
88 KdbpNopPrintAddress(unsigned int Addr, struct disassemble_info * Ignored)
89 {
90 }
91
92 #include "dis-asm.h"
93
94 LONG
95 KdbpGetInstLength(IN ULONG Address)
96 {
97 disassemble_info info;
98
99 info.fprintf_func = KdbpNopPrintDisasm;
100 info.stream = NULL;
101 info.application_data = NULL;
102 info.flavour = bfd_target_unknown_flavour;
103 info.arch = bfd_arch_i386;
104 info.mach = bfd_mach_i386_i386;
105 info.insn_sets = 0;
106 info.flags = 0;
107 info.read_memory_func = KdbpReadMemory;
108 info.memory_error_func = KdbpMemoryError;
109 info.print_address_func = KdbpNopPrintAddress;
110 info.symbol_at_address_func = NULL;
111 info.buffer = NULL;
112 info.buffer_vma = info.buffer_length = 0;
113 info.bytes_per_chunk = 0;
114 info.display_endian = BIG_ENDIAN_LITTLE;
115 info.disassembler_options = NULL;
116
117 return(print_insn_i386(Address, &info));
118 }
119
120 LONG
121 KdbpDisassemble(IN ULONG Address, IN ULONG IntelSyntax)
122 {
123 disassemble_info info;
124
125 info.fprintf_func = KdbpPrintDisasm;
126 info.stream = NULL;
127 info.application_data = NULL;
128 info.flavour = bfd_target_unknown_flavour;
129 info.arch = bfd_arch_i386;
130 info.mach = IntelSyntax ? bfd_mach_i386_i386_intel_syntax : bfd_mach_i386_i386;
131 info.insn_sets = 0;
132 info.flags = 0;
133 info.read_memory_func = KdbpReadMemory;
134 info.memory_error_func = KdbpMemoryError;
135 info.print_address_func = KdbpPrintAddressInCode;
136 info.symbol_at_address_func = NULL;
137 info.buffer = NULL;
138 info.buffer_vma = info.buffer_length = 0;
139 info.bytes_per_chunk = 0;
140 info.display_endian = BIG_ENDIAN_LITTLE;
141 info.disassembler_options = NULL;
142
143 return(print_insn_i386(Address, &info));
144 }
145
146 /* Print i386 instructions for GDB, the GNU debugger.
147 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
148 2001
149 Free Software Foundation, Inc.
150
151 This file is part of GDB.
152
153 This program is free software; you can redistribute it and/or modify
154 it under the terms of the GNU General Public License as published by
155 the Free Software Foundation; either version 2 of the License, or
156 (at your option) any later version.
157
158 This program is distributed in the hope that it will be useful,
159 but WITHOUT ANY WARRANTY; without even the implied warranty of
160 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
161 GNU General Public License for more details.
162
163 You should have received a copy of the GNU General Public License along
164 with this program; if not, write to the Free Software Foundation, Inc.,
165 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
166 */
167
168 /*
169 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
170 * July 1988
171 * modified by John Hassey (hassey@dg-rtp.dg.com)
172 * x86-64 support added by Jan Hubicka (jh@suse.cz)
173 */
174
175 /*
176 * The main tables describing the instructions is essentially a copy
177 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
178 * Programmers Manual. Usually, there is a capital letter, followed
179 * by a small letter. The capital letter tell the addressing mode,
180 * and the small letter tells about the operand size. Refer to
181 * the Intel manual for details.
182 */
183
184 #include "dis-asm.h"
185 #if 0
186 #include "sysdep.h"
187 #include "opintl.h"
188 #endif
189
190 #define MAXLEN 20
191
192 #include <setjmp.h>
193
194 #ifndef UNIXWARE_COMPAT
195 /* Set non-zero for broken, compatible instructions. Set to zero for
196 non-broken opcodes. */
197 #define UNIXWARE_COMPAT 1
198 #endif
199
200 static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *));
201 static void ckprefix PARAMS ((void));
202 static const char *prefix_name PARAMS ((int, int));
203 static int print_insn PARAMS ((bfd_vma, disassemble_info *));
204 static void dofloat PARAMS ((int));
205 static void OP_ST PARAMS ((int, int));
206 static void OP_STi PARAMS ((int, int));
207 static int putop PARAMS ((const char *, int));
208 static void oappend PARAMS ((const char *));
209 static void append_seg PARAMS ((void));
210 static void OP_indirE PARAMS ((int, int));
211 static void print_operand_value PARAMS ((char *, int, bfd_vma));
212 static void OP_E PARAMS ((int, int));
213 static void OP_G PARAMS ((int, int));
214 static bfd_vma get64 PARAMS ((void));
215 static bfd_signed_vma get32 PARAMS ((void));
216 static bfd_signed_vma get32s PARAMS ((void));
217 static int get16 PARAMS ((void));
218 static void set_op PARAMS ((bfd_vma, int));
219 static void OP_REG PARAMS ((int, int));
220 static void OP_IMREG PARAMS ((int, int));
221 static void OP_I PARAMS ((int, int));
222 static void OP_I64 PARAMS ((int, int));
223 static void OP_sI PARAMS ((int, int));
224 static void OP_J PARAMS ((int, int));
225 static void OP_SEG PARAMS ((int, int));
226 static void OP_DIR PARAMS ((int, int));
227 static void OP_OFF PARAMS ((int, int));
228 static void OP_OFF64 PARAMS ((int, int));
229 static void ptr_reg PARAMS ((int, int));
230 static void OP_ESreg PARAMS ((int, int));
231 static void OP_DSreg PARAMS ((int, int));
232 static void OP_C PARAMS ((int, int));
233 static void OP_D PARAMS ((int, int));
234 static void OP_T PARAMS ((int, int));
235 static void OP_Rd PARAMS ((int, int));
236 static void OP_MMX PARAMS ((int, int));
237 static void OP_XMM PARAMS ((int, int));
238 static void OP_EM PARAMS ((int, int));
239 static void OP_EX PARAMS ((int, int));
240 static void OP_MS PARAMS ((int, int));
241 static void OP_XS PARAMS ((int, int));
242 static void OP_3DNowSuffix PARAMS ((int, int));
243 static void OP_SIMD_Suffix PARAMS ((int, int));
244 static void SIMD_Fixup PARAMS ((int, int));
245 static void BadOp PARAMS ((void));
246
247 struct dis_private {
248 /* Points to first byte not fetched. */
249 bfd_byte *max_fetched;
250 bfd_byte the_buffer[MAXLEN];
251 bfd_vma insn_start;
252 int orig_sizeflag;
253 jmp_buf bailout;
254 };
255
256 /* The opcode for the fwait instruction, which we treat as a prefix
257 when we can. */
258 #define FWAIT_OPCODE (0x9b)
259
260 /* Set to 1 for 64bit mode disassembly. */
261 static int mode_64bit;
262
263 /* Flags for the prefixes for the current instruction. See below. */
264 static int prefixes;
265
266 /* REX prefix the current instruction. See below. */
267 static int rex;
268 /* Bits of REX we've already used. */
269 static int rex_used;
270 #define REX_MODE64 8
271 #define REX_EXTX 4
272 #define REX_EXTY 2
273 #define REX_EXTZ 1
274 /* Mark parts used in the REX prefix. When we are testing for
275 empty prefix (for 8bit register REX extension), just mask it
276 out. Otherwise test for REX bit is excuse for existence of REX
277 only in case value is nonzero. */
278 #define USED_REX(value) \
279 { \
280 if (value) \
281 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
282 else \
283 rex_used |= 0x40; \
284 }
285
286 /* Flags for prefixes which we somehow handled when printing the
287 current instruction. */
288 static int used_prefixes;
289
290 /* Flags stored in PREFIXES. */
291 #define PREFIX_REPZ 1
292 #define PREFIX_REPNZ 2
293 #define PREFIX_LOCK 4
294 #define PREFIX_CS 8
295 #define PREFIX_SS 0x10
296 #define PREFIX_DS 0x20
297 #define PREFIX_ES 0x40
298 #define PREFIX_FS 0x80
299 #define PREFIX_GS 0x100
300 #define PREFIX_DATA 0x200
301 #define PREFIX_ADDR 0x400
302 #define PREFIX_FWAIT 0x800
303
304 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
305 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
306 on error. */
307 #define FETCH_DATA(info, addr) \
308 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
309 ? 1 : fetch_data ((info), (addr)))
310
311 static int
312 fetch_data (info, addr)
313 struct disassemble_info *info;
314 bfd_byte *addr;
315 {
316 int status;
317 struct dis_private *priv = (struct dis_private *) info->private_data;
318 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
319
320 status = (*info->read_memory_func) (start,
321 priv->max_fetched,
322 addr - priv->max_fetched,
323 info);
324 if (status != 0)
325 {
326 /* If we did manage to read at least one byte, then
327 print_insn_i386 will do something sensible. Otherwise, print
328 an error. We do that here because this is where we know
329 STATUS. */
330 if (priv->max_fetched == priv->the_buffer)
331 (*info->memory_error_func) (status, start, info);
332 longjmp (priv->bailout, 1);
333 }
334 else
335 priv->max_fetched = addr;
336 return 1;
337 }
338
339 #define XX NULL, 0
340
341 #define Eb OP_E, b_mode
342 #define Ev OP_E, v_mode
343 #define Ed OP_E, d_mode
344 #define indirEb OP_indirE, b_mode
345 #define indirEv OP_indirE, v_mode
346 #define Ew OP_E, w_mode
347 #define Ma OP_E, v_mode
348 #define M OP_E, 0 /* lea, lgdt, etc. */
349 #define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
350 #define Gb OP_G, b_mode
351 #define Gv OP_G, v_mode
352 #define Gd OP_G, d_mode
353 #define Gw OP_G, w_mode
354 #define Rd OP_Rd, d_mode
355 #define Rm OP_Rd, m_mode
356 #define Ib OP_I, b_mode
357 #define sIb OP_sI, b_mode /* sign extened byte */
358 #define Iv OP_I, v_mode
359 #define Iq OP_I, q_mode
360 #define Iv64 OP_I64, v_mode
361 #define Iw OP_I, w_mode
362 #define Jb OP_J, b_mode
363 #define Jv OP_J, v_mode
364 #define Cm OP_C, m_mode
365 #define Dm OP_D, m_mode
366 #define Td OP_T, d_mode
367
368 #define RMeAX OP_REG, eAX_reg
369 #define RMeBX OP_REG, eBX_reg
370 #define RMeCX OP_REG, eCX_reg
371 #define RMeDX OP_REG, eDX_reg
372 #define RMeSP OP_REG, eSP_reg
373 #define RMeBP OP_REG, eBP_reg
374 #define RMeSI OP_REG, eSI_reg
375 #define RMeDI OP_REG, eDI_reg
376 #define RMrAX OP_REG, rAX_reg
377 #define RMrBX OP_REG, rBX_reg
378 #define RMrCX OP_REG, rCX_reg
379 #define RMrDX OP_REG, rDX_reg
380 #define RMrSP OP_REG, rSP_reg
381 #define RMrBP OP_REG, rBP_reg
382 #define RMrSI OP_REG, rSI_reg
383 #define RMrDI OP_REG, rDI_reg
384 #define RMAL OP_REG, al_reg
385 #define RMAL OP_REG, al_reg
386 #define RMCL OP_REG, cl_reg
387 #define RMDL OP_REG, dl_reg
388 #define RMBL OP_REG, bl_reg
389 #define RMAH OP_REG, ah_reg
390 #define RMCH OP_REG, ch_reg
391 #define RMDH OP_REG, dh_reg
392 #define RMBH OP_REG, bh_reg
393 #define RMAX OP_REG, ax_reg
394 #define RMDX OP_REG, dx_reg
395
396 #define eAX OP_IMREG, eAX_reg
397 #define eBX OP_IMREG, eBX_reg
398 #define eCX OP_IMREG, eCX_reg
399 #define eDX OP_IMREG, eDX_reg
400 #define eSP OP_IMREG, eSP_reg
401 #define eBP OP_IMREG, eBP_reg
402 #define eSI OP_IMREG, eSI_reg
403 #define eDI OP_IMREG, eDI_reg
404 #define AL OP_IMREG, al_reg
405 #define AL OP_IMREG, al_reg
406 #define CL OP_IMREG, cl_reg
407 #define DL OP_IMREG, dl_reg
408 #define BL OP_IMREG, bl_reg
409 #define AH OP_IMREG, ah_reg
410 #define CH OP_IMREG, ch_reg
411 #define DH OP_IMREG, dh_reg
412 #define BH OP_IMREG, bh_reg
413 #define AX OP_IMREG, ax_reg
414 #define DX OP_IMREG, dx_reg
415 #define indirDX OP_IMREG, indir_dx_reg
416
417 #define Sw OP_SEG, w_mode
418 #define Ap OP_DIR, 0
419 #define Ob OP_OFF, b_mode
420 #define Ob64 OP_OFF64, b_mode
421 #define Ov OP_OFF, v_mode
422 #define Ov64 OP_OFF64, v_mode
423 #define Xb OP_DSreg, eSI_reg
424 #define Xv OP_DSreg, eSI_reg
425 #define Yb OP_ESreg, eDI_reg
426 #define Yv OP_ESreg, eDI_reg
427 #define DSBX OP_DSreg, eBX_reg
428
429 #define es OP_REG, es_reg
430 #define ss OP_REG, ss_reg
431 #define cs OP_REG, cs_reg
432 #define ds OP_REG, ds_reg
433 #define fs OP_REG, fs_reg
434 #define gs OP_REG, gs_reg
435
436 #define MX OP_MMX, 0
437 #define XM OP_XMM, 0
438 #define EM OP_EM, v_mode
439 #define EX OP_EX, v_mode
440 #define MS OP_MS, v_mode
441 #define XS OP_XS, v_mode
442 #define None OP_E, 0
443 #define OPSUF OP_3DNowSuffix, 0
444 #define OPSIMD OP_SIMD_Suffix, 0
445
446 #define cond_jump_flag NULL, cond_jump_mode
447 #define loop_jcxz_flag NULL, loop_jcxz_mode
448
449 /* bits in sizeflag */
450 #define SUFFIX_ALWAYS 4
451 #define AFLAG 2
452 #define DFLAG 1
453
454 #define b_mode 1 /* byte operand */
455 #define v_mode 2 /* operand size depends on prefixes */
456 #define w_mode 3 /* word operand */
457 #define d_mode 4 /* double word operand */
458 #define q_mode 5 /* quad word operand */
459 #define x_mode 6
460 #define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */
461 #define cond_jump_mode 8
462 #define loop_jcxz_mode 9
463
464 #define es_reg 100
465 #define cs_reg 101
466 #define ss_reg 102
467 #define ds_reg 103
468 #define fs_reg 104
469 #define gs_reg 105
470
471 #define eAX_reg 108
472 #define eCX_reg 109
473 #define eDX_reg 110
474 #define eBX_reg 111
475 #define eSP_reg 112
476 #define eBP_reg 113
477 #define eSI_reg 114
478 #define eDI_reg 115
479
480 #define al_reg 116
481 #define cl_reg 117
482 #define dl_reg 118
483 #define bl_reg 119
484 #define ah_reg 120
485 #define ch_reg 121
486 #define dh_reg 122
487 #define bh_reg 123
488
489 #define ax_reg 124
490 #define cx_reg 125
491 #define dx_reg 126
492 #define bx_reg 127
493 #define sp_reg 128
494 #define bp_reg 129
495 #define si_reg 130
496 #define di_reg 131
497
498 #define rAX_reg 132
499 #define rCX_reg 133
500 #define rDX_reg 134
501 #define rBX_reg 135
502 #define rSP_reg 136
503 #define rBP_reg 137
504 #define rSI_reg 138
505 #define rDI_reg 139
506
507 #define indir_dx_reg 150
508
509 #define FLOATCODE 1
510 #define USE_GROUPS 2
511 #define USE_PREFIX_USER_TABLE 3
512 #define X86_64_SPECIAL 4
513
514 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
515
516 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
517 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
518 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
519 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
520 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
521 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
522 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
523 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
524 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
525 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
526 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
527 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
528 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
529 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
530 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
531 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
532 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
533 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
534 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
535 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
536 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
537 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
538 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
539
540 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
541 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
542 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
543 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
544 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
545 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
546 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
547 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
548 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
549 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
550 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
551 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
552 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
553 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
554 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
555 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
556 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
557 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
558 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
559 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
560 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
561 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
562 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
563 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
564 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
565 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
566 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
567
568 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
569
570 typedef void (*op_rtn) PARAMS ((int bytemode, int sizeflag));
571
572 struct dis386 {
573 const char *name;
574 op_rtn op1;
575 int bytemode1;
576 op_rtn op2;
577 int bytemode2;
578 op_rtn op3;
579 int bytemode3;
580 };
581
582 /* Upper case letters in the instruction names here are macros.
583 'A' => print 'b' if no register operands or suffix_always is true
584 'B' => print 'b' if suffix_always is true
585 'E' => print 'e' if 32-bit form of jcxz
586 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
587 'H' => print ",pt" or ",pn" branch hint
588 'L' => print 'l' if suffix_always is true
589 'N' => print 'n' if instruction has no wait "prefix"
590 'O' => print 'd', or 'o'
591 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
592 . or suffix_always is true. print 'q' if rex prefix is present.
593 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
594 . is true
595 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
596 'S' => print 'w', 'l' or 'q' if suffix_always is true
597 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
598 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
599 'X' => print 's', 'd' depending on data16 prefix (for XMM)
600 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
601 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
602
603 Many of the above letters print nothing in Intel mode. See "putop"
604 for the details.
605
606 Braces '{' and '}', and vertical bars '|', indicate alternative
607 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
608 modes. In cases where there are only two alternatives, the X86_64
609 instruction is reserved, and "(bad)" is printed.
610 */
611
612 static const struct dis386 dis386[] = {
613 /* 00 */
614 { "addB", Eb, Gb, XX },
615 { "addS", Ev, Gv, XX },
616 { "addB", Gb, Eb, XX },
617 { "addS", Gv, Ev, XX },
618 { "addB", AL, Ib, XX },
619 { "addS", eAX, Iv, XX },
620 { "push{T|}", es, XX, XX },
621 { "pop{T|}", es, XX, XX },
622 /* 08 */
623 { "orB", Eb, Gb, XX },
624 { "orS", Ev, Gv, XX },
625 { "orB", Gb, Eb, XX },
626 { "orS", Gv, Ev, XX },
627 { "orB", AL, Ib, XX },
628 { "orS", eAX, Iv, XX },
629 { "push{T|}", cs, XX, XX },
630 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
631 /* 10 */
632 { "adcB", Eb, Gb, XX },
633 { "adcS", Ev, Gv, XX },
634 { "adcB", Gb, Eb, XX },
635 { "adcS", Gv, Ev, XX },
636 { "adcB", AL, Ib, XX },
637 { "adcS", eAX, Iv, XX },
638 { "push{T|}", ss, XX, XX },
639 { "popT|}", ss, XX, XX },
640 /* 18 */
641 { "sbbB", Eb, Gb, XX },
642 { "sbbS", Ev, Gv, XX },
643 { "sbbB", Gb, Eb, XX },
644 { "sbbS", Gv, Ev, XX },
645 { "sbbB", AL, Ib, XX },
646 { "sbbS", eAX, Iv, XX },
647 { "push{T|}", ds, XX, XX },
648 { "pop{T|}", ds, XX, XX },
649 /* 20 */
650 { "andB", Eb, Gb, XX },
651 { "andS", Ev, Gv, XX },
652 { "andB", Gb, Eb, XX },
653 { "andS", Gv, Ev, XX },
654 { "andB", AL, Ib, XX },
655 { "andS", eAX, Iv, XX },
656 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
657 { "daa{|}", XX, XX, XX },
658 /* 28 */
659 { "subB", Eb, Gb, XX },
660 { "subS", Ev, Gv, XX },
661 { "subB", Gb, Eb, XX },
662 { "subS", Gv, Ev, XX },
663 { "subB", AL, Ib, XX },
664 { "subS", eAX, Iv, XX },
665 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
666 { "das{|}", XX, XX, XX },
667 /* 30 */
668 { "xorB", Eb, Gb, XX },
669 { "xorS", Ev, Gv, XX },
670 { "xorB", Gb, Eb, XX },
671 { "xorS", Gv, Ev, XX },
672 { "xorB", AL, Ib, XX },
673 { "xorS", eAX, Iv, XX },
674 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
675 { "aaa{|}", XX, XX, XX },
676 /* 38 */
677 { "cmpB", Eb, Gb, XX },
678 { "cmpS", Ev, Gv, XX },
679 { "cmpB", Gb, Eb, XX },
680 { "cmpS", Gv, Ev, XX },
681 { "cmpB", AL, Ib, XX },
682 { "cmpS", eAX, Iv, XX },
683 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
684 { "aas{|}", XX, XX, XX },
685 /* 40 */
686 { "inc{S|}", RMeAX, XX, XX },
687 { "inc{S|}", RMeCX, XX, XX },
688 { "inc{S|}", RMeDX, XX, XX },
689 { "inc{S|}", RMeBX, XX, XX },
690 { "inc{S|}", RMeSP, XX, XX },
691 { "inc{S|}", RMeBP, XX, XX },
692 { "inc{S|}", RMeSI, XX, XX },
693 { "inc{S|}", RMeDI, XX, XX },
694 /* 48 */
695 { "dec{S|}", RMeAX, XX, XX },
696 { "dec{S|}", RMeCX, XX, XX },
697 { "dec{S|}", RMeDX, XX, XX },
698 { "dec{S|}", RMeBX, XX, XX },
699 { "dec{S|}", RMeSP, XX, XX },
700 { "dec{S|}", RMeBP, XX, XX },
701 { "dec{S|}", RMeSI, XX, XX },
702 { "dec{S|}", RMeDI, XX, XX },
703 /* 50 */
704 { "pushS", RMrAX, XX, XX },
705 { "pushS", RMrCX, XX, XX },
706 { "pushS", RMrDX, XX, XX },
707 { "pushS", RMrBX, XX, XX },
708 { "pushS", RMrSP, XX, XX },
709 { "pushS", RMrBP, XX, XX },
710 { "pushS", RMrSI, XX, XX },
711 { "pushS", RMrDI, XX, XX },
712 /* 58 */
713 { "popS", RMrAX, XX, XX },
714 { "popS", RMrCX, XX, XX },
715 { "popS", RMrDX, XX, XX },
716 { "popS", RMrBX, XX, XX },
717 { "popS", RMrSP, XX, XX },
718 { "popS", RMrBP, XX, XX },
719 { "popS", RMrSI, XX, XX },
720 { "popS", RMrDI, XX, XX },
721 /* 60 */
722 { "pusha{P|}", XX, XX, XX },
723 { "popa{P|}", XX, XX, XX },
724 { "bound{S|}", Gv, Ma, XX },
725 { X86_64_0 },
726 { "(bad)", XX, XX, XX }, /* seg fs */
727 { "(bad)", XX, XX, XX }, /* seg gs */
728 { "(bad)", XX, XX, XX }, /* op size prefix */
729 { "(bad)", XX, XX, XX }, /* adr size prefix */
730 /* 68 */
731 { "pushT", Iq, XX, XX },
732 { "imulS", Gv, Ev, Iv },
733 { "pushT", sIb, XX, XX },
734 { "imulS", Gv, Ev, sIb },
735 { "ins{b||b|}", Yb, indirDX, XX },
736 { "ins{R||R|}", Yv, indirDX, XX },
737 { "outs{b||b|}", indirDX, Xb, XX },
738 { "outs{R||R|}", indirDX, Xv, XX },
739 /* 70 */
740 { "joH", Jb, XX, cond_jump_flag },
741 { "jnoH", Jb, XX, cond_jump_flag },
742 { "jbH", Jb, XX, cond_jump_flag },
743 { "jaeH", Jb, XX, cond_jump_flag },
744 { "jeH", Jb, XX, cond_jump_flag },
745 { "jneH", Jb, XX, cond_jump_flag },
746 { "jbeH", Jb, XX, cond_jump_flag },
747 { "jaH", Jb, XX, cond_jump_flag },
748 /* 78 */
749 { "jsH", Jb, XX, cond_jump_flag },
750 { "jnsH", Jb, XX, cond_jump_flag },
751 { "jpH", Jb, XX, cond_jump_flag },
752 { "jnpH", Jb, XX, cond_jump_flag },
753 { "jlH", Jb, XX, cond_jump_flag },
754 { "jgeH", Jb, XX, cond_jump_flag },
755 { "jleH", Jb, XX, cond_jump_flag },
756 { "jgH", Jb, XX, cond_jump_flag },
757 /* 80 */
758 { GRP1b },
759 { GRP1S },
760 { "(bad)", XX, XX, XX },
761 { GRP1Ss },
762 { "testB", Eb, Gb, XX },
763 { "testS", Ev, Gv, XX },
764 { "xchgB", Eb, Gb, XX },
765 { "xchgS", Ev, Gv, XX },
766 /* 88 */
767 { "movB", Eb, Gb, XX },
768 { "movS", Ev, Gv, XX },
769 { "movB", Gb, Eb, XX },
770 { "movS", Gv, Ev, XX },
771 { "movQ", Ev, Sw, XX },
772 { "leaS", Gv, M, XX },
773 { "movQ", Sw, Ev, XX },
774 { "popU", Ev, XX, XX },
775 /* 90 */
776 { "nop", XX, XX, XX },
777 /* FIXME: NOP with REPz prefix is called PAUSE. */
778 { "xchgS", RMeCX, eAX, XX },
779 { "xchgS", RMeDX, eAX, XX },
780 { "xchgS", RMeBX, eAX, XX },
781 { "xchgS", RMeSP, eAX, XX },
782 { "xchgS", RMeBP, eAX, XX },
783 { "xchgS", RMeSI, eAX, XX },
784 { "xchgS", RMeDI, eAX, XX },
785 /* 98 */
786 { "cW{tR||tR|}", XX, XX, XX },
787 { "cR{tO||tO|}", XX, XX, XX },
788 { "lcall{T|}", Ap, XX, XX },
789 { "(bad)", XX, XX, XX }, /* fwait */
790 { "pushfT", XX, XX, XX },
791 { "popfT", XX, XX, XX },
792 { "sahf{|}", XX, XX, XX },
793 { "lahf{|}", XX, XX, XX },
794 /* a0 */
795 { "movB", AL, Ob64, XX },
796 { "movS", eAX, Ov64, XX },
797 { "movB", Ob64, AL, XX },
798 { "movS", Ov64, eAX, XX },
799 { "movs{b||b|}", Yb, Xb, XX },
800 { "movs{R||R|}", Yv, Xv, XX },
801 { "cmps{b||b|}", Xb, Yb, XX },
802 { "cmps{R||R|}", Xv, Yv, XX },
803 /* a8 */
804 { "testB", AL, Ib, XX },
805 { "testS", eAX, Iv, XX },
806 { "stosB", Yb, AL, XX },
807 { "stosS", Yv, eAX, XX },
808 { "lodsB", AL, Xb, XX },
809 { "lodsS", eAX, Xv, XX },
810 { "scasB", AL, Yb, XX },
811 { "scasS", eAX, Yv, XX },
812 /* b0 */
813 { "movB", RMAL, Ib, XX },
814 { "movB", RMCL, Ib, XX },
815 { "movB", RMDL, Ib, XX },
816 { "movB", RMBL, Ib, XX },
817 { "movB", RMAH, Ib, XX },
818 { "movB", RMCH, Ib, XX },
819 { "movB", RMDH, Ib, XX },
820 { "movB", RMBH, Ib, XX },
821 /* b8 */
822 { "movS", RMeAX, Iv64, XX },
823 { "movS", RMeCX, Iv64, XX },
824 { "movS", RMeDX, Iv64, XX },
825 { "movS", RMeBX, Iv64, XX },
826 { "movS", RMeSP, Iv64, XX },
827 { "movS", RMeBP, Iv64, XX },
828 { "movS", RMeSI, Iv64, XX },
829 { "movS", RMeDI, Iv64, XX },
830 /* c0 */
831 { GRP2b },
832 { GRP2S },
833 { "retT", Iw, XX, XX },
834 { "retT", XX, XX, XX },
835 { "les{S|}", Gv, Mp, XX },
836 { "ldsS", Gv, Mp, XX },
837 { "movA", Eb, Ib, XX },
838 { "movQ", Ev, Iv, XX },
839 /* c8 */
840 { "enterT", Iw, Ib, XX },
841 { "leaveT", XX, XX, XX },
842 { "lretP", Iw, XX, XX },
843 { "lretP", XX, XX, XX },
844 { "int3", XX, XX, XX },
845 { "int", Ib, XX, XX },
846 { "into{|}", XX, XX, XX },
847 { "iretP", XX, XX, XX },
848 /* d0 */
849 { GRP2b_one },
850 { GRP2S_one },
851 { GRP2b_cl },
852 { GRP2S_cl },
853 { "aam{|}", sIb, XX, XX },
854 { "aad{|}", sIb, XX, XX },
855 { "(bad)", XX, XX, XX },
856 { "xlat", DSBX, XX, XX },
857 /* d8 */
858 { FLOAT },
859 { FLOAT },
860 { FLOAT },
861 { FLOAT },
862 { FLOAT },
863 { FLOAT },
864 { FLOAT },
865 { FLOAT },
866 /* e0 */
867 { "loopneFH", Jb, XX, loop_jcxz_flag },
868 { "loopeFH", Jb, XX, loop_jcxz_flag },
869 { "loopFH", Jb, XX, loop_jcxz_flag },
870 { "jEcxzH", Jb, XX, loop_jcxz_flag },
871 { "inB", AL, Ib, XX },
872 { "inS", eAX, Ib, XX },
873 { "outB", Ib, AL, XX },
874 { "outS", Ib, eAX, XX },
875 /* e8 */
876 { "callT", Jv, XX, XX },
877 { "jmpT", Jv, XX, XX },
878 { "ljmp{T|}", Ap, XX, XX },
879 { "jmp", Jb, XX, XX },
880 { "inB", AL, indirDX, XX },
881 { "inS", eAX, indirDX, XX },
882 { "outB", indirDX, AL, XX },
883 { "outS", indirDX, eAX, XX },
884 /* f0 */
885 { "(bad)", XX, XX, XX }, /* lock prefix */
886 { "(bad)", XX, XX, XX },
887 { "(bad)", XX, XX, XX }, /* repne */
888 { "(bad)", XX, XX, XX }, /* repz */
889 { "hlt", XX, XX, XX },
890 { "cmc", XX, XX, XX },
891 { GRP3b },
892 { GRP3S },
893 /* f8 */
894 { "clc", XX, XX, XX },
895 { "stc", XX, XX, XX },
896 { "cli", XX, XX, XX },
897 { "sti", XX, XX, XX },
898 { "cld", XX, XX, XX },
899 { "std", XX, XX, XX },
900 { GRP4 },
901 { GRP5 },
902 };
903
904 static const struct dis386 dis386_twobyte[] = {
905 /* 00 */
906 { GRP6 },
907 { GRP7 },
908 { "larS", Gv, Ew, XX },
909 { "lslS", Gv, Ew, XX },
910 { "(bad)", XX, XX, XX },
911 { "syscall", XX, XX, XX },
912 { "clts", XX, XX, XX },
913 { "sysretP", XX, XX, XX },
914 /* 08 */
915 { "invd", XX, XX, XX },
916 { "wbinvd", XX, XX, XX },
917 { "(bad)", XX, XX, XX },
918 { "ud2a", XX, XX, XX },
919 { "(bad)", XX, XX, XX },
920 { GRPAMD },
921 { "femms", XX, XX, XX },
922 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
923 /* 10 */
924 { PREGRP8 },
925 { PREGRP9 },
926 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
927 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
928 { "unpcklpX", XM, EX, XX },
929 { "unpckhpX", XM, EX, XX },
930 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
931 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
932 /* 18 */
933 { GRP14 },
934 { "(bad)", XX, XX, XX },
935 { "(bad)", XX, XX, XX },
936 { "(bad)", XX, XX, XX },
937 { "(bad)", XX, XX, XX },
938 { "(bad)", XX, XX, XX },
939 { "(bad)", XX, XX, XX },
940 { "(bad)", XX, XX, XX },
941 /* 20 */
942 { "movL", Rm, Cm, XX },
943 { "movL", Rm, Dm, XX },
944 { "movL", Cm, Rm, XX },
945 { "movL", Dm, Rm, XX },
946 { "movL", Rd, Td, XX },
947 { "(bad)", XX, XX, XX },
948 { "movL", Td, Rd, XX },
949 { "(bad)", XX, XX, XX },
950 /* 28 */
951 { "movapX", XM, EX, XX },
952 { "movapX", EX, XM, XX },
953 { PREGRP2 },
954 { "movntpX", Ev, XM, XX },
955 { PREGRP4 },
956 { PREGRP3 },
957 { "ucomisX", XM,EX, XX },
958 { "comisX", XM,EX, XX },
959 /* 30 */
960 { "wrmsr", XX, XX, XX },
961 { "rdtsc", XX, XX, XX },
962 { "rdmsr", XX, XX, XX },
963 { "rdpmc", XX, XX, XX },
964 { "sysenter", XX, XX, XX },
965 { "sysexit", XX, XX, XX },
966 { "(bad)", XX, XX, XX },
967 { "(bad)", XX, XX, XX },
968 /* 38 */
969 { "(bad)", XX, XX, XX },
970 { "(bad)", XX, XX, XX },
971 { "(bad)", XX, XX, XX },
972 { "(bad)", XX, XX, XX },
973 { "(bad)", XX, XX, XX },
974 { "(bad)", XX, XX, XX },
975 { "(bad)", XX, XX, XX },
976 { "(bad)", XX, XX, XX },
977 /* 40 */
978 { "cmovo", Gv, Ev, XX },
979 { "cmovno", Gv, Ev, XX },
980 { "cmovb", Gv, Ev, XX },
981 { "cmovae", Gv, Ev, XX },
982 { "cmove", Gv, Ev, XX },
983 { "cmovne", Gv, Ev, XX },
984 { "cmovbe", Gv, Ev, XX },
985 { "cmova", Gv, Ev, XX },
986 /* 48 */
987 { "cmovs", Gv, Ev, XX },
988 { "cmovns", Gv, Ev, XX },
989 { "cmovp", Gv, Ev, XX },
990 { "cmovnp", Gv, Ev, XX },
991 { "cmovl", Gv, Ev, XX },
992 { "cmovge", Gv, Ev, XX },
993 { "cmovle", Gv, Ev, XX },
994 { "cmovg", Gv, Ev, XX },
995 /* 50 */
996 { "movmskpX", Gd, XS, XX },
997 { PREGRP13 },
998 { PREGRP12 },
999 { PREGRP11 },
1000 { "andpX", XM, EX, XX },
1001 { "andnpX", XM, EX, XX },
1002 { "orpX", XM, EX, XX },
1003 { "xorpX", XM, EX, XX },
1004 /* 58 */
1005 { PREGRP0 },
1006 { PREGRP10 },
1007 { PREGRP17 },
1008 { PREGRP16 },
1009 { PREGRP14 },
1010 { PREGRP7 },
1011 { PREGRP5 },
1012 { PREGRP6 },
1013 /* 60 */
1014 { "punpcklbw", MX, EM, XX },
1015 { "punpcklwd", MX, EM, XX },
1016 { "punpckldq", MX, EM, XX },
1017 { "packsswb", MX, EM, XX },
1018 { "pcmpgtb", MX, EM, XX },
1019 { "pcmpgtw", MX, EM, XX },
1020 { "pcmpgtd", MX, EM, XX },
1021 { "packuswb", MX, EM, XX },
1022 /* 68 */
1023 { "punpckhbw", MX, EM, XX },
1024 { "punpckhwd", MX, EM, XX },
1025 { "punpckhdq", MX, EM, XX },
1026 { "packssdw", MX, EM, XX },
1027 { PREGRP26 },
1028 { PREGRP24 },
1029 { "movd", MX, Ed, XX },
1030 { PREGRP19 },
1031 /* 70 */
1032 { PREGRP22 },
1033 { GRP10 },
1034 { GRP11 },
1035 { GRP12 },
1036 { "pcmpeqb", MX, EM, XX },
1037 { "pcmpeqw", MX, EM, XX },
1038 { "pcmpeqd", MX, EM, XX },
1039 { "emms", XX, XX, XX },
1040 /* 78 */
1041 { "(bad)", XX, XX, XX },
1042 { "(bad)", XX, XX, XX },
1043 { "(bad)", XX, XX, XX },
1044 { "(bad)", XX, XX, XX },
1045 { "(bad)", XX, XX, XX },
1046 { "(bad)", XX, XX, XX },
1047 { PREGRP23 },
1048 { PREGRP20 },
1049 /* 80 */
1050 { "joH", Jv, XX, cond_jump_flag },
1051 { "jnoH", Jv, XX, cond_jump_flag },
1052 { "jbH", Jv, XX, cond_jump_flag },
1053 { "jaeH", Jv, XX, cond_jump_flag },
1054 { "jeH", Jv, XX, cond_jump_flag },
1055 { "jneH", Jv, XX, cond_jump_flag },
1056 { "jbeH", Jv, XX, cond_jump_flag },
1057 { "jaH", Jv, XX, cond_jump_flag },
1058 /* 88 */
1059 { "jsH", Jv, XX, cond_jump_flag },
1060 { "jnsH", Jv, XX, cond_jump_flag },
1061 { "jpH", Jv, XX, cond_jump_flag },
1062 { "jnpH", Jv, XX, cond_jump_flag },
1063 { "jlH", Jv, XX, cond_jump_flag },
1064 { "jgeH", Jv, XX, cond_jump_flag },
1065 { "jleH", Jv, XX, cond_jump_flag },
1066 { "jgH", Jv, XX, cond_jump_flag },
1067 /* 90 */
1068 { "seto", Eb, XX, XX },
1069 { "setno", Eb, XX, XX },
1070 { "setb", Eb, XX, XX },
1071 { "setae", Eb, XX, XX },
1072 { "sete", Eb, XX, XX },
1073 { "setne", Eb, XX, XX },
1074 { "setbe", Eb, XX, XX },
1075 { "seta", Eb, XX, XX },
1076 /* 98 */
1077 { "sets", Eb, XX, XX },
1078 { "setns", Eb, XX, XX },
1079 { "setp", Eb, XX, XX },
1080 { "setnp", Eb, XX, XX },
1081 { "setl", Eb, XX, XX },
1082 { "setge", Eb, XX, XX },
1083 { "setle", Eb, XX, XX },
1084 { "setg", Eb, XX, XX },
1085 /* a0 */
1086 { "pushT", fs, XX, XX },
1087 { "popT", fs, XX, XX },
1088 { "cpuid", XX, XX, XX },
1089 { "btS", Ev, Gv, XX },
1090 { "shldS", Ev, Gv, Ib },
1091 { "shldS", Ev, Gv, CL },
1092 { "(bad)", XX, XX, XX },
1093 { "(bad)", XX, XX, XX },
1094 /* a8 */
1095 { "pushT", gs, XX, XX },
1096 { "popT", gs, XX, XX },
1097 { "rsm", XX, XX, XX },
1098 { "btsS", Ev, Gv, XX },
1099 { "shrdS", Ev, Gv, Ib },
1100 { "shrdS", Ev, Gv, CL },
1101 { GRP13 },
1102 { "imulS", Gv, Ev, XX },
1103 /* b0 */
1104 { "cmpxchgB", Eb, Gb, XX },
1105 { "cmpxchgS", Ev, Gv, XX },
1106 { "lssS", Gv, Mp, XX },
1107 { "btrS", Ev, Gv, XX },
1108 { "lfsS", Gv, Mp, XX },
1109 { "lgsS", Gv, Mp, XX },
1110 { "movz{bR|x|bR|x}", Gv, Eb, XX },
1111 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
1112 /* b8 */
1113 { "(bad)", XX, XX, XX },
1114 { "ud2b", XX, XX, XX },
1115 { GRP8 },
1116 { "btcS", Ev, Gv, XX },
1117 { "bsfS", Gv, Ev, XX },
1118 { "bsrS", Gv, Ev, XX },
1119 { "movs{bR|x|bR|x}", Gv, Eb, XX },
1120 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
1121 /* c0 */
1122 { "xaddB", Eb, Gb, XX },
1123 { "xaddS", Ev, Gv, XX },
1124 { PREGRP1 },
1125 { "movntiS", Ev, Gv, XX },
1126 { "pinsrw", MX, Ed, Ib },
1127 { "pextrw", Gd, MS, Ib },
1128 { "shufpX", XM, EX, Ib },
1129 { GRP9 },
1130 /* c8 */
1131 { "bswap", RMeAX, XX, XX },
1132 { "bswap", RMeCX, XX, XX },
1133 { "bswap", RMeDX, XX, XX },
1134 { "bswap", RMeBX, XX, XX },
1135 { "bswap", RMeSP, XX, XX },
1136 { "bswap", RMeBP, XX, XX },
1137 { "bswap", RMeSI, XX, XX },
1138 { "bswap", RMeDI, XX, XX },
1139 /* d0 */
1140 { "(bad)", XX, XX, XX },
1141 { "psrlw", MX, EM, XX },
1142 { "psrld", MX, EM, XX },
1143 { "psrlq", MX, EM, XX },
1144 { "paddq", MX, EM, XX },
1145 { "pmullw", MX, EM, XX },
1146 { PREGRP21 },
1147 { "pmovmskb", Gd, MS, XX },
1148 /* d8 */
1149 { "psubusb", MX, EM, XX },
1150 { "psubusw", MX, EM, XX },
1151 { "pminub", MX, EM, XX },
1152 { "pand", MX, EM, XX },
1153 { "paddusb", MX, EM, XX },
1154 { "paddusw", MX, EM, XX },
1155 { "pmaxub", MX, EM, XX },
1156 { "pandn", MX, EM, XX },
1157 /* e0 */
1158 { "pavgb", MX, EM, XX },
1159 { "psraw", MX, EM, XX },
1160 { "psrad", MX, EM, XX },
1161 { "pavgw", MX, EM, XX },
1162 { "pmulhuw", MX, EM, XX },
1163 { "pmulhw", MX, EM, XX },
1164 { PREGRP15 },
1165 { PREGRP25 },
1166 /* e8 */
1167 { "psubsb", MX, EM, XX },
1168 { "psubsw", MX, EM, XX },
1169 { "pminsw", MX, EM, XX },
1170 { "por", MX, EM, XX },
1171 { "paddsb", MX, EM, XX },
1172 { "paddsw", MX, EM, XX },
1173 { "pmaxsw", MX, EM, XX },
1174 { "pxor", MX, EM, XX },
1175 /* f0 */
1176 { "(bad)", XX, XX, XX },
1177 { "psllw", MX, EM, XX },
1178 { "pslld", MX, EM, XX },
1179 { "psllq", MX, EM, XX },
1180 { "pmuludq", MX, EM, XX },
1181 { "pmaddwd", MX, EM, XX },
1182 { "psadbw", MX, EM, XX },
1183 { PREGRP18 },
1184 /* f8 */
1185 { "psubb", MX, EM, XX },
1186 { "psubw", MX, EM, XX },
1187 { "psubd", MX, EM, XX },
1188 { "psubq", MX, EM, XX },
1189 { "paddb", MX, EM, XX },
1190 { "paddw", MX, EM, XX },
1191 { "paddd", MX, EM, XX },
1192 { "(bad)", XX, XX, XX }
1193 };
1194
1195 static const unsigned char onebyte_has_modrm[256] = {
1196 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1197 /* ------------------------------- */
1198 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1199 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1200 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1201 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1202 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1203 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1204 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1205 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1206 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1207 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1208 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1209 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1210 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1211 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1212 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1213 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1214 /* ------------------------------- */
1215 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1216 };
1217
1218 static const unsigned char twobyte_has_modrm[256] = {
1219 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1220 /* ------------------------------- */
1221 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1222 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1223 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1224 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1225 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1226 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1227 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1228 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */
1229 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1230 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1231 /* a0 */ 0,0,0,1,1,1,0,0,0,0,0,1,1,1,1,1, /* af */
1232 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1233 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1234 /* d0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1235 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1236 /* f0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1237 /* ------------------------------- */
1238 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1239 };
1240
1241 static const unsigned char twobyte_uses_SSE_prefix[256] = {
1242 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1243 /* ------------------------------- */
1244 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1245 /* 10 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1246 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1247 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1248 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1249 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1250 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1251 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1252 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1253 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1254 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1255 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1256 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1257 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1258 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1259 /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1260 /* ------------------------------- */
1261 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1262 };
1263
1264 static char obuf[100];
1265 static char *obufp;
1266 static char scratchbuf[100];
1267 static unsigned char *start_codep;
1268 static unsigned char *insn_codep;
1269 static unsigned char *codep;
1270 static disassemble_info *the_info;
1271 static int mod;
1272 static int rm;
1273 static int reg;
1274 static unsigned char need_modrm;
1275
1276 /* If we are accessing mod/rm/reg without need_modrm set, then the
1277 values are stale. Hitting this abort likely indicates that you
1278 need to update onebyte_has_modrm or twobyte_has_modrm. */
1279 #define MODRM_CHECK if (!need_modrm) abort ()
1280
1281 static const char **names64;
1282 static const char **names32;
1283 static const char **names16;
1284 static const char **names8;
1285 static const char **names8rex;
1286 static const char **names_seg;
1287 static const char **index16;
1288
1289 static const char *intel_names64[] = {
1290 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1291 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1292 };
1293 static const char *intel_names32[] = {
1294 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1295 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1296 };
1297 static const char *intel_names16[] = {
1298 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1299 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1300 };
1301 static const char *intel_names8[] = {
1302 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1303 };
1304 static const char *intel_names8rex[] = {
1305 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1306 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1307 };
1308 static const char *intel_names_seg[] = {
1309 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1310 };
1311 static const char *intel_index16[] = {
1312 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1313 };
1314
1315 static const char *att_names64[] = {
1316 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1317 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1318 };
1319 static const char *att_names32[] = {
1320 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1321 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1322 };
1323 static const char *att_names16[] = {
1324 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1325 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1326 };
1327 static const char *att_names8[] = {
1328 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1329 };
1330 static const char *att_names8rex[] = {
1331 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1332 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1333 };
1334 static const char *att_names_seg[] = {
1335 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1336 };
1337 static const char *att_index16[] = {
1338 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1339 };
1340
1341 static const struct dis386 grps[][8] = {
1342 /* GRP1b */
1343 {
1344 { "addA", Eb, Ib, XX },
1345 { "orA", Eb, Ib, XX },
1346 { "adcA", Eb, Ib, XX },
1347 { "sbbA", Eb, Ib, XX },
1348 { "andA", Eb, Ib, XX },
1349 { "subA", Eb, Ib, XX },
1350 { "xorA", Eb, Ib, XX },
1351 { "cmpA", Eb, Ib, XX }
1352 },
1353 /* GRP1S */
1354 {
1355 { "addQ", Ev, Iv, XX },
1356 { "orQ", Ev, Iv, XX },
1357 { "adcQ", Ev, Iv, XX },
1358 { "sbbQ", Ev, Iv, XX },
1359 { "andQ", Ev, Iv, XX },
1360 { "subQ", Ev, Iv, XX },
1361 { "xorQ", Ev, Iv, XX },
1362 { "cmpQ", Ev, Iv, XX }
1363 },
1364 /* GRP1Ss */
1365 {
1366 { "addQ", Ev, sIb, XX },
1367 { "orQ", Ev, sIb, XX },
1368 { "adcQ", Ev, sIb, XX },
1369 { "sbbQ", Ev, sIb, XX },
1370 { "andQ", Ev, sIb, XX },
1371 { "subQ", Ev, sIb, XX },
1372 { "xorQ", Ev, sIb, XX },
1373 { "cmpQ", Ev, sIb, XX }
1374 },
1375 /* GRP2b */
1376 {
1377 { "rolA", Eb, Ib, XX },
1378 { "rorA", Eb, Ib, XX },
1379 { "rclA", Eb, Ib, XX },
1380 { "rcrA", Eb, Ib, XX },
1381 { "shlA", Eb, Ib, XX },
1382 { "shrA", Eb, Ib, XX },
1383 { "(bad)", XX, XX, XX },
1384 { "sarA", Eb, Ib, XX },
1385 },
1386 /* GRP2S */
1387 {
1388 { "rolQ", Ev, Ib, XX },
1389 { "rorQ", Ev, Ib, XX },
1390 { "rclQ", Ev, Ib, XX },
1391 { "rcrQ", Ev, Ib, XX },
1392 { "shlQ", Ev, Ib, XX },
1393 { "shrQ", Ev, Ib, XX },
1394 { "(bad)", XX, XX, XX },
1395 { "sarQ", Ev, Ib, XX },
1396 },
1397 /* GRP2b_one */
1398 {
1399 { "rolA", Eb, XX, XX },
1400 { "rorA", Eb, XX, XX },
1401 { "rclA", Eb, XX, XX },
1402 { "rcrA", Eb, XX, XX },
1403 { "shlA", Eb, XX, XX },
1404 { "shrA", Eb, XX, XX },
1405 { "(bad)", XX, XX, XX },
1406 { "sarA", Eb, XX, XX },
1407 },
1408 /* GRP2S_one */
1409 {
1410 { "rolQ", Ev, XX, XX },
1411 { "rorQ", Ev, XX, XX },
1412 { "rclQ", Ev, XX, XX },
1413 { "rcrQ", Ev, XX, XX },
1414 { "shlQ", Ev, XX, XX },
1415 { "shrQ", Ev, XX, XX },
1416 { "(bad)", XX, XX, XX},
1417 { "sarQ", Ev, XX, XX },
1418 },
1419 /* GRP2b_cl */
1420 {
1421 { "rolA", Eb, CL, XX },
1422 { "rorA", Eb, CL, XX },
1423 { "rclA", Eb, CL, XX },
1424 { "rcrA", Eb, CL, XX },
1425 { "shlA", Eb, CL, XX },
1426 { "shrA", Eb, CL, XX },
1427 { "(bad)", XX, XX, XX },
1428 { "sarA", Eb, CL, XX },
1429 },
1430 /* GRP2S_cl */
1431 {
1432 { "rolQ", Ev, CL, XX },
1433 { "rorQ", Ev, CL, XX },
1434 { "rclQ", Ev, CL, XX },
1435 { "rcrQ", Ev, CL, XX },
1436 { "shlQ", Ev, CL, XX },
1437 { "shrQ", Ev, CL, XX },
1438 { "(bad)", XX, XX, XX },
1439 { "sarQ", Ev, CL, XX }
1440 },
1441 /* GRP3b */
1442 {
1443 { "testA", Eb, Ib, XX },
1444 { "(bad)", Eb, XX, XX },
1445 { "notA", Eb, XX, XX },
1446 { "negA", Eb, XX, XX },
1447 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1448 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1449 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1450 { "idivA", Eb, XX, XX } /* and idiv for consistency. */
1451 },
1452 /* GRP3S */
1453 {
1454 { "testQ", Ev, Iv, XX },
1455 { "(bad)", XX, XX, XX },
1456 { "notQ", Ev, XX, XX },
1457 { "negQ", Ev, XX, XX },
1458 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1459 { "imulQ", Ev, XX, XX },
1460 { "divQ", Ev, XX, XX },
1461 { "idivQ", Ev, XX, XX },
1462 },
1463 /* GRP4 */
1464 {
1465 { "incA", Eb, XX, XX },
1466 { "decA", Eb, XX, XX },
1467 { "(bad)", XX, XX, XX },
1468 { "(bad)", XX, XX, XX },
1469 { "(bad)", XX, XX, XX },
1470 { "(bad)", XX, XX, XX },
1471 { "(bad)", XX, XX, XX },
1472 { "(bad)", XX, XX, XX },
1473 },
1474 /* GRP5 */
1475 {
1476 { "incQ", Ev, XX, XX },
1477 { "decQ", Ev, XX, XX },
1478 { "callT", indirEv, XX, XX },
1479 { "lcallT", indirEv, XX, XX },
1480 { "jmpT", indirEv, XX, XX },
1481 { "ljmpT", indirEv, XX, XX },
1482 { "pushU", Ev, XX, XX },
1483 { "(bad)", XX, XX, XX },
1484 },
1485 /* GRP6 */
1486 {
1487 { "sldtQ", Ev, XX, XX },
1488 { "strQ", Ev, XX, XX },
1489 { "lldt", Ew, XX, XX },
1490 { "ltr", Ew, XX, XX },
1491 { "verr", Ew, XX, XX },
1492 { "verw", Ew, XX, XX },
1493 { "(bad)", XX, XX, XX },
1494 { "(bad)", XX, XX, XX }
1495 },
1496 /* GRP7 */
1497 {
1498 { "sgdtQ", M, XX, XX },
1499 { "sidtQ", M, XX, XX },
1500 { "lgdtQ", M, XX, XX },
1501 { "lidtQ", M, XX, XX },
1502 { "smswQ", Ev, XX, XX },
1503 { "(bad)", XX, XX, XX },
1504 { "lmsw", Ew, XX, XX },
1505 { "invlpg", Ew, XX, XX },
1506 },
1507 /* GRP8 */
1508 {
1509 { "(bad)", XX, XX, XX },
1510 { "(bad)", XX, XX, XX },
1511 { "(bad)", XX, XX, XX },
1512 { "(bad)", XX, XX, XX },
1513 { "btQ", Ev, Ib, XX },
1514 { "btsQ", Ev, Ib, XX },
1515 { "btrQ", Ev, Ib, XX },
1516 { "btcQ", Ev, Ib, XX },
1517 },
1518 /* GRP9 */
1519 {
1520 { "(bad)", XX, XX, XX },
1521 { "cmpxchg8b", Ev, XX, XX },
1522 { "(bad)", XX, XX, XX },
1523 { "(bad)", XX, XX, XX },
1524 { "(bad)", XX, XX, XX },
1525 { "(bad)", XX, XX, XX },
1526 { "(bad)", XX, XX, XX },
1527 { "(bad)", XX, XX, XX },
1528 },
1529 /* GRP10 */
1530 {
1531 { "(bad)", XX, XX, XX },
1532 { "(bad)", XX, XX, XX },
1533 { "psrlw", MS, Ib, XX },
1534 { "(bad)", XX, XX, XX },
1535 { "psraw", MS, Ib, XX },
1536 { "(bad)", XX, XX, XX },
1537 { "psllw", MS, Ib, XX },
1538 { "(bad)", XX, XX, XX },
1539 },
1540 /* GRP11 */
1541 {
1542 { "(bad)", XX, XX, XX },
1543 { "(bad)", XX, XX, XX },
1544 { "psrld", MS, Ib, XX },
1545 { "(bad)", XX, XX, XX },
1546 { "psrad", MS, Ib, XX },
1547 { "(bad)", XX, XX, XX },
1548 { "pslld", MS, Ib, XX },
1549 { "(bad)", XX, XX, XX },
1550 },
1551 /* GRP12 */
1552 {
1553 { "(bad)", XX, XX, XX },
1554 { "(bad)", XX, XX, XX },
1555 { "psrlq", MS, Ib, XX },
1556 { "psrldq", MS, Ib, XX },
1557 { "(bad)", XX, XX, XX },
1558 { "(bad)", XX, XX, XX },
1559 { "psllq", MS, Ib, XX },
1560 { "pslldq", MS, Ib, XX },
1561 },
1562 /* GRP13 */
1563 {
1564 { "fxsave", Ev, XX, XX },
1565 { "fxrstor", Ev, XX, XX },
1566 { "ldmxcsr", Ev, XX, XX },
1567 { "stmxcsr", Ev, XX, XX },
1568 { "(bad)", XX, XX, XX },
1569 { "lfence", None, XX, XX },
1570 { "mfence", None, XX, XX },
1571 { "sfence", None, XX, XX },
1572 /* FIXME: the sfence with memory operand is clflush! */
1573 },
1574 /* GRP14 */
1575 {
1576 { "prefetchnta", Ev, XX, XX },
1577 { "prefetcht0", Ev, XX, XX },
1578 { "prefetcht1", Ev, XX, XX },
1579 { "prefetcht2", Ev, XX, XX },
1580 { "(bad)", XX, XX, XX },
1581 { "(bad)", XX, XX, XX },
1582 { "(bad)", XX, XX, XX },
1583 { "(bad)", XX, XX, XX },
1584 },
1585 /* GRPAMD */
1586 {
1587 { "prefetch", Eb, XX, XX },
1588 { "prefetchw", Eb, XX, XX },
1589 { "(bad)", XX, XX, XX },
1590 { "(bad)", XX, XX, XX },
1591 { "(bad)", XX, XX, XX },
1592 { "(bad)", XX, XX, XX },
1593 { "(bad)", XX, XX, XX },
1594 { "(bad)", XX, XX, XX },
1595 }
1596 };
1597
1598 static const struct dis386 prefix_user_table[][4] = {
1599 /* PREGRP0 */
1600 {
1601 { "addps", XM, EX, XX },
1602 { "addss", XM, EX, XX },
1603 { "addpd", XM, EX, XX },
1604 { "addsd", XM, EX, XX },
1605 },
1606 /* PREGRP1 */
1607 {
1608 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
1609 { "", XM, EX, OPSIMD },
1610 { "", XM, EX, OPSIMD },
1611 { "", XM, EX, OPSIMD },
1612 },
1613 /* PREGRP2 */
1614 {
1615 { "cvtpi2ps", XM, EM, XX },
1616 { "cvtsi2ssY", XM, Ev, XX },
1617 { "cvtpi2pd", XM, EM, XX },
1618 { "cvtsi2sdY", XM, Ev, XX },
1619 },
1620 /* PREGRP3 */
1621 {
1622 { "cvtps2pi", MX, EX, XX },
1623 { "cvtss2siY", Gv, EX, XX },
1624 { "cvtpd2pi", MX, EX, XX },
1625 { "cvtsd2siY", Gv, EX, XX },
1626 },
1627 /* PREGRP4 */
1628 {
1629 { "cvttps2pi", MX, EX, XX },
1630 { "cvttss2siY", Gv, EX, XX },
1631 { "cvttpd2pi", MX, EX, XX },
1632 { "cvttsd2siY", Gv, EX, XX },
1633 },
1634 /* PREGRP5 */
1635 {
1636 { "divps", XM, EX, XX },
1637 { "divss", XM, EX, XX },
1638 { "divpd", XM, EX, XX },
1639 { "divsd", XM, EX, XX },
1640 },
1641 /* PREGRP6 */
1642 {
1643 { "maxps", XM, EX, XX },
1644 { "maxss", XM, EX, XX },
1645 { "maxpd", XM, EX, XX },
1646 { "maxsd", XM, EX, XX },
1647 },
1648 /* PREGRP7 */
1649 {
1650 { "minps", XM, EX, XX },
1651 { "minss", XM, EX, XX },
1652 { "minpd", XM, EX, XX },
1653 { "minsd", XM, EX, XX },
1654 },
1655 /* PREGRP8 */
1656 {
1657 { "movups", XM, EX, XX },
1658 { "movss", XM, EX, XX },
1659 { "movupd", XM, EX, XX },
1660 { "movsd", XM, EX, XX },
1661 },
1662 /* PREGRP9 */
1663 {
1664 { "movups", EX, XM, XX },
1665 { "movss", EX, XM, XX },
1666 { "movupd", EX, XM, XX },
1667 { "movsd", EX, XM, XX },
1668 },
1669 /* PREGRP10 */
1670 {
1671 { "mulps", XM, EX, XX },
1672 { "mulss", XM, EX, XX },
1673 { "mulpd", XM, EX, XX },
1674 { "mulsd", XM, EX, XX },
1675 },
1676 /* PREGRP11 */
1677 {
1678 { "rcpps", XM, EX, XX },
1679 { "rcpss", XM, EX, XX },
1680 { "(bad)", XM, EX, XX },
1681 { "(bad)", XM, EX, XX },
1682 },
1683 /* PREGRP12 */
1684 {
1685 { "rsqrtps", XM, EX, XX },
1686 { "rsqrtss", XM, EX, XX },
1687 { "(bad)", XM, EX, XX },
1688 { "(bad)", XM, EX, XX },
1689 },
1690 /* PREGRP13 */
1691 {
1692 { "sqrtps", XM, EX, XX },
1693 { "sqrtss", XM, EX, XX },
1694 { "sqrtpd", XM, EX, XX },
1695 { "sqrtsd", XM, EX, XX },
1696 },
1697 /* PREGRP14 */
1698 {
1699 { "subps", XM, EX, XX },
1700 { "subss", XM, EX, XX },
1701 { "subpd", XM, EX, XX },
1702 { "subsd", XM, EX, XX },
1703 },
1704 /* PREGRP15 */
1705 {
1706 { "(bad)", XM, EX, XX },
1707 { "cvtdq2pd", XM, EX, XX },
1708 { "cvttpd2dq", XM, EX, XX },
1709 { "cvtpd2dq", XM, EX, XX },
1710 },
1711 /* PREGRP16 */
1712 {
1713 { "cvtdq2ps", XM, EX, XX },
1714 { "cvttps2dq",XM, EX, XX },
1715 { "cvtps2dq",XM, EX, XX },
1716 { "(bad)", XM, EX, XX },
1717 },
1718 /* PREGRP17 */
1719 {
1720 { "cvtps2pd", XM, EX, XX },
1721 { "cvtss2sd", XM, EX, XX },
1722 { "cvtpd2ps", XM, EX, XX },
1723 { "cvtsd2ss", XM, EX, XX },
1724 },
1725 /* PREGRP18 */
1726 {
1727 { "maskmovq", MX, MS, XX },
1728 { "(bad)", XM, EX, XX },
1729 { "maskmovdqu", XM, EX, XX },
1730 { "(bad)", XM, EX, XX },
1731 },
1732 /* PREGRP19 */
1733 {
1734 { "movq", MX, EM, XX },
1735 { "movdqu", XM, EX, XX },
1736 { "movdqa", XM, EX, XX },
1737 { "(bad)", XM, EX, XX },
1738 },
1739 /* PREGRP20 */
1740 {
1741 { "movq", EM, MX, XX },
1742 { "movdqu", EX, XM, XX },
1743 { "movdqa", EX, XM, XX },
1744 { "(bad)", EX, XM, XX },
1745 },
1746 /* PREGRP21 */
1747 {
1748 { "(bad)", EX, XM, XX },
1749 { "movq2dq", XM, MS, XX },
1750 { "movq", EX, XM, XX },
1751 { "movdq2q", MX, XS, XX },
1752 },
1753 /* PREGRP22 */
1754 {
1755 { "pshufw", MX, EM, Ib },
1756 { "pshufhw", XM, EX, Ib },
1757 { "pshufd", XM, EX, Ib },
1758 { "pshuflw", XM, EX, Ib },
1759 },
1760 /* PREGRP23 */
1761 {
1762 { "movd", Ed, MX, XX },
1763 { "movq", XM, EX, XX },
1764 { "movd", Ed, XM, XX },
1765 { "(bad)", Ed, XM, XX },
1766 },
1767 /* PREGRP24 */
1768 {
1769 { "(bad)", MX, EX, XX },
1770 { "(bad)", XM, EX, XX },
1771 { "punpckhqdq", XM, EX, XX },
1772 { "(bad)", XM, EX, XX },
1773 },
1774 /* PREGRP25 */
1775 {
1776 { "movntq", Ev, MX, XX },
1777 { "(bad)", Ev, XM, XX },
1778 { "movntdq", Ev, XM, XX },
1779 { "(bad)", Ev, XM, XX },
1780 },
1781 /* PREGRP26 */
1782 {
1783 { "(bad)", MX, EX, XX },
1784 { "(bad)", XM, EX, XX },
1785 { "punpcklqdq", XM, EX, XX },
1786 { "(bad)", XM, EX, XX },
1787 },
1788 };
1789
1790 static const struct dis386 x86_64_table[][2] = {
1791 {
1792 { "arpl", Ew, Gw, XX },
1793 { "movs{||lq|xd}", Gv, Ed, XX },
1794 },
1795 };
1796
1797 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1798
1799 static void
1800 ckprefix ()
1801 {
1802 int newrex;
1803 rex = 0;
1804 prefixes = 0;
1805 used_prefixes = 0;
1806 rex_used = 0;
1807 while (1)
1808 {
1809 FETCH_DATA (the_info, codep + 1);
1810 newrex = 0;
1811 switch (*codep)
1812 {
1813 /* REX prefixes family. */
1814 case 0x40:
1815 case 0x41:
1816 case 0x42:
1817 case 0x43:
1818 case 0x44:
1819 case 0x45:
1820 case 0x46:
1821 case 0x47:
1822 case 0x48:
1823 case 0x49:
1824 case 0x4a:
1825 case 0x4b:
1826 case 0x4c:
1827 case 0x4d:
1828 case 0x4e:
1829 case 0x4f:
1830 if (mode_64bit)
1831 newrex = *codep;
1832 else
1833 return;
1834 break;
1835 case 0xf3:
1836 prefixes |= PREFIX_REPZ;
1837 break;
1838 case 0xf2:
1839 prefixes |= PREFIX_REPNZ;
1840 break;
1841 case 0xf0:
1842 prefixes |= PREFIX_LOCK;
1843 break;
1844 case 0x2e:
1845 prefixes |= PREFIX_CS;
1846 break;
1847 case 0x36:
1848 prefixes |= PREFIX_SS;
1849 break;
1850 case 0x3e:
1851 prefixes |= PREFIX_DS;
1852 break;
1853 case 0x26:
1854 prefixes |= PREFIX_ES;
1855 break;
1856 case 0x64:
1857 prefixes |= PREFIX_FS;
1858 break;
1859 case 0x65:
1860 prefixes |= PREFIX_GS;
1861 break;
1862 case 0x66:
1863 prefixes |= PREFIX_DATA;
1864 break;
1865 case 0x67:
1866 prefixes |= PREFIX_ADDR;
1867 break;
1868 case FWAIT_OPCODE:
1869 /* fwait is really an instruction. If there are prefixes
1870 before the fwait, they belong to the fwait, *not* to the
1871 following instruction. */
1872 if (prefixes)
1873 {
1874 prefixes |= PREFIX_FWAIT;
1875 codep++;
1876 return;
1877 }
1878 prefixes = PREFIX_FWAIT;
1879 break;
1880 default:
1881 return;
1882 }
1883 /* Rex is ignored when followed by another prefix. */
1884 if (rex)
1885 {
1886 oappend (prefix_name (rex, 0));
1887 oappend (" ");
1888 }
1889 rex = newrex;
1890 codep++;
1891 }
1892 }
1893
1894 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1895 prefix byte. */
1896
1897 static const char *
1898 prefix_name (pref, sizeflag)
1899 int pref;
1900 int sizeflag;
1901 {
1902 switch (pref)
1903 {
1904 /* REX prefixes family. */
1905 case 0x40:
1906 return "rex";
1907 case 0x41:
1908 return "rexZ";
1909 case 0x42:
1910 return "rexY";
1911 case 0x43:
1912 return "rexYZ";
1913 case 0x44:
1914 return "rexX";
1915 case 0x45:
1916 return "rexXZ";
1917 case 0x46:
1918 return "rexXY";
1919 case 0x47:
1920 return "rexXYZ";
1921 case 0x48:
1922 return "rex64";
1923 case 0x49:
1924 return "rex64Z";
1925 case 0x4a:
1926 return "rex64Y";
1927 case 0x4b:
1928 return "rex64YZ";
1929 case 0x4c:
1930 return "rex64X";
1931 case 0x4d:
1932 return "rex64XZ";
1933 case 0x4e:
1934 return "rex64XY";
1935 case 0x4f:
1936 return "rex64XYZ";
1937 case 0xf3:
1938 return "repz";
1939 case 0xf2:
1940 return "repnz";
1941 case 0xf0:
1942 return "lock";
1943 case 0x2e:
1944 return "cs";
1945 case 0x36:
1946 return "ss";
1947 case 0x3e:
1948 return "ds";
1949 case 0x26:
1950 return "es";
1951 case 0x64:
1952 return "fs";
1953 case 0x65:
1954 return "gs";
1955 case 0x66:
1956 return (sizeflag & DFLAG) ? "data16" : "data32";
1957 case 0x67:
1958 if (mode_64bit)
1959 return (sizeflag & AFLAG) ? "addr32" : "addr64";
1960 else
1961 return ((sizeflag & AFLAG) && !mode_64bit) ? "addr16" : "addr32";
1962 case FWAIT_OPCODE:
1963 return "fwait";
1964 default:
1965 return NULL;
1966 }
1967 }
1968
1969 static char op1out[100], op2out[100], op3out[100];
1970 static int op_ad, op_index[3];
1971 static bfd_vma op_address[3];
1972 static bfd_vma op_riprel[3];
1973 static bfd_vma start_pc;
1974 \f
1975 /*
1976 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1977 * (see topic "Redundant prefixes" in the "Differences from 8086"
1978 * section of the "Virtual 8086 Mode" chapter.)
1979 * 'pc' should be the address of this instruction, it will
1980 * be used to print the target address if this is a relative jump or call
1981 * The function returns the length of this instruction in bytes.
1982 */
1983
1984 static char intel_syntax;
1985 static char open_char;
1986 static char close_char;
1987 static char separator_char;
1988 static char scale_char;
1989
1990 /* Here for backwards compatibility. When gdb stops using
1991 print_insn_i386_att and print_insn_i386_intel these functions can
1992 disappear, and print_insn_i386 be merged into print_insn. */
1993 int
1994 print_insn_i386_att (pc, info)
1995 bfd_vma pc;
1996 disassemble_info *info;
1997 {
1998 intel_syntax = 0;
1999
2000 return print_insn (pc, info);
2001 }
2002
2003 int
2004 print_insn_i386_intel (pc, info)
2005 bfd_vma pc;
2006 disassemble_info *info;
2007 {
2008 intel_syntax = 1;
2009
2010 return print_insn (pc, info);
2011 }
2012
2013 int
2014 print_insn_i386 (pc, info)
2015 bfd_vma pc;
2016 disassemble_info *info;
2017 {
2018 intel_syntax = -1;
2019
2020 return print_insn (pc, info);
2021 }
2022
2023 static int
2024 print_insn (pc, info)
2025 bfd_vma pc;
2026 disassemble_info *info;
2027 {
2028 const struct dis386 *dp;
2029 int i;
2030 int two_source_ops;
2031 char *first, *second, *third;
2032 int needcomma;
2033 unsigned char uses_SSE_prefix;
2034 int sizeflag;
2035 /*const char *p;*/
2036 struct dis_private priv;
2037
2038 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
2039 || info->mach == bfd_mach_x86_64);
2040
2041 if (intel_syntax == -1)
2042 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
2043 || info->mach == bfd_mach_x86_64_intel_syntax);
2044
2045 if (info->mach == bfd_mach_i386_i386
2046 || info->mach == bfd_mach_x86_64
2047 || info->mach == bfd_mach_i386_i386_intel_syntax
2048 || info->mach == bfd_mach_x86_64_intel_syntax)
2049 priv.orig_sizeflag = AFLAG | DFLAG;
2050 else if (info->mach == bfd_mach_i386_i8086)
2051 priv.orig_sizeflag = 0;
2052 else
2053 abort ();
2054
2055 #if 0
2056 for (p = info->disassembler_options; p != NULL; )
2057 {
2058 if (strncmp (p, "x86-64", 6) == 0)
2059 {
2060 mode_64bit = 1;
2061 priv.orig_sizeflag = AFLAG | DFLAG;
2062 }
2063 else if (strncmp (p, "i386", 4) == 0)
2064 {
2065 mode_64bit = 0;
2066 priv.orig_sizeflag = AFLAG | DFLAG;
2067 }
2068 else if (strncmp (p, "i8086", 5) == 0)
2069 {
2070 mode_64bit = 0;
2071 priv.orig_sizeflag = 0;
2072 }
2073 else if (strncmp (p, "intel", 5) == 0)
2074 {
2075 intel_syntax = 1;
2076 }
2077 else if (strncmp (p, "att", 3) == 0)
2078 {
2079 intel_syntax = 0;
2080 }
2081 else if (strncmp (p, "addr", 4) == 0)
2082 {
2083 if (p[4] == '1' && p[5] == '6')
2084 priv.orig_sizeflag &= ~AFLAG;
2085 else if (p[4] == '3' && p[5] == '2')
2086 priv.orig_sizeflag |= AFLAG;
2087 }
2088 else if (strncmp (p, "data", 4) == 0)
2089 {
2090 if (p[4] == '1' && p[5] == '6')
2091 priv.orig_sizeflag &= ~DFLAG;
2092 else if (p[4] == '3' && p[5] == '2')
2093 priv.orig_sizeflag |= DFLAG;
2094 }
2095 else if (strncmp (p, "suffix", 6) == 0)
2096 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2097
2098 p = strchr (p, ',');
2099 if (p != NULL)
2100 p++;
2101 }
2102 #else
2103 mode_64bit = 0;
2104 priv.orig_sizeflag = AFLAG | DFLAG;
2105 /*intel_syntax = 0;*/
2106 #endif
2107
2108 if (intel_syntax)
2109 {
2110 names64 = intel_names64;
2111 names32 = intel_names32;
2112 names16 = intel_names16;
2113 names8 = intel_names8;
2114 names8rex = intel_names8rex;
2115 names_seg = intel_names_seg;
2116 index16 = intel_index16;
2117 open_char = '[';
2118 close_char = ']';
2119 separator_char = '+';
2120 scale_char = '*';
2121 }
2122 else
2123 {
2124 names64 = att_names64;
2125 names32 = att_names32;
2126 names16 = att_names16;
2127 names8 = att_names8;
2128 names8rex = att_names8rex;
2129 names_seg = att_names_seg;
2130 index16 = att_index16;
2131 open_char = '(';
2132 close_char = ')';
2133 separator_char = ',';
2134 scale_char = ',';
2135 }
2136
2137 /* The output looks better if we put 7 bytes on a line, since that
2138 puts most long word instructions on a single line. */
2139 info->bytes_per_line = 7;
2140
2141 info->private_data = (PTR) &priv;
2142 priv.max_fetched = priv.the_buffer;
2143 priv.insn_start = pc;
2144
2145 obuf[0] = 0;
2146 op1out[0] = 0;
2147 op2out[0] = 0;
2148 op3out[0] = 0;
2149
2150 op_index[0] = op_index[1] = op_index[2] = -1;
2151
2152 the_info = info;
2153 start_pc = pc;
2154 start_codep = priv.the_buffer;
2155 codep = priv.the_buffer;
2156
2157 if (_setjmp (priv.bailout) != 0)
2158 {
2159 const char *name;
2160
2161 /* Getting here means we tried for data but didn't get it. That
2162 means we have an incomplete instruction of some sort. Just
2163 print the first byte as a prefix or a .byte pseudo-op. */
2164 if (codep > priv.the_buffer)
2165 {
2166 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2167 if (name != NULL)
2168 (*info->fprintf_func) (info->stream, "%s", name);
2169 else
2170 {
2171 /* Just print the first byte as a .byte instruction. */
2172 (*info->fprintf_func) (info->stream, ".byte 0x%x",
2173 (unsigned int) priv.the_buffer[0]);
2174 }
2175
2176 return 1;
2177 }
2178
2179 return -1;
2180 }
2181
2182 obufp = obuf;
2183 ckprefix ();
2184
2185 insn_codep = codep;
2186 sizeflag = priv.orig_sizeflag;
2187
2188 FETCH_DATA (info, codep + 1);
2189 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2190
2191 if ((prefixes & PREFIX_FWAIT)
2192 && ((*codep < 0xd8) || (*codep > 0xdf)))
2193 {
2194 const char *name;
2195
2196 /* fwait not followed by floating point instruction. Print the
2197 first prefix, which is probably fwait itself. */
2198 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2199 if (name == NULL)
2200 name = INTERNAL_DISASSEMBLER_ERROR;
2201 (*info->fprintf_func) (info->stream, "%s", name);
2202 return 1;
2203 }
2204
2205 if (*codep == 0x0f)
2206 {
2207 FETCH_DATA (info, codep + 2);
2208 dp = &dis386_twobyte[*++codep];
2209 need_modrm = twobyte_has_modrm[*codep];
2210 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
2211 }
2212 else
2213 {
2214 dp = &dis386[*codep];
2215 need_modrm = onebyte_has_modrm[*codep];
2216 uses_SSE_prefix = 0;
2217 }
2218 codep++;
2219
2220 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
2221 {
2222 oappend ("repz ");
2223 used_prefixes |= PREFIX_REPZ;
2224 }
2225 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
2226 {
2227 oappend ("repnz ");
2228 used_prefixes |= PREFIX_REPNZ;
2229 }
2230 if (prefixes & PREFIX_LOCK)
2231 {
2232 oappend ("lock ");
2233 used_prefixes |= PREFIX_LOCK;
2234 }
2235
2236 if (prefixes & PREFIX_ADDR)
2237 {
2238 sizeflag ^= AFLAG;
2239 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
2240 {
2241 if ((sizeflag & AFLAG) || mode_64bit)
2242 oappend ("addr32 ");
2243 else
2244 oappend ("addr16 ");
2245 used_prefixes |= PREFIX_ADDR;
2246 }
2247 }
2248
2249 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2250 {
2251 sizeflag ^= DFLAG;
2252 if (dp->bytemode3 == cond_jump_mode
2253 && dp->bytemode1 == v_mode
2254 && !intel_syntax)
2255 {
2256 if (sizeflag & DFLAG)
2257 oappend ("data32 ");
2258 else
2259 oappend ("data16 ");
2260 used_prefixes |= PREFIX_DATA;
2261 }
2262 }
2263
2264 if (need_modrm)
2265 {
2266 FETCH_DATA (info, codep + 1);
2267 mod = (*codep >> 6) & 3;
2268 reg = (*codep >> 3) & 7;
2269 rm = *codep & 7;
2270 }
2271
2272 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2273 {
2274 dofloat (sizeflag);
2275 }
2276 else
2277 {
2278 int index;
2279 if (dp->name == NULL)
2280 {
2281 switch (dp->bytemode1)
2282 {
2283 case USE_GROUPS:
2284 dp = &grps[dp->bytemode2][reg];
2285 break;
2286
2287 case USE_PREFIX_USER_TABLE:
2288 index = 0;
2289 used_prefixes |= (prefixes & PREFIX_REPZ);
2290 if (prefixes & PREFIX_REPZ)
2291 index = 1;
2292 else
2293 {
2294 used_prefixes |= (prefixes & PREFIX_DATA);
2295 if (prefixes & PREFIX_DATA)
2296 index = 2;
2297 else
2298 {
2299 used_prefixes |= (prefixes & PREFIX_REPNZ);
2300 if (prefixes & PREFIX_REPNZ)
2301 index = 3;
2302 }
2303 }
2304 dp = &prefix_user_table[dp->bytemode2][index];
2305 break;
2306
2307 case X86_64_SPECIAL:
2308 dp = &x86_64_table[dp->bytemode2][mode_64bit];
2309 break;
2310
2311 default:
2312 oappend (INTERNAL_DISASSEMBLER_ERROR);
2313 break;
2314 }
2315 }
2316
2317 if (putop (dp->name, sizeflag) == 0)
2318 {
2319 obufp = op1out;
2320 op_ad = 2;
2321 if (dp->op1)
2322 (*dp->op1) (dp->bytemode1, sizeflag);
2323
2324 obufp = op2out;
2325 op_ad = 1;
2326 if (dp->op2)
2327 (*dp->op2) (dp->bytemode2, sizeflag);
2328
2329 obufp = op3out;
2330 op_ad = 0;
2331 if (dp->op3)
2332 (*dp->op3) (dp->bytemode3, sizeflag);
2333 }
2334 }
2335
2336 /* See if any prefixes were not used. If so, print the first one
2337 separately. If we don't do this, we'll wind up printing an
2338 instruction stream which does not precisely correspond to the
2339 bytes we are disassembling. */
2340 if ((prefixes & ~used_prefixes) != 0)
2341 {
2342 const char *name;
2343
2344 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2345 if (name == NULL)
2346 name = INTERNAL_DISASSEMBLER_ERROR;
2347 (*info->fprintf_func) (info->stream, "%s", name);
2348 return 1;
2349 }
2350 if (rex & ~rex_used)
2351 {
2352 const char *name;
2353 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
2354 if (name == NULL)
2355 name = INTERNAL_DISASSEMBLER_ERROR;
2356 (*info->fprintf_func) (info->stream, "%s ", name);
2357 }
2358
2359 obufp = obuf + strlen (obuf);
2360 for (i = strlen (obuf); i < 6; i++)
2361 oappend (" ");
2362 oappend (" ");
2363 (*info->fprintf_func) (info->stream, "%s", obuf);
2364
2365 /* The enter and bound instructions are printed with operands in the same
2366 order as the intel book; everything else is printed in reverse order. */
2367 if (intel_syntax || two_source_ops)
2368 {
2369 first = op1out;
2370 second = op2out;
2371 third = op3out;
2372 op_ad = op_index[0];
2373 op_index[0] = op_index[2];
2374 op_index[2] = op_ad;
2375 }
2376 else
2377 {
2378 first = op3out;
2379 second = op2out;
2380 third = op1out;
2381 }
2382 needcomma = 0;
2383 if (*first)
2384 {
2385 if (op_index[0] != -1 && !op_riprel[0])
2386 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2387 else
2388 (*info->fprintf_func) (info->stream, "%s", first);
2389 needcomma = 1;
2390 }
2391 if (*second)
2392 {
2393 if (needcomma)
2394 (*info->fprintf_func) (info->stream, ",");
2395 if (op_index[1] != -1 && !op_riprel[1])
2396 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2397 else
2398 (*info->fprintf_func) (info->stream, "%s", second);
2399 needcomma = 1;
2400 }
2401 if (*third)
2402 {
2403 if (needcomma)
2404 (*info->fprintf_func) (info->stream, ",");
2405 if (op_index[2] != -1 && !op_riprel[2])
2406 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2407 else
2408 (*info->fprintf_func) (info->stream, "%s", third);
2409 }
2410 for (i = 0; i < 3; i++)
2411 if (op_index[i] != -1 && op_riprel[i])
2412 {
2413 (*info->fprintf_func) (info->stream, " # ");
2414 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2415 + op_address[op_index[i]]), info);
2416 }
2417 return codep - priv.the_buffer;
2418 }
2419
2420 static const char *float_mem[] = {
2421 /* d8 */
2422 "fadd{s||s|}",
2423 "fmul{s||s|}",
2424 "fcom{s||s|}",
2425 "fcomp{s||s|}",
2426 "fsub{s||s|}",
2427 "fsubr{s||s|}",
2428 "fdiv{s||s|}",
2429 "fdivr{s||s|}",
2430 /* d9 */
2431 "fld{s||s|}",
2432 "(bad)",
2433 "fst{s||s|}",
2434 "fstp{s||s|}",
2435 "fldenv",
2436 "fldcw",
2437 "fNstenv",
2438 "fNstcw",
2439 /* da */
2440 "fiadd{l||l|}",
2441 "fimul{l||l|}",
2442 "ficom{l||l|}",
2443 "ficomp{l||l|}",
2444 "fisub{l||l|}",
2445 "fisubr{l||l|}",
2446 "fidiv{l||l|}",
2447 "fidivr{l||l|}",
2448 /* db */
2449 "fild{l||l|}",
2450 "(bad)",
2451 "fist{l||l|}",
2452 "fistp{l||l|}",
2453 "(bad)",
2454 "fld{t||t|}",
2455 "(bad)",
2456 "fstp{t||t|}",
2457 /* dc */
2458 "fadd{l||l|}",
2459 "fmul{l||l|}",
2460 "fcom{l||l|}",
2461 "fcomp{l||l|}",
2462 "fsub{l||l|}",
2463 "fsubr{l||l|}",
2464 "fdiv{l||l|}",
2465 "fdivr{l||l|}",
2466 /* dd */
2467 "fld{l||l|}",
2468 "(bad)",
2469 "fst{l||l|}",
2470 "fstp{l||l|}",
2471 "frstor",
2472 "(bad)",
2473 "fNsave",
2474 "fNstsw",
2475 /* de */
2476 "fiadd",
2477 "fimul",
2478 "ficom",
2479 "ficomp",
2480 "fisub",
2481 "fisubr",
2482 "fidiv",
2483 "fidivr",
2484 /* df */
2485 "fild",
2486 "(bad)",
2487 "fist",
2488 "fistp",
2489 "fbld",
2490 "fild{ll||ll|}",
2491 "fbstp",
2492 "fistpll",
2493 };
2494
2495 #define ST OP_ST, 0
2496 #define STi OP_STi, 0
2497
2498 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2499 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2500 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2501 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2502 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2503 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2504 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2505 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2506 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2507
2508 static const struct dis386 float_reg[][8] = {
2509 /* d8 */
2510 {
2511 { "fadd", ST, STi, XX },
2512 { "fmul", ST, STi, XX },
2513 { "fcom", STi, XX, XX },
2514 { "fcomp", STi, XX, XX },
2515 { "fsub", ST, STi, XX },
2516 { "fsubr", ST, STi, XX },
2517 { "fdiv", ST, STi, XX },
2518 { "fdivr", ST, STi, XX },
2519 },
2520 /* d9 */
2521 {
2522 { "fld", STi, XX, XX },
2523 { "fxch", STi, XX, XX },
2524 { FGRPd9_2 },
2525 { "(bad)", XX, XX, XX },
2526 { FGRPd9_4 },
2527 { FGRPd9_5 },
2528 { FGRPd9_6 },
2529 { FGRPd9_7 },
2530 },
2531 /* da */
2532 {
2533 { "fcmovb", ST, STi, XX },
2534 { "fcmove", ST, STi, XX },
2535 { "fcmovbe",ST, STi, XX },
2536 { "fcmovu", ST, STi, XX },
2537 { "(bad)", XX, XX, XX },
2538 { FGRPda_5 },
2539 { "(bad)", XX, XX, XX },
2540 { "(bad)", XX, XX, XX },
2541 },
2542 /* db */
2543 {
2544 { "fcmovnb",ST, STi, XX },
2545 { "fcmovne",ST, STi, XX },
2546 { "fcmovnbe",ST, STi, XX },
2547 { "fcmovnu",ST, STi, XX },
2548 { FGRPdb_4 },
2549 { "fucomi", ST, STi, XX },
2550 { "fcomi", ST, STi, XX },
2551 { "(bad)", XX, XX, XX },
2552 },
2553 /* dc */
2554 {
2555 { "fadd", STi, ST, XX },
2556 { "fmul", STi, ST, XX },
2557 { "(bad)", XX, XX, XX },
2558 { "(bad)", XX, XX, XX },
2559 #if UNIXWARE_COMPAT
2560 { "fsub", STi, ST, XX },
2561 { "fsubr", STi, ST, XX },
2562 { "fdiv", STi, ST, XX },
2563 { "fdivr", STi, ST, XX },
2564 #else
2565 { "fsubr", STi, ST, XX },
2566 { "fsub", STi, ST, XX },
2567 { "fdivr", STi, ST, XX },
2568 { "fdiv", STi, ST, XX },
2569 #endif
2570 },
2571 /* dd */
2572 {
2573 { "ffree", STi, XX, XX },
2574 { "(bad)", XX, XX, XX },
2575 { "fst", STi, XX, XX },
2576 { "fstp", STi, XX, XX },
2577 { "fucom", STi, XX, XX },
2578 { "fucomp", STi, XX, XX },
2579 { "(bad)", XX, XX, XX },
2580 { "(bad)", XX, XX, XX },
2581 },
2582 /* de */
2583 {
2584 { "faddp", STi, ST, XX },
2585 { "fmulp", STi, ST, XX },
2586 { "(bad)", XX, XX, XX },
2587 { FGRPde_3 },
2588 #if UNIXWARE_COMPAT
2589 { "fsubp", STi, ST, XX },
2590 { "fsubrp", STi, ST, XX },
2591 { "fdivp", STi, ST, XX },
2592 { "fdivrp", STi, ST, XX },
2593 #else
2594 { "fsubrp", STi, ST, XX },
2595 { "fsubp", STi, ST, XX },
2596 { "fdivrp", STi, ST, XX },
2597 { "fdivp", STi, ST, XX },
2598 #endif
2599 },
2600 /* df */
2601 {
2602 { "ffreep", STi, XX, XX },
2603 { "(bad)", XX, XX, XX },
2604 { "(bad)", XX, XX, XX },
2605 { "(bad)", XX, XX, XX },
2606 { FGRPdf_4 },
2607 { "fucomip",ST, STi, XX },
2608 { "fcomip", ST, STi, XX },
2609 { "(bad)", XX, XX, XX },
2610 },
2611 };
2612
2613 static char *fgrps[][8] = {
2614 /* d9_2 0 */
2615 {
2616 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2617 },
2618
2619 /* d9_4 1 */
2620 {
2621 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2622 },
2623
2624 /* d9_5 2 */
2625 {
2626 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2627 },
2628
2629 /* d9_6 3 */
2630 {
2631 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2632 },
2633
2634 /* d9_7 4 */
2635 {
2636 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2637 },
2638
2639 /* da_5 5 */
2640 {
2641 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2642 },
2643
2644 /* db_4 6 */
2645 {
2646 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2647 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2648 },
2649
2650 /* de_3 7 */
2651 {
2652 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2653 },
2654
2655 /* df_4 8 */
2656 {
2657 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2658 },
2659 };
2660
2661 static void
2662 dofloat (sizeflag)
2663 int sizeflag;
2664 {
2665 const struct dis386 *dp;
2666 unsigned char floatop;
2667
2668 floatop = codep[-1];
2669
2670 if (mod != 3)
2671 {
2672 putop (float_mem[(floatop - 0xd8) * 8 + reg], sizeflag);
2673 obufp = op1out;
2674 if (floatop == 0xdb)
2675 OP_E (x_mode, sizeflag);
2676 else if (floatop == 0xdd)
2677 OP_E (d_mode, sizeflag);
2678 else
2679 OP_E (v_mode, sizeflag);
2680 return;
2681 }
2682 /* Skip mod/rm byte. */
2683 MODRM_CHECK;
2684 codep++;
2685
2686 dp = &float_reg[floatop - 0xd8][reg];
2687 if (dp->name == NULL)
2688 {
2689 putop (fgrps[dp->bytemode1][rm], sizeflag);
2690
2691 /* Instruction fnstsw is only one with strange arg. */
2692 if (floatop == 0xdf && codep[-1] == 0xe0)
2693 strcpy (op1out, names16[0]);
2694 }
2695 else
2696 {
2697 putop (dp->name, sizeflag);
2698
2699 obufp = op1out;
2700 if (dp->op1)
2701 (*dp->op1) (dp->bytemode1, sizeflag);
2702 obufp = op2out;
2703 if (dp->op2)
2704 (*dp->op2) (dp->bytemode2, sizeflag);
2705 }
2706 }
2707
2708 static void
2709 OP_ST (bytemode, sizeflag)
2710 int bytemode ATTRIBUTE_UNUSED;
2711 int sizeflag ATTRIBUTE_UNUSED;
2712 {
2713 oappend ("%st");
2714 }
2715
2716 static void
2717 OP_STi (bytemode, sizeflag)
2718 int bytemode ATTRIBUTE_UNUSED;
2719 int sizeflag ATTRIBUTE_UNUSED;
2720 {
2721 sprintf (scratchbuf, "%%st(%d)", rm);
2722 oappend (scratchbuf + intel_syntax);
2723 }
2724
2725 /* Capital letters in template are macros. */
2726 static int
2727 putop (template, sizeflag)
2728 const char *template;
2729 int sizeflag;
2730 {
2731 const char *p;
2732 int alt;
2733
2734 for (p = template; *p; p++)
2735 {
2736 switch (*p)
2737 {
2738 default:
2739 *obufp++ = *p;
2740 break;
2741 case '{':
2742 alt = 0;
2743 if (intel_syntax)
2744 alt += 1;
2745 if (mode_64bit)
2746 alt += 2;
2747 while (alt != 0)
2748 {
2749 while (*++p != '|')
2750 {
2751 if (*p == '}')
2752 {
2753 /* Alternative not valid. */
2754 strcpy (obuf, "(bad)");
2755 obufp = obuf + 5;
2756 return 1;
2757 }
2758 else if (*p == '\0')
2759 abort ();
2760 }
2761 alt--;
2762 }
2763 break;
2764 case '|':
2765 while (*++p != '}')
2766 {
2767 if (*p == '\0')
2768 abort ();
2769 }
2770 break;
2771 case '}':
2772 break;
2773 case 'A':
2774 if (intel_syntax)
2775 break;
2776 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2777 *obufp++ = 'b';
2778 break;
2779 case 'B':
2780 if (intel_syntax)
2781 break;
2782 if (sizeflag & SUFFIX_ALWAYS)
2783 *obufp++ = 'b';
2784 break;
2785 case 'E': /* For jcxz/jecxz */
2786 if (mode_64bit)
2787 {
2788 if (sizeflag & AFLAG)
2789 *obufp++ = 'r';
2790 else
2791 *obufp++ = 'e';
2792 }
2793 else
2794 if (sizeflag & AFLAG)
2795 *obufp++ = 'e';
2796 used_prefixes |= (prefixes & PREFIX_ADDR);
2797 break;
2798 case 'F':
2799 if (intel_syntax)
2800 break;
2801 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
2802 {
2803 if (sizeflag & AFLAG)
2804 *obufp++ = mode_64bit ? 'q' : 'l';
2805 else
2806 *obufp++ = mode_64bit ? 'l' : 'w';
2807 used_prefixes |= (prefixes & PREFIX_ADDR);
2808 }
2809 break;
2810 case 'H':
2811 if (intel_syntax)
2812 break;
2813 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
2814 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
2815 {
2816 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
2817 *obufp++ = ',';
2818 *obufp++ = 'p';
2819 if (prefixes & PREFIX_DS)
2820 *obufp++ = 't';
2821 else
2822 *obufp++ = 'n';
2823 }
2824 break;
2825 case 'L':
2826 if (intel_syntax)
2827 break;
2828 if (sizeflag & SUFFIX_ALWAYS)
2829 *obufp++ = 'l';
2830 break;
2831 case 'N':
2832 if ((prefixes & PREFIX_FWAIT) == 0)
2833 *obufp++ = 'n';
2834 else
2835 used_prefixes |= PREFIX_FWAIT;
2836 break;
2837 case 'O':
2838 USED_REX (REX_MODE64);
2839 if (rex & REX_MODE64)
2840 *obufp++ = 'o';
2841 else
2842 *obufp++ = 'd';
2843 break;
2844 case 'T':
2845 if (intel_syntax)
2846 break;
2847 if (mode_64bit)
2848 {
2849 *obufp++ = 'q';
2850 break;
2851 }
2852 /* Fall through. */
2853 case 'P':
2854 if (intel_syntax)
2855 break;
2856 if ((prefixes & PREFIX_DATA)
2857 || (rex & REX_MODE64)
2858 || (sizeflag & SUFFIX_ALWAYS))
2859 {
2860 USED_REX (REX_MODE64);
2861 if (rex & REX_MODE64)
2862 *obufp++ = 'q';
2863 else
2864 {
2865 if (sizeflag & DFLAG)
2866 *obufp++ = 'l';
2867 else
2868 *obufp++ = 'w';
2869 used_prefixes |= (prefixes & PREFIX_DATA);
2870 }
2871 }
2872 break;
2873 case 'U':
2874 if (intel_syntax)
2875 break;
2876 if (mode_64bit)
2877 {
2878 *obufp++ = 'q';
2879 break;
2880 }
2881 /* Fall through. */
2882 case 'Q':
2883 if (intel_syntax)
2884 break;
2885 USED_REX (REX_MODE64);
2886 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2887 {
2888 if (rex & REX_MODE64)
2889 *obufp++ = 'q';
2890 else
2891 {
2892 if (sizeflag & DFLAG)
2893 *obufp++ = 'l';
2894 else
2895 *obufp++ = 'w';
2896 used_prefixes |= (prefixes & PREFIX_DATA);
2897 }
2898 }
2899 break;
2900 case 'R':
2901 USED_REX (REX_MODE64);
2902 if (intel_syntax)
2903 {
2904 if (rex & REX_MODE64)
2905 {
2906 *obufp++ = 'q';
2907 *obufp++ = 't';
2908 }
2909 else if (sizeflag & DFLAG)
2910 {
2911 *obufp++ = 'd';
2912 *obufp++ = 'q';
2913 }
2914 else
2915 {
2916 *obufp++ = 'w';
2917 *obufp++ = 'd';
2918 }
2919 }
2920 else
2921 {
2922 if (rex & REX_MODE64)
2923 *obufp++ = 'q';
2924 else if (sizeflag & DFLAG)
2925 *obufp++ = 'l';
2926 else
2927 *obufp++ = 'w';
2928 }
2929 if (!(rex & REX_MODE64))
2930 used_prefixes |= (prefixes & PREFIX_DATA);
2931 break;
2932 case 'S':
2933 if (intel_syntax)
2934 break;
2935 if (sizeflag & SUFFIX_ALWAYS)
2936 {
2937 if (rex & REX_MODE64)
2938 *obufp++ = 'q';
2939 else
2940 {
2941 if (sizeflag & DFLAG)
2942 *obufp++ = 'l';
2943 else
2944 *obufp++ = 'w';
2945 used_prefixes |= (prefixes & PREFIX_DATA);
2946 }
2947 }
2948 break;
2949 case 'X':
2950 if (prefixes & PREFIX_DATA)
2951 *obufp++ = 'd';
2952 else
2953 *obufp++ = 's';
2954 used_prefixes |= (prefixes & PREFIX_DATA);
2955 break;
2956 case 'Y':
2957 if (intel_syntax)
2958 break;
2959 if (rex & REX_MODE64)
2960 {
2961 USED_REX (REX_MODE64);
2962 *obufp++ = 'q';
2963 }
2964 break;
2965 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
2966 case 'W':
2967 /* operand size flag for cwtl, cbtw */
2968 USED_REX (0);
2969 if (rex)
2970 *obufp++ = 'l';
2971 else if (sizeflag & DFLAG)
2972 *obufp++ = 'w';
2973 else
2974 *obufp++ = 'b';
2975 if (intel_syntax)
2976 {
2977 if (rex)
2978 {
2979 *obufp++ = 'q';
2980 *obufp++ = 'e';
2981 }
2982 if (sizeflag & DFLAG)
2983 {
2984 *obufp++ = 'd';
2985 *obufp++ = 'e';
2986 }
2987 else
2988 {
2989 *obufp++ = 'w';
2990 }
2991 }
2992 if (!rex)
2993 used_prefixes |= (prefixes & PREFIX_DATA);
2994 break;
2995 }
2996 }
2997 *obufp = 0;
2998 return 0;
2999 }
3000
3001 static void
3002 oappend (s)
3003 const char *s;
3004 {
3005 strcpy (obufp, s);
3006 obufp += strlen (s);
3007 }
3008
3009 static void
3010 append_seg ()
3011 {
3012 if (prefixes & PREFIX_CS)
3013 {
3014 used_prefixes |= PREFIX_CS;
3015 oappend ("%cs:" + intel_syntax);
3016 }
3017 if (prefixes & PREFIX_DS)
3018 {
3019 used_prefixes |= PREFIX_DS;
3020 oappend ("%ds:" + intel_syntax);
3021 }
3022 if (prefixes & PREFIX_SS)
3023 {
3024 used_prefixes |= PREFIX_SS;
3025 oappend ("%ss:" + intel_syntax);
3026 }
3027 if (prefixes & PREFIX_ES)
3028 {
3029 used_prefixes |= PREFIX_ES;
3030 oappend ("%es:" + intel_syntax);
3031 }
3032 if (prefixes & PREFIX_FS)
3033 {
3034 used_prefixes |= PREFIX_FS;
3035 oappend ("%fs:" + intel_syntax);
3036 }
3037 if (prefixes & PREFIX_GS)
3038 {
3039 used_prefixes |= PREFIX_GS;
3040 oappend ("%gs:" + intel_syntax);
3041 }
3042 }
3043
3044 static void
3045 OP_indirE (bytemode, sizeflag)
3046 int bytemode;
3047 int sizeflag;
3048 {
3049 if (!intel_syntax)
3050 oappend ("*");
3051 OP_E (bytemode, sizeflag);
3052 }
3053
3054 static void
3055 print_operand_value (buf, hex, disp)
3056 char *buf;
3057 int hex;
3058 bfd_vma disp;
3059 {
3060 if (mode_64bit)
3061 {
3062 if (hex)
3063 {
3064 char tmp[30];
3065 int i;
3066 buf[0] = '0';
3067 buf[1] = 'x';
3068 sprintf_vma (tmp, disp);
3069 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
3070 strcpy (buf + 2, tmp + i);
3071 }
3072 else
3073 {
3074 bfd_signed_vma v = disp;
3075 char tmp[30];
3076 int i;
3077 if (v < 0)
3078 {
3079 *(buf++) = '-';
3080 v = -disp;
3081 /* Check for possible overflow on 0x8000000000000000. */
3082 if (v < 0)
3083 {
3084 strcpy (buf, "9223372036854775808");
3085 return;
3086 }
3087 }
3088 if (!v)
3089 {
3090 strcpy (buf, "0");
3091 return;
3092 }
3093
3094 i = 0;
3095 tmp[29] = 0;
3096 while (v)
3097 {
3098 tmp[28 - i] = (v % 10) + '0';
3099 v /= 10;
3100 i++;
3101 }
3102 strcpy (buf, tmp + 29 - i);
3103 }
3104 }
3105 else
3106 {
3107 if (hex)
3108 sprintf (buf, "0x%x", (unsigned int) disp);
3109 else
3110 sprintf (buf, "%d", (int) disp);
3111 }
3112 }
3113
3114 static void
3115 OP_E (bytemode, sizeflag)
3116 int bytemode;
3117 int sizeflag;
3118 {
3119 bfd_vma disp;
3120 int add = 0;
3121 int riprel = 0;
3122 USED_REX (REX_EXTZ);
3123 if (rex & REX_EXTZ)
3124 add += 8;
3125
3126 /* Skip mod/rm byte. */
3127 MODRM_CHECK;
3128 codep++;
3129
3130 if (mod == 3)
3131 {
3132 switch (bytemode)
3133 {
3134 case b_mode:
3135 USED_REX (0);
3136 if (rex)
3137 oappend (names8rex[rm + add]);
3138 else
3139 oappend (names8[rm + add]);
3140 break;
3141 case w_mode:
3142 oappend (names16[rm + add]);
3143 break;
3144 case d_mode:
3145 oappend (names32[rm + add]);
3146 break;
3147 case q_mode:
3148 oappend (names64[rm + add]);
3149 break;
3150 case m_mode:
3151 if (mode_64bit)
3152 oappend (names64[rm + add]);
3153 else
3154 oappend (names32[rm + add]);
3155 break;
3156 case v_mode:
3157 USED_REX (REX_MODE64);
3158 if (rex & REX_MODE64)
3159 oappend (names64[rm + add]);
3160 else if (sizeflag & DFLAG)
3161 oappend (names32[rm + add]);
3162 else
3163 oappend (names16[rm + add]);
3164 used_prefixes |= (prefixes & PREFIX_DATA);
3165 break;
3166 case 0:
3167 if (!(codep[-2] == 0xAE && codep[-1] == 0xF8 /* sfence */)
3168 && !(codep[-2] == 0xAE && codep[-1] == 0xF0 /* mfence */)
3169 && !(codep[-2] == 0xAE && codep[-1] == 0xe8 /* lfence */))
3170 BadOp (); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */
3171 break;
3172 default:
3173 oappend (INTERNAL_DISASSEMBLER_ERROR);
3174 break;
3175 }
3176 return;
3177 }
3178
3179 disp = 0;
3180 append_seg ();
3181
3182 if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */
3183 {
3184 int havesib;
3185 int havebase;
3186 int base;
3187 int index = 0;
3188 int scale = 0;
3189
3190 havesib = 0;
3191 havebase = 1;
3192 base = rm;
3193
3194 if (base == 4)
3195 {
3196 havesib = 1;
3197 FETCH_DATA (the_info, codep + 1);
3198 scale = (*codep >> 6) & 3;
3199 index = (*codep >> 3) & 7;
3200 base = *codep & 7;
3201 USED_REX (REX_EXTY);
3202 USED_REX (REX_EXTZ);
3203 if (rex & REX_EXTY)
3204 index += 8;
3205 if (rex & REX_EXTZ)
3206 base += 8;
3207 codep++;
3208 }
3209
3210 switch (mod)
3211 {
3212 case 0:
3213 if ((base & 7) == 5)
3214 {
3215 havebase = 0;
3216 if (mode_64bit && !havesib && (sizeflag & AFLAG))
3217 riprel = 1;
3218 disp = get32s ();
3219 }
3220 break;
3221 case 1:
3222 FETCH_DATA (the_info, codep + 1);
3223 disp = *codep++;
3224 if ((disp & 0x80) != 0)
3225 disp -= 0x100;
3226 break;
3227 case 2:
3228 disp = get32s ();
3229 break;
3230 }
3231
3232 if (!intel_syntax)
3233 if (mod != 0 || (base & 7) == 5)
3234 {
3235 print_operand_value (scratchbuf, !riprel, disp);
3236 oappend (scratchbuf);
3237 if (riprel)
3238 {
3239 set_op (disp, 1);
3240 oappend ("(%rip)");
3241 }
3242 }
3243
3244 if (havebase || (havesib && (index != 4 || scale != 0)))
3245 {
3246 if (intel_syntax)
3247 {
3248 switch (bytemode)
3249 {
3250 case b_mode:
3251 oappend ("BYTE PTR ");
3252 break;
3253 case w_mode:
3254 oappend ("WORD PTR ");
3255 break;
3256 case v_mode:
3257 oappend ("DWORD PTR ");
3258 break;
3259 case d_mode:
3260 oappend ("QWORD PTR ");
3261 break;
3262 case m_mode:
3263 if (mode_64bit)
3264 oappend ("DWORD PTR ");
3265 else
3266 oappend ("QWORD PTR ");
3267 break;
3268 case x_mode:
3269 oappend ("XWORD PTR ");
3270 break;
3271 default:
3272 break;
3273 }
3274 }
3275 *obufp++ = open_char;
3276 if (intel_syntax && riprel)
3277 oappend ("rip + ");
3278 *obufp = '\0';
3279 USED_REX (REX_EXTZ);
3280 if (!havesib && (rex & REX_EXTZ))
3281 base += 8;
3282 if (havebase)
3283 oappend (mode_64bit && (sizeflag & AFLAG)
3284 ? names64[base] : names32[base]);
3285 if (havesib)
3286 {
3287 if (index != 4)
3288 {
3289 if (intel_syntax)
3290 {
3291 if (havebase)
3292 {
3293 *obufp++ = separator_char;
3294 *obufp = '\0';
3295 }
3296 sprintf (scratchbuf, "%s",
3297 mode_64bit && (sizeflag & AFLAG)
3298 ? names64[index] : names32[index]);
3299 }
3300 else
3301 sprintf (scratchbuf, ",%s",
3302 mode_64bit && (sizeflag & AFLAG)
3303 ? names64[index] : names32[index]);
3304 oappend (scratchbuf);
3305 }
3306 if (!intel_syntax
3307 || (intel_syntax
3308 && bytemode != b_mode
3309 && bytemode != w_mode
3310 && bytemode != v_mode))
3311 {
3312 *obufp++ = scale_char;
3313 *obufp = '\0';
3314 sprintf (scratchbuf, "%d", 1 << scale);
3315 oappend (scratchbuf);
3316 }
3317 }
3318 if (intel_syntax)
3319 if (mod != 0 || (base & 7) == 5)
3320 {
3321 /* Don't print zero displacements. */
3322 if (disp != 0)
3323 {
3324 if ((bfd_signed_vma) disp > 0)
3325 {
3326 *obufp++ = '+';
3327 *obufp = '\0';
3328 }
3329
3330 print_operand_value (scratchbuf, 0, disp);
3331 oappend (scratchbuf);
3332 }
3333 }
3334
3335 *obufp++ = close_char;
3336 *obufp = '\0';
3337 }
3338 else if (intel_syntax)
3339 {
3340 if (mod != 0 || (base & 7) == 5)
3341 {
3342 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3343 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3344 ;
3345 else
3346 {
3347 oappend (names_seg[ds_reg - es_reg]);
3348 oappend (":");
3349 }
3350 print_operand_value (scratchbuf, 1, disp);
3351 oappend (scratchbuf);
3352 }
3353 }
3354 }
3355 else
3356 { /* 16 bit address mode */
3357 switch (mod)
3358 {
3359 case 0:
3360 if ((rm & 7) == 6)
3361 {
3362 disp = get16 ();
3363 if ((disp & 0x8000) != 0)
3364 disp -= 0x10000;
3365 }
3366 break;
3367 case 1:
3368 FETCH_DATA (the_info, codep + 1);
3369 disp = *codep++;
3370 if ((disp & 0x80) != 0)
3371 disp -= 0x100;
3372 break;
3373 case 2:
3374 disp = get16 ();
3375 if ((disp & 0x8000) != 0)
3376 disp -= 0x10000;
3377 break;
3378 }
3379
3380 if (!intel_syntax)
3381 if (mod != 0 || (rm & 7) == 6)
3382 {
3383 print_operand_value (scratchbuf, 0, disp);
3384 oappend (scratchbuf);
3385 }
3386
3387 if (mod != 0 || (rm & 7) != 6)
3388 {
3389 *obufp++ = open_char;
3390 *obufp = '\0';
3391 oappend (index16[rm + add]);
3392 *obufp++ = close_char;
3393 *obufp = '\0';
3394 }
3395 }
3396 }
3397
3398 static void
3399 OP_G (bytemode, sizeflag)
3400 int bytemode;
3401 int sizeflag;
3402 {
3403 int add = 0;
3404 USED_REX (REX_EXTX);
3405 if (rex & REX_EXTX)
3406 add += 8;
3407 switch (bytemode)
3408 {
3409 case b_mode:
3410 USED_REX (0);
3411 if (rex)
3412 oappend (names8rex[reg + add]);
3413 else
3414 oappend (names8[reg + add]);
3415 break;
3416 case w_mode:
3417 oappend (names16[reg + add]);
3418 break;
3419 case d_mode:
3420 oappend (names32[reg + add]);
3421 break;
3422 case q_mode:
3423 oappend (names64[reg + add]);
3424 break;
3425 case v_mode:
3426 USED_REX (REX_MODE64);
3427 if (rex & REX_MODE64)
3428 oappend (names64[reg + add]);
3429 else if (sizeflag & DFLAG)
3430 oappend (names32[reg + add]);
3431 else
3432 oappend (names16[reg + add]);
3433 used_prefixes |= (prefixes & PREFIX_DATA);
3434 break;
3435 default:
3436 oappend (INTERNAL_DISASSEMBLER_ERROR);
3437 break;
3438 }
3439 }
3440
3441 static bfd_vma
3442 get64 ()
3443 {
3444 bfd_vma x;
3445 #ifdef BFD64
3446 unsigned int a;
3447 unsigned int b;
3448
3449 FETCH_DATA (the_info, codep + 8);
3450 a = *codep++ & 0xff;
3451 a |= (*codep++ & 0xff) << 8;
3452 a |= (*codep++ & 0xff) << 16;
3453 a |= (*codep++ & 0xff) << 24;
3454 b = *codep++ & 0xff;
3455 b |= (*codep++ & 0xff) << 8;
3456 b |= (*codep++ & 0xff) << 16;
3457 b |= (*codep++ & 0xff) << 24;
3458 x = a + ((bfd_vma) b << 32);
3459 #else
3460 abort ();
3461 x = 0;
3462 #endif
3463 return x;
3464 }
3465
3466 static bfd_signed_vma
3467 get32 ()
3468 {
3469 bfd_signed_vma x = 0;
3470
3471 FETCH_DATA (the_info, codep + 4);
3472 x = *codep++ & (bfd_signed_vma) 0xff;
3473 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3474 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3475 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3476 return x;
3477 }
3478
3479 static bfd_signed_vma
3480 get32s ()
3481 {
3482 bfd_signed_vma x = 0;
3483
3484 FETCH_DATA (the_info, codep + 4);
3485 x = *codep++ & (bfd_signed_vma) 0xff;
3486 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3487 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3488 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3489
3490 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3491
3492 return x;
3493 }
3494
3495 static int
3496 get16 ()
3497 {
3498 int x = 0;
3499
3500 FETCH_DATA (the_info, codep + 2);
3501 x = *codep++ & 0xff;
3502 x |= (*codep++ & 0xff) << 8;
3503 return x;
3504 }
3505
3506 static void
3507 set_op (op, riprel)
3508 bfd_vma op;
3509 int riprel;
3510 {
3511 op_index[op_ad] = op_ad;
3512 if (mode_64bit)
3513 {
3514 op_address[op_ad] = op;
3515 op_riprel[op_ad] = riprel;
3516 }
3517 else
3518 {
3519 /* Mask to get a 32-bit address. */
3520 op_address[op_ad] = op & 0xffffffff;
3521 op_riprel[op_ad] = riprel & 0xffffffff;
3522 }
3523 }
3524
3525 static void
3526 OP_REG (code, sizeflag)
3527 int code;
3528 int sizeflag;
3529 {
3530 const char *s;
3531 int add = 0;
3532 USED_REX (REX_EXTZ);
3533 if (rex & REX_EXTZ)
3534 add = 8;
3535
3536 switch (code)
3537 {
3538 case indir_dx_reg:
3539 if (intel_syntax)
3540 s = "[dx]";
3541 else
3542 s = "(%dx)";
3543 break;
3544 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3545 case sp_reg: case bp_reg: case si_reg: case di_reg:
3546 s = names16[code - ax_reg + add];
3547 break;
3548 case es_reg: case ss_reg: case cs_reg:
3549 case ds_reg: case fs_reg: case gs_reg:
3550 s = names_seg[code - es_reg + add];
3551 break;
3552 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3553 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3554 USED_REX (0);
3555 if (rex)
3556 s = names8rex[code - al_reg + add];
3557 else
3558 s = names8[code - al_reg];
3559 break;
3560 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3561 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
3562 if (mode_64bit)
3563 {
3564 s = names64[code - rAX_reg + add];
3565 break;
3566 }
3567 code += eAX_reg - rAX_reg;
3568 /* Fall through. */
3569 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3570 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3571 USED_REX (REX_MODE64);
3572 if (rex & REX_MODE64)
3573 s = names64[code - eAX_reg + add];
3574 else if (sizeflag & DFLAG)
3575 s = names32[code - eAX_reg + add];
3576 else
3577 s = names16[code - eAX_reg + add];
3578 used_prefixes |= (prefixes & PREFIX_DATA);
3579 break;
3580 default:
3581 s = INTERNAL_DISASSEMBLER_ERROR;
3582 break;
3583 }
3584 oappend (s);
3585 }
3586
3587 static void
3588 OP_IMREG (code, sizeflag)
3589 int code;
3590 int sizeflag;
3591 {
3592 const char *s;
3593
3594 switch (code)
3595 {
3596 case indir_dx_reg:
3597 if (intel_syntax)
3598 s = "[dx]";
3599 else
3600 s = "(%dx)";
3601 break;
3602 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3603 case sp_reg: case bp_reg: case si_reg: case di_reg:
3604 s = names16[code - ax_reg];
3605 break;
3606 case es_reg: case ss_reg: case cs_reg:
3607 case ds_reg: case fs_reg: case gs_reg:
3608 s = names_seg[code - es_reg];
3609 break;
3610 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3611 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3612 USED_REX (0);
3613 if (rex)
3614 s = names8rex[code - al_reg];
3615 else
3616 s = names8[code - al_reg];
3617 break;
3618 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3619 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3620 USED_REX (REX_MODE64);
3621 if (rex & REX_MODE64)
3622 s = names64[code - eAX_reg];
3623 else if (sizeflag & DFLAG)
3624 s = names32[code - eAX_reg];
3625 else
3626 s = names16[code - eAX_reg];
3627 used_prefixes |= (prefixes & PREFIX_DATA);
3628 break;
3629 default:
3630 s = INTERNAL_DISASSEMBLER_ERROR;
3631 break;
3632 }
3633 oappend (s);
3634 }
3635
3636 static void
3637 OP_I (bytemode, sizeflag)
3638 int bytemode;
3639 int sizeflag;
3640 {
3641 bfd_signed_vma op;
3642 bfd_signed_vma mask = -1;
3643
3644 switch (bytemode)
3645 {
3646 case b_mode:
3647 FETCH_DATA (the_info, codep + 1);
3648 op = *codep++;
3649 mask = 0xff;
3650 break;
3651 case q_mode:
3652 if (mode_64bit)
3653 {
3654 op = get32s ();
3655 break;
3656 }
3657 /* Fall through. */
3658 case v_mode:
3659 USED_REX (REX_MODE64);
3660 if (rex & REX_MODE64)
3661 op = get32s ();
3662 else if (sizeflag & DFLAG)
3663 {
3664 op = get32 ();
3665 mask = 0xffffffff;
3666 }
3667 else
3668 {
3669 op = get16 ();
3670 mask = 0xfffff;
3671 }
3672 used_prefixes |= (prefixes & PREFIX_DATA);
3673 break;
3674 case w_mode:
3675 mask = 0xfffff;
3676 op = get16 ();
3677 break;
3678 default:
3679 oappend (INTERNAL_DISASSEMBLER_ERROR);
3680 return;
3681 }
3682
3683 op &= mask;
3684 scratchbuf[0] = '$';
3685 print_operand_value (scratchbuf + 1, 1, op);
3686 oappend (scratchbuf + intel_syntax);
3687 scratchbuf[0] = '\0';
3688 }
3689
3690 static void
3691 OP_I64 (bytemode, sizeflag)
3692 int bytemode;
3693 int sizeflag;
3694 {
3695 bfd_signed_vma op;
3696 bfd_signed_vma mask = -1;
3697
3698 if (!mode_64bit)
3699 {
3700 OP_I (bytemode, sizeflag);
3701 return;
3702 }
3703
3704 switch (bytemode)
3705 {
3706 case b_mode:
3707 FETCH_DATA (the_info, codep + 1);
3708 op = *codep++;
3709 mask = 0xff;
3710 break;
3711 case v_mode:
3712 USED_REX (REX_MODE64);
3713 if (rex & REX_MODE64)
3714 op = get64 ();
3715 else if (sizeflag & DFLAG)
3716 {
3717 op = get32 ();
3718 mask = 0xffffffff;
3719 }
3720 else
3721 {
3722 op = get16 ();
3723 mask = 0xfffff;
3724 }
3725 used_prefixes |= (prefixes & PREFIX_DATA);
3726 break;
3727 case w_mode:
3728 mask = 0xfffff;
3729 op = get16 ();
3730 break;
3731 default:
3732 oappend (INTERNAL_DISASSEMBLER_ERROR);
3733 return;
3734 }
3735
3736 op &= mask;
3737 scratchbuf[0] = '$';
3738 print_operand_value (scratchbuf + 1, 1, op);
3739 oappend (scratchbuf + intel_syntax);
3740 scratchbuf[0] = '\0';
3741 }
3742
3743 static void
3744 OP_sI (bytemode, sizeflag)
3745 int bytemode;
3746 int sizeflag;
3747 {
3748 bfd_signed_vma op;
3749
3750 switch (bytemode)
3751 {
3752 case b_mode:
3753 FETCH_DATA (the_info, codep + 1);
3754 op = *codep++;
3755 if ((op & 0x80) != 0)
3756 op -= 0x100;
3757 break;
3758 case v_mode:
3759 USED_REX (REX_MODE64);
3760 if (rex & REX_MODE64)
3761 op = get32s ();
3762 else if (sizeflag & DFLAG)
3763 {
3764 op = get32s ();
3765 }
3766 else
3767 {
3768 op = get16 ();
3769 if ((op & 0x8000) != 0)
3770 op -= 0x10000;
3771 }
3772 used_prefixes |= (prefixes & PREFIX_DATA);
3773 break;
3774 case w_mode:
3775 op = get16 ();
3776 if ((op & 0x8000) != 0)
3777 op -= 0x10000;
3778 break;
3779 default:
3780 oappend (INTERNAL_DISASSEMBLER_ERROR);
3781 return;
3782 }
3783
3784 scratchbuf[0] = '$';
3785 print_operand_value (scratchbuf + 1, 1, op);
3786 oappend (scratchbuf + intel_syntax);
3787 }
3788
3789 static void
3790 OP_J (bytemode, sizeflag)
3791 int bytemode;
3792 int sizeflag;
3793 {
3794 bfd_vma disp;
3795 bfd_vma mask = -1;
3796
3797 switch (bytemode)
3798 {
3799 case b_mode:
3800 FETCH_DATA (the_info, codep + 1);
3801 disp = *codep++;
3802 if ((disp & 0x80) != 0)
3803 disp -= 0x100;
3804 break;
3805 case v_mode:
3806 if (sizeflag & DFLAG)
3807 disp = get32s ();
3808 else
3809 {
3810 disp = get16 ();
3811 /* For some reason, a data16 prefix on a jump instruction
3812 means that the pc is masked to 16 bits after the
3813 displacement is added! */
3814 mask = 0xffff;
3815 }
3816 break;
3817 default:
3818 oappend (INTERNAL_DISASSEMBLER_ERROR);
3819 return;
3820 }
3821 disp = (start_pc + codep - start_codep + disp) & mask;
3822 set_op (disp, 0);
3823 print_operand_value (scratchbuf, 1, disp);
3824 oappend (scratchbuf);
3825 }
3826
3827 static void
3828 OP_SEG (dummy, sizeflag)
3829 int dummy ATTRIBUTE_UNUSED;
3830 int sizeflag ATTRIBUTE_UNUSED;
3831 {
3832 oappend (names_seg[reg]);
3833 }
3834
3835 static void
3836 OP_DIR (dummy, sizeflag)
3837 int dummy ATTRIBUTE_UNUSED;
3838 int sizeflag;
3839 {
3840 int seg, offset;
3841
3842 if (sizeflag & DFLAG)
3843 {
3844 offset = get32 ();
3845 seg = get16 ();
3846 }
3847 else
3848 {
3849 offset = get16 ();
3850 seg = get16 ();
3851 }
3852 used_prefixes |= (prefixes & PREFIX_DATA);
3853 if (intel_syntax)
3854 sprintf (scratchbuf, "0x%x,0x%x", seg, offset);
3855 else
3856 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
3857 oappend (scratchbuf);
3858 }
3859
3860 static void
3861 OP_OFF (bytemode, sizeflag)
3862 int bytemode ATTRIBUTE_UNUSED;
3863 int sizeflag;
3864 {
3865 bfd_vma off;
3866
3867 append_seg ();
3868
3869 if ((sizeflag & AFLAG) || mode_64bit)
3870 off = get32 ();
3871 else
3872 off = get16 ();
3873
3874 if (intel_syntax)
3875 {
3876 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3877 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3878 {
3879 oappend (names_seg[ds_reg - es_reg]);
3880 oappend (":");
3881 }
3882 }
3883 print_operand_value (scratchbuf, 1, off);
3884 oappend (scratchbuf);
3885 }
3886
3887 static void
3888 OP_OFF64 (bytemode, sizeflag)
3889 int bytemode ATTRIBUTE_UNUSED;
3890 int sizeflag ATTRIBUTE_UNUSED;
3891 {
3892 bfd_vma off;
3893
3894 if (!mode_64bit)
3895 {
3896 OP_OFF (bytemode, sizeflag);
3897 return;
3898 }
3899
3900 append_seg ();
3901
3902 off = get64 ();
3903
3904 if (intel_syntax)
3905 {
3906 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3907 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3908 {
3909 oappend (names_seg[ds_reg - es_reg]);
3910 oappend (":");
3911 }
3912 }
3913 print_operand_value (scratchbuf, 1, off);
3914 oappend (scratchbuf);
3915 }
3916
3917 static void
3918 ptr_reg (code, sizeflag)
3919 int code;
3920 int sizeflag;
3921 {
3922 const char *s;
3923 if (intel_syntax)
3924 oappend ("[");
3925 else
3926 oappend ("(");
3927
3928 USED_REX (REX_MODE64);
3929 if (rex & REX_MODE64)
3930 {
3931 if (!(sizeflag & AFLAG))
3932 s = names32[code - eAX_reg];
3933 else
3934 s = names64[code - eAX_reg];
3935 }
3936 else if (sizeflag & AFLAG)
3937 s = names32[code - eAX_reg];
3938 else
3939 s = names16[code - eAX_reg];
3940 oappend (s);
3941 if (intel_syntax)
3942 oappend ("]");
3943 else
3944 oappend (")");
3945 }
3946
3947 static void
3948 OP_ESreg (code, sizeflag)
3949 int code;
3950 int sizeflag;
3951 {
3952 oappend ("%es:" + intel_syntax);
3953 ptr_reg (code, sizeflag);
3954 }
3955
3956 static void
3957 OP_DSreg (code, sizeflag)
3958 int code;
3959 int sizeflag;
3960 {
3961 if ((prefixes
3962 & (PREFIX_CS
3963 | PREFIX_DS
3964 | PREFIX_SS
3965 | PREFIX_ES
3966 | PREFIX_FS
3967 | PREFIX_GS)) == 0)
3968 prefixes |= PREFIX_DS;
3969 append_seg ();
3970 ptr_reg (code, sizeflag);
3971 }
3972
3973 static void
3974 OP_C (dummy, sizeflag)
3975 int dummy ATTRIBUTE_UNUSED;
3976 int sizeflag ATTRIBUTE_UNUSED;
3977 {
3978 int add = 0;
3979 USED_REX (REX_EXTX);
3980 if (rex & REX_EXTX)
3981 add = 8;
3982 sprintf (scratchbuf, "%%cr%d", reg + add);
3983 oappend (scratchbuf + intel_syntax);
3984 }
3985
3986 static void
3987 OP_D (dummy, sizeflag)
3988 int dummy ATTRIBUTE_UNUSED;
3989 int sizeflag ATTRIBUTE_UNUSED;
3990 {
3991 int add = 0;
3992 USED_REX (REX_EXTX);
3993 if (rex & REX_EXTX)
3994 add = 8;
3995 if (intel_syntax)
3996 sprintf (scratchbuf, "db%d", reg + add);
3997 else
3998 sprintf (scratchbuf, "%%db%d", reg + add);
3999 oappend (scratchbuf);
4000 }
4001
4002 static void
4003 OP_T (dummy, sizeflag)
4004 int dummy ATTRIBUTE_UNUSED;
4005 int sizeflag ATTRIBUTE_UNUSED;
4006 {
4007 sprintf (scratchbuf, "%%tr%d", reg);
4008 oappend (scratchbuf + intel_syntax);
4009 }
4010
4011 static void
4012 OP_Rd (bytemode, sizeflag)
4013 int bytemode;
4014 int sizeflag;
4015 {
4016 if (mod == 3)
4017 OP_E (bytemode, sizeflag);
4018 else
4019 BadOp ();
4020 }
4021
4022 static void
4023 OP_MMX (bytemode, sizeflag)
4024 int bytemode ATTRIBUTE_UNUSED;
4025 int sizeflag ATTRIBUTE_UNUSED;
4026 {
4027 int add = 0;
4028 USED_REX (REX_EXTX);
4029 if (rex & REX_EXTX)
4030 add = 8;
4031 used_prefixes |= (prefixes & PREFIX_DATA);
4032 if (prefixes & PREFIX_DATA)
4033 sprintf (scratchbuf, "%%xmm%d", reg + add);
4034 else
4035 sprintf (scratchbuf, "%%mm%d", reg + add);
4036 oappend (scratchbuf + intel_syntax);
4037 }
4038
4039 static void
4040 OP_XMM (bytemode, sizeflag)
4041 int bytemode ATTRIBUTE_UNUSED;
4042 int sizeflag ATTRIBUTE_UNUSED;
4043 {
4044 int add = 0;
4045 USED_REX (REX_EXTX);
4046 if (rex & REX_EXTX)
4047 add = 8;
4048 sprintf (scratchbuf, "%%xmm%d", reg + add);
4049 oappend (scratchbuf + intel_syntax);
4050 }
4051
4052 static void
4053 OP_EM (bytemode, sizeflag)
4054 int bytemode;
4055 int sizeflag;
4056 {
4057 int add = 0;
4058 if (mod != 3)
4059 {
4060 OP_E (bytemode, sizeflag);
4061 return;
4062 }
4063 USED_REX (REX_EXTZ);
4064 if (rex & REX_EXTZ)
4065 add = 8;
4066
4067 /* Skip mod/rm byte. */
4068 MODRM_CHECK;
4069 codep++;
4070 used_prefixes |= (prefixes & PREFIX_DATA);
4071 if (prefixes & PREFIX_DATA)
4072 sprintf (scratchbuf, "%%xmm%d", rm + add);
4073 else
4074 sprintf (scratchbuf, "%%mm%d", rm + add);
4075 oappend (scratchbuf + intel_syntax);
4076 }
4077
4078 static void
4079 OP_EX (bytemode, sizeflag)
4080 int bytemode;
4081 int sizeflag;
4082 {
4083 int add = 0;
4084 if (mod != 3)
4085 {
4086 OP_E (bytemode, sizeflag);
4087 return;
4088 }
4089 USED_REX (REX_EXTZ);
4090 if (rex & REX_EXTZ)
4091 add = 8;
4092
4093 /* Skip mod/rm byte. */
4094 MODRM_CHECK;
4095 codep++;
4096 sprintf (scratchbuf, "%%xmm%d", rm + add);
4097 oappend (scratchbuf + intel_syntax);
4098 }
4099
4100 static void
4101 OP_MS (bytemode, sizeflag)
4102 int bytemode;
4103 int sizeflag;
4104 {
4105 if (mod == 3)
4106 OP_EM (bytemode, sizeflag);
4107 else
4108 BadOp ();
4109 }
4110
4111 static void
4112 OP_XS (bytemode, sizeflag)
4113 int bytemode;
4114 int sizeflag;
4115 {
4116 if (mod == 3)
4117 OP_EX (bytemode, sizeflag);
4118 else
4119 BadOp ();
4120 }
4121
4122 static const char *Suffix3DNow[] = {
4123 /* 00 */ NULL, NULL, NULL, NULL,
4124 /* 04 */ NULL, NULL, NULL, NULL,
4125 /* 08 */ NULL, NULL, NULL, NULL,
4126 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
4127 /* 10 */ NULL, NULL, NULL, NULL,
4128 /* 14 */ NULL, NULL, NULL, NULL,
4129 /* 18 */ NULL, NULL, NULL, NULL,
4130 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
4131 /* 20 */ NULL, NULL, NULL, NULL,
4132 /* 24 */ NULL, NULL, NULL, NULL,
4133 /* 28 */ NULL, NULL, NULL, NULL,
4134 /* 2C */ NULL, NULL, NULL, NULL,
4135 /* 30 */ NULL, NULL, NULL, NULL,
4136 /* 34 */ NULL, NULL, NULL, NULL,
4137 /* 38 */ NULL, NULL, NULL, NULL,
4138 /* 3C */ NULL, NULL, NULL, NULL,
4139 /* 40 */ NULL, NULL, NULL, NULL,
4140 /* 44 */ NULL, NULL, NULL, NULL,
4141 /* 48 */ NULL, NULL, NULL, NULL,
4142 /* 4C */ NULL, NULL, NULL, NULL,
4143 /* 50 */ NULL, NULL, NULL, NULL,
4144 /* 54 */ NULL, NULL, NULL, NULL,
4145 /* 58 */ NULL, NULL, NULL, NULL,
4146 /* 5C */ NULL, NULL, NULL, NULL,
4147 /* 60 */ NULL, NULL, NULL, NULL,
4148 /* 64 */ NULL, NULL, NULL, NULL,
4149 /* 68 */ NULL, NULL, NULL, NULL,
4150 /* 6C */ NULL, NULL, NULL, NULL,
4151 /* 70 */ NULL, NULL, NULL, NULL,
4152 /* 74 */ NULL, NULL, NULL, NULL,
4153 /* 78 */ NULL, NULL, NULL, NULL,
4154 /* 7C */ NULL, NULL, NULL, NULL,
4155 /* 80 */ NULL, NULL, NULL, NULL,
4156 /* 84 */ NULL, NULL, NULL, NULL,
4157 /* 88 */ NULL, NULL, "pfnacc", NULL,
4158 /* 8C */ NULL, NULL, "pfpnacc", NULL,
4159 /* 90 */ "pfcmpge", NULL, NULL, NULL,
4160 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
4161 /* 98 */ NULL, NULL, "pfsub", NULL,
4162 /* 9C */ NULL, NULL, "pfadd", NULL,
4163 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
4164 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
4165 /* A8 */ NULL, NULL, "pfsubr", NULL,
4166 /* AC */ NULL, NULL, "pfacc", NULL,
4167 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
4168 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
4169 /* B8 */ NULL, NULL, NULL, "pswapd",
4170 /* BC */ NULL, NULL, NULL, "pavgusb",
4171 /* C0 */ NULL, NULL, NULL, NULL,
4172 /* C4 */ NULL, NULL, NULL, NULL,
4173 /* C8 */ NULL, NULL, NULL, NULL,
4174 /* CC */ NULL, NULL, NULL, NULL,
4175 /* D0 */ NULL, NULL, NULL, NULL,
4176 /* D4 */ NULL, NULL, NULL, NULL,
4177 /* D8 */ NULL, NULL, NULL, NULL,
4178 /* DC */ NULL, NULL, NULL, NULL,
4179 /* E0 */ NULL, NULL, NULL, NULL,
4180 /* E4 */ NULL, NULL, NULL, NULL,
4181 /* E8 */ NULL, NULL, NULL, NULL,
4182 /* EC */ NULL, NULL, NULL, NULL,
4183 /* F0 */ NULL, NULL, NULL, NULL,
4184 /* F4 */ NULL, NULL, NULL, NULL,
4185 /* F8 */ NULL, NULL, NULL, NULL,
4186 /* FC */ NULL, NULL, NULL, NULL,
4187 };
4188
4189 static void
4190 OP_3DNowSuffix (bytemode, sizeflag)
4191 int bytemode ATTRIBUTE_UNUSED;
4192 int sizeflag ATTRIBUTE_UNUSED;
4193 {
4194 const char *mnemonic;
4195
4196 FETCH_DATA (the_info, codep + 1);
4197 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4198 place where an 8-bit immediate would normally go. ie. the last
4199 byte of the instruction. */
4200 obufp = obuf + strlen (obuf);
4201 mnemonic = Suffix3DNow[*codep++ & 0xff];
4202 if (mnemonic)
4203 oappend (mnemonic);
4204 else
4205 {
4206 /* Since a variable sized modrm/sib chunk is between the start
4207 of the opcode (0x0f0f) and the opcode suffix, we need to do
4208 all the modrm processing first, and don't know until now that
4209 we have a bad opcode. This necessitates some cleaning up. */
4210 op1out[0] = '\0';
4211 op2out[0] = '\0';
4212 BadOp ();
4213 }
4214 }
4215
4216 static const char *simd_cmp_op[] = {
4217 "eq",
4218 "lt",
4219 "le",
4220 "unord",
4221 "neq",
4222 "nlt",
4223 "nle",
4224 "ord"
4225 };
4226
4227 static void
4228 OP_SIMD_Suffix (bytemode, sizeflag)
4229 int bytemode ATTRIBUTE_UNUSED;
4230 int sizeflag ATTRIBUTE_UNUSED;
4231 {
4232 unsigned int cmp_type;
4233
4234 FETCH_DATA (the_info, codep + 1);
4235 obufp = obuf + strlen (obuf);
4236 cmp_type = *codep++ & 0xff;
4237 if (cmp_type < 8)
4238 {
4239 char suffix1 = 'p', suffix2 = 's';
4240 used_prefixes |= (prefixes & PREFIX_REPZ);
4241 if (prefixes & PREFIX_REPZ)
4242 suffix1 = 's';
4243 else
4244 {
4245 used_prefixes |= (prefixes & PREFIX_DATA);
4246 if (prefixes & PREFIX_DATA)
4247 suffix2 = 'd';
4248 else
4249 {
4250 used_prefixes |= (prefixes & PREFIX_REPNZ);
4251 if (prefixes & PREFIX_REPNZ)
4252 suffix1 = 's', suffix2 = 'd';
4253 }
4254 }
4255 sprintf (scratchbuf, "cmp%s%c%c",
4256 simd_cmp_op[cmp_type], suffix1, suffix2);
4257 used_prefixes |= (prefixes & PREFIX_REPZ);
4258 oappend (scratchbuf);
4259 }
4260 else
4261 {
4262 /* We have a bad extension byte. Clean up. */
4263 op1out[0] = '\0';
4264 op2out[0] = '\0';
4265 BadOp ();
4266 }
4267 }
4268
4269 static void
4270 SIMD_Fixup (extrachar, sizeflag)
4271 int extrachar;
4272 int sizeflag ATTRIBUTE_UNUSED;
4273 {
4274 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4275 forms of these instructions. */
4276 if (mod == 3)
4277 {
4278 char *p = obuf + strlen (obuf);
4279 *(p + 1) = '\0';
4280 *p = *(p - 1);
4281 *(p - 1) = *(p - 2);
4282 *(p - 2) = *(p - 3);
4283 *(p - 3) = extrachar;
4284 }
4285 }
4286
4287 static void
4288 BadOp (void)
4289 {
4290 /* Throw away prefixes and 1st. opcode byte. */
4291 codep = insn_codep + 1;
4292 oappend ("(bad)");
4293 }
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