2 * COPYRIGHT: See COPYING in the top level directory
3 * PROJECT: ReactOS kernel
4 * FILE: ntoskrnl/kdbg/i386/i386-dis.c
5 * PURPOSE: No purpose listed.
7 * PROGRAMMERS: No programmer listed.
14 /* ReactOS compatibility stuff. */
17 typedef enum bfd_flavour
19 bfd_target_unknown_flavour
,
21 typedef enum bfd_architecture
25 typedef unsigned int bfd_vma
;
26 typedef unsigned char bfd_byte
;
27 enum bfd_endian
{ BFD_ENDIAN_BIG
, BIG_ENDIAN_LITTLE
, BFD_ENDIAN_UNKNOWN
};
29 typedef signed int bfd_signed_vma
;
30 #define bfd_mach_x86_64_intel_syntax 0
31 #define bfd_mach_x86_64 1
32 #define bfd_mach_i386_i386_intel_syntax 2
33 #define bfd_mach_i386_i386 3
34 #define bfd_mach_i386_i8086 4
35 #define abort() DbgBreakPoint();
37 #define ATTRIBUTE_UNUSED
38 extern int sprintf(char *str
, const char *format
, ...);
39 #define sprintf_vma(BUF, VMA) sprintf(BUF, "0x%X", VMA)
40 struct disassemble_info
;
43 print_insn_i386 (bfd_vma pc
, struct disassemble_info
*info
);
46 KdbpPrintDisasm(void* Ignored
, const char* fmt
, ...)
49 static char buffer
[256];
53 ret
= vsprintf(buffer
, fmt
, ap
);
54 DbgPrint("%s", buffer
);
60 KdbpNopPrintDisasm(void* Ignored
, const char* fmt
, ...)
66 KdbpReadMemory(unsigned int Addr
, unsigned char* Data
, unsigned int Length
,
67 struct disassemble_info
* Ignored
)
69 return KdbpSafeReadMemory(Data
, (void *)Addr
, Length
); /* 0 means no error */
73 KdbpMemoryError(int Status
, unsigned int Addr
,
74 struct disassemble_info
* Ignored
)
79 KdbpPrintAddressInCode(unsigned int Addr
, struct disassemble_info
* Ignored
)
81 if (!KdbSymPrintAddress((void*)Addr
, NULL
))
83 DbgPrint("<%08x>", Addr
);
88 KdbpNopPrintAddress(unsigned int Addr
, struct disassemble_info
* Ignored
)
95 KdbpGetInstLength(IN ULONG Address
)
97 disassemble_info info
;
99 info
.fprintf_func
= KdbpNopPrintDisasm
;
101 info
.application_data
= NULL
;
102 info
.flavour
= bfd_target_unknown_flavour
;
103 info
.arch
= bfd_arch_i386
;
104 info
.mach
= bfd_mach_i386_i386
;
107 info
.read_memory_func
= KdbpReadMemory
;
108 info
.memory_error_func
= KdbpMemoryError
;
109 info
.print_address_func
= KdbpNopPrintAddress
;
110 info
.symbol_at_address_func
= NULL
;
112 info
.buffer_vma
= info
.buffer_length
= 0;
113 info
.bytes_per_chunk
= 0;
114 info
.display_endian
= BIG_ENDIAN_LITTLE
;
115 info
.disassembler_options
= NULL
;
117 return(print_insn_i386(Address
, &info
));
121 KdbpDisassemble(IN ULONG Address
, IN ULONG IntelSyntax
)
123 disassemble_info info
;
125 info
.fprintf_func
= KdbpPrintDisasm
;
127 info
.application_data
= NULL
;
128 info
.flavour
= bfd_target_unknown_flavour
;
129 info
.arch
= bfd_arch_i386
;
130 info
.mach
= IntelSyntax
? bfd_mach_i386_i386_intel_syntax
: bfd_mach_i386_i386
;
133 info
.read_memory_func
= KdbpReadMemory
;
134 info
.memory_error_func
= KdbpMemoryError
;
135 info
.print_address_func
= KdbpPrintAddressInCode
;
136 info
.symbol_at_address_func
= NULL
;
138 info
.buffer_vma
= info
.buffer_length
= 0;
139 info
.bytes_per_chunk
= 0;
140 info
.display_endian
= BIG_ENDIAN_LITTLE
;
141 info
.disassembler_options
= NULL
;
143 return(print_insn_i386(Address
, &info
));
146 /* Print i386 instructions for GDB, the GNU debugger.
147 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
148 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
150 This file is part of GDB.
152 This program is free software; you can redistribute it and/or modify
153 it under the terms of the GNU General Public License as published by
154 the Free Software Foundation; either version 2 of the License, or
155 (at your option) any later version.
157 This program is distributed in the hope that it will be useful,
158 but WITHOUT ANY WARRANTY; without even the implied warranty of
159 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
160 GNU General Public License for more details.
162 You should have received a copy of the GNU General Public License
163 along with this program; if not, write to the Free Software
164 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
167 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
169 * modified by John Hassey (hassey@dg-rtp.dg.com)
170 * x86-64 support added by Jan Hubicka (jh@suse.cz)
171 * VIA PadLock support by Michal Ludvig (mludvig@suse.cz)
175 * The main tables describing the instructions is essentially a copy
176 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
177 * Programmers Manual. Usually, there is a capital letter, followed
178 * by a small letter. The capital letter tell the addressing mode,
179 * and the small letter tells about the operand size. Refer to
180 * the Intel manual for details.
193 #ifndef UNIXWARE_COMPAT
194 /* Set non-zero for broken, compatible instructions. Set to zero for
195 non-broken opcodes. */
196 #define UNIXWARE_COMPAT 1
199 static int fetch_data (struct disassemble_info
*, bfd_byte
*);
200 static void ckprefix (void);
201 static const char *prefix_name (int, int);
202 static int print_insn (bfd_vma
, disassemble_info
*);
203 static void dofloat (int);
204 static void OP_ST (int, int);
205 static void OP_STi (int, int);
206 static int putop (const char *, int);
207 static void oappend (const char *);
208 static void append_seg (void);
209 static void OP_indirE (int, int);
210 static void print_operand_value (char *, int, bfd_vma
);
211 static void OP_E (int, int);
212 static void OP_G (int, int);
213 static bfd_vma
get64 (void);
214 static bfd_signed_vma
get32 (void);
215 static bfd_signed_vma
get32s (void);
216 static int get16 (void);
217 static void set_op (bfd_vma
, int);
218 static void OP_REG (int, int);
219 static void OP_IMREG (int, int);
220 static void OP_I (int, int);
221 static void OP_I64 (int, int);
222 static void OP_sI (int, int);
223 static void OP_J (int, int);
224 static void OP_SEG (int, int);
225 static void OP_DIR (int, int);
226 static void OP_OFF (int, int);
227 static void OP_OFF64 (int, int);
228 static void ptr_reg (int, int);
229 static void OP_ESreg (int, int);
230 static void OP_DSreg (int, int);
231 static void OP_C (int, int);
232 static void OP_D (int, int);
233 static void OP_T (int, int);
234 static void OP_Rd (int, int);
235 static void OP_MMX (int, int);
236 static void OP_XMM (int, int);
237 static void OP_EM (int, int);
238 static void OP_EX (int, int);
239 static void OP_MS (int, int);
240 static void OP_XS (int, int);
241 static void OP_M (int, int);
242 static void OP_0fae (int, int);
243 static void OP_0f07 (int, int);
244 static void NOP_Fixup (int, int);
245 static void OP_3DNowSuffix (int, int);
246 static void OP_SIMD_Suffix (int, int);
247 static void SIMD_Fixup (int, int);
248 static void PNI_Fixup (int, int);
249 static void INVLPG_Fixup (int, int);
250 static void BadOp (void);
253 /* Points to first byte not fetched. */
254 bfd_byte
*max_fetched
;
255 bfd_byte the_buffer
[MAXLEN
];
261 /* The opcode for the fwait instruction, which we treat as a prefix
263 #define FWAIT_OPCODE (0x9b)
265 /* Set to 1 for 64bit mode disassembly. */
266 static int mode_64bit
;
268 /* Flags for the prefixes for the current instruction. See below. */
271 /* REX prefix the current instruction. See below. */
273 /* Bits of REX we've already used. */
279 /* Mark parts used in the REX prefix. When we are testing for
280 empty prefix (for 8bit register REX extension), just mask it
281 out. Otherwise test for REX bit is excuse for existence of REX
282 only in case value is nonzero. */
283 #define USED_REX(value) \
286 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
291 /* Flags for prefixes which we somehow handled when printing the
292 current instruction. */
293 static int used_prefixes
;
295 /* Flags stored in PREFIXES. */
296 #define PREFIX_REPZ 1
297 #define PREFIX_REPNZ 2
298 #define PREFIX_LOCK 4
300 #define PREFIX_SS 0x10
301 #define PREFIX_DS 0x20
302 #define PREFIX_ES 0x40
303 #define PREFIX_FS 0x80
304 #define PREFIX_GS 0x100
305 #define PREFIX_DATA 0x200
306 #define PREFIX_ADDR 0x400
307 #define PREFIX_FWAIT 0x800
309 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
310 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
312 #define FETCH_DATA(info, addr) \
313 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
314 ? 1 : fetch_data ((info), (addr)))
317 fetch_data (struct disassemble_info
*info
, bfd_byte
*addr
)
320 struct dis_private
*priv
= (struct dis_private
*) info
->private_data
;
321 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
323 status
= (*info
->read_memory_func
) (start
,
325 addr
- priv
->max_fetched
,
329 /* If we did manage to read at least one byte, then
330 print_insn_i386 will do something sensible. Otherwise, print
331 an error. We do that here because this is where we know
333 if (priv
->max_fetched
== priv
->the_buffer
)
334 (*info
->memory_error_func
) (status
, start
, info
);
335 longjmp (priv
->bailout
, 1);
338 priv
->max_fetched
= addr
;
344 #define Eb OP_E, b_mode
345 #define Ev OP_E, v_mode
346 #define Ed OP_E, d_mode
347 #define Edq OP_E, dq_mode
348 #define indirEb OP_indirE, b_mode
349 #define indirEv OP_indirE, v_mode
350 #define Ew OP_E, w_mode
351 #define Ma OP_E, v_mode
352 #define M OP_M, 0 /* lea, lgdt, etc. */
353 #define Mp OP_M, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
354 #define Gb OP_G, b_mode
355 #define Gv OP_G, v_mode
356 #define Gd OP_G, d_mode
357 #define Gw OP_G, w_mode
358 #define Rd OP_Rd, d_mode
359 #define Rm OP_Rd, m_mode
360 #define Ib OP_I, b_mode
361 #define sIb OP_sI, b_mode /* sign extened byte */
362 #define Iv OP_I, v_mode
363 #define Iq OP_I, q_mode
364 #define Iv64 OP_I64, v_mode
365 #define Iw OP_I, w_mode
366 #define Jb OP_J, b_mode
367 #define Jv OP_J, v_mode
368 #define Cm OP_C, m_mode
369 #define Dm OP_D, m_mode
370 #define Td OP_T, d_mode
372 #define RMeAX OP_REG, eAX_reg
373 #define RMeBX OP_REG, eBX_reg
374 #define RMeCX OP_REG, eCX_reg
375 #define RMeDX OP_REG, eDX_reg
376 #define RMeSP OP_REG, eSP_reg
377 #define RMeBP OP_REG, eBP_reg
378 #define RMeSI OP_REG, eSI_reg
379 #define RMeDI OP_REG, eDI_reg
380 #define RMrAX OP_REG, rAX_reg
381 #define RMrBX OP_REG, rBX_reg
382 #define RMrCX OP_REG, rCX_reg
383 #define RMrDX OP_REG, rDX_reg
384 #define RMrSP OP_REG, rSP_reg
385 #define RMrBP OP_REG, rBP_reg
386 #define RMrSI OP_REG, rSI_reg
387 #define RMrDI OP_REG, rDI_reg
388 #define RMAL OP_REG, al_reg
389 #define RMAL OP_REG, al_reg
390 #define RMCL OP_REG, cl_reg
391 #define RMDL OP_REG, dl_reg
392 #define RMBL OP_REG, bl_reg
393 #define RMAH OP_REG, ah_reg
394 #define RMCH OP_REG, ch_reg
395 #define RMDH OP_REG, dh_reg
396 #define RMBH OP_REG, bh_reg
397 #define RMAX OP_REG, ax_reg
398 #define RMDX OP_REG, dx_reg
400 #define eAX OP_IMREG, eAX_reg
401 #define eBX OP_IMREG, eBX_reg
402 #define eCX OP_IMREG, eCX_reg
403 #define eDX OP_IMREG, eDX_reg
404 #define eSP OP_IMREG, eSP_reg
405 #define eBP OP_IMREG, eBP_reg
406 #define eSI OP_IMREG, eSI_reg
407 #define eDI OP_IMREG, eDI_reg
408 #define AL OP_IMREG, al_reg
409 #define AL OP_IMREG, al_reg
410 #define CL OP_IMREG, cl_reg
411 #define DL OP_IMREG, dl_reg
412 #define BL OP_IMREG, bl_reg
413 #define AH OP_IMREG, ah_reg
414 #define CH OP_IMREG, ch_reg
415 #define DH OP_IMREG, dh_reg
416 #define BH OP_IMREG, bh_reg
417 #define AX OP_IMREG, ax_reg
418 #define DX OP_IMREG, dx_reg
419 #define indirDX OP_IMREG, indir_dx_reg
421 #define Sw OP_SEG, w_mode
423 #define Ob OP_OFF, b_mode
424 #define Ob64 OP_OFF64, b_mode
425 #define Ov OP_OFF, v_mode
426 #define Ov64 OP_OFF64, v_mode
427 #define Xb OP_DSreg, eSI_reg
428 #define Xv OP_DSreg, eSI_reg
429 #define Yb OP_ESreg, eDI_reg
430 #define Yv OP_ESreg, eDI_reg
431 #define DSBX OP_DSreg, eBX_reg
433 #define es OP_REG, es_reg
434 #define ss OP_REG, ss_reg
435 #define cs OP_REG, cs_reg
436 #define ds OP_REG, ds_reg
437 #define fs OP_REG, fs_reg
438 #define gs OP_REG, gs_reg
442 #define EM OP_EM, v_mode
443 #define EX OP_EX, v_mode
444 #define MS OP_MS, v_mode
445 #define XS OP_XS, v_mode
446 #define OPSUF OP_3DNowSuffix, 0
447 #define OPSIMD OP_SIMD_Suffix, 0
449 #define cond_jump_flag NULL, cond_jump_mode
450 #define loop_jcxz_flag NULL, loop_jcxz_mode
452 /* bits in sizeflag */
453 #define SUFFIX_ALWAYS 4
457 #define b_mode 1 /* byte operand */
458 #define v_mode 2 /* operand size depends on prefixes */
459 #define w_mode 3 /* word operand */
460 #define d_mode 4 /* double word operand */
461 #define q_mode 5 /* quad word operand */
462 #define x_mode 6 /* 80 bit float operand */
463 #define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */
464 #define cond_jump_mode 8
465 #define loop_jcxz_mode 9
466 #define dq_mode 10 /* operand size depends on REX prefixes. */
511 #define indir_dx_reg 150
515 #define USE_PREFIX_USER_TABLE 3
516 #define X86_64_SPECIAL 4
518 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
520 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
521 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
522 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
523 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
524 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
525 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
526 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
527 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
528 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
529 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
530 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
531 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
532 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
533 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
534 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
535 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
536 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
537 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
538 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
539 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
540 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
541 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
542 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
543 #define GRPPADLCK NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0
545 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
546 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
547 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
548 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
549 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
550 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
551 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
552 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
553 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
554 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
555 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
556 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
557 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
558 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
559 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
560 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
561 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
562 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
563 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
564 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
565 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
566 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
567 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
568 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
569 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
570 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
571 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
572 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0
573 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0
574 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0
575 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0
576 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0
577 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0
579 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
581 typedef void (*op_rtn
) (int bytemode
, int sizeflag
);
593 /* Upper case letters in the instruction names here are macros.
594 'A' => print 'b' if no register operands or suffix_always is true
595 'B' => print 'b' if suffix_always is true
596 'E' => print 'e' if 32-bit form of jcxz
597 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
598 'H' => print ",pt" or ",pn" branch hint
599 'L' => print 'l' if suffix_always is true
600 'N' => print 'n' if instruction has no wait "prefix"
601 'O' => print 'd', or 'o'
602 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
603 . or suffix_always is true. print 'q' if rex prefix is present.
604 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
606 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
607 'S' => print 'w', 'l' or 'q' if suffix_always is true
608 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
609 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
610 'X' => print 's', 'd' depending on data16 prefix (for XMM)
611 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
612 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
614 Many of the above letters print nothing in Intel mode. See "putop"
617 Braces '{' and '}', and vertical bars '|', indicate alternative
618 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
619 modes. In cases where there are only two alternatives, the X86_64
620 instruction is reserved, and "(bad)" is printed.
623 static const struct dis386 dis386
[] = {
625 { "addB", Eb
, Gb
, XX
},
626 { "addS", Ev
, Gv
, XX
},
627 { "addB", Gb
, Eb
, XX
},
628 { "addS", Gv
, Ev
, XX
},
629 { "addB", AL
, Ib
, XX
},
630 { "addS", eAX
, Iv
, XX
},
631 { "push{T|}", es
, XX
, XX
},
632 { "pop{T|}", es
, XX
, XX
},
634 { "orB", Eb
, Gb
, XX
},
635 { "orS", Ev
, Gv
, XX
},
636 { "orB", Gb
, Eb
, XX
},
637 { "orS", Gv
, Ev
, XX
},
638 { "orB", AL
, Ib
, XX
},
639 { "orS", eAX
, Iv
, XX
},
640 { "push{T|}", cs
, XX
, XX
},
641 { "(bad)", XX
, XX
, XX
}, /* 0x0f extended opcode escape */
643 { "adcB", Eb
, Gb
, XX
},
644 { "adcS", Ev
, Gv
, XX
},
645 { "adcB", Gb
, Eb
, XX
},
646 { "adcS", Gv
, Ev
, XX
},
647 { "adcB", AL
, Ib
, XX
},
648 { "adcS", eAX
, Iv
, XX
},
649 { "push{T|}", ss
, XX
, XX
},
650 { "popT|}", ss
, XX
, XX
},
652 { "sbbB", Eb
, Gb
, XX
},
653 { "sbbS", Ev
, Gv
, XX
},
654 { "sbbB", Gb
, Eb
, XX
},
655 { "sbbS", Gv
, Ev
, XX
},
656 { "sbbB", AL
, Ib
, XX
},
657 { "sbbS", eAX
, Iv
, XX
},
658 { "push{T|}", ds
, XX
, XX
},
659 { "pop{T|}", ds
, XX
, XX
},
661 { "andB", Eb
, Gb
, XX
},
662 { "andS", Ev
, Gv
, XX
},
663 { "andB", Gb
, Eb
, XX
},
664 { "andS", Gv
, Ev
, XX
},
665 { "andB", AL
, Ib
, XX
},
666 { "andS", eAX
, Iv
, XX
},
667 { "(bad)", XX
, XX
, XX
}, /* SEG ES prefix */
668 { "daa{|}", XX
, XX
, XX
},
670 { "subB", Eb
, Gb
, XX
},
671 { "subS", Ev
, Gv
, XX
},
672 { "subB", Gb
, Eb
, XX
},
673 { "subS", Gv
, Ev
, XX
},
674 { "subB", AL
, Ib
, XX
},
675 { "subS", eAX
, Iv
, XX
},
676 { "(bad)", XX
, XX
, XX
}, /* SEG CS prefix */
677 { "das{|}", XX
, XX
, XX
},
679 { "xorB", Eb
, Gb
, XX
},
680 { "xorS", Ev
, Gv
, XX
},
681 { "xorB", Gb
, Eb
, XX
},
682 { "xorS", Gv
, Ev
, XX
},
683 { "xorB", AL
, Ib
, XX
},
684 { "xorS", eAX
, Iv
, XX
},
685 { "(bad)", XX
, XX
, XX
}, /* SEG SS prefix */
686 { "aaa{|}", XX
, XX
, XX
},
688 { "cmpB", Eb
, Gb
, XX
},
689 { "cmpS", Ev
, Gv
, XX
},
690 { "cmpB", Gb
, Eb
, XX
},
691 { "cmpS", Gv
, Ev
, XX
},
692 { "cmpB", AL
, Ib
, XX
},
693 { "cmpS", eAX
, Iv
, XX
},
694 { "(bad)", XX
, XX
, XX
}, /* SEG DS prefix */
695 { "aas{|}", XX
, XX
, XX
},
697 { "inc{S|}", RMeAX
, XX
, XX
},
698 { "inc{S|}", RMeCX
, XX
, XX
},
699 { "inc{S|}", RMeDX
, XX
, XX
},
700 { "inc{S|}", RMeBX
, XX
, XX
},
701 { "inc{S|}", RMeSP
, XX
, XX
},
702 { "inc{S|}", RMeBP
, XX
, XX
},
703 { "inc{S|}", RMeSI
, XX
, XX
},
704 { "inc{S|}", RMeDI
, XX
, XX
},
706 { "dec{S|}", RMeAX
, XX
, XX
},
707 { "dec{S|}", RMeCX
, XX
, XX
},
708 { "dec{S|}", RMeDX
, XX
, XX
},
709 { "dec{S|}", RMeBX
, XX
, XX
},
710 { "dec{S|}", RMeSP
, XX
, XX
},
711 { "dec{S|}", RMeBP
, XX
, XX
},
712 { "dec{S|}", RMeSI
, XX
, XX
},
713 { "dec{S|}", RMeDI
, XX
, XX
},
715 { "pushS", RMrAX
, XX
, XX
},
716 { "pushS", RMrCX
, XX
, XX
},
717 { "pushS", RMrDX
, XX
, XX
},
718 { "pushS", RMrBX
, XX
, XX
},
719 { "pushS", RMrSP
, XX
, XX
},
720 { "pushS", RMrBP
, XX
, XX
},
721 { "pushS", RMrSI
, XX
, XX
},
722 { "pushS", RMrDI
, XX
, XX
},
724 { "popS", RMrAX
, XX
, XX
},
725 { "popS", RMrCX
, XX
, XX
},
726 { "popS", RMrDX
, XX
, XX
},
727 { "popS", RMrBX
, XX
, XX
},
728 { "popS", RMrSP
, XX
, XX
},
729 { "popS", RMrBP
, XX
, XX
},
730 { "popS", RMrSI
, XX
, XX
},
731 { "popS", RMrDI
, XX
, XX
},
733 { "pusha{P|}", XX
, XX
, XX
},
734 { "popa{P|}", XX
, XX
, XX
},
735 { "bound{S|}", Gv
, Ma
, XX
},
737 { "(bad)", XX
, XX
, XX
}, /* seg fs */
738 { "(bad)", XX
, XX
, XX
}, /* seg gs */
739 { "(bad)", XX
, XX
, XX
}, /* op size prefix */
740 { "(bad)", XX
, XX
, XX
}, /* adr size prefix */
742 { "pushT", Iq
, XX
, XX
},
743 { "imulS", Gv
, Ev
, Iv
},
744 { "pushT", sIb
, XX
, XX
},
745 { "imulS", Gv
, Ev
, sIb
},
746 { "ins{b||b|}", Yb
, indirDX
, XX
},
747 { "ins{R||R|}", Yv
, indirDX
, XX
},
748 { "outs{b||b|}", indirDX
, Xb
, XX
},
749 { "outs{R||R|}", indirDX
, Xv
, XX
},
751 { "joH", Jb
, XX
, cond_jump_flag
},
752 { "jnoH", Jb
, XX
, cond_jump_flag
},
753 { "jbH", Jb
, XX
, cond_jump_flag
},
754 { "jaeH", Jb
, XX
, cond_jump_flag
},
755 { "jeH", Jb
, XX
, cond_jump_flag
},
756 { "jneH", Jb
, XX
, cond_jump_flag
},
757 { "jbeH", Jb
, XX
, cond_jump_flag
},
758 { "jaH", Jb
, XX
, cond_jump_flag
},
760 { "jsH", Jb
, XX
, cond_jump_flag
},
761 { "jnsH", Jb
, XX
, cond_jump_flag
},
762 { "jpH", Jb
, XX
, cond_jump_flag
},
763 { "jnpH", Jb
, XX
, cond_jump_flag
},
764 { "jlH", Jb
, XX
, cond_jump_flag
},
765 { "jgeH", Jb
, XX
, cond_jump_flag
},
766 { "jleH", Jb
, XX
, cond_jump_flag
},
767 { "jgH", Jb
, XX
, cond_jump_flag
},
771 { "(bad)", XX
, XX
, XX
},
773 { "testB", Eb
, Gb
, XX
},
774 { "testS", Ev
, Gv
, XX
},
775 { "xchgB", Eb
, Gb
, XX
},
776 { "xchgS", Ev
, Gv
, XX
},
778 { "movB", Eb
, Gb
, XX
},
779 { "movS", Ev
, Gv
, XX
},
780 { "movB", Gb
, Eb
, XX
},
781 { "movS", Gv
, Ev
, XX
},
782 { "movQ", Ev
, Sw
, XX
},
783 { "leaS", Gv
, M
, XX
},
784 { "movQ", Sw
, Ev
, XX
},
785 { "popU", Ev
, XX
, XX
},
787 { "nop", NOP_Fixup
, 0, XX
, XX
},
788 { "xchgS", RMeCX
, eAX
, XX
},
789 { "xchgS", RMeDX
, eAX
, XX
},
790 { "xchgS", RMeBX
, eAX
, XX
},
791 { "xchgS", RMeSP
, eAX
, XX
},
792 { "xchgS", RMeBP
, eAX
, XX
},
793 { "xchgS", RMeSI
, eAX
, XX
},
794 { "xchgS", RMeDI
, eAX
, XX
},
796 { "cW{tR||tR|}", XX
, XX
, XX
},
797 { "cR{tO||tO|}", XX
, XX
, XX
},
798 { "lcall{T|}", Ap
, XX
, XX
},
799 { "(bad)", XX
, XX
, XX
}, /* fwait */
800 { "pushfT", XX
, XX
, XX
},
801 { "popfT", XX
, XX
, XX
},
802 { "sahf{|}", XX
, XX
, XX
},
803 { "lahf{|}", XX
, XX
, XX
},
805 { "movB", AL
, Ob64
, XX
},
806 { "movS", eAX
, Ov64
, XX
},
807 { "movB", Ob64
, AL
, XX
},
808 { "movS", Ov64
, eAX
, XX
},
809 { "movs{b||b|}", Yb
, Xb
, XX
},
810 { "movs{R||R|}", Yv
, Xv
, XX
},
811 { "cmps{b||b|}", Xb
, Yb
, XX
},
812 { "cmps{R||R|}", Xv
, Yv
, XX
},
814 { "testB", AL
, Ib
, XX
},
815 { "testS", eAX
, Iv
, XX
},
816 { "stosB", Yb
, AL
, XX
},
817 { "stosS", Yv
, eAX
, XX
},
818 { "lodsB", AL
, Xb
, XX
},
819 { "lodsS", eAX
, Xv
, XX
},
820 { "scasB", AL
, Yb
, XX
},
821 { "scasS", eAX
, Yv
, XX
},
823 { "movB", RMAL
, Ib
, XX
},
824 { "movB", RMCL
, Ib
, XX
},
825 { "movB", RMDL
, Ib
, XX
},
826 { "movB", RMBL
, Ib
, XX
},
827 { "movB", RMAH
, Ib
, XX
},
828 { "movB", RMCH
, Ib
, XX
},
829 { "movB", RMDH
, Ib
, XX
},
830 { "movB", RMBH
, Ib
, XX
},
832 { "movS", RMeAX
, Iv64
, XX
},
833 { "movS", RMeCX
, Iv64
, XX
},
834 { "movS", RMeDX
, Iv64
, XX
},
835 { "movS", RMeBX
, Iv64
, XX
},
836 { "movS", RMeSP
, Iv64
, XX
},
837 { "movS", RMeBP
, Iv64
, XX
},
838 { "movS", RMeSI
, Iv64
, XX
},
839 { "movS", RMeDI
, Iv64
, XX
},
843 { "retT", Iw
, XX
, XX
},
844 { "retT", XX
, XX
, XX
},
845 { "les{S|}", Gv
, Mp
, XX
},
846 { "ldsS", Gv
, Mp
, XX
},
847 { "movA", Eb
, Ib
, XX
},
848 { "movQ", Ev
, Iv
, XX
},
850 { "enterT", Iw
, Ib
, XX
},
851 { "leaveT", XX
, XX
, XX
},
852 { "lretP", Iw
, XX
, XX
},
853 { "lretP", XX
, XX
, XX
},
854 { "int3", XX
, XX
, XX
},
855 { "int", Ib
, XX
, XX
},
856 { "into{|}", XX
, XX
, XX
},
857 { "iretP", XX
, XX
, XX
},
863 { "aam{|}", sIb
, XX
, XX
},
864 { "aad{|}", sIb
, XX
, XX
},
865 { "(bad)", XX
, XX
, XX
},
866 { "xlat", DSBX
, XX
, XX
},
877 { "loopneFH", Jb
, XX
, loop_jcxz_flag
},
878 { "loopeFH", Jb
, XX
, loop_jcxz_flag
},
879 { "loopFH", Jb
, XX
, loop_jcxz_flag
},
880 { "jEcxzH", Jb
, XX
, loop_jcxz_flag
},
881 { "inB", AL
, Ib
, XX
},
882 { "inS", eAX
, Ib
, XX
},
883 { "outB", Ib
, AL
, XX
},
884 { "outS", Ib
, eAX
, XX
},
886 { "callT", Jv
, XX
, XX
},
887 { "jmpT", Jv
, XX
, XX
},
888 { "ljmp{T|}", Ap
, XX
, XX
},
889 { "jmp", Jb
, XX
, XX
},
890 { "inB", AL
, indirDX
, XX
},
891 { "inS", eAX
, indirDX
, XX
},
892 { "outB", indirDX
, AL
, XX
},
893 { "outS", indirDX
, eAX
, XX
},
895 { "(bad)", XX
, XX
, XX
}, /* lock prefix */
896 { "icebp", XX
, XX
, XX
},
897 { "(bad)", XX
, XX
, XX
}, /* repne */
898 { "(bad)", XX
, XX
, XX
}, /* repz */
899 { "hlt", XX
, XX
, XX
},
900 { "cmc", XX
, XX
, XX
},
904 { "clc", XX
, XX
, XX
},
905 { "stc", XX
, XX
, XX
},
906 { "cli", XX
, XX
, XX
},
907 { "sti", XX
, XX
, XX
},
908 { "cld", XX
, XX
, XX
},
909 { "std", XX
, XX
, XX
},
914 static const struct dis386 dis386_twobyte
[] = {
918 { "larS", Gv
, Ew
, XX
},
919 { "lslS", Gv
, Ew
, XX
},
920 { "(bad)", XX
, XX
, XX
},
921 { "syscall", XX
, XX
, XX
},
922 { "clts", XX
, XX
, XX
},
923 { "sysretP", XX
, XX
, XX
},
925 { "invd", XX
, XX
, XX
},
926 { "wbinvd", XX
, XX
, XX
},
927 { "(bad)", XX
, XX
, XX
},
928 { "ud2a", XX
, XX
, XX
},
929 { "(bad)", XX
, XX
, XX
},
931 { "femms", XX
, XX
, XX
},
932 { "", MX
, EM
, OPSUF
}, /* See OP_3DNowSuffix. */
937 { "movlpX", EX
, XM
, SIMD_Fixup
, 'h' },
938 { "unpcklpX", XM
, EX
, XX
},
939 { "unpckhpX", XM
, EX
, XX
},
941 { "movhpX", EX
, XM
, SIMD_Fixup
, 'l' },
944 { "(bad)", XX
, XX
, XX
},
945 { "(bad)", XX
, XX
, XX
},
946 { "(bad)", XX
, XX
, XX
},
947 { "(bad)", XX
, XX
, XX
},
948 { "(bad)", XX
, XX
, XX
},
949 { "(bad)", XX
, XX
, XX
},
950 { "(bad)", XX
, XX
, XX
},
952 { "movL", Rm
, Cm
, XX
},
953 { "movL", Rm
, Dm
, XX
},
954 { "movL", Cm
, Rm
, XX
},
955 { "movL", Dm
, Rm
, XX
},
956 { "movL", Rd
, Td
, XX
},
957 { "(bad)", XX
, XX
, XX
},
958 { "movL", Td
, Rd
, XX
},
959 { "(bad)", XX
, XX
, XX
},
961 { "movapX", XM
, EX
, XX
},
962 { "movapX", EX
, XM
, XX
},
964 { "movntpX", Ev
, XM
, XX
},
967 { "ucomisX", XM
,EX
, XX
},
968 { "comisX", XM
,EX
, XX
},
970 { "wrmsr", XX
, XX
, XX
},
971 { "rdtsc", XX
, XX
, XX
},
972 { "rdmsr", XX
, XX
, XX
},
973 { "rdpmc", XX
, XX
, XX
},
974 { "sysenter", XX
, XX
, XX
},
975 { "sysexit", XX
, XX
, XX
},
976 { "(bad)", XX
, XX
, XX
},
977 { "(bad)", XX
, XX
, XX
},
979 { "(bad)", XX
, XX
, XX
},
980 { "(bad)", XX
, XX
, XX
},
981 { "(bad)", XX
, XX
, XX
},
982 { "(bad)", XX
, XX
, XX
},
983 { "(bad)", XX
, XX
, XX
},
984 { "(bad)", XX
, XX
, XX
},
985 { "(bad)", XX
, XX
, XX
},
986 { "(bad)", XX
, XX
, XX
},
988 { "cmovo", Gv
, Ev
, XX
},
989 { "cmovno", Gv
, Ev
, XX
},
990 { "cmovb", Gv
, Ev
, XX
},
991 { "cmovae", Gv
, Ev
, XX
},
992 { "cmove", Gv
, Ev
, XX
},
993 { "cmovne", Gv
, Ev
, XX
},
994 { "cmovbe", Gv
, Ev
, XX
},
995 { "cmova", Gv
, Ev
, XX
},
997 { "cmovs", Gv
, Ev
, XX
},
998 { "cmovns", Gv
, Ev
, XX
},
999 { "cmovp", Gv
, Ev
, XX
},
1000 { "cmovnp", Gv
, Ev
, XX
},
1001 { "cmovl", Gv
, Ev
, XX
},
1002 { "cmovge", Gv
, Ev
, XX
},
1003 { "cmovle", Gv
, Ev
, XX
},
1004 { "cmovg", Gv
, Ev
, XX
},
1006 { "movmskpX", Gd
, XS
, XX
},
1010 { "andpX", XM
, EX
, XX
},
1011 { "andnpX", XM
, EX
, XX
},
1012 { "orpX", XM
, EX
, XX
},
1013 { "xorpX", XM
, EX
, XX
},
1024 { "punpcklbw", MX
, EM
, XX
},
1025 { "punpcklwd", MX
, EM
, XX
},
1026 { "punpckldq", MX
, EM
, XX
},
1027 { "packsswb", MX
, EM
, XX
},
1028 { "pcmpgtb", MX
, EM
, XX
},
1029 { "pcmpgtw", MX
, EM
, XX
},
1030 { "pcmpgtd", MX
, EM
, XX
},
1031 { "packuswb", MX
, EM
, XX
},
1033 { "punpckhbw", MX
, EM
, XX
},
1034 { "punpckhwd", MX
, EM
, XX
},
1035 { "punpckhdq", MX
, EM
, XX
},
1036 { "packssdw", MX
, EM
, XX
},
1039 { "movd", MX
, Edq
, XX
},
1046 { "pcmpeqb", MX
, EM
, XX
},
1047 { "pcmpeqw", MX
, EM
, XX
},
1048 { "pcmpeqd", MX
, EM
, XX
},
1049 { "emms", XX
, XX
, XX
},
1051 { "(bad)", XX
, XX
, XX
},
1052 { "(bad)", XX
, XX
, XX
},
1053 { "(bad)", XX
, XX
, XX
},
1054 { "(bad)", XX
, XX
, XX
},
1060 { "joH", Jv
, XX
, cond_jump_flag
},
1061 { "jnoH", Jv
, XX
, cond_jump_flag
},
1062 { "jbH", Jv
, XX
, cond_jump_flag
},
1063 { "jaeH", Jv
, XX
, cond_jump_flag
},
1064 { "jeH", Jv
, XX
, cond_jump_flag
},
1065 { "jneH", Jv
, XX
, cond_jump_flag
},
1066 { "jbeH", Jv
, XX
, cond_jump_flag
},
1067 { "jaH", Jv
, XX
, cond_jump_flag
},
1069 { "jsH", Jv
, XX
, cond_jump_flag
},
1070 { "jnsH", Jv
, XX
, cond_jump_flag
},
1071 { "jpH", Jv
, XX
, cond_jump_flag
},
1072 { "jnpH", Jv
, XX
, cond_jump_flag
},
1073 { "jlH", Jv
, XX
, cond_jump_flag
},
1074 { "jgeH", Jv
, XX
, cond_jump_flag
},
1075 { "jleH", Jv
, XX
, cond_jump_flag
},
1076 { "jgH", Jv
, XX
, cond_jump_flag
},
1078 { "seto", Eb
, XX
, XX
},
1079 { "setno", Eb
, XX
, XX
},
1080 { "setb", Eb
, XX
, XX
},
1081 { "setae", Eb
, XX
, XX
},
1082 { "sete", Eb
, XX
, XX
},
1083 { "setne", Eb
, XX
, XX
},
1084 { "setbe", Eb
, XX
, XX
},
1085 { "seta", Eb
, XX
, XX
},
1087 { "sets", Eb
, XX
, XX
},
1088 { "setns", Eb
, XX
, XX
},
1089 { "setp", Eb
, XX
, XX
},
1090 { "setnp", Eb
, XX
, XX
},
1091 { "setl", Eb
, XX
, XX
},
1092 { "setge", Eb
, XX
, XX
},
1093 { "setle", Eb
, XX
, XX
},
1094 { "setg", Eb
, XX
, XX
},
1096 { "pushT", fs
, XX
, XX
},
1097 { "popT", fs
, XX
, XX
},
1098 { "cpuid", XX
, XX
, XX
},
1099 { "btS", Ev
, Gv
, XX
},
1100 { "shldS", Ev
, Gv
, Ib
},
1101 { "shldS", Ev
, Gv
, CL
},
1102 { "(bad)", XX
, XX
, XX
},
1105 { "pushT", gs
, XX
, XX
},
1106 { "popT", gs
, XX
, XX
},
1107 { "rsm", XX
, XX
, XX
},
1108 { "btsS", Ev
, Gv
, XX
},
1109 { "shrdS", Ev
, Gv
, Ib
},
1110 { "shrdS", Ev
, Gv
, CL
},
1112 { "imulS", Gv
, Ev
, XX
},
1114 { "cmpxchgB", Eb
, Gb
, XX
},
1115 { "cmpxchgS", Ev
, Gv
, XX
},
1116 { "lssS", Gv
, Mp
, XX
},
1117 { "btrS", Ev
, Gv
, XX
},
1118 { "lfsS", Gv
, Mp
, XX
},
1119 { "lgsS", Gv
, Mp
, XX
},
1120 { "movz{bR|x|bR|x}", Gv
, Eb
, XX
},
1121 { "movz{wR|x|wR|x}", Gv
, Ew
, XX
}, /* yes, there really is movzww ! */
1123 { "(bad)", XX
, XX
, XX
},
1124 { "ud2b", XX
, XX
, XX
},
1126 { "btcS", Ev
, Gv
, XX
},
1127 { "bsfS", Gv
, Ev
, XX
},
1128 { "bsrS", Gv
, Ev
, XX
},
1129 { "movs{bR|x|bR|x}", Gv
, Eb
, XX
},
1130 { "movs{wR|x|wR|x}", Gv
, Ew
, XX
}, /* yes, there really is movsww ! */
1132 { "xaddB", Eb
, Gb
, XX
},
1133 { "xaddS", Ev
, Gv
, XX
},
1135 { "movntiS", Ev
, Gv
, XX
},
1136 { "pinsrw", MX
, Ed
, Ib
},
1137 { "pextrw", Gd
, MS
, Ib
},
1138 { "shufpX", XM
, EX
, Ib
},
1141 { "bswap", RMeAX
, XX
, XX
},
1142 { "bswap", RMeCX
, XX
, XX
},
1143 { "bswap", RMeDX
, XX
, XX
},
1144 { "bswap", RMeBX
, XX
, XX
},
1145 { "bswap", RMeSP
, XX
, XX
},
1146 { "bswap", RMeBP
, XX
, XX
},
1147 { "bswap", RMeSI
, XX
, XX
},
1148 { "bswap", RMeDI
, XX
, XX
},
1151 { "psrlw", MX
, EM
, XX
},
1152 { "psrld", MX
, EM
, XX
},
1153 { "psrlq", MX
, EM
, XX
},
1154 { "paddq", MX
, EM
, XX
},
1155 { "pmullw", MX
, EM
, XX
},
1157 { "pmovmskb", Gd
, MS
, XX
},
1159 { "psubusb", MX
, EM
, XX
},
1160 { "psubusw", MX
, EM
, XX
},
1161 { "pminub", MX
, EM
, XX
},
1162 { "pand", MX
, EM
, XX
},
1163 { "paddusb", MX
, EM
, XX
},
1164 { "paddusw", MX
, EM
, XX
},
1165 { "pmaxub", MX
, EM
, XX
},
1166 { "pandn", MX
, EM
, XX
},
1168 { "pavgb", MX
, EM
, XX
},
1169 { "psraw", MX
, EM
, XX
},
1170 { "psrad", MX
, EM
, XX
},
1171 { "pavgw", MX
, EM
, XX
},
1172 { "pmulhuw", MX
, EM
, XX
},
1173 { "pmulhw", MX
, EM
, XX
},
1177 { "psubsb", MX
, EM
, XX
},
1178 { "psubsw", MX
, EM
, XX
},
1179 { "pminsw", MX
, EM
, XX
},
1180 { "por", MX
, EM
, XX
},
1181 { "paddsb", MX
, EM
, XX
},
1182 { "paddsw", MX
, EM
, XX
},
1183 { "pmaxsw", MX
, EM
, XX
},
1184 { "pxor", MX
, EM
, XX
},
1187 { "psllw", MX
, EM
, XX
},
1188 { "pslld", MX
, EM
, XX
},
1189 { "psllq", MX
, EM
, XX
},
1190 { "pmuludq", MX
, EM
, XX
},
1191 { "pmaddwd", MX
, EM
, XX
},
1192 { "psadbw", MX
, EM
, XX
},
1195 { "psubb", MX
, EM
, XX
},
1196 { "psubw", MX
, EM
, XX
},
1197 { "psubd", MX
, EM
, XX
},
1198 { "psubq", MX
, EM
, XX
},
1199 { "paddb", MX
, EM
, XX
},
1200 { "paddw", MX
, EM
, XX
},
1201 { "paddd", MX
, EM
, XX
},
1202 { "(bad)", XX
, XX
, XX
}
1205 static const unsigned char onebyte_has_modrm
[256] = {
1206 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1207 /* ------------------------------- */
1208 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1209 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1210 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1211 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1212 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1213 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1214 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1215 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1216 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1217 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1218 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1219 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1220 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1221 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1222 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1223 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1224 /* ------------------------------- */
1225 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1228 static const unsigned char twobyte_has_modrm
[256] = {
1229 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1230 /* ------------------------------- */
1231 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1232 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1233 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1234 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1235 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1236 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1237 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1238 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,1,1,1,1, /* 7f */
1239 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1240 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1241 /* a0 */ 0,0,0,1,1,1,0,1,0,0,0,1,1,1,1,1, /* af */
1242 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1243 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1244 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1245 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1246 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1247 /* ------------------------------- */
1248 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1251 static const unsigned char twobyte_uses_SSE_prefix
[256] = {
1252 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1253 /* ------------------------------- */
1254 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1255 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1256 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1257 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1258 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1259 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1260 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1261 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
1262 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1263 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1264 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1265 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1266 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1267 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1268 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1269 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1270 /* ------------------------------- */
1271 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1274 static char obuf
[100];
1276 static char scratchbuf
[100];
1277 static unsigned char *start_codep
;
1278 static unsigned char *insn_codep
;
1279 static unsigned char *codep
;
1280 static disassemble_info
*the_info
;
1284 static unsigned char need_modrm
;
1286 /* If we are accessing mod/rm/reg without need_modrm set, then the
1287 values are stale. Hitting this abort likely indicates that you
1288 need to update onebyte_has_modrm or twobyte_has_modrm. */
1289 #define MODRM_CHECK if (!need_modrm) abort ()
1291 static const char **names64
;
1292 static const char **names32
;
1293 static const char **names16
;
1294 static const char **names8
;
1295 static const char **names8rex
;
1296 static const char **names_seg
;
1297 static const char **index16
;
1299 static const char *intel_names64
[] = {
1300 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1301 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1303 static const char *intel_names32
[] = {
1304 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1305 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1307 static const char *intel_names16
[] = {
1308 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1309 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1311 static const char *intel_names8
[] = {
1312 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1314 static const char *intel_names8rex
[] = {
1315 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1316 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1318 static const char *intel_names_seg
[] = {
1319 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1321 static const char *intel_index16
[] = {
1322 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1325 static const char *att_names64
[] = {
1326 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1327 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1329 static const char *att_names32
[] = {
1330 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1331 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1333 static const char *att_names16
[] = {
1334 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1335 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1337 static const char *att_names8
[] = {
1338 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1340 static const char *att_names8rex
[] = {
1341 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1342 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1344 static const char *att_names_seg
[] = {
1345 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1347 static const char *att_index16
[] = {
1348 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1351 static const struct dis386 grps
[][8] = {
1354 { "addA", Eb
, Ib
, XX
},
1355 { "orA", Eb
, Ib
, XX
},
1356 { "adcA", Eb
, Ib
, XX
},
1357 { "sbbA", Eb
, Ib
, XX
},
1358 { "andA", Eb
, Ib
, XX
},
1359 { "subA", Eb
, Ib
, XX
},
1360 { "xorA", Eb
, Ib
, XX
},
1361 { "cmpA", Eb
, Ib
, XX
}
1365 { "addQ", Ev
, Iv
, XX
},
1366 { "orQ", Ev
, Iv
, XX
},
1367 { "adcQ", Ev
, Iv
, XX
},
1368 { "sbbQ", Ev
, Iv
, XX
},
1369 { "andQ", Ev
, Iv
, XX
},
1370 { "subQ", Ev
, Iv
, XX
},
1371 { "xorQ", Ev
, Iv
, XX
},
1372 { "cmpQ", Ev
, Iv
, XX
}
1376 { "addQ", Ev
, sIb
, XX
},
1377 { "orQ", Ev
, sIb
, XX
},
1378 { "adcQ", Ev
, sIb
, XX
},
1379 { "sbbQ", Ev
, sIb
, XX
},
1380 { "andQ", Ev
, sIb
, XX
},
1381 { "subQ", Ev
, sIb
, XX
},
1382 { "xorQ", Ev
, sIb
, XX
},
1383 { "cmpQ", Ev
, sIb
, XX
}
1387 { "rolA", Eb
, Ib
, XX
},
1388 { "rorA", Eb
, Ib
, XX
},
1389 { "rclA", Eb
, Ib
, XX
},
1390 { "rcrA", Eb
, Ib
, XX
},
1391 { "shlA", Eb
, Ib
, XX
},
1392 { "shrA", Eb
, Ib
, XX
},
1393 { "(bad)", XX
, XX
, XX
},
1394 { "sarA", Eb
, Ib
, XX
},
1398 { "rolQ", Ev
, Ib
, XX
},
1399 { "rorQ", Ev
, Ib
, XX
},
1400 { "rclQ", Ev
, Ib
, XX
},
1401 { "rcrQ", Ev
, Ib
, XX
},
1402 { "shlQ", Ev
, Ib
, XX
},
1403 { "shrQ", Ev
, Ib
, XX
},
1404 { "(bad)", XX
, XX
, XX
},
1405 { "sarQ", Ev
, Ib
, XX
},
1409 { "rolA", Eb
, XX
, XX
},
1410 { "rorA", Eb
, XX
, XX
},
1411 { "rclA", Eb
, XX
, XX
},
1412 { "rcrA", Eb
, XX
, XX
},
1413 { "shlA", Eb
, XX
, XX
},
1414 { "shrA", Eb
, XX
, XX
},
1415 { "(bad)", XX
, XX
, XX
},
1416 { "sarA", Eb
, XX
, XX
},
1420 { "rolQ", Ev
, XX
, XX
},
1421 { "rorQ", Ev
, XX
, XX
},
1422 { "rclQ", Ev
, XX
, XX
},
1423 { "rcrQ", Ev
, XX
, XX
},
1424 { "shlQ", Ev
, XX
, XX
},
1425 { "shrQ", Ev
, XX
, XX
},
1426 { "(bad)", XX
, XX
, XX
},
1427 { "sarQ", Ev
, XX
, XX
},
1431 { "rolA", Eb
, CL
, XX
},
1432 { "rorA", Eb
, CL
, XX
},
1433 { "rclA", Eb
, CL
, XX
},
1434 { "rcrA", Eb
, CL
, XX
},
1435 { "shlA", Eb
, CL
, XX
},
1436 { "shrA", Eb
, CL
, XX
},
1437 { "(bad)", XX
, XX
, XX
},
1438 { "sarA", Eb
, CL
, XX
},
1442 { "rolQ", Ev
, CL
, XX
},
1443 { "rorQ", Ev
, CL
, XX
},
1444 { "rclQ", Ev
, CL
, XX
},
1445 { "rcrQ", Ev
, CL
, XX
},
1446 { "shlQ", Ev
, CL
, XX
},
1447 { "shrQ", Ev
, CL
, XX
},
1448 { "(bad)", XX
, XX
, XX
},
1449 { "sarQ", Ev
, CL
, XX
}
1453 { "testA", Eb
, Ib
, XX
},
1454 { "(bad)", Eb
, XX
, XX
},
1455 { "notA", Eb
, XX
, XX
},
1456 { "negA", Eb
, XX
, XX
},
1457 { "mulA", Eb
, XX
, XX
}, /* Don't print the implicit %al register, */
1458 { "imulA", Eb
, XX
, XX
}, /* to distinguish these opcodes from other */
1459 { "divA", Eb
, XX
, XX
}, /* mul/imul opcodes. Do the same for div */
1460 { "idivA", Eb
, XX
, XX
} /* and idiv for consistency. */
1464 { "testQ", Ev
, Iv
, XX
},
1465 { "(bad)", XX
, XX
, XX
},
1466 { "notQ", Ev
, XX
, XX
},
1467 { "negQ", Ev
, XX
, XX
},
1468 { "mulQ", Ev
, XX
, XX
}, /* Don't print the implicit register. */
1469 { "imulQ", Ev
, XX
, XX
},
1470 { "divQ", Ev
, XX
, XX
},
1471 { "idivQ", Ev
, XX
, XX
},
1475 { "incA", Eb
, XX
, XX
},
1476 { "decA", Eb
, XX
, XX
},
1477 { "(bad)", XX
, XX
, XX
},
1478 { "(bad)", XX
, XX
, XX
},
1479 { "(bad)", XX
, XX
, XX
},
1480 { "(bad)", XX
, XX
, XX
},
1481 { "(bad)", XX
, XX
, XX
},
1482 { "(bad)", XX
, XX
, XX
},
1486 { "incQ", Ev
, XX
, XX
},
1487 { "decQ", Ev
, XX
, XX
},
1488 { "callT", indirEv
, XX
, XX
},
1489 { "lcallT", indirEv
, XX
, XX
},
1490 { "jmpT", indirEv
, XX
, XX
},
1491 { "ljmpT", indirEv
, XX
, XX
},
1492 { "pushU", Ev
, XX
, XX
},
1493 { "(bad)", XX
, XX
, XX
},
1497 { "sldtQ", Ev
, XX
, XX
},
1498 { "strQ", Ev
, XX
, XX
},
1499 { "lldt", Ew
, XX
, XX
},
1500 { "ltr", Ew
, XX
, XX
},
1501 { "verr", Ew
, XX
, XX
},
1502 { "verw", Ew
, XX
, XX
},
1503 { "(bad)", XX
, XX
, XX
},
1504 { "(bad)", XX
, XX
, XX
}
1508 { "sgdtQ", M
, XX
, XX
},
1509 { "sidtQ", PNI_Fixup
, 0, XX
, XX
},
1510 { "lgdtQ", M
, XX
, XX
},
1511 { "lidtQ", M
, XX
, XX
},
1512 { "smswQ", Ev
, XX
, XX
},
1513 { "(bad)", XX
, XX
, XX
},
1514 { "lmsw", Ew
, XX
, XX
},
1515 { "invlpg", INVLPG_Fixup
, w_mode
, XX
, XX
},
1519 { "(bad)", XX
, XX
, XX
},
1520 { "(bad)", XX
, XX
, XX
},
1521 { "(bad)", XX
, XX
, XX
},
1522 { "(bad)", XX
, XX
, XX
},
1523 { "btQ", Ev
, Ib
, XX
},
1524 { "btsQ", Ev
, Ib
, XX
},
1525 { "btrQ", Ev
, Ib
, XX
},
1526 { "btcQ", Ev
, Ib
, XX
},
1530 { "(bad)", XX
, XX
, XX
},
1531 { "cmpxchg8b", Ev
, XX
, XX
},
1532 { "(bad)", XX
, XX
, XX
},
1533 { "(bad)", XX
, XX
, XX
},
1534 { "(bad)", XX
, XX
, XX
},
1535 { "(bad)", XX
, XX
, XX
},
1536 { "(bad)", XX
, XX
, XX
},
1537 { "(bad)", XX
, XX
, XX
},
1541 { "(bad)", XX
, XX
, XX
},
1542 { "(bad)", XX
, XX
, XX
},
1543 { "psrlw", MS
, Ib
, XX
},
1544 { "(bad)", XX
, XX
, XX
},
1545 { "psraw", MS
, Ib
, XX
},
1546 { "(bad)", XX
, XX
, XX
},
1547 { "psllw", MS
, Ib
, XX
},
1548 { "(bad)", XX
, XX
, XX
},
1552 { "(bad)", XX
, XX
, XX
},
1553 { "(bad)", XX
, XX
, XX
},
1554 { "psrld", MS
, Ib
, XX
},
1555 { "(bad)", XX
, XX
, XX
},
1556 { "psrad", MS
, Ib
, XX
},
1557 { "(bad)", XX
, XX
, XX
},
1558 { "pslld", MS
, Ib
, XX
},
1559 { "(bad)", XX
, XX
, XX
},
1563 { "(bad)", XX
, XX
, XX
},
1564 { "(bad)", XX
, XX
, XX
},
1565 { "psrlq", MS
, Ib
, XX
},
1566 { "psrldq", MS
, Ib
, XX
},
1567 { "(bad)", XX
, XX
, XX
},
1568 { "(bad)", XX
, XX
, XX
},
1569 { "psllq", MS
, Ib
, XX
},
1570 { "pslldq", MS
, Ib
, XX
},
1574 { "fxsave", Ev
, XX
, XX
},
1575 { "fxrstor", Ev
, XX
, XX
},
1576 { "ldmxcsr", Ev
, XX
, XX
},
1577 { "stmxcsr", Ev
, XX
, XX
},
1578 { "(bad)", XX
, XX
, XX
},
1579 { "lfence", OP_0fae
, 0, XX
, XX
},
1580 { "mfence", OP_0fae
, 0, XX
, XX
},
1581 { "clflush", OP_0fae
, 0, XX
, XX
},
1585 { "prefetchnta", Ev
, XX
, XX
},
1586 { "prefetcht0", Ev
, XX
, XX
},
1587 { "prefetcht1", Ev
, XX
, XX
},
1588 { "prefetcht2", Ev
, XX
, XX
},
1589 { "(bad)", XX
, XX
, XX
},
1590 { "(bad)", XX
, XX
, XX
},
1591 { "(bad)", XX
, XX
, XX
},
1592 { "(bad)", XX
, XX
, XX
},
1596 { "prefetch", Eb
, XX
, XX
},
1597 { "prefetchw", Eb
, XX
, XX
},
1598 { "(bad)", XX
, XX
, XX
},
1599 { "(bad)", XX
, XX
, XX
},
1600 { "(bad)", XX
, XX
, XX
},
1601 { "(bad)", XX
, XX
, XX
},
1602 { "(bad)", XX
, XX
, XX
},
1603 { "(bad)", XX
, XX
, XX
},
1607 { "xstorerng", OP_0f07
, 0, XX
, XX
},
1608 { "xcryptecb", OP_0f07
, 0, XX
, XX
},
1609 { "xcryptcbc", OP_0f07
, 0, XX
, XX
},
1610 { "(bad)", OP_0f07
, 0, XX
, XX
},
1611 { "xcryptcfb", OP_0f07
, 0, XX
, XX
},
1612 { "xcryptofb", OP_0f07
, 0, XX
, XX
},
1613 { "(bad)", OP_0f07
, 0, XX
, XX
},
1614 { "(bad)", OP_0f07
, 0, XX
, XX
},
1618 static const struct dis386 prefix_user_table
[][4] = {
1621 { "addps", XM
, EX
, XX
},
1622 { "addss", XM
, EX
, XX
},
1623 { "addpd", XM
, EX
, XX
},
1624 { "addsd", XM
, EX
, XX
},
1628 { "", XM
, EX
, OPSIMD
}, /* See OP_SIMD_SUFFIX. */
1629 { "", XM
, EX
, OPSIMD
},
1630 { "", XM
, EX
, OPSIMD
},
1631 { "", XM
, EX
, OPSIMD
},
1635 { "cvtpi2ps", XM
, EM
, XX
},
1636 { "cvtsi2ssY", XM
, Ev
, XX
},
1637 { "cvtpi2pd", XM
, EM
, XX
},
1638 { "cvtsi2sdY", XM
, Ev
, XX
},
1642 { "cvtps2pi", MX
, EX
, XX
},
1643 { "cvtss2siY", Gv
, EX
, XX
},
1644 { "cvtpd2pi", MX
, EX
, XX
},
1645 { "cvtsd2siY", Gv
, EX
, XX
},
1649 { "cvttps2pi", MX
, EX
, XX
},
1650 { "cvttss2siY", Gv
, EX
, XX
},
1651 { "cvttpd2pi", MX
, EX
, XX
},
1652 { "cvttsd2siY", Gv
, EX
, XX
},
1656 { "divps", XM
, EX
, XX
},
1657 { "divss", XM
, EX
, XX
},
1658 { "divpd", XM
, EX
, XX
},
1659 { "divsd", XM
, EX
, XX
},
1663 { "maxps", XM
, EX
, XX
},
1664 { "maxss", XM
, EX
, XX
},
1665 { "maxpd", XM
, EX
, XX
},
1666 { "maxsd", XM
, EX
, XX
},
1670 { "minps", XM
, EX
, XX
},
1671 { "minss", XM
, EX
, XX
},
1672 { "minpd", XM
, EX
, XX
},
1673 { "minsd", XM
, EX
, XX
},
1677 { "movups", XM
, EX
, XX
},
1678 { "movss", XM
, EX
, XX
},
1679 { "movupd", XM
, EX
, XX
},
1680 { "movsd", XM
, EX
, XX
},
1684 { "movups", EX
, XM
, XX
},
1685 { "movss", EX
, XM
, XX
},
1686 { "movupd", EX
, XM
, XX
},
1687 { "movsd", EX
, XM
, XX
},
1691 { "mulps", XM
, EX
, XX
},
1692 { "mulss", XM
, EX
, XX
},
1693 { "mulpd", XM
, EX
, XX
},
1694 { "mulsd", XM
, EX
, XX
},
1698 { "rcpps", XM
, EX
, XX
},
1699 { "rcpss", XM
, EX
, XX
},
1700 { "(bad)", XM
, EX
, XX
},
1701 { "(bad)", XM
, EX
, XX
},
1705 { "rsqrtps", XM
, EX
, XX
},
1706 { "rsqrtss", XM
, EX
, XX
},
1707 { "(bad)", XM
, EX
, XX
},
1708 { "(bad)", XM
, EX
, XX
},
1712 { "sqrtps", XM
, EX
, XX
},
1713 { "sqrtss", XM
, EX
, XX
},
1714 { "sqrtpd", XM
, EX
, XX
},
1715 { "sqrtsd", XM
, EX
, XX
},
1719 { "subps", XM
, EX
, XX
},
1720 { "subss", XM
, EX
, XX
},
1721 { "subpd", XM
, EX
, XX
},
1722 { "subsd", XM
, EX
, XX
},
1726 { "(bad)", XM
, EX
, XX
},
1727 { "cvtdq2pd", XM
, EX
, XX
},
1728 { "cvttpd2dq", XM
, EX
, XX
},
1729 { "cvtpd2dq", XM
, EX
, XX
},
1733 { "cvtdq2ps", XM
, EX
, XX
},
1734 { "cvttps2dq",XM
, EX
, XX
},
1735 { "cvtps2dq",XM
, EX
, XX
},
1736 { "(bad)", XM
, EX
, XX
},
1740 { "cvtps2pd", XM
, EX
, XX
},
1741 { "cvtss2sd", XM
, EX
, XX
},
1742 { "cvtpd2ps", XM
, EX
, XX
},
1743 { "cvtsd2ss", XM
, EX
, XX
},
1747 { "maskmovq", MX
, MS
, XX
},
1748 { "(bad)", XM
, EX
, XX
},
1749 { "maskmovdqu", XM
, EX
, XX
},
1750 { "(bad)", XM
, EX
, XX
},
1754 { "movq", MX
, EM
, XX
},
1755 { "movdqu", XM
, EX
, XX
},
1756 { "movdqa", XM
, EX
, XX
},
1757 { "(bad)", XM
, EX
, XX
},
1761 { "movq", EM
, MX
, XX
},
1762 { "movdqu", EX
, XM
, XX
},
1763 { "movdqa", EX
, XM
, XX
},
1764 { "(bad)", EX
, XM
, XX
},
1768 { "(bad)", EX
, XM
, XX
},
1769 { "movq2dq", XM
, MS
, XX
},
1770 { "movq", EX
, XM
, XX
},
1771 { "movdq2q", MX
, XS
, XX
},
1775 { "pshufw", MX
, EM
, Ib
},
1776 { "pshufhw", XM
, EX
, Ib
},
1777 { "pshufd", XM
, EX
, Ib
},
1778 { "pshuflw", XM
, EX
, Ib
},
1782 { "movd", Edq
, MX
, XX
},
1783 { "movq", XM
, EX
, XX
},
1784 { "movd", Edq
, XM
, XX
},
1785 { "(bad)", Ed
, XM
, XX
},
1789 { "(bad)", MX
, EX
, XX
},
1790 { "(bad)", XM
, EX
, XX
},
1791 { "punpckhqdq", XM
, EX
, XX
},
1792 { "(bad)", XM
, EX
, XX
},
1796 { "movntq", Ev
, MX
, XX
},
1797 { "(bad)", Ev
, XM
, XX
},
1798 { "movntdq", Ev
, XM
, XX
},
1799 { "(bad)", Ev
, XM
, XX
},
1803 { "(bad)", MX
, EX
, XX
},
1804 { "(bad)", XM
, EX
, XX
},
1805 { "punpcklqdq", XM
, EX
, XX
},
1806 { "(bad)", XM
, EX
, XX
},
1810 { "(bad)", MX
, EX
, XX
},
1811 { "(bad)", XM
, EX
, XX
},
1812 { "addsubpd", XM
, EX
, XX
},
1813 { "addsubps", XM
, EX
, XX
},
1817 { "(bad)", MX
, EX
, XX
},
1818 { "(bad)", XM
, EX
, XX
},
1819 { "haddpd", XM
, EX
, XX
},
1820 { "haddps", XM
, EX
, XX
},
1824 { "(bad)", MX
, EX
, XX
},
1825 { "(bad)", XM
, EX
, XX
},
1826 { "hsubpd", XM
, EX
, XX
},
1827 { "hsubps", XM
, EX
, XX
},
1831 { "movlpX", XM
, EX
, SIMD_Fixup
, 'h' }, /* really only 2 operands */
1832 { "movsldup", XM
, EX
, XX
},
1833 { "movlpd", XM
, EX
, XX
},
1834 { "movddup", XM
, EX
, XX
},
1838 { "movhpX", XM
, EX
, SIMD_Fixup
, 'l' },
1839 { "movshdup", XM
, EX
, XX
},
1840 { "movhpd", XM
, EX
, XX
},
1841 { "(bad)", XM
, EX
, XX
},
1845 { "(bad)", XM
, EX
, XX
},
1846 { "(bad)", XM
, EX
, XX
},
1847 { "(bad)", XM
, EX
, XX
},
1848 { "lddqu", XM
, M
, XX
},
1852 static const struct dis386 x86_64_table
[][2] = {
1854 { "arpl", Ew
, Gw
, XX
},
1855 { "movs{||lq|xd}", Gv
, Ed
, XX
},
1859 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1871 FETCH_DATA (the_info
, codep
+ 1);
1875 /* REX prefixes family. */
1898 prefixes
|= PREFIX_REPZ
;
1901 prefixes
|= PREFIX_REPNZ
;
1904 prefixes
|= PREFIX_LOCK
;
1907 prefixes
|= PREFIX_CS
;
1910 prefixes
|= PREFIX_SS
;
1913 prefixes
|= PREFIX_DS
;
1916 prefixes
|= PREFIX_ES
;
1919 prefixes
|= PREFIX_FS
;
1922 prefixes
|= PREFIX_GS
;
1925 prefixes
|= PREFIX_DATA
;
1928 prefixes
|= PREFIX_ADDR
;
1931 /* fwait is really an instruction. If there are prefixes
1932 before the fwait, they belong to the fwait, *not* to the
1933 following instruction. */
1936 prefixes
|= PREFIX_FWAIT
;
1940 prefixes
= PREFIX_FWAIT
;
1945 /* Rex is ignored when followed by another prefix. */
1948 oappend (prefix_name (rex
, 0));
1956 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1960 prefix_name (int pref
, int sizeflag
)
1964 /* REX prefixes family. */
2016 return (sizeflag
& DFLAG
) ? "data16" : "data32";
2019 return (sizeflag
& AFLAG
) ? "addr32" : "addr64";
2021 return ((sizeflag
& AFLAG
) && !mode_64bit
) ? "addr16" : "addr32";
2029 static char op1out
[100], op2out
[100], op3out
[100];
2030 static int op_ad
, op_index
[3];
2031 static int two_source_ops
;
2032 static bfd_vma op_address
[3];
2033 static bfd_vma op_riprel
[3];
2034 static bfd_vma start_pc
;
2037 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
2038 * (see topic "Redundant prefixes" in the "Differences from 8086"
2039 * section of the "Virtual 8086 Mode" chapter.)
2040 * 'pc' should be the address of this instruction, it will
2041 * be used to print the target address if this is a relative jump or call
2042 * The function returns the length of this instruction in bytes.
2045 static char intel_syntax
;
2046 static char open_char
;
2047 static char close_char
;
2048 static char separator_char
;
2049 static char scale_char
;
2051 /* Here for backwards compatibility. When gdb stops using
2052 print_insn_i386_att and print_insn_i386_intel these functions can
2053 disappear, and print_insn_i386 be merged into print_insn. */
2055 print_insn_i386_att (bfd_vma pc
, disassemble_info
*info
)
2059 return print_insn (pc
, info
);
2063 print_insn_i386_intel (bfd_vma pc
, disassemble_info
*info
)
2067 return print_insn (pc
, info
);
2071 print_insn_i386 (bfd_vma pc
, disassemble_info
*info
)
2075 return print_insn (pc
, info
);
2079 print_insn (bfd_vma pc
, disassemble_info
*info
)
2081 const struct dis386
*dp
;
2083 char *first
, *second
, *third
;
2085 unsigned char uses_SSE_prefix
;
2088 struct dis_private priv
;
2090 mode_64bit
= (info
->mach
== bfd_mach_x86_64_intel_syntax
2091 || info
->mach
== bfd_mach_x86_64
);
2093 if (intel_syntax
== (char) -1)
2094 intel_syntax
= (info
->mach
== bfd_mach_i386_i386_intel_syntax
2095 || info
->mach
== bfd_mach_x86_64_intel_syntax
);
2097 if (info
->mach
== bfd_mach_i386_i386
2098 || info
->mach
== bfd_mach_x86_64
2099 || info
->mach
== bfd_mach_i386_i386_intel_syntax
2100 || info
->mach
== bfd_mach_x86_64_intel_syntax
)
2101 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
2102 else if (info
->mach
== bfd_mach_i386_i8086
)
2103 priv
.orig_sizeflag
= 0;
2108 for (p
= info
->disassembler_options
; p
!= NULL
; )
2110 if (strncmp (p
, "x86-64", 6) == 0)
2113 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
2115 else if (strncmp (p
, "i386", 4) == 0)
2118 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
2120 else if (strncmp (p
, "i8086", 5) == 0)
2123 priv
.orig_sizeflag
= 0;
2125 else if (strncmp (p
, "intel", 5) == 0)
2129 else if (strncmp (p
, "att", 3) == 0)
2133 else if (strncmp (p
, "addr", 4) == 0)
2135 if (p
[4] == '1' && p
[5] == '6')
2136 priv
.orig_sizeflag
&= ~AFLAG
;
2137 else if (p
[4] == '3' && p
[5] == '2')
2138 priv
.orig_sizeflag
|= AFLAG
;
2140 else if (strncmp (p
, "data", 4) == 0)
2142 if (p
[4] == '1' && p
[5] == '6')
2143 priv
.orig_sizeflag
&= ~DFLAG
;
2144 else if (p
[4] == '3' && p
[5] == '2')
2145 priv
.orig_sizeflag
|= DFLAG
;
2147 else if (strncmp (p
, "suffix", 6) == 0)
2148 priv
.orig_sizeflag
|= SUFFIX_ALWAYS
;
2150 p
= strchr (p
, ',');
2156 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
2157 /*intel_syntax = 0;*/
2162 names64
= intel_names64
;
2163 names32
= intel_names32
;
2164 names16
= intel_names16
;
2165 names8
= intel_names8
;
2166 names8rex
= intel_names8rex
;
2167 names_seg
= intel_names_seg
;
2168 index16
= intel_index16
;
2171 separator_char
= '+';
2176 names64
= att_names64
;
2177 names32
= att_names32
;
2178 names16
= att_names16
;
2179 names8
= att_names8
;
2180 names8rex
= att_names8rex
;
2181 names_seg
= att_names_seg
;
2182 index16
= att_index16
;
2185 separator_char
= ',';
2189 /* The output looks better if we put 7 bytes on a line, since that
2190 puts most long word instructions on a single line. */
2191 info
->bytes_per_line
= 7;
2193 info
->private_data
= &priv
;
2194 priv
.max_fetched
= priv
.the_buffer
;
2195 priv
.insn_start
= pc
;
2202 op_index
[0] = op_index
[1] = op_index
[2] = -1;
2206 start_codep
= priv
.the_buffer
;
2207 codep
= priv
.the_buffer
;
2209 if (setjmp (priv
.bailout
) != 0)
2213 /* Getting here means we tried for data but didn't get it. That
2214 means we have an incomplete instruction of some sort. Just
2215 print the first byte as a prefix or a .byte pseudo-op. */
2216 if (codep
> priv
.the_buffer
)
2218 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
2220 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
2223 /* Just print the first byte as a .byte instruction. */
2224 (*info
->fprintf_func
) (info
->stream
, ".byte 0x%x",
2225 (unsigned int) priv
.the_buffer
[0]);
2238 sizeflag
= priv
.orig_sizeflag
;
2240 FETCH_DATA (info
, codep
+ 1);
2241 two_source_ops
= (*codep
== 0x62) || (*codep
== 0xc8);
2243 if ((prefixes
& PREFIX_FWAIT
)
2244 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
2248 /* fwait not followed by floating point instruction. Print the
2249 first prefix, which is probably fwait itself. */
2250 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
2252 name
= INTERNAL_DISASSEMBLER_ERROR
;
2253 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
2259 FETCH_DATA (info
, codep
+ 2);
2260 dp
= &dis386_twobyte
[*++codep
];
2261 need_modrm
= twobyte_has_modrm
[*codep
];
2262 uses_SSE_prefix
= twobyte_uses_SSE_prefix
[*codep
];
2266 dp
= &dis386
[*codep
];
2267 need_modrm
= onebyte_has_modrm
[*codep
];
2268 uses_SSE_prefix
= 0;
2272 if (!uses_SSE_prefix
&& (prefixes
& PREFIX_REPZ
))
2275 used_prefixes
|= PREFIX_REPZ
;
2277 if (!uses_SSE_prefix
&& (prefixes
& PREFIX_REPNZ
))
2280 used_prefixes
|= PREFIX_REPNZ
;
2282 if (prefixes
& PREFIX_LOCK
)
2285 used_prefixes
|= PREFIX_LOCK
;
2288 if (prefixes
& PREFIX_ADDR
)
2291 if (dp
->bytemode3
!= loop_jcxz_mode
|| intel_syntax
)
2293 if ((sizeflag
& AFLAG
) || mode_64bit
)
2294 oappend ("addr32 ");
2296 oappend ("addr16 ");
2297 used_prefixes
|= PREFIX_ADDR
;
2301 if (!uses_SSE_prefix
&& (prefixes
& PREFIX_DATA
))
2304 if (dp
->bytemode3
== cond_jump_mode
2305 && dp
->bytemode1
== v_mode
2308 if (sizeflag
& DFLAG
)
2309 oappend ("data32 ");
2311 oappend ("data16 ");
2312 used_prefixes
|= PREFIX_DATA
;
2318 FETCH_DATA (info
, codep
+ 1);
2319 mod
= (*codep
>> 6) & 3;
2320 reg
= (*codep
>> 3) & 7;
2324 if (dp
->name
== NULL
&& dp
->bytemode1
== FLOATCODE
)
2331 if (dp
->name
== NULL
)
2333 switch (dp
->bytemode1
)
2336 dp
= &grps
[dp
->bytemode2
][reg
];
2339 case USE_PREFIX_USER_TABLE
:
2341 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
2342 if (prefixes
& PREFIX_REPZ
)
2346 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2347 if (prefixes
& PREFIX_DATA
)
2351 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
2352 if (prefixes
& PREFIX_REPNZ
)
2356 dp
= &prefix_user_table
[dp
->bytemode2
][index
];
2359 case X86_64_SPECIAL
:
2360 dp
= &x86_64_table
[dp
->bytemode2
][mode_64bit
];
2364 oappend (INTERNAL_DISASSEMBLER_ERROR
);
2369 if (putop (dp
->name
, sizeflag
) == 0)
2374 (*dp
->op1
) (dp
->bytemode1
, sizeflag
);
2379 (*dp
->op2
) (dp
->bytemode2
, sizeflag
);
2384 (*dp
->op3
) (dp
->bytemode3
, sizeflag
);
2388 /* See if any prefixes were not used. If so, print the first one
2389 separately. If we don't do this, we'll wind up printing an
2390 instruction stream which does not precisely correspond to the
2391 bytes we are disassembling. */
2392 if ((prefixes
& ~used_prefixes
) != 0)
2396 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
2398 name
= INTERNAL_DISASSEMBLER_ERROR
;
2399 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
2402 if (rex
& ~rex_used
)
2405 name
= prefix_name (rex
| 0x40, priv
.orig_sizeflag
);
2407 name
= INTERNAL_DISASSEMBLER_ERROR
;
2408 (*info
->fprintf_func
) (info
->stream
, "%s ", name
);
2411 obufp
= obuf
+ strlen (obuf
);
2412 for (i
= strlen (obuf
); i
< 6; i
++)
2415 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
2417 /* The enter and bound instructions are printed with operands in the same
2418 order as the intel book; everything else is printed in reverse order. */
2419 if (intel_syntax
|| two_source_ops
)
2424 op_ad
= op_index
[0];
2425 op_index
[0] = op_index
[2];
2426 op_index
[2] = op_ad
;
2437 if (op_index
[0] != -1 && !op_riprel
[0])
2438 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[0]], info
);
2440 (*info
->fprintf_func
) (info
->stream
, "%s", first
);
2446 (*info
->fprintf_func
) (info
->stream
, ",");
2447 if (op_index
[1] != -1 && !op_riprel
[1])
2448 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[1]], info
);
2450 (*info
->fprintf_func
) (info
->stream
, "%s", second
);
2456 (*info
->fprintf_func
) (info
->stream
, ",");
2457 if (op_index
[2] != -1 && !op_riprel
[2])
2458 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[2]], info
);
2460 (*info
->fprintf_func
) (info
->stream
, "%s", third
);
2462 for (i
= 0; i
< 3; i
++)
2463 if (op_index
[i
] != -1 && op_riprel
[i
])
2465 (*info
->fprintf_func
) (info
->stream
, " # ");
2466 (*info
->print_address_func
) ((bfd_vma
) (start_pc
+ codep
- start_codep
2467 + op_address
[op_index
[i
]]), info
);
2469 return codep
- priv
.the_buffer
;
2472 static const char *float_mem
[] = {
2547 static const unsigned char float_mem_mode
[] = {
2623 #define STi OP_STi, 0
2625 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2626 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2627 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2628 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2629 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2630 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2631 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2632 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2633 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2635 static const struct dis386 float_reg
[][8] = {
2638 { "fadd", ST
, STi
, XX
},
2639 { "fmul", ST
, STi
, XX
},
2640 { "fcom", STi
, XX
, XX
},
2641 { "fcomp", STi
, XX
, XX
},
2642 { "fsub", ST
, STi
, XX
},
2643 { "fsubr", ST
, STi
, XX
},
2644 { "fdiv", ST
, STi
, XX
},
2645 { "fdivr", ST
, STi
, XX
},
2649 { "fld", STi
, XX
, XX
},
2650 { "fxch", STi
, XX
, XX
},
2652 { "(bad)", XX
, XX
, XX
},
2660 { "fcmovb", ST
, STi
, XX
},
2661 { "fcmove", ST
, STi
, XX
},
2662 { "fcmovbe",ST
, STi
, XX
},
2663 { "fcmovu", ST
, STi
, XX
},
2664 { "(bad)", XX
, XX
, XX
},
2666 { "(bad)", XX
, XX
, XX
},
2667 { "(bad)", XX
, XX
, XX
},
2671 { "fcmovnb",ST
, STi
, XX
},
2672 { "fcmovne",ST
, STi
, XX
},
2673 { "fcmovnbe",ST
, STi
, XX
},
2674 { "fcmovnu",ST
, STi
, XX
},
2676 { "fucomi", ST
, STi
, XX
},
2677 { "fcomi", ST
, STi
, XX
},
2678 { "(bad)", XX
, XX
, XX
},
2682 { "fadd", STi
, ST
, XX
},
2683 { "fmul", STi
, ST
, XX
},
2684 { "(bad)", XX
, XX
, XX
},
2685 { "(bad)", XX
, XX
, XX
},
2687 { "fsub", STi
, ST
, XX
},
2688 { "fsubr", STi
, ST
, XX
},
2689 { "fdiv", STi
, ST
, XX
},
2690 { "fdivr", STi
, ST
, XX
},
2692 { "fsubr", STi
, ST
, XX
},
2693 { "fsub", STi
, ST
, XX
},
2694 { "fdivr", STi
, ST
, XX
},
2695 { "fdiv", STi
, ST
, XX
},
2700 { "ffree", STi
, XX
, XX
},
2701 { "(bad)", XX
, XX
, XX
},
2702 { "fst", STi
, XX
, XX
},
2703 { "fstp", STi
, XX
, XX
},
2704 { "fucom", STi
, XX
, XX
},
2705 { "fucomp", STi
, XX
, XX
},
2706 { "(bad)", XX
, XX
, XX
},
2707 { "(bad)", XX
, XX
, XX
},
2711 { "faddp", STi
, ST
, XX
},
2712 { "fmulp", STi
, ST
, XX
},
2713 { "(bad)", XX
, XX
, XX
},
2716 { "fsubp", STi
, ST
, XX
},
2717 { "fsubrp", STi
, ST
, XX
},
2718 { "fdivp", STi
, ST
, XX
},
2719 { "fdivrp", STi
, ST
, XX
},
2721 { "fsubrp", STi
, ST
, XX
},
2722 { "fsubp", STi
, ST
, XX
},
2723 { "fdivrp", STi
, ST
, XX
},
2724 { "fdivp", STi
, ST
, XX
},
2729 { "ffreep", STi
, XX
, XX
},
2730 { "(bad)", XX
, XX
, XX
},
2731 { "(bad)", XX
, XX
, XX
},
2732 { "(bad)", XX
, XX
, XX
},
2734 { "fucomip",ST
, STi
, XX
},
2735 { "fcomip", ST
, STi
, XX
},
2736 { "(bad)", XX
, XX
, XX
},
2740 static char *fgrps
[][8] = {
2743 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2748 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2753 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2758 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2763 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2768 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2773 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2774 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2779 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2784 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2789 dofloat (int sizeflag
)
2791 const struct dis386
*dp
;
2792 unsigned char floatop
;
2794 floatop
= codep
[-1];
2798 int fp_indx
= (floatop
- 0xd8) * 8 + reg
;
2800 putop (float_mem
[fp_indx
], sizeflag
);
2802 OP_E (float_mem_mode
[fp_indx
], sizeflag
);
2805 /* Skip mod/rm byte. */
2809 dp
= &float_reg
[floatop
- 0xd8][reg
];
2810 if (dp
->name
== NULL
)
2812 putop (fgrps
[dp
->bytemode1
][rm
], sizeflag
);
2814 /* Instruction fnstsw is only one with strange arg. */
2815 if (floatop
== 0xdf && codep
[-1] == 0xe0)
2816 strcpy (op1out
, names16
[0]);
2820 putop (dp
->name
, sizeflag
);
2824 (*dp
->op1
) (dp
->bytemode1
, sizeflag
);
2827 (*dp
->op2
) (dp
->bytemode2
, sizeflag
);
2832 OP_ST (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
2838 OP_STi (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
2840 sprintf (scratchbuf
, "%%st(%d)", rm
);
2841 oappend (scratchbuf
+ intel_syntax
);
2844 /* Capital letters in template are macros. */
2846 putop (const char *template, int sizeflag
)
2851 for (p
= template; *p
; p
++)
2870 /* Alternative not valid. */
2871 strcpy (obuf
, "(bad)");
2875 else if (*p
== '\0')
2893 if (mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
2899 if (sizeflag
& SUFFIX_ALWAYS
)
2902 case 'E': /* For jcxz/jecxz */
2905 if (sizeflag
& AFLAG
)
2911 if (sizeflag
& AFLAG
)
2913 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
2918 if ((prefixes
& PREFIX_ADDR
) || (sizeflag
& SUFFIX_ALWAYS
))
2920 if (sizeflag
& AFLAG
)
2921 *obufp
++ = mode_64bit
? 'q' : 'l';
2923 *obufp
++ = mode_64bit
? 'l' : 'w';
2924 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
2930 if ((prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_CS
2931 || (prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_DS
)
2933 used_prefixes
|= prefixes
& (PREFIX_CS
| PREFIX_DS
);
2936 if (prefixes
& PREFIX_DS
)
2945 if (sizeflag
& SUFFIX_ALWAYS
)
2949 if ((prefixes
& PREFIX_FWAIT
) == 0)
2952 used_prefixes
|= PREFIX_FWAIT
;
2955 USED_REX (REX_MODE64
);
2956 if (rex
& REX_MODE64
)
2973 if ((prefixes
& PREFIX_DATA
)
2974 || (rex
& REX_MODE64
)
2975 || (sizeflag
& SUFFIX_ALWAYS
))
2977 USED_REX (REX_MODE64
);
2978 if (rex
& REX_MODE64
)
2982 if (sizeflag
& DFLAG
)
2986 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3002 USED_REX (REX_MODE64
);
3003 if (mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
3005 if (rex
& REX_MODE64
)
3009 if (sizeflag
& DFLAG
)
3013 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3018 USED_REX (REX_MODE64
);
3021 if (rex
& REX_MODE64
)
3026 else if (sizeflag
& DFLAG
)
3039 if (rex
& REX_MODE64
)
3041 else if (sizeflag
& DFLAG
)
3046 if (!(rex
& REX_MODE64
))
3047 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3052 if (sizeflag
& SUFFIX_ALWAYS
)
3054 if (rex
& REX_MODE64
)
3058 if (sizeflag
& DFLAG
)
3062 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3067 if (prefixes
& PREFIX_DATA
)
3071 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3076 if (rex
& REX_MODE64
)
3078 USED_REX (REX_MODE64
);
3082 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
3084 /* operand size flag for cwtl, cbtw */
3088 else if (sizeflag
& DFLAG
)
3099 if (sizeflag
& DFLAG
)
3110 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3119 oappend (const char *s
)
3122 obufp
+= strlen (s
);
3128 if (prefixes
& PREFIX_CS
)
3130 used_prefixes
|= PREFIX_CS
;
3131 oappend ("%cs:" + intel_syntax
);
3133 if (prefixes
& PREFIX_DS
)
3135 used_prefixes
|= PREFIX_DS
;
3136 oappend ("%ds:" + intel_syntax
);
3138 if (prefixes
& PREFIX_SS
)
3140 used_prefixes
|= PREFIX_SS
;
3141 oappend ("%ss:" + intel_syntax
);
3143 if (prefixes
& PREFIX_ES
)
3145 used_prefixes
|= PREFIX_ES
;
3146 oappend ("%es:" + intel_syntax
);
3148 if (prefixes
& PREFIX_FS
)
3150 used_prefixes
|= PREFIX_FS
;
3151 oappend ("%fs:" + intel_syntax
);
3153 if (prefixes
& PREFIX_GS
)
3155 used_prefixes
|= PREFIX_GS
;
3156 oappend ("%gs:" + intel_syntax
);
3161 OP_indirE (int bytemode
, int sizeflag
)
3165 OP_E (bytemode
, sizeflag
);
3169 print_operand_value (char *buf
, int hex
, bfd_vma disp
)
3179 sprintf_vma (tmp
, disp
);
3180 for (i
= 0; tmp
[i
] == '0' && tmp
[i
+ 1]; i
++);
3181 strcpy (buf
+ 2, tmp
+ i
);
3185 bfd_signed_vma v
= disp
;
3192 /* Check for possible overflow on 0x8000000000000000. */
3195 strcpy (buf
, "9223372036854775808");
3209 tmp
[28 - i
] = (v
% 10) + '0';
3213 strcpy (buf
, tmp
+ 29 - i
);
3219 sprintf (buf
, "0x%x", (unsigned int) disp
);
3221 sprintf (buf
, "%d", (int) disp
);
3226 OP_E (int bytemode
, int sizeflag
)
3231 USED_REX (REX_EXTZ
);
3235 /* Skip mod/rm byte. */
3246 oappend (names8rex
[rm
+ add
]);
3248 oappend (names8
[rm
+ add
]);
3251 oappend (names16
[rm
+ add
]);
3254 oappend (names32
[rm
+ add
]);
3257 oappend (names64
[rm
+ add
]);
3261 oappend (names64
[rm
+ add
]);
3263 oappend (names32
[rm
+ add
]);
3267 USED_REX (REX_MODE64
);
3268 if (rex
& REX_MODE64
)
3269 oappend (names64
[rm
+ add
]);
3270 else if ((sizeflag
& DFLAG
) || bytemode
== dq_mode
)
3271 oappend (names32
[rm
+ add
]);
3273 oappend (names16
[rm
+ add
]);
3274 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3279 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3288 if ((sizeflag
& AFLAG
) || mode_64bit
) /* 32 bit address mode */
3303 FETCH_DATA (the_info
, codep
+ 1);
3304 scale
= (*codep
>> 6) & 3;
3305 index
= (*codep
>> 3) & 7;
3307 USED_REX (REX_EXTY
);
3308 USED_REX (REX_EXTZ
);
3319 if ((base
& 7) == 5)
3322 if (mode_64bit
&& !havesib
&& (sizeflag
& AFLAG
))
3328 FETCH_DATA (the_info
, codep
+ 1);
3330 if ((disp
& 0x80) != 0)
3339 if (mod
!= 0 || (base
& 7) == 5)
3341 print_operand_value (scratchbuf
, !riprel
, disp
);
3342 oappend (scratchbuf
);
3350 if (havebase
|| (havesib
&& (index
!= 4 || scale
!= 0)))
3357 oappend ("BYTE PTR ");
3360 oappend ("WORD PTR ");
3363 if (sizeflag
& DFLAG
)
3364 oappend ("DWORD PTR ");
3366 oappend ("WORD PTR ");
3369 oappend ("DWORD PTR ");
3372 oappend ("QWORD PTR ");
3376 oappend ("DWORD PTR ");
3378 oappend ("QWORD PTR ");
3381 oappend ("XWORD PTR ");
3387 *obufp
++ = open_char
;
3388 if (intel_syntax
&& riprel
)
3391 USED_REX (REX_EXTZ
);
3392 if (!havesib
&& (rex
& REX_EXTZ
))
3395 oappend (mode_64bit
&& (sizeflag
& AFLAG
)
3396 ? names64
[base
] : names32
[base
]);
3405 *obufp
++ = separator_char
;
3408 sprintf (scratchbuf
, "%s",
3409 mode_64bit
&& (sizeflag
& AFLAG
)
3410 ? names64
[index
] : names32
[index
]);
3413 sprintf (scratchbuf
, ",%s",
3414 mode_64bit
&& (sizeflag
& AFLAG
)
3415 ? names64
[index
] : names32
[index
]);
3416 oappend (scratchbuf
);
3418 if (scale
!= 0 || (!intel_syntax
&& index
!= 4))
3420 *obufp
++ = scale_char
;
3422 sprintf (scratchbuf
, "%d", 1 << scale
);
3423 oappend (scratchbuf
);
3427 if (mod
!= 0 || (base
& 7) == 5)
3429 /* Don't print zero displacements. */
3432 if ((bfd_signed_vma
) disp
> 0)
3438 print_operand_value (scratchbuf
, 0, disp
);
3439 oappend (scratchbuf
);
3443 *obufp
++ = close_char
;
3446 else if (intel_syntax
)
3448 if (mod
!= 0 || (base
& 7) == 5)
3450 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
3451 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
3455 oappend (names_seg
[ds_reg
- es_reg
]);
3458 print_operand_value (scratchbuf
, 1, disp
);
3459 oappend (scratchbuf
);
3464 { /* 16 bit address mode */
3471 if ((disp
& 0x8000) != 0)
3476 FETCH_DATA (the_info
, codep
+ 1);
3478 if ((disp
& 0x80) != 0)
3483 if ((disp
& 0x8000) != 0)
3489 if (mod
!= 0 || (rm
& 7) == 6)
3491 print_operand_value (scratchbuf
, 0, disp
);
3492 oappend (scratchbuf
);
3495 if (mod
!= 0 || (rm
& 7) != 6)
3497 *obufp
++ = open_char
;
3499 oappend (index16
[rm
+ add
]);
3500 *obufp
++ = close_char
;
3507 OP_G (int bytemode
, int sizeflag
)
3510 USED_REX (REX_EXTX
);
3518 oappend (names8rex
[reg
+ add
]);
3520 oappend (names8
[reg
+ add
]);
3523 oappend (names16
[reg
+ add
]);
3526 oappend (names32
[reg
+ add
]);
3529 oappend (names64
[reg
+ add
]);
3532 USED_REX (REX_MODE64
);
3533 if (rex
& REX_MODE64
)
3534 oappend (names64
[reg
+ add
]);
3535 else if (sizeflag
& DFLAG
)
3536 oappend (names32
[reg
+ add
]);
3538 oappend (names16
[reg
+ add
]);
3539 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3542 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3555 FETCH_DATA (the_info
, codep
+ 8);
3556 a
= *codep
++ & 0xff;
3557 a
|= (*codep
++ & 0xff) << 8;
3558 a
|= (*codep
++ & 0xff) << 16;
3559 a
|= (*codep
++ & 0xff) << 24;
3560 b
= *codep
++ & 0xff;
3561 b
|= (*codep
++ & 0xff) << 8;
3562 b
|= (*codep
++ & 0xff) << 16;
3563 b
|= (*codep
++ & 0xff) << 24;
3564 x
= a
+ ((bfd_vma
) b
<< 32);
3572 static bfd_signed_vma
3575 bfd_signed_vma x
= 0;
3577 FETCH_DATA (the_info
, codep
+ 4);
3578 x
= *codep
++ & (bfd_signed_vma
) 0xff;
3579 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
3580 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
3581 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
3585 static bfd_signed_vma
3588 bfd_signed_vma x
= 0;
3590 FETCH_DATA (the_info
, codep
+ 4);
3591 x
= *codep
++ & (bfd_signed_vma
) 0xff;
3592 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
3593 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
3594 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
3596 x
= (x
^ ((bfd_signed_vma
) 1 << 31)) - ((bfd_signed_vma
) 1 << 31);
3606 FETCH_DATA (the_info
, codep
+ 2);
3607 x
= *codep
++ & 0xff;
3608 x
|= (*codep
++ & 0xff) << 8;
3613 set_op (bfd_vma op
, int riprel
)
3615 op_index
[op_ad
] = op_ad
;
3618 op_address
[op_ad
] = op
;
3619 op_riprel
[op_ad
] = riprel
;
3623 /* Mask to get a 32-bit address. */
3624 op_address
[op_ad
] = op
& 0xffffffff;
3625 op_riprel
[op_ad
] = riprel
& 0xffffffff;
3630 OP_REG (int code
, int sizeflag
)
3634 USED_REX (REX_EXTZ
);
3646 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
3647 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
3648 s
= names16
[code
- ax_reg
+ add
];
3650 case es_reg
: case ss_reg
: case cs_reg
:
3651 case ds_reg
: case fs_reg
: case gs_reg
:
3652 s
= names_seg
[code
- es_reg
+ add
];
3654 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
3655 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
3658 s
= names8rex
[code
- al_reg
+ add
];
3660 s
= names8
[code
- al_reg
];
3662 case rAX_reg
: case rCX_reg
: case rDX_reg
: case rBX_reg
:
3663 case rSP_reg
: case rBP_reg
: case rSI_reg
: case rDI_reg
:
3666 s
= names64
[code
- rAX_reg
+ add
];
3669 code
+= eAX_reg
- rAX_reg
;
3671 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
3672 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
3673 USED_REX (REX_MODE64
);
3674 if (rex
& REX_MODE64
)
3675 s
= names64
[code
- eAX_reg
+ add
];
3676 else if (sizeflag
& DFLAG
)
3677 s
= names32
[code
- eAX_reg
+ add
];
3679 s
= names16
[code
- eAX_reg
+ add
];
3680 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3683 s
= INTERNAL_DISASSEMBLER_ERROR
;
3690 OP_IMREG (int code
, int sizeflag
)
3702 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
3703 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
3704 s
= names16
[code
- ax_reg
];
3706 case es_reg
: case ss_reg
: case cs_reg
:
3707 case ds_reg
: case fs_reg
: case gs_reg
:
3708 s
= names_seg
[code
- es_reg
];
3710 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
3711 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
3714 s
= names8rex
[code
- al_reg
];
3716 s
= names8
[code
- al_reg
];
3718 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
3719 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
3720 USED_REX (REX_MODE64
);
3721 if (rex
& REX_MODE64
)
3722 s
= names64
[code
- eAX_reg
];
3723 else if (sizeflag
& DFLAG
)
3724 s
= names32
[code
- eAX_reg
];
3726 s
= names16
[code
- eAX_reg
];
3727 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3730 s
= INTERNAL_DISASSEMBLER_ERROR
;
3737 OP_I (int bytemode
, int sizeflag
)
3740 bfd_signed_vma mask
= -1;
3745 FETCH_DATA (the_info
, codep
+ 1);
3757 USED_REX (REX_MODE64
);
3758 if (rex
& REX_MODE64
)
3760 else if (sizeflag
& DFLAG
)
3770 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3777 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3782 scratchbuf
[0] = '$';
3783 print_operand_value (scratchbuf
+ 1, 1, op
);
3784 oappend (scratchbuf
+ intel_syntax
);
3785 scratchbuf
[0] = '\0';
3789 OP_I64 (int bytemode
, int sizeflag
)
3792 bfd_signed_vma mask
= -1;
3796 OP_I (bytemode
, sizeflag
);
3803 FETCH_DATA (the_info
, codep
+ 1);
3808 USED_REX (REX_MODE64
);
3809 if (rex
& REX_MODE64
)
3811 else if (sizeflag
& DFLAG
)
3821 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3828 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3833 scratchbuf
[0] = '$';
3834 print_operand_value (scratchbuf
+ 1, 1, op
);
3835 oappend (scratchbuf
+ intel_syntax
);
3836 scratchbuf
[0] = '\0';
3840 OP_sI (int bytemode
, int sizeflag
)
3843 //bfd_signed_vma mask = -1;
3848 FETCH_DATA (the_info
, codep
+ 1);
3850 if ((op
& 0x80) != 0)
3852 //mask = 0xffffffff;
3855 USED_REX (REX_MODE64
);
3856 if (rex
& REX_MODE64
)
3858 else if (sizeflag
& DFLAG
)
3861 //mask = 0xffffffff;
3865 //mask = 0xffffffff;
3867 if ((op
& 0x8000) != 0)
3870 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3874 //mask = 0xffffffff;
3875 if ((op
& 0x8000) != 0)
3879 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3883 scratchbuf
[0] = '$';
3884 print_operand_value (scratchbuf
+ 1, 1, op
);
3885 oappend (scratchbuf
+ intel_syntax
);
3889 OP_J (int bytemode
, int sizeflag
)
3897 FETCH_DATA (the_info
, codep
+ 1);
3899 if ((disp
& 0x80) != 0)
3903 if (sizeflag
& DFLAG
)
3908 /* For some reason, a data16 prefix on a jump instruction
3909 means that the pc is masked to 16 bits after the
3910 displacement is added! */
3915 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3918 disp
= (start_pc
+ codep
- start_codep
+ disp
) & mask
;
3920 print_operand_value (scratchbuf
, 1, disp
);
3921 oappend (scratchbuf
);
3925 OP_SEG (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
3927 oappend (names_seg
[reg
]);
3931 OP_DIR (int dummy ATTRIBUTE_UNUSED
, int sizeflag
)
3935 if (sizeflag
& DFLAG
)
3945 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3947 sprintf (scratchbuf
, "0x%x,0x%x", seg
, offset
);
3949 sprintf (scratchbuf
, "$0x%x,$0x%x", seg
, offset
);
3950 oappend (scratchbuf
);
3954 OP_OFF (int bytemode ATTRIBUTE_UNUSED
, int sizeflag
)
3960 if ((sizeflag
& AFLAG
) || mode_64bit
)
3967 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
3968 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
3970 oappend (names_seg
[ds_reg
- es_reg
]);
3974 print_operand_value (scratchbuf
, 1, off
);
3975 oappend (scratchbuf
);
3979 OP_OFF64 (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
3985 OP_OFF (bytemode
, sizeflag
);
3995 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
3996 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
3998 oappend (names_seg
[ds_reg
- es_reg
]);
4002 print_operand_value (scratchbuf
, 1, off
);
4003 oappend (scratchbuf
);
4007 ptr_reg (int code
, int sizeflag
)
4011 *obufp
++ = open_char
;
4012 USED_REX (REX_MODE64
);
4013 if (rex
& REX_MODE64
)
4015 if (!(sizeflag
& AFLAG
))
4016 s
= names32
[code
- eAX_reg
];
4018 s
= names64
[code
- eAX_reg
];
4020 else if (sizeflag
& AFLAG
)
4021 s
= names32
[code
- eAX_reg
];
4023 s
= names16
[code
- eAX_reg
];
4025 *obufp
++ = close_char
;
4030 OP_ESreg (int code
, int sizeflag
)
4032 oappend ("%es:" + intel_syntax
);
4033 ptr_reg (code
, sizeflag
);
4037 OP_DSreg (int code
, int sizeflag
)
4046 prefixes
|= PREFIX_DS
;
4048 ptr_reg (code
, sizeflag
);
4052 OP_C (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4055 USED_REX (REX_EXTX
);
4058 sprintf (scratchbuf
, "%%cr%d", reg
+ add
);
4059 oappend (scratchbuf
+ intel_syntax
);
4063 OP_D (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4066 USED_REX (REX_EXTX
);
4070 sprintf (scratchbuf
, "db%d", reg
+ add
);
4072 sprintf (scratchbuf
, "%%db%d", reg
+ add
);
4073 oappend (scratchbuf
);
4077 OP_T (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4079 sprintf (scratchbuf
, "%%tr%d", reg
);
4080 oappend (scratchbuf
+ intel_syntax
);
4084 OP_Rd (int bytemode
, int sizeflag
)
4087 OP_E (bytemode
, sizeflag
);
4093 OP_MMX (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4096 USED_REX (REX_EXTX
);
4099 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4100 if (prefixes
& PREFIX_DATA
)
4101 sprintf (scratchbuf
, "%%xmm%d", reg
+ add
);
4103 sprintf (scratchbuf
, "%%mm%d", reg
+ add
);
4104 oappend (scratchbuf
+ intel_syntax
);
4108 OP_XMM (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4111 USED_REX (REX_EXTX
);
4114 sprintf (scratchbuf
, "%%xmm%d", reg
+ add
);
4115 oappend (scratchbuf
+ intel_syntax
);
4119 OP_EM (int bytemode
, int sizeflag
)
4124 OP_E (bytemode
, sizeflag
);
4127 USED_REX (REX_EXTZ
);
4131 /* Skip mod/rm byte. */
4134 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4135 if (prefixes
& PREFIX_DATA
)
4136 sprintf (scratchbuf
, "%%xmm%d", rm
+ add
);
4138 sprintf (scratchbuf
, "%%mm%d", rm
+ add
);
4139 oappend (scratchbuf
+ intel_syntax
);
4143 OP_EX (int bytemode
, int sizeflag
)
4148 OP_E (bytemode
, sizeflag
);
4151 USED_REX (REX_EXTZ
);
4155 /* Skip mod/rm byte. */
4158 sprintf (scratchbuf
, "%%xmm%d", rm
+ add
);
4159 oappend (scratchbuf
+ intel_syntax
);
4163 OP_MS (int bytemode
, int sizeflag
)
4166 OP_EM (bytemode
, sizeflag
);
4172 OP_XS (int bytemode
, int sizeflag
)
4175 OP_EX (bytemode
, sizeflag
);
4181 OP_M (int bytemode
, int sizeflag
)
4184 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
4186 OP_E (bytemode
, sizeflag
);
4190 OP_0f07 (int bytemode
, int sizeflag
)
4192 if (mod
!= 3 || rm
!= 0)
4195 OP_E (bytemode
, sizeflag
);
4199 OP_0fae (int bytemode
, int sizeflag
)
4204 strcpy (obuf
+ strlen (obuf
) - sizeof ("clflush") + 1, "sfence");
4206 if (reg
< 5 || rm
!= 0)
4208 BadOp (); /* bad sfence, mfence, or lfence */
4214 BadOp (); /* bad clflush */
4218 OP_E (bytemode
, sizeflag
);
4222 NOP_Fixup (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4224 /* NOP with REPZ prefix is called PAUSE. */
4225 if (prefixes
== PREFIX_REPZ
)
4226 strcpy (obuf
, "pause");
4229 static const char *const Suffix3DNow
[] = {
4230 /* 00 */ NULL
, NULL
, NULL
, NULL
,
4231 /* 04 */ NULL
, NULL
, NULL
, NULL
,
4232 /* 08 */ NULL
, NULL
, NULL
, NULL
,
4233 /* 0C */ "pi2fw", "pi2fd", NULL
, NULL
,
4234 /* 10 */ NULL
, NULL
, NULL
, NULL
,
4235 /* 14 */ NULL
, NULL
, NULL
, NULL
,
4236 /* 18 */ NULL
, NULL
, NULL
, NULL
,
4237 /* 1C */ "pf2iw", "pf2id", NULL
, NULL
,
4238 /* 20 */ NULL
, NULL
, NULL
, NULL
,
4239 /* 24 */ NULL
, NULL
, NULL
, NULL
,
4240 /* 28 */ NULL
, NULL
, NULL
, NULL
,
4241 /* 2C */ NULL
, NULL
, NULL
, NULL
,
4242 /* 30 */ NULL
, NULL
, NULL
, NULL
,
4243 /* 34 */ NULL
, NULL
, NULL
, NULL
,
4244 /* 38 */ NULL
, NULL
, NULL
, NULL
,
4245 /* 3C */ NULL
, NULL
, NULL
, NULL
,
4246 /* 40 */ NULL
, NULL
, NULL
, NULL
,
4247 /* 44 */ NULL
, NULL
, NULL
, NULL
,
4248 /* 48 */ NULL
, NULL
, NULL
, NULL
,
4249 /* 4C */ NULL
, NULL
, NULL
, NULL
,
4250 /* 50 */ NULL
, NULL
, NULL
, NULL
,
4251 /* 54 */ NULL
, NULL
, NULL
, NULL
,
4252 /* 58 */ NULL
, NULL
, NULL
, NULL
,
4253 /* 5C */ NULL
, NULL
, NULL
, NULL
,
4254 /* 60 */ NULL
, NULL
, NULL
, NULL
,
4255 /* 64 */ NULL
, NULL
, NULL
, NULL
,
4256 /* 68 */ NULL
, NULL
, NULL
, NULL
,
4257 /* 6C */ NULL
, NULL
, NULL
, NULL
,
4258 /* 70 */ NULL
, NULL
, NULL
, NULL
,
4259 /* 74 */ NULL
, NULL
, NULL
, NULL
,
4260 /* 78 */ NULL
, NULL
, NULL
, NULL
,
4261 /* 7C */ NULL
, NULL
, NULL
, NULL
,
4262 /* 80 */ NULL
, NULL
, NULL
, NULL
,
4263 /* 84 */ NULL
, NULL
, NULL
, NULL
,
4264 /* 88 */ NULL
, NULL
, "pfnacc", NULL
,
4265 /* 8C */ NULL
, NULL
, "pfpnacc", NULL
,
4266 /* 90 */ "pfcmpge", NULL
, NULL
, NULL
,
4267 /* 94 */ "pfmin", NULL
, "pfrcp", "pfrsqrt",
4268 /* 98 */ NULL
, NULL
, "pfsub", NULL
,
4269 /* 9C */ NULL
, NULL
, "pfadd", NULL
,
4270 /* A0 */ "pfcmpgt", NULL
, NULL
, NULL
,
4271 /* A4 */ "pfmax", NULL
, "pfrcpit1", "pfrsqit1",
4272 /* A8 */ NULL
, NULL
, "pfsubr", NULL
,
4273 /* AC */ NULL
, NULL
, "pfacc", NULL
,
4274 /* B0 */ "pfcmpeq", NULL
, NULL
, NULL
,
4275 /* B4 */ "pfmul", NULL
, "pfrcpit2", "pfmulhrw",
4276 /* B8 */ NULL
, NULL
, NULL
, "pswapd",
4277 /* BC */ NULL
, NULL
, NULL
, "pavgusb",
4278 /* C0 */ NULL
, NULL
, NULL
, NULL
,
4279 /* C4 */ NULL
, NULL
, NULL
, NULL
,
4280 /* C8 */ NULL
, NULL
, NULL
, NULL
,
4281 /* CC */ NULL
, NULL
, NULL
, NULL
,
4282 /* D0 */ NULL
, NULL
, NULL
, NULL
,
4283 /* D4 */ NULL
, NULL
, NULL
, NULL
,
4284 /* D8 */ NULL
, NULL
, NULL
, NULL
,
4285 /* DC */ NULL
, NULL
, NULL
, NULL
,
4286 /* E0 */ NULL
, NULL
, NULL
, NULL
,
4287 /* E4 */ NULL
, NULL
, NULL
, NULL
,
4288 /* E8 */ NULL
, NULL
, NULL
, NULL
,
4289 /* EC */ NULL
, NULL
, NULL
, NULL
,
4290 /* F0 */ NULL
, NULL
, NULL
, NULL
,
4291 /* F4 */ NULL
, NULL
, NULL
, NULL
,
4292 /* F8 */ NULL
, NULL
, NULL
, NULL
,
4293 /* FC */ NULL
, NULL
, NULL
, NULL
,
4297 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4299 const char *mnemonic
;
4301 FETCH_DATA (the_info
, codep
+ 1);
4302 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4303 place where an 8-bit immediate would normally go. ie. the last
4304 byte of the instruction. */
4305 obufp
= obuf
+ strlen (obuf
);
4306 mnemonic
= Suffix3DNow
[*codep
++ & 0xff];
4311 /* Since a variable sized modrm/sib chunk is between the start
4312 of the opcode (0x0f0f) and the opcode suffix, we need to do
4313 all the modrm processing first, and don't know until now that
4314 we have a bad opcode. This necessitates some cleaning up. */
4321 static const char *simd_cmp_op
[] = {
4333 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4335 unsigned int cmp_type
;
4337 FETCH_DATA (the_info
, codep
+ 1);
4338 obufp
= obuf
+ strlen (obuf
);
4339 cmp_type
= *codep
++ & 0xff;
4342 char suffix1
= 'p', suffix2
= 's';
4343 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
4344 if (prefixes
& PREFIX_REPZ
)
4348 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4349 if (prefixes
& PREFIX_DATA
)
4353 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
4354 if (prefixes
& PREFIX_REPNZ
)
4355 suffix1
= 's', suffix2
= 'd';
4358 sprintf (scratchbuf
, "cmp%s%c%c",
4359 simd_cmp_op
[cmp_type
], suffix1
, suffix2
);
4360 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
4361 oappend (scratchbuf
);
4365 /* We have a bad extension byte. Clean up. */
4373 SIMD_Fixup (int extrachar
, int sizeflag ATTRIBUTE_UNUSED
)
4375 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4376 forms of these instructions. */
4379 char *p
= obuf
+ strlen (obuf
);
4382 *(p
- 1) = *(p
- 2);
4383 *(p
- 2) = *(p
- 3);
4384 *(p
- 3) = extrachar
;
4389 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
4391 if (mod
== 3 && reg
== 1 && rm
<= 1)
4393 /* Override "sidt". */
4394 char *p
= obuf
+ strlen (obuf
) - 4;
4396 /* We might have a suffix. */
4402 /* mwait %eax,%ecx */
4403 strcpy (p
, "mwait");
4407 /* monitor %eax,%ecx,%edx" */
4408 strcpy (p
, "monitor");
4409 strcpy (op3out
, names32
[2]);
4411 strcpy (op1out
, names32
[0]);
4412 strcpy (op2out
, names32
[1]);
4422 INVLPG_Fixup (int bytemode
, int sizeflag
)
4426 char *p
= obuf
+ strlen (obuf
);
4428 /* Override "invlpg". */
4429 strcpy (p
- 6, "swapgs");
4433 OP_E (bytemode
, sizeflag
);
4439 /* Throw away prefixes and 1st. opcode byte. */
4440 codep
= insn_codep
+ 1;