2 * PROJECT: ReactOS Kernel
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: ntoskrnl/mm/ARM3/pagfault.c
5 * PURPOSE: ARM Memory Manager Page Fault Handling
6 * PROGRAMMERS: ReactOS Portable Systems Group
9 /* INCLUDES *******************************************************************/
15 #define MODULE_INVOLVED_IN_ARM3
16 #include "../ARM3/miarm.h"
18 /* GLOBALS ********************************************************************/
20 #define HYDRA_PROCESS (PEPROCESS)1
22 BOOLEAN UserPdeFault
= FALSE
;
25 /* PRIVATE FUNCTIONS **********************************************************/
29 MiCheckForUserStackOverflow(IN PVOID Address
,
30 IN PVOID TrapInformation
)
32 PETHREAD CurrentThread
= PsGetCurrentThread();
33 PTEB Teb
= CurrentThread
->Tcb
.Teb
;
34 PVOID StackBase
, DeallocationStack
, NextStackAddress
;
38 /* Do we own the address space lock? */
39 if (CurrentThread
->AddressSpaceOwner
== 1)
41 /* This isn't valid */
42 DPRINT1("Process owns address space lock\n");
43 ASSERT(KeAreAllApcsDisabled() == TRUE
);
44 return STATUS_GUARD_PAGE_VIOLATION
;
47 /* Are we attached? */
48 if (KeIsAttachedProcess())
50 /* This isn't valid */
51 DPRINT1("Process is attached\n");
52 return STATUS_GUARD_PAGE_VIOLATION
;
55 /* Read the current settings */
56 StackBase
= Teb
->NtTib
.StackBase
;
57 DeallocationStack
= Teb
->DeallocationStack
;
58 GuranteedSize
= Teb
->GuaranteedStackBytes
;
59 DPRINT("Handling guard page fault with Stacks Addresses 0x%p and 0x%p, guarantee: %lx\n",
60 StackBase
, DeallocationStack
, GuranteedSize
);
62 /* Guarantees make this code harder, for now, assume there aren't any */
63 ASSERT(GuranteedSize
== 0);
65 /* So allocate only the minimum guard page size */
66 GuranteedSize
= PAGE_SIZE
;
68 /* Does this faulting stack address actually exist in the stack? */
69 if ((Address
>= StackBase
) || (Address
< DeallocationStack
))
72 DPRINT1("Faulting address outside of stack bounds. Address=%p, StackBase=%p, DeallocationStack=%p\n",
73 Address
, StackBase
, DeallocationStack
);
74 return STATUS_GUARD_PAGE_VIOLATION
;
77 /* This is where the stack will start now */
78 NextStackAddress
= (PVOID
)((ULONG_PTR
)PAGE_ALIGN(Address
) - GuranteedSize
);
80 /* Do we have at least one page between here and the end of the stack? */
81 if (((ULONG_PTR
)NextStackAddress
- PAGE_SIZE
) <= (ULONG_PTR
)DeallocationStack
)
83 /* We don't -- Windows would try to make this guard page valid now */
84 DPRINT1("Close to our death...\n");
86 return STATUS_STACK_OVERFLOW
;
89 /* Don't handle this flag yet */
90 ASSERT((PsGetCurrentProcess()->Peb
->NtGlobalFlag
& FLG_DISABLE_STACK_EXTENSION
) == 0);
92 /* Update the stack limit */
93 Teb
->NtTib
.StackLimit
= (PVOID
)((ULONG_PTR
)NextStackAddress
+ GuranteedSize
);
95 /* Now move the guard page to the next page */
96 Status
= ZwAllocateVirtualMemory(NtCurrentProcess(),
101 PAGE_READWRITE
| PAGE_GUARD
);
102 if ((NT_SUCCESS(Status
) || (Status
== STATUS_ALREADY_COMMITTED
)))
105 DPRINT("Guard page handled successfully for %p\n", Address
);
106 return STATUS_PAGE_FAULT_GUARD_PAGE
;
109 /* Fail, we couldn't move the guard page */
110 DPRINT1("Guard page failure: %lx\n", Status
);
112 return STATUS_STACK_OVERFLOW
;
118 _In_ ULONG ProtectionMask
,
120 _In_ BOOLEAN Execute
)
122 #define _BYTE_MASK(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) \
123 (Bit0) | ((Bit1) << 1) | ((Bit2) << 2) | ((Bit3) << 3) | \
124 ((Bit4) << 4) | ((Bit5) << 5) | ((Bit6) << 6) | ((Bit7) << 7)
125 static const UCHAR AccessAllowedMask
[2][2] =
127 { // Protect 0 1 2 3 4 5 6 7
128 _BYTE_MASK(0, 1, 1, 1, 1, 1, 1, 1), // READ
129 _BYTE_MASK(0, 0, 1, 1, 0, 0, 1, 1), // EXECUTE READ
132 _BYTE_MASK(0, 0, 0, 0, 1, 1, 1, 1), // WRITE
133 _BYTE_MASK(0, 0, 0, 0, 0, 0, 1, 1), // EXECUTE WRITE
137 /* We want only the lower access bits */
138 ProtectionMask
&= MM_PROTECT_ACCESS
;
140 /* Look it up in the table */
141 return (AccessAllowedMask
[Write
!= 0][Execute
!= 0] >> ProtectionMask
) & 1;
146 MiAccessCheck(IN PMMPTE PointerPte
,
147 IN BOOLEAN StoreInstruction
,
148 IN KPROCESSOR_MODE PreviousMode
,
149 IN ULONG_PTR ProtectionMask
,
155 /* Check for invalid user-mode access */
156 if ((PreviousMode
== UserMode
) && (PointerPte
> MiHighestUserPte
))
158 return STATUS_ACCESS_VIOLATION
;
161 /* Capture the PTE -- is it valid? */
162 TempPte
= *PointerPte
;
163 if (TempPte
.u
.Hard
.Valid
)
165 /* Was someone trying to write to it? */
166 if (StoreInstruction
)
169 if ((TempPte
.u
.Hard
.Write
) || (TempPte
.u
.Hard
.CopyOnWrite
))
171 /* Then there's nothing to worry about */
172 return STATUS_SUCCESS
;
175 /* Oops! This isn't allowed */
176 return STATUS_ACCESS_VIOLATION
;
179 /* Someone was trying to read from a valid PTE, that's fine too */
180 return STATUS_SUCCESS
;
183 /* Check if the protection on the page allows what is being attempted */
184 if (!MiIsAccessAllowed(ProtectionMask
, StoreInstruction
, FALSE
))
186 return STATUS_ACCESS_VIOLATION
;
189 /* Check if this is a guard page */
190 if ((ProtectionMask
& MM_PROTECT_SPECIAL
) == MM_GUARDPAGE
)
192 NT_ASSERT(ProtectionMask
!= MM_DECOMMIT
);
194 /* Attached processes can't expand their stack */
195 if (KeIsAttachedProcess()) return STATUS_ACCESS_VIOLATION
;
197 /* No support for transition PTEs yet */
198 ASSERT(((TempPte
.u
.Soft
.Transition
== 1) &&
199 (TempPte
.u
.Soft
.Prototype
== 0)) == FALSE
);
201 /* Remove the guard page bit, and return a guard page violation */
202 TempPte
.u
.Soft
.Protection
= ProtectionMask
& ~MM_GUARDPAGE
;
203 NT_ASSERT(TempPte
.u
.Long
!= 0);
204 MI_WRITE_INVALID_PTE(PointerPte
, TempPte
);
205 return STATUS_GUARD_PAGE_VIOLATION
;
209 return STATUS_SUCCESS
;
214 MiCheckVirtualAddress(IN PVOID VirtualAddress
,
215 OUT PULONG ProtectCode
,
216 OUT PMMVAD
*ProtoVad
)
221 /* No prototype/section support for now */
224 /* User or kernel fault? */
225 if (VirtualAddress
<= MM_HIGHEST_USER_ADDRESS
)
227 /* Special case for shared data */
228 if (PAGE_ALIGN(VirtualAddress
) == (PVOID
)MM_SHARED_USER_DATA_VA
)
230 /* It's a read-only page */
231 *ProtectCode
= MM_READONLY
;
232 return MmSharedUserDataPte
;
235 /* Find the VAD, it might not exist if the address is bogus */
236 Vad
= MiLocateAddress(VirtualAddress
);
239 /* Bogus virtual address */
240 *ProtectCode
= MM_NOACCESS
;
244 /* ReactOS does not handle physical memory VADs yet */
245 ASSERT(Vad
->u
.VadFlags
.VadType
!= VadDevicePhysicalMemory
);
247 /* Check if it's a section, or just an allocation */
248 if (Vad
->u
.VadFlags
.PrivateMemory
)
250 /* ReactOS does not handle AWE VADs yet */
251 ASSERT(Vad
->u
.VadFlags
.VadType
!= VadAwe
);
253 /* This must be a TEB/PEB VAD */
254 if (Vad
->u
.VadFlags
.MemCommit
)
256 /* It's committed, so return the VAD protection */
257 *ProtectCode
= (ULONG
)Vad
->u
.VadFlags
.Protection
;
261 /* It has not yet been committed, so return no access */
262 *ProtectCode
= MM_NOACCESS
;
265 /* In both cases, return no PTE */
270 /* ReactOS does not supoprt these VADs yet */
271 ASSERT(Vad
->u
.VadFlags
.VadType
!= VadImageMap
);
272 ASSERT(Vad
->u2
.VadFlags2
.ExtendableFile
== 0);
274 /* Return the proto VAD */
277 /* Get the prototype PTE for this page */
278 PointerPte
= (((ULONG_PTR
)VirtualAddress
>> PAGE_SHIFT
) - Vad
->StartingVpn
) + Vad
->FirstPrototypePte
;
279 ASSERT(PointerPte
!= NULL
);
280 ASSERT(PointerPte
<= Vad
->LastContiguousPte
);
282 /* Return the Prototype PTE and the protection for the page mapping */
283 *ProtectCode
= (ULONG
)Vad
->u
.VadFlags
.Protection
;
287 else if (MI_IS_PAGE_TABLE_ADDRESS(VirtualAddress
))
289 /* This should never happen, as these addresses are handled by the double-maping */
290 if (((PMMPTE
)VirtualAddress
>= MiAddressToPte(MmPagedPoolStart
)) &&
291 ((PMMPTE
)VirtualAddress
<= MmPagedPoolInfo
.LastPteForPagedPool
))
293 /* Fail such access */
294 *ProtectCode
= MM_NOACCESS
;
298 /* Return full access rights */
299 *ProtectCode
= MM_READWRITE
;
302 else if (MI_IS_SESSION_ADDRESS(VirtualAddress
))
304 /* ReactOS does not have an image list yet, so bail out to failure case */
305 ASSERT(IsListEmpty(&MmSessionSpace
->ImageList
));
308 /* Default case -- failure */
309 *ProtectCode
= MM_NOACCESS
;
313 #if (_MI_PAGING_LEVELS == 2)
316 MiSynchronizeSystemPde(PMMPDE PointerPde
)
321 /* Get the Index from the PDE */
322 Index
= ((ULONG_PTR
)PointerPde
& (SYSTEM_PD_SIZE
- 1)) / sizeof(MMPTE
);
324 /* Copy the PDE from the double-mapped system page directory */
325 SystemPde
= MmSystemPagePtes
[Index
];
326 *PointerPde
= SystemPde
;
328 /* Make sure we re-read the PDE and PTE */
329 KeMemoryBarrierWithoutFence();
331 /* Return, if we had success */
332 return (BOOLEAN
)SystemPde
.u
.Hard
.Valid
;
337 MiCheckPdeForSessionSpace(IN PVOID Address
)
341 PVOID SessionAddress
;
344 /* Is this a session PTE? */
345 if (MI_IS_SESSION_PTE(Address
))
347 /* Make sure the PDE for session space is valid */
348 PointerPde
= MiAddressToPde(MmSessionSpace
);
349 if (!PointerPde
->u
.Hard
.Valid
)
351 /* This means there's no valid session, bail out */
352 DbgPrint("MiCheckPdeForSessionSpace: No current session for PTE %p\n",
355 return STATUS_ACCESS_VIOLATION
;
358 /* Now get the session-specific page table for this address */
359 SessionAddress
= MiPteToAddress(Address
);
360 PointerPde
= MiAddressToPte(Address
);
361 if (PointerPde
->u
.Hard
.Valid
) return STATUS_WAIT_1
;
363 /* It's not valid, so find it in the page table array */
364 Index
= ((ULONG_PTR
)SessionAddress
- (ULONG_PTR
)MmSessionBase
) >> 22;
365 TempPde
.u
.Long
= MmSessionSpace
->PageTables
[Index
].u
.Long
;
366 if (TempPde
.u
.Hard
.Valid
)
368 /* The copy is valid, so swap it in */
369 InterlockedExchange((PLONG
)PointerPde
, TempPde
.u
.Long
);
370 return STATUS_WAIT_1
;
373 /* We don't seem to have allocated a page table for this address yet? */
374 DbgPrint("MiCheckPdeForSessionSpace: No Session PDE for PTE %p, %p\n",
375 PointerPde
->u
.Long
, SessionAddress
);
377 return STATUS_ACCESS_VIOLATION
;
380 /* Is the address also a session address? If not, we're done */
381 if (!MI_IS_SESSION_ADDRESS(Address
)) return STATUS_SUCCESS
;
383 /* It is, so again get the PDE for session space */
384 PointerPde
= MiAddressToPde(MmSessionSpace
);
385 if (!PointerPde
->u
.Hard
.Valid
)
387 /* This means there's no valid session, bail out */
388 DbgPrint("MiCheckPdeForSessionSpace: No current session for VA %p\n",
391 return STATUS_ACCESS_VIOLATION
;
394 /* Now get the PDE for the address itself */
395 PointerPde
= MiAddressToPde(Address
);
396 if (!PointerPde
->u
.Hard
.Valid
)
398 /* Do the swap, we should be good to go */
399 Index
= ((ULONG_PTR
)Address
- (ULONG_PTR
)MmSessionBase
) >> 22;
400 PointerPde
->u
.Long
= MmSessionSpace
->PageTables
[Index
].u
.Long
;
401 if (PointerPde
->u
.Hard
.Valid
) return STATUS_WAIT_1
;
403 /* We had not allocated a page table for this session address yet, fail! */
404 DbgPrint("MiCheckPdeForSessionSpace: No Session PDE for VA %p, %p\n",
405 PointerPde
->u
.Long
, Address
);
407 return STATUS_ACCESS_VIOLATION
;
410 /* It's valid, so there's nothing to do */
411 return STATUS_SUCCESS
;
416 MiCheckPdeForPagedPool(IN PVOID Address
)
419 NTSTATUS Status
= STATUS_SUCCESS
;
421 /* Check session PDE */
422 if (MI_IS_SESSION_ADDRESS(Address
)) return MiCheckPdeForSessionSpace(Address
);
423 if (MI_IS_SESSION_PTE(Address
)) return MiCheckPdeForSessionSpace(Address
);
426 // Check if this is a fault while trying to access the page table itself
428 if (MI_IS_SYSTEM_PAGE_TABLE_ADDRESS(Address
))
431 // Send a hint to the page fault handler that this is only a valid fault
432 // if we already detected this was access within the page table range
434 PointerPde
= (PMMPDE
)MiAddressToPte(Address
);
435 Status
= STATUS_WAIT_1
;
437 else if (Address
< MmSystemRangeStart
)
440 // This is totally illegal
442 return STATUS_ACCESS_VIOLATION
;
447 // Get the PDE for the address
449 PointerPde
= MiAddressToPde(Address
);
453 // Check if it's not valid
455 if (PointerPde
->u
.Hard
.Valid
== 0)
458 // Copy it from our double-mapped system page directory
460 InterlockedExchangePte(PointerPde
,
461 MmSystemPagePtes
[((ULONG_PTR
)PointerPde
& (SYSTEM_PD_SIZE
- 1)) / sizeof(MMPTE
)].u
.Long
);
472 MiCheckPdeForPagedPool(IN PVOID Address
)
474 return STATUS_ACCESS_VIOLATION
;
480 MiZeroPfn(IN PFN_NUMBER PageFrameNumber
)
487 /* Get the PFN for this page */
488 Pfn1
= MiGetPfnEntry(PageFrameNumber
);
491 /* Grab a system PTE we can use to zero the page */
492 ZeroPte
= MiReserveSystemPtes(1, SystemPteSpace
);
495 /* Initialize the PTE for it */
496 TempPte
= ValidKernelPte
;
497 TempPte
.u
.Hard
.PageFrameNumber
= PageFrameNumber
;
500 if (Pfn1
->u3
.e1
.CacheAttribute
== MiWriteCombined
)
502 /* Write combining, no caching */
503 MI_PAGE_DISABLE_CACHE(&TempPte
);
504 MI_PAGE_WRITE_COMBINED(&TempPte
);
506 else if (Pfn1
->u3
.e1
.CacheAttribute
== MiNonCached
)
508 /* Write through, no caching */
509 MI_PAGE_DISABLE_CACHE(&TempPte
);
510 MI_PAGE_WRITE_THROUGH(&TempPte
);
513 /* Make the system PTE valid with our PFN */
514 MI_WRITE_VALID_PTE(ZeroPte
, TempPte
);
516 /* Get the address it maps to, and zero it out */
517 ZeroAddress
= MiPteToAddress(ZeroPte
);
518 KeZeroPages(ZeroAddress
, PAGE_SIZE
);
520 /* Now get rid of it */
521 MiReleaseSystemPtes(ZeroPte
, 1, SystemPteSpace
);
526 MiResolveDemandZeroFault(IN PVOID Address
,
527 IN PMMPTE PointerPte
,
528 IN PEPROCESS Process
,
531 PFN_NUMBER PageFrameNumber
= 0;
533 BOOLEAN NeedZero
= FALSE
, HaveLock
= FALSE
;
536 DPRINT("ARM3 Demand Zero Page Fault Handler for address: %p in process: %p\n",
540 /* Must currently only be called by paging path */
541 if ((Process
> HYDRA_PROCESS
) && (OldIrql
== MM_NOIRQL
))
544 ASSERT(MI_IS_PAGE_TABLE_ADDRESS(PointerPte
));
547 ASSERT(Process
->ForkInProgress
== NULL
);
549 /* Get process color */
550 Color
= MI_GET_NEXT_PROCESS_COLOR(Process
);
551 ASSERT(Color
!= 0xFFFFFFFF);
553 /* We'll need a zero page */
558 /* Check if we need a zero page */
559 NeedZero
= (OldIrql
!= MM_NOIRQL
);
561 /* Session-backed image views must be zeroed */
562 if ((Process
== HYDRA_PROCESS
) &&
563 ((MI_IS_SESSION_IMAGE_ADDRESS(Address
)) ||
564 ((Address
>= MiSessionViewStart
) && (Address
< MiSessionSpaceWs
))))
569 /* Hardcode unknown color */
573 /* Check if the PFN database should be acquired */
574 if (OldIrql
== MM_NOIRQL
)
576 /* Acquire it and remember we should release it after */
577 OldIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
581 /* We either manually locked the PFN DB, or already came with it locked */
582 ASSERT(KeGetCurrentIrql() == DISPATCH_LEVEL
);
583 ASSERT(PointerPte
->u
.Hard
.Valid
== 0);
585 /* Assert we have enough pages */
586 ASSERT(MmAvailablePages
>= 32);
589 if (UserPdeFault
) MI_SET_USAGE(MI_USAGE_PAGE_TABLE
);
590 if (!UserPdeFault
) MI_SET_USAGE(MI_USAGE_DEMAND_ZERO
);
592 if (Process
) MI_SET_PROCESS2(Process
->ImageFileName
);
593 if (!Process
) MI_SET_PROCESS2("Kernel Demand 0");
595 /* Do we need a zero page? */
596 if (Color
!= 0xFFFFFFFF)
598 /* Try to get one, if we couldn't grab a free page and zero it */
599 PageFrameNumber
= MiRemoveZeroPageSafe(Color
);
600 if (!PageFrameNumber
)
602 /* We'll need a free page and zero it manually */
603 PageFrameNumber
= MiRemoveAnyPage(Color
);
609 /* Get a color, and see if we should grab a zero or non-zero page */
610 Color
= MI_GET_NEXT_COLOR();
613 /* Process or system doesn't want a zero page, grab anything */
614 PageFrameNumber
= MiRemoveAnyPage(Color
);
618 /* System wants a zero page, obtain one */
619 PageFrameNumber
= MiRemoveZeroPage(Color
);
624 MiInitializePfn(PageFrameNumber
, PointerPte
, TRUE
);
626 /* Do we have the lock? */
630 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
632 /* Update performance counters */
633 if (Process
> HYDRA_PROCESS
) Process
->NumberOfPrivatePages
++;
636 /* Increment demand zero faults */
637 InterlockedIncrement(&KeGetCurrentPrcb()->MmDemandZeroCount
);
639 /* Zero the page if need be */
640 if (NeedZero
) MiZeroPfn(PageFrameNumber
);
642 /* Fault on user PDE, or fault on user PTE? */
643 if (PointerPte
<= MiHighestUserPte
)
645 /* User fault, build a user PTE */
646 MI_MAKE_HARDWARE_PTE_USER(&TempPte
,
648 PointerPte
->u
.Soft
.Protection
,
653 /* This is a user-mode PDE, create a kernel PTE for it */
654 MI_MAKE_HARDWARE_PTE(&TempPte
,
656 PointerPte
->u
.Soft
.Protection
,
660 /* Set it dirty if it's a writable page */
661 if (MI_IS_PAGE_WRITEABLE(&TempPte
)) MI_MAKE_DIRTY_PAGE(&TempPte
);
664 MI_WRITE_VALID_PTE(PointerPte
, TempPte
);
666 /* Did we manually acquire the lock */
669 /* Get the PFN entry */
670 Pfn1
= MI_PFN_ELEMENT(PageFrameNumber
);
672 /* Windows does these sanity checks */
673 ASSERT(Pfn1
->u1
.Event
== 0);
674 ASSERT(Pfn1
->u3
.e1
.PrototypePte
== 0);
680 DPRINT("Demand zero page has now been paged in\n");
681 return STATUS_PAGE_FAULT_DEMAND_ZERO
;
686 MiCompleteProtoPteFault(IN BOOLEAN StoreInstruction
,
688 IN PMMPTE PointerPte
,
689 IN PMMPTE PointerProtoPte
,
691 IN PMMPFN
* LockedProtoPfn
)
694 PMMPTE OriginalPte
, PageTablePte
;
695 ULONG_PTR Protection
;
696 PFN_NUMBER PageFrameIndex
;
698 BOOLEAN OriginalProtection
, DirtyPage
;
700 /* Must be called with an valid prototype PTE, with the PFN lock held */
701 ASSERT(KeGetCurrentIrql() == DISPATCH_LEVEL
);
702 ASSERT(PointerProtoPte
->u
.Hard
.Valid
== 1);
705 PageFrameIndex
= PFN_FROM_PTE(PointerProtoPte
);
707 /* Get the PFN entry and set it as a prototype PTE */
708 Pfn1
= MiGetPfnEntry(PageFrameIndex
);
709 Pfn1
->u3
.e1
.PrototypePte
= 1;
711 /* Increment the share count for the page table */
712 // FIXME: This doesn't work because we seem to bump the sharecount to two, and MiDeletePte gets annoyed and ASSERTs.
713 // This could be beause MiDeletePte is now being called from strange code in Rosmm
714 PageTablePte
= MiAddressToPte(PointerPte
);
715 Pfn2
= MiGetPfnEntry(PageTablePte
->u
.Hard
.PageFrameNumber
);
716 //Pfn2->u2.ShareCount++;
717 DBG_UNREFERENCED_LOCAL_VARIABLE(Pfn2
);
719 /* Check where we should be getting the protection information from */
720 if (PointerPte
->u
.Soft
.PageFileHigh
== MI_PTE_LOOKUP_NEEDED
)
722 /* Get the protection from the PTE, there's no real Proto PTE data */
723 Protection
= PointerPte
->u
.Soft
.Protection
;
725 /* Remember that we did not use the proto protection */
726 OriginalProtection
= FALSE
;
730 /* Get the protection from the original PTE link */
731 OriginalPte
= &Pfn1
->OriginalPte
;
732 Protection
= OriginalPte
->u
.Soft
.Protection
;
734 /* Remember that we used the original protection */
735 OriginalProtection
= TRUE
;
737 /* Check if this was a write on a read only proto */
738 if ((StoreInstruction
) && !(Protection
& MM_READWRITE
))
741 StoreInstruction
= 0;
745 /* Check if this was a write on a non-COW page */
747 if ((StoreInstruction
) && ((Protection
& MM_WRITECOPY
) != MM_WRITECOPY
))
749 /* Then the page should be marked dirty */
753 ASSERT(Pfn1
->OriginalPte
.u
.Soft
.Prototype
!= 0);
756 /* Did we get a locked incoming PFN? */
759 /* Drop a reference */
760 ASSERT((*LockedProtoPfn
)->u3
.e2
.ReferenceCount
>= 1);
761 MiDereferencePfnAndDropLockCount(*LockedProtoPfn
);
762 *LockedProtoPfn
= NULL
;
765 /* Release the PFN lock */
766 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
768 /* Remove special/caching bits */
769 Protection
&= ~MM_PROTECT_SPECIAL
;
772 if (Pfn1
->u3
.e1
.CacheAttribute
== MiWriteCombined
)
774 /* Write combining, no caching */
775 MI_PAGE_DISABLE_CACHE(&TempPte
);
776 MI_PAGE_WRITE_COMBINED(&TempPte
);
778 else if (Pfn1
->u3
.e1
.CacheAttribute
== MiNonCached
)
780 /* Write through, no caching */
781 MI_PAGE_DISABLE_CACHE(&TempPte
);
782 MI_PAGE_WRITE_THROUGH(&TempPte
);
785 /* Check if this is a kernel or user address */
786 if (Address
< MmSystemRangeStart
)
788 /* Build the user PTE */
789 MI_MAKE_HARDWARE_PTE_USER(&TempPte
, PointerPte
, Protection
, PageFrameIndex
);
793 /* Build the kernel PTE */
794 MI_MAKE_HARDWARE_PTE(&TempPte
, PointerPte
, Protection
, PageFrameIndex
);
797 /* Set the dirty flag if needed */
798 if (DirtyPage
) TempPte
.u
.Hard
.Dirty
= TRUE
;
801 MI_WRITE_VALID_PTE(PointerPte
, TempPte
);
803 /* Reset the protection if needed */
804 if (OriginalProtection
) Protection
= MM_ZERO_ACCESS
;
807 ASSERT(PointerPte
== MiAddressToPte(Address
));
808 return STATUS_SUCCESS
;
813 MiResolveTransitionFault(IN PVOID FaultingAddress
,
814 IN PMMPTE PointerPte
,
815 IN PEPROCESS CurrentProcess
,
817 OUT PVOID
*InPageBlock
)
819 PFN_NUMBER PageFrameIndex
;
822 PMMPTE PointerToPteForProtoPage
;
823 DPRINT1("Transition fault on 0x%p with PTE 0x%p in process %s\n",
824 FaultingAddress
, PointerPte
, CurrentProcess
->ImageFileName
);
826 /* Windowss does this check */
827 ASSERT(*InPageBlock
== NULL
);
829 /* ARM3 doesn't support this path */
830 ASSERT(OldIrql
!= MM_NOIRQL
);
832 /* Capture the PTE and make sure it's in transition format */
833 TempPte
= *PointerPte
;
834 ASSERT((TempPte
.u
.Soft
.Valid
== 0) &&
835 (TempPte
.u
.Soft
.Prototype
== 0) &&
836 (TempPte
.u
.Soft
.Transition
== 1));
838 /* Get the PFN and the PFN entry */
839 PageFrameIndex
= TempPte
.u
.Trans
.PageFrameNumber
;
840 DPRINT1("Transition PFN: %lx\n", PageFrameIndex
);
841 Pfn1
= MiGetPfnEntry(PageFrameIndex
);
843 /* One more transition fault! */
844 InterlockedIncrement(&KeGetCurrentPrcb()->MmTransitionCount
);
846 /* This is from ARM3 -- Windows normally handles this here */
847 ASSERT(Pfn1
->u4
.InPageError
== 0);
849 /* Not supported in ARM3 */
850 ASSERT(Pfn1
->u3
.e1
.ReadInProgress
== 0);
852 /* Windows checks there's some free pages and this isn't an in-page error */
853 ASSERT(MmAvailablePages
> 0);
854 ASSERT(Pfn1
->u4
.InPageError
== 0);
856 /* ReactOS checks for this */
857 ASSERT(MmAvailablePages
> 32);
859 /* Was this a transition page in the valid list, or free/zero list? */
860 if (Pfn1
->u3
.e1
.PageLocation
== ActiveAndValid
)
862 /* All Windows does here is a bunch of sanity checks */
863 DPRINT1("Transition in active list\n");
864 ASSERT((Pfn1
->PteAddress
>= MiAddressToPte(MmPagedPoolStart
)) &&
865 (Pfn1
->PteAddress
<= MiAddressToPte(MmPagedPoolEnd
)));
866 ASSERT(Pfn1
->u2
.ShareCount
!= 0);
867 ASSERT(Pfn1
->u3
.e2
.ReferenceCount
!= 0);
871 /* Otherwise, the page is removed from its list */
872 DPRINT1("Transition page in free/zero list\n");
873 MiUnlinkPageFromList(Pfn1
);
874 MiReferenceUnusedPageAndBumpLockCount(Pfn1
);
877 /* At this point, there should no longer be any in-page errors */
878 ASSERT(Pfn1
->u4
.InPageError
== 0);
880 /* Check if this was a PFN with no more share references */
881 if (Pfn1
->u2
.ShareCount
== 0) MiDropLockCount(Pfn1
);
883 /* Bump the share count and make the page valid */
884 Pfn1
->u2
.ShareCount
++;
885 Pfn1
->u3
.e1
.PageLocation
= ActiveAndValid
;
887 /* Prototype PTEs are in paged pool, which itself might be in transition */
888 if (FaultingAddress
>= MmSystemRangeStart
)
890 /* Check if this is a paged pool PTE in transition state */
891 PointerToPteForProtoPage
= MiAddressToPte(PointerPte
);
892 TempPte
= *PointerToPteForProtoPage
;
893 if ((TempPte
.u
.Hard
.Valid
== 0) && (TempPte
.u
.Soft
.Transition
== 1))
895 /* This isn't yet supported */
896 DPRINT1("Double transition fault not yet supported\n");
901 /* Build the transition PTE -- maybe a macro? */
902 ASSERT(PointerPte
->u
.Hard
.Valid
== 0);
903 ASSERT(PointerPte
->u
.Trans
.Prototype
== 0);
904 ASSERT(PointerPte
->u
.Trans
.Transition
== 1);
905 TempPte
.u
.Long
= (PointerPte
->u
.Long
& ~0xFFF) |
906 (MmProtectToPteMask
[PointerPte
->u
.Trans
.Protection
]) |
907 MiDetermineUserGlobalPteMask(PointerPte
);
909 /* Is the PTE writeable? */
910 if (((Pfn1
->u3
.e1
.Modified
) && (TempPte
.u
.Hard
.Write
)) &&
911 (TempPte
.u
.Hard
.CopyOnWrite
== 0))
914 TempPte
.u
.Hard
.Dirty
= TRUE
;
919 TempPte
.u
.Hard
.Dirty
= FALSE
;
922 /* Write the valid PTE */
923 MI_WRITE_VALID_PTE(PointerPte
, TempPte
);
926 return STATUS_PAGE_FAULT_TRANSITION
;
931 MiResolveProtoPteFault(IN BOOLEAN StoreInstruction
,
933 IN PMMPTE PointerPte
,
934 IN PMMPTE PointerProtoPte
,
935 IN OUT PMMPFN
*OutPfn
,
936 OUT PVOID
*PageFileData
,
938 IN PEPROCESS Process
,
940 IN PVOID TrapInformation
)
942 MMPTE TempPte
, PteContents
;
944 PFN_NUMBER PageFrameIndex
;
946 PVOID InPageBlock
= NULL
;
948 /* Must be called with an invalid, prototype PTE, with the PFN lock held */
949 ASSERT(KeGetCurrentIrql() == DISPATCH_LEVEL
);
950 ASSERT(PointerPte
->u
.Hard
.Valid
== 0);
951 ASSERT(PointerPte
->u
.Soft
.Prototype
== 1);
953 /* Read the prototype PTE and check if it's valid */
954 TempPte
= *PointerProtoPte
;
955 if (TempPte
.u
.Hard
.Valid
== 1)
957 /* One more user of this mapped page */
958 PageFrameIndex
= PFN_FROM_PTE(&TempPte
);
959 Pfn1
= MiGetPfnEntry(PageFrameIndex
);
960 Pfn1
->u2
.ShareCount
++;
962 /* Call it a transition */
963 InterlockedIncrement(&KeGetCurrentPrcb()->MmTransitionCount
);
965 /* Complete the prototype PTE fault -- this will release the PFN lock */
966 return MiCompleteProtoPteFault(StoreInstruction
,
974 /* Make sure there's some protection mask */
975 if (TempPte
.u
.Long
== 0)
977 /* Release the lock */
978 DPRINT1("Access on reserved section?\n");
979 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
980 return STATUS_ACCESS_VIOLATION
;
983 /* There is no such thing as a decommitted prototype PTE */
984 NT_ASSERT(TempPte
.u
.Long
!= MmDecommittedPte
.u
.Long
);
986 /* Check for access rights on the PTE proper */
987 PteContents
= *PointerPte
;
988 if (PteContents
.u
.Soft
.PageFileHigh
!= MI_PTE_LOOKUP_NEEDED
)
990 if (!PteContents
.u
.Proto
.ReadOnly
)
992 /* Check for page acess in software */
993 Status
= MiAccessCheck(PointerProtoPte
,
996 TempPte
.u
.Soft
.Protection
,
999 ASSERT(Status
== STATUS_SUCCESS
);
1001 /* Check for copy on write page */
1002 if ((TempPte
.u
.Soft
.Protection
& MM_WRITECOPY
) == MM_WRITECOPY
)
1004 /* Not yet supported */
1011 /* Check for copy on write page */
1012 if ((PteContents
.u
.Soft
.Protection
& MM_WRITECOPY
) == MM_WRITECOPY
)
1014 /* Not yet supported */
1019 /* Check for clone PTEs */
1020 if (PointerPte
<= MiHighestUserPte
) ASSERT(Process
->CloneRoot
== NULL
);
1022 /* We don't support mapped files yet */
1023 ASSERT(TempPte
.u
.Soft
.Prototype
== 0);
1025 /* We might however have transition PTEs */
1026 if (TempPte
.u
.Soft
.Transition
== 1)
1028 /* Resolve the transition fault */
1029 ASSERT(OldIrql
!= MM_NOIRQL
);
1030 Status
= MiResolveTransitionFault(Address
,
1035 ASSERT(NT_SUCCESS(Status
));
1039 /* We also don't support paged out pages */
1040 ASSERT(TempPte
.u
.Soft
.PageFileHigh
== 0);
1042 /* Resolve the demand zero fault */
1043 Status
= MiResolveDemandZeroFault(Address
,
1047 ASSERT(NT_SUCCESS(Status
));
1050 /* Complete the prototype PTE fault -- this will release the PFN lock */
1051 ASSERT(PointerPte
->u
.Hard
.Valid
== 0);
1052 return MiCompleteProtoPteFault(StoreInstruction
,
1062 MiDispatchFault(IN BOOLEAN StoreInstruction
,
1064 IN PMMPTE PointerPte
,
1065 IN PMMPTE PointerProtoPte
,
1066 IN BOOLEAN Recursive
,
1067 IN PEPROCESS Process
,
1068 IN PVOID TrapInformation
,
1072 KIRQL OldIrql
, LockIrql
;
1074 PMMPTE SuperProtoPte
;
1075 PMMPFN Pfn1
, OutPfn
= NULL
;
1076 PFN_NUMBER PageFrameIndex
;
1077 PFN_COUNT PteCount
, ProcessedPtes
;
1078 DPRINT("ARM3 Page Fault Dispatcher for address: %p in process: %p\n",
1082 /* Make sure the addresses are ok */
1083 ASSERT(PointerPte
== MiAddressToPte(Address
));
1086 // Make sure APCs are off and we're not at dispatch
1088 OldIrql
= KeGetCurrentIrql();
1089 ASSERT(OldIrql
<= APC_LEVEL
);
1090 ASSERT(KeAreAllApcsDisabled() == TRUE
);
1093 // Grab a copy of the PTE
1095 TempPte
= *PointerPte
;
1097 /* Do we have a prototype PTE? */
1098 if (PointerProtoPte
)
1100 /* This should never happen */
1101 ASSERT(!MI_IS_PHYSICAL_ADDRESS(PointerProtoPte
));
1103 /* Check if this is a kernel-mode address */
1104 SuperProtoPte
= MiAddressToPte(PointerProtoPte
);
1105 if (Address
>= MmSystemRangeStart
)
1107 /* Lock the PFN database */
1108 LockIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
1110 /* Has the PTE been made valid yet? */
1111 if (!SuperProtoPte
->u
.Hard
.Valid
)
1115 else if (PointerPte
->u
.Hard
.Valid
== 1)
1120 /* Resolve the fault -- this will release the PFN lock */
1121 Status
= MiResolveProtoPteFault(StoreInstruction
,
1131 ASSERT(Status
== STATUS_SUCCESS
);
1133 /* Complete this as a transition fault */
1134 ASSERT(OldIrql
== KeGetCurrentIrql());
1135 ASSERT(OldIrql
<= APC_LEVEL
);
1136 ASSERT(KeAreAllApcsDisabled() == TRUE
);
1141 /* We only handle the lookup path */
1142 ASSERT(PointerPte
->u
.Soft
.PageFileHigh
== MI_PTE_LOOKUP_NEEDED
);
1144 /* Is there a non-image VAD? */
1146 (Vad
->u
.VadFlags
.VadType
!= VadImageMap
) &&
1147 !(Vad
->u2
.VadFlags2
.ExtendableFile
))
1149 /* One day, ReactOS will cluster faults */
1150 ASSERT(Address
<= MM_HIGHEST_USER_ADDRESS
);
1151 DPRINT("Should cluster fault, but won't\n");
1154 /* Only one PTE to handle for now */
1158 /* Lock the PFN database */
1159 LockIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
1161 /* We only handle the valid path */
1162 ASSERT(SuperProtoPte
->u
.Hard
.Valid
== 1);
1164 /* Capture the PTE */
1165 TempPte
= *PointerProtoPte
;
1167 /* Loop to handle future case of clustered faults */
1170 /* For our current usage, this should be true */
1171 if (TempPte
.u
.Hard
.Valid
== 1)
1173 /* Bump the share count on the PTE */
1174 PageFrameIndex
= PFN_FROM_PTE(&TempPte
);
1175 Pfn1
= MI_PFN_ELEMENT(PageFrameIndex
);
1176 Pfn1
->u2
.ShareCount
++;
1178 else if ((TempPte
.u
.Soft
.Prototype
== 0) &&
1179 (TempPte
.u
.Soft
.Transition
== 1))
1181 /* This is a standby page, bring it back from the cache */
1182 PageFrameIndex
= TempPte
.u
.Trans
.PageFrameNumber
;
1183 DPRINT("oooh, shiny, a soft fault! 0x%lx\n", PageFrameIndex
);
1184 Pfn1
= MI_PFN_ELEMENT(PageFrameIndex
);
1185 ASSERT(Pfn1
->u3
.e1
.PageLocation
!= ActiveAndValid
);
1187 /* Should not yet happen in ReactOS */
1188 ASSERT(Pfn1
->u3
.e1
.ReadInProgress
== 0);
1189 ASSERT(Pfn1
->u4
.InPageError
== 0);
1192 MiUnlinkPageFromList(Pfn1
);
1194 /* Bump its reference count */
1195 ASSERT(Pfn1
->u2
.ShareCount
== 0);
1196 InterlockedIncrement16((PSHORT
)&Pfn1
->u3
.e2
.ReferenceCount
);
1197 Pfn1
->u2
.ShareCount
++;
1199 /* Make it valid again */
1200 /* This looks like another macro.... */
1201 Pfn1
->u3
.e1
.PageLocation
= ActiveAndValid
;
1202 ASSERT(PointerProtoPte
->u
.Hard
.Valid
== 0);
1203 ASSERT(PointerProtoPte
->u
.Trans
.Prototype
== 0);
1204 ASSERT(PointerProtoPte
->u
.Trans
.Transition
== 1);
1205 TempPte
.u
.Long
= (PointerProtoPte
->u
.Long
& ~0xFFF) |
1206 MmProtectToPteMask
[PointerProtoPte
->u
.Trans
.Protection
];
1207 TempPte
.u
.Hard
.Valid
= 1;
1208 TempPte
.u
.Hard
.Accessed
= 1;
1210 /* Is the PTE writeable? */
1211 if (((Pfn1
->u3
.e1
.Modified
) && (TempPte
.u
.Hard
.Write
)) &&
1212 (TempPte
.u
.Hard
.CopyOnWrite
== 0))
1215 TempPte
.u
.Hard
.Dirty
= TRUE
;
1220 TempPte
.u
.Hard
.Dirty
= FALSE
;
1223 /* Write the valid PTE */
1224 MI_WRITE_VALID_PTE(PointerProtoPte
, TempPte
);
1225 ASSERT(PointerPte
->u
.Hard
.Valid
== 0);
1229 /* Page is invalid, get out of the loop */
1233 /* One more done, was it the last? */
1234 if (++ProcessedPtes
== PteCount
)
1236 /* Complete the fault */
1237 MiCompleteProtoPteFault(StoreInstruction
,
1244 /* THIS RELEASES THE PFN LOCK! */
1248 /* No clustered faults yet */
1252 /* Did we resolve the fault? */
1255 /* Bump the transition count */
1256 InterlockedExchangeAddSizeT(&KeGetCurrentPrcb()->MmTransitionCount
, ProcessedPtes
);
1259 /* Loop all the processing we did */
1260 ASSERT(ProcessedPtes
== 0);
1262 /* Complete this as a transition fault */
1263 ASSERT(OldIrql
== KeGetCurrentIrql());
1264 ASSERT(OldIrql
<= APC_LEVEL
);
1265 ASSERT(KeAreAllApcsDisabled() == TRUE
);
1266 return STATUS_PAGE_FAULT_TRANSITION
;
1269 /* We did not -- PFN lock is still held, prepare to resolve prototype PTE fault */
1270 OutPfn
= MI_PFN_ELEMENT(SuperProtoPte
->u
.Hard
.PageFrameNumber
);
1271 MiReferenceUsedPageAndBumpLockCount(OutPfn
);
1272 ASSERT(OutPfn
->u3
.e2
.ReferenceCount
> 1);
1273 ASSERT(PointerPte
->u
.Hard
.Valid
== 0);
1275 /* Resolve the fault -- this will release the PFN lock */
1276 Status
= MiResolveProtoPteFault(StoreInstruction
,
1286 //ASSERT(Status != STATUS_ISSUE_PAGING_IO);
1287 //ASSERT(Status != STATUS_REFAULT);
1288 //ASSERT(Status != STATUS_PTE_CHANGED);
1290 /* Did the routine clean out the PFN or should we? */
1293 /* We had a locked PFN, so acquire the PFN lock to dereference it */
1294 ASSERT(PointerProtoPte
!= NULL
);
1295 OldIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
1297 /* Dereference the locked PFN */
1298 MiDereferencePfnAndDropLockCount(OutPfn
);
1299 ASSERT(OutPfn
->u3
.e2
.ReferenceCount
>= 1);
1301 /* And now release the lock */
1302 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
1305 /* Complete this as a transition fault */
1306 ASSERT(OldIrql
== KeGetCurrentIrql());
1307 ASSERT(OldIrql
<= APC_LEVEL
);
1308 ASSERT(KeAreAllApcsDisabled() == TRUE
);
1314 // The PTE must be invalid but not completely empty. It must also not be a
1315 // prototype PTE as that scenario should've been handled above. These are
1316 // all Windows checks
1318 ASSERT(TempPte
.u
.Hard
.Valid
== 0);
1319 ASSERT(TempPte
.u
.Soft
.Prototype
== 0);
1320 ASSERT(TempPte
.u
.Long
!= 0);
1323 // No transition or page file software PTEs in ARM3 yet, so this must be a
1324 // demand zero page. These are all ReactOS checks
1326 ASSERT(TempPte
.u
.Soft
.Transition
== 0);
1327 ASSERT(TempPte
.u
.Soft
.PageFileHigh
== 0);
1330 // If we got this far, the PTE can only be a demand zero PTE, which is what
1331 // we want. Go handle it!
1333 Status
= MiResolveDemandZeroFault(Address
,
1337 ASSERT(KeAreAllApcsDisabled() == TRUE
);
1338 if (NT_SUCCESS(Status
))
1341 // Make sure we're returning in a sane state and pass the status down
1343 ASSERT(OldIrql
== KeGetCurrentIrql());
1344 ASSERT(KeGetCurrentIrql() <= APC_LEVEL
);
1349 // Generate an access fault
1351 return STATUS_ACCESS_VIOLATION
;
1356 MmArmAccessFault(IN BOOLEAN StoreInstruction
,
1358 IN KPROCESSOR_MODE Mode
,
1359 IN PVOID TrapInformation
)
1361 KIRQL OldIrql
= KeGetCurrentIrql(), LockIrql
;
1362 PMMPTE ProtoPte
= NULL
;
1363 PMMPTE PointerPte
= MiAddressToPte(Address
);
1364 PMMPDE PointerPde
= MiAddressToPde(Address
);
1365 #if (_MI_PAGING_LEVELS >= 3)
1366 PMMPDE PointerPpe
= MiAddressToPpe(Address
);
1367 #if (_MI_PAGING_LEVELS == 4)
1368 PMMPDE PointerPxe
= MiAddressToPxe(Address
);
1372 PETHREAD CurrentThread
;
1373 PEPROCESS CurrentProcess
;
1375 PMMSUPPORT WorkingSet
;
1376 ULONG ProtectionCode
;
1378 PFN_NUMBER PageFrameIndex
;
1380 BOOLEAN IsSessionAddress
;
1382 DPRINT("ARM3 FAULT AT: %p\n", Address
);
1384 /* Check for page fault on high IRQL */
1385 if (OldIrql
> APC_LEVEL
)
1387 #if (_MI_PAGING_LEVELS < 3)
1388 /* Could be a page table for paged pool, which we'll allow */
1389 if (MI_IS_SYSTEM_PAGE_TABLE_ADDRESS(Address
)) MiSynchronizeSystemPde((PMMPDE
)PointerPte
);
1390 MiCheckPdeForPagedPool(Address
);
1392 /* Check if any of the top-level pages are invalid */
1394 #if (_MI_PAGING_LEVELS == 4)
1395 (PointerPxe
->u
.Hard
.Valid
== 0) ||
1397 #if (_MI_PAGING_LEVELS >= 3)
1398 (PointerPpe
->u
.Hard
.Valid
== 0) ||
1400 (PointerPde
->u
.Hard
.Valid
== 0) ||
1401 (PointerPte
->u
.Hard
.Valid
== 0))
1403 /* This fault is not valid, print out some debugging help */
1404 DbgPrint("MM:***PAGE FAULT AT IRQL > 1 Va %p, IRQL %lx\n",
1407 if (TrapInformation
)
1409 PKTRAP_FRAME TrapFrame
= TrapInformation
;
1411 DbgPrint("MM:***EIP %p, EFL %p\n", TrapFrame
->Eip
, TrapFrame
->EFlags
);
1412 DbgPrint("MM:***EAX %p, ECX %p EDX %p\n", TrapFrame
->Eax
, TrapFrame
->Ecx
, TrapFrame
->Edx
);
1413 DbgPrint("MM:***EBX %p, ESI %p EDI %p\n", TrapFrame
->Ebx
, TrapFrame
->Esi
, TrapFrame
->Edi
);
1414 #elif defined(_M_AMD64)
1415 DbgPrint("MM:***RIP %p, EFL %p\n", TrapFrame
->Rip
, TrapFrame
->EFlags
);
1416 DbgPrint("MM:***RAX %p, RCX %p RDX %p\n", TrapFrame
->Rax
, TrapFrame
->Rcx
, TrapFrame
->Rdx
);
1417 DbgPrint("MM:***RBX %p, RSI %p RDI %p\n", TrapFrame
->Rbx
, TrapFrame
->Rsi
, TrapFrame
->Rdi
);
1421 /* Tell the trap handler to fail */
1422 return STATUS_IN_PAGE_ERROR
| 0x10000000;
1425 /* Not yet implemented in ReactOS */
1426 ASSERT(MI_IS_PAGE_LARGE(PointerPde
) == FALSE
);
1427 ASSERT(((StoreInstruction
) && (PointerPte
->u
.Hard
.CopyOnWrite
)) == FALSE
);
1429 /* Check if this was a write */
1430 if (StoreInstruction
)
1432 /* Was it to a read-only page? */
1433 Pfn1
= MI_PFN_ELEMENT(PointerPte
->u
.Hard
.PageFrameNumber
);
1434 if (!(PointerPte
->u
.Long
& PTE_READWRITE
) &&
1435 !(Pfn1
->OriginalPte
.u
.Soft
.Protection
& MM_READWRITE
))
1437 /* Crash with distinguished bugcheck code */
1438 KeBugCheckEx(ATTEMPTED_WRITE_TO_READONLY_MEMORY
,
1441 (ULONG_PTR
)TrapInformation
,
1446 /* Nothing is actually wrong */
1447 DPRINT1("Fault at IRQL %u is ok (%p)\n", OldIrql
, Address
);
1448 return STATUS_SUCCESS
;
1451 /* Check for kernel fault address */
1452 if (Address
>= MmSystemRangeStart
)
1454 /* Bail out, if the fault came from user mode */
1455 if (Mode
== UserMode
) return STATUS_ACCESS_VIOLATION
;
1457 #if (_MI_PAGING_LEVELS == 2)
1458 if (MI_IS_SYSTEM_PAGE_TABLE_ADDRESS(Address
)) MiSynchronizeSystemPde((PMMPDE
)PointerPte
);
1459 MiCheckPdeForPagedPool(Address
);
1462 /* Check if the higher page table entries are invalid */
1464 #if (_MI_PAGING_LEVELS == 4)
1465 /* AMD64 system, check if PXE is invalid */
1466 (PointerPxe
->u
.Hard
.Valid
== 0) ||
1468 #if (_MI_PAGING_LEVELS >= 3)
1469 /* PAE/AMD64 system, check if PPE is invalid */
1470 (PointerPpe
->u
.Hard
.Valid
== 0) ||
1472 /* Always check if the PDE is valid */
1473 (PointerPde
->u
.Hard
.Valid
== 0))
1475 /* PXE/PPE/PDE (still) not valid, kill the system */
1476 KeBugCheckEx(PAGE_FAULT_IN_NONPAGED_AREA
,
1479 (ULONG_PTR
)TrapInformation
,
1483 /* Not handling session faults yet */
1484 IsSessionAddress
= MI_IS_SESSION_ADDRESS(Address
);
1486 /* The PDE is valid, so read the PTE */
1487 TempPte
= *PointerPte
;
1488 if (TempPte
.u
.Hard
.Valid
== 1)
1490 /* Check if this was system space or session space */
1491 if (!IsSessionAddress
)
1493 /* Check if the PTE is still valid under PFN lock */
1494 OldIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
1495 TempPte
= *PointerPte
;
1496 if (TempPte
.u
.Hard
.Valid
)
1498 /* Check if this was a write */
1499 if (StoreInstruction
)
1501 /* Was it to a read-only page? */
1502 Pfn1
= MI_PFN_ELEMENT(PointerPte
->u
.Hard
.PageFrameNumber
);
1503 if (!(PointerPte
->u
.Long
& PTE_READWRITE
) &&
1504 !(Pfn1
->OriginalPte
.u
.Soft
.Protection
& MM_READWRITE
))
1506 /* Crash with distinguished bugcheck code */
1507 KeBugCheckEx(ATTEMPTED_WRITE_TO_READONLY_MEMORY
,
1510 (ULONG_PTR
)TrapInformation
,
1516 /* Release PFN lock and return all good */
1517 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
1518 return STATUS_SUCCESS
;
1521 #if (_MI_PAGING_LEVELS == 2)
1522 /* Check if this was a session PTE that needs to remap the session PDE */
1523 if (MI_IS_SESSION_PTE(Address
))
1525 /* Do the remapping */
1526 Status
= MiCheckPdeForSessionSpace(Address
);
1527 if (!NT_SUCCESS(Status
))
1529 /* It failed, this address is invalid */
1530 KeBugCheckEx(PAGE_FAULT_IN_NONPAGED_AREA
,
1533 (ULONG_PTR
)TrapInformation
,
1539 _WARN("Session space stuff is not implemented yet!")
1543 /* Check for a fault on the page table or hyperspace */
1544 if (MI_IS_PAGE_TABLE_OR_HYPER_ADDRESS(Address
))
1546 #if (_MI_PAGING_LEVELS < 3)
1547 /* Windows does this check but I don't understand why -- it's done above! */
1548 ASSERT(MiCheckPdeForPagedPool(Address
) != STATUS_WAIT_1
);
1550 /* Handle this as a user mode fault */
1554 /* Get the current thread */
1555 CurrentThread
= PsGetCurrentThread();
1557 /* What kind of address is this */
1558 if (!IsSessionAddress
)
1560 /* Use the system working set */
1561 WorkingSet
= &MmSystemCacheWs
;
1562 CurrentProcess
= NULL
;
1564 /* Make sure we don't have a recursive working set lock */
1565 if ((CurrentThread
->OwnsProcessWorkingSetExclusive
) ||
1566 (CurrentThread
->OwnsProcessWorkingSetShared
) ||
1567 (CurrentThread
->OwnsSystemWorkingSetExclusive
) ||
1568 (CurrentThread
->OwnsSystemWorkingSetShared
) ||
1569 (CurrentThread
->OwnsSessionWorkingSetExclusive
) ||
1570 (CurrentThread
->OwnsSessionWorkingSetShared
))
1573 return STATUS_IN_PAGE_ERROR
| 0x10000000;
1578 /* Use the session process and working set */
1579 CurrentProcess
= HYDRA_PROCESS
;
1580 WorkingSet
= &MmSessionSpace
->GlobalVirtualAddress
->Vm
;
1582 /* Make sure we don't have a recursive working set lock */
1583 if ((CurrentThread
->OwnsSessionWorkingSetExclusive
) ||
1584 (CurrentThread
->OwnsSessionWorkingSetShared
))
1587 return STATUS_IN_PAGE_ERROR
| 0x10000000;
1591 /* Acquire the working set lock */
1592 KeRaiseIrql(APC_LEVEL
, &LockIrql
);
1593 MiLockWorkingSet(CurrentThread
, WorkingSet
);
1595 /* Re-read PTE now that we own the lock */
1596 TempPte
= *PointerPte
;
1597 if (TempPte
.u
.Hard
.Valid
== 1)
1599 /* Check if this was a write */
1600 if (StoreInstruction
)
1602 /* Was it to a read-only page that is not copy on write? */
1603 Pfn1
= MI_PFN_ELEMENT(PointerPte
->u
.Hard
.PageFrameNumber
);
1604 if (!(TempPte
.u
.Long
& PTE_READWRITE
) &&
1605 !(Pfn1
->OriginalPte
.u
.Soft
.Protection
& MM_READWRITE
) &&
1606 !(TempPte
.u
.Hard
.CopyOnWrite
))
1608 /* Case not yet handled */
1609 ASSERT(!IsSessionAddress
);
1611 /* Crash with distinguished bugcheck code */
1612 KeBugCheckEx(ATTEMPTED_WRITE_TO_READONLY_MEMORY
,
1615 (ULONG_PTR
)TrapInformation
,
1620 /* Check for read-only write in session space */
1621 if ((IsSessionAddress
) &&
1622 (StoreInstruction
) &&
1623 !(TempPte
.u
.Hard
.Write
))
1626 ASSERT(MI_IS_SESSION_IMAGE_ADDRESS(Address
));
1629 if (TempPte
.u
.Hard
.CopyOnWrite
== 0)
1631 /* Then this is not allowed */
1632 KeBugCheckEx(ATTEMPTED_WRITE_TO_READONLY_MEMORY
,
1634 (ULONG_PTR
)TempPte
.u
.Long
,
1635 (ULONG_PTR
)TrapInformation
,
1639 /* Otherwise, handle COW */
1643 /* Release the working set */
1644 MiUnlockWorkingSet(CurrentThread
, WorkingSet
);
1645 KeLowerIrql(LockIrql
);
1647 /* Otherwise, the PDE was probably invalid, and all is good now */
1648 return STATUS_SUCCESS
;
1651 /* Check one kind of prototype PTE */
1652 if (TempPte
.u
.Soft
.Prototype
)
1654 /* Make sure protected pool is on, and that this is a pool address */
1655 if ((MmProtectFreedNonPagedPool
) &&
1656 (((Address
>= MmNonPagedPoolStart
) &&
1657 (Address
< (PVOID
)((ULONG_PTR
)MmNonPagedPoolStart
+
1658 MmSizeOfNonPagedPoolInBytes
))) ||
1659 ((Address
>= MmNonPagedPoolExpansionStart
) &&
1660 (Address
< MmNonPagedPoolEnd
))))
1662 /* Bad boy, bad boy, whatcha gonna do, whatcha gonna do when ARM3 comes for you! */
1663 KeBugCheckEx(DRIVER_CAUGHT_MODIFYING_FREED_POOL
,
1670 /* Get the prototype PTE! */
1671 ProtoPte
= MiProtoPteToPte(&TempPte
);
1673 /* Do we need to locate the prototype PTE in session space? */
1674 if ((IsSessionAddress
) &&
1675 (TempPte
.u
.Soft
.PageFileHigh
== MI_PTE_LOOKUP_NEEDED
))
1677 /* Yep, go find it as well as the VAD for it */
1678 ProtoPte
= MiCheckVirtualAddress(Address
,
1681 ASSERT(ProtoPte
!= NULL
);
1686 /* We don't implement transition PTEs */
1687 ASSERT(TempPte
.u
.Soft
.Transition
== 0);
1689 /* Check for no-access PTE */
1690 if (TempPte
.u
.Soft
.Protection
== MM_NOACCESS
)
1692 /* Bugcheck the system! */
1693 KeBugCheckEx(PAGE_FAULT_IN_NONPAGED_AREA
,
1696 (ULONG_PTR
)TrapInformation
,
1701 /* Check for demand page */
1702 if ((StoreInstruction
) &&
1704 !(IsSessionAddress
) &&
1705 !(TempPte
.u
.Hard
.Valid
))
1707 /* Get the protection code */
1708 ASSERT(TempPte
.u
.Soft
.Transition
== 0);
1709 if (!(TempPte
.u
.Soft
.Protection
& MM_READWRITE
))
1711 /* Bugcheck the system! */
1712 KeBugCheckEx(ATTEMPTED_WRITE_TO_READONLY_MEMORY
,
1715 (ULONG_PTR
)TrapInformation
,
1720 /* Now do the real fault handling */
1721 Status
= MiDispatchFault(StoreInstruction
,
1730 /* Release the working set */
1731 ASSERT(KeAreAllApcsDisabled() == TRUE
);
1732 MiUnlockWorkingSet(CurrentThread
, WorkingSet
);
1733 KeLowerIrql(LockIrql
);
1736 DPRINT("Fault resolved with status: %lx\n", Status
);
1740 /* This is a user fault */
1742 CurrentThread
= PsGetCurrentThread();
1743 CurrentProcess
= (PEPROCESS
)CurrentThread
->Tcb
.ApcState
.Process
;
1745 /* Lock the working set */
1746 MiLockProcessWorkingSet(CurrentProcess
, CurrentThread
);
1748 #if (_MI_PAGING_LEVELS == 4)
1749 // Note to Timo: You should call MiCheckVirtualAddress and also check if it's zero pte
1750 // also this is missing the page count increment
1751 /* Check if the PXE is valid */
1752 if (PointerPxe
->u
.Hard
.Valid
== 0)
1754 /* Right now, we only handle scenarios where the PXE is totally empty */
1755 ASSERT(PointerPxe
->u
.Long
== 0);
1757 /* Resolve a demand zero fault */
1758 Status
= MiResolveDemandZeroFault(PointerPpe
,
1763 /* We should come back with a valid PXE */
1764 ASSERT(PointerPxe
->u
.Hard
.Valid
== 1);
1768 #if (_MI_PAGING_LEVELS >= 3)
1769 // Note to Timo: You should call MiCheckVirtualAddress and also check if it's zero pte
1770 // also this is missing the page count increment
1771 /* Check if the PPE is valid */
1772 if (PointerPpe
->u
.Hard
.Valid
== 0)
1774 /* Right now, we only handle scenarios where the PPE is totally empty */
1775 ASSERT(PointerPpe
->u
.Long
== 0);
1777 /* Resolve a demand zero fault */
1778 Status
= MiResolveDemandZeroFault(PointerPde
,
1783 /* We should come back with a valid PPE */
1784 ASSERT(PointerPpe
->u
.Hard
.Valid
== 1);
1788 /* Check if the PDE is valid */
1789 if (PointerPde
->u
.Hard
.Valid
== 0)
1791 /* Right now, we only handle scenarios where the PDE is totally empty */
1792 ASSERT(PointerPde
->u
.Long
== 0);
1794 /* And go dispatch the fault on the PDE. This should handle the demand-zero */
1796 UserPdeFault
= TRUE
;
1798 MiCheckVirtualAddress(Address
, &ProtectionCode
, &Vad
);
1799 if (ProtectionCode
== MM_NOACCESS
)
1801 #if (_MI_PAGING_LEVELS == 2)
1802 /* Could be a page table for paged pool */
1803 MiCheckPdeForPagedPool(Address
);
1805 /* Has the code above changed anything -- is this now a valid PTE? */
1806 Status
= (PointerPde
->u
.Hard
.Valid
== 1) ? STATUS_SUCCESS
: STATUS_ACCESS_VIOLATION
;
1808 /* Either this was a bogus VA or we've fixed up a paged pool PDE */
1809 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
1813 /* Write a demand-zero PDE */
1814 MI_WRITE_INVALID_PTE(PointerPde
, DemandZeroPde
);
1816 /* Dispatch the fault */
1817 Status
= MiDispatchFault(TRUE
,
1822 PsGetCurrentProcess(),
1826 UserPdeFault
= FALSE
;
1828 /* We should come back with APCs enabled, and with a valid PDE */
1829 ASSERT(KeAreAllApcsDisabled() == TRUE
);
1830 ASSERT(PointerPde
->u
.Hard
.Valid
== 1);
1834 /* Not yet implemented in ReactOS */
1835 ASSERT(MI_IS_PAGE_LARGE(PointerPde
) == FALSE
);
1838 /* Now capture the PTE. Ignore virtual faults for now */
1839 TempPte
= *PointerPte
;
1840 ASSERT(TempPte
.u
.Hard
.Valid
== 0);
1842 /* Quick check for demand-zero */
1843 if (TempPte
.u
.Long
== (MM_READWRITE
<< MM_PTE_SOFTWARE_PROTECTION_BITS
))
1845 /* Resolve the fault */
1846 MiResolveDemandZeroFault(Address
,
1851 /* Return the status */
1852 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
1853 return STATUS_PAGE_FAULT_DEMAND_ZERO
;
1856 /* Check for zero PTE */
1857 if (TempPte
.u
.Long
== 0)
1859 /* Check if this address range belongs to a valid allocation (VAD) */
1860 ProtoPte
= MiCheckVirtualAddress(Address
, &ProtectionCode
, &Vad
);
1861 if (ProtectionCode
== MM_NOACCESS
)
1863 #if (_MI_PAGING_LEVELS == 2)
1864 /* Could be a page table for paged pool */
1865 MiCheckPdeForPagedPool(Address
);
1867 /* Has the code above changed anything -- is this now a valid PTE? */
1868 Status
= (PointerPte
->u
.Hard
.Valid
== 1) ? STATUS_SUCCESS
: STATUS_ACCESS_VIOLATION
;
1870 /* Either this was a bogus VA or we've fixed up a paged pool PDE */
1871 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
1876 * Check if this is a real user-mode address or actually a kernel-mode
1877 * page table for a user mode address
1879 if (Address
<= MM_HIGHEST_USER_ADDRESS
)
1881 /* Add an additional page table reference */
1882 MiIncrementPageTableReferences(Address
);
1885 /* Is this a guard page? */
1886 if ((ProtectionCode
& MM_PROTECT_SPECIAL
) == MM_GUARDPAGE
)
1888 /* The VAD protection cannot be MM_DECOMMIT! */
1889 NT_ASSERT(ProtectionCode
!= MM_DECOMMIT
);
1891 /* Remove the bit */
1892 TempPte
.u
.Soft
.Protection
= ProtectionCode
& ~MM_GUARDPAGE
;
1893 MI_WRITE_INVALID_PTE(PointerPte
, TempPte
);
1896 ASSERT(ProtoPte
== NULL
);
1897 ASSERT(CurrentThread
->ApcNeeded
== 0);
1899 /* Drop the working set lock */
1900 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
1901 ASSERT(KeGetCurrentIrql() == OldIrql
);
1903 /* Handle stack expansion */
1904 return MiCheckForUserStackOverflow(Address
, TrapInformation
);
1907 /* Did we get a prototype PTE back? */
1910 /* Is this PTE actually part of the PDE-PTE self-mapping directory? */
1911 if (PointerPde
== MiAddressToPde(PTE_BASE
))
1913 /* Then it's really a demand-zero PDE (on behalf of user-mode) */
1914 MI_WRITE_INVALID_PTE(PointerPte
, DemandZeroPde
);
1918 /* No, create a new PTE. First, write the protection */
1919 TempPte
.u
.Soft
.Protection
= ProtectionCode
;
1920 MI_WRITE_INVALID_PTE(PointerPte
, TempPte
);
1923 /* Lock the PFN database since we're going to grab a page */
1924 OldIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
1926 /* Make sure we have enough pages */
1927 ASSERT(MmAvailablePages
>= 32);
1929 /* Try to get a zero page */
1930 MI_SET_USAGE(MI_USAGE_PEB_TEB
);
1931 MI_SET_PROCESS2(CurrentProcess
->ImageFileName
);
1932 Color
= MI_GET_NEXT_PROCESS_COLOR(CurrentProcess
);
1933 PageFrameIndex
= MiRemoveZeroPageSafe(Color
);
1934 if (!PageFrameIndex
)
1936 /* Grab a page out of there. Later we should grab a colored zero page */
1937 PageFrameIndex
= MiRemoveAnyPage(Color
);
1938 ASSERT(PageFrameIndex
);
1940 /* Release the lock since we need to do some zeroing */
1941 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
1943 /* Zero out the page, since it's for user-mode */
1944 MiZeroPfn(PageFrameIndex
);
1946 /* Grab the lock again so we can initialize the PFN entry */
1947 OldIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
1950 /* Initialize the PFN entry now */
1951 MiInitializePfn(PageFrameIndex
, PointerPte
, 1);
1953 /* And we're done with the lock */
1954 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
1956 /* Increment the count of pages in the process */
1957 CurrentProcess
->NumberOfPrivatePages
++;
1959 /* One more demand-zero fault */
1960 InterlockedIncrement(&KeGetCurrentPrcb()->MmDemandZeroCount
);
1962 /* Fault on user PDE, or fault on user PTE? */
1963 if (PointerPte
<= MiHighestUserPte
)
1965 /* User fault, build a user PTE */
1966 MI_MAKE_HARDWARE_PTE_USER(&TempPte
,
1968 PointerPte
->u
.Soft
.Protection
,
1973 /* This is a user-mode PDE, create a kernel PTE for it */
1974 MI_MAKE_HARDWARE_PTE(&TempPte
,
1976 PointerPte
->u
.Soft
.Protection
,
1980 /* Write the dirty bit for writeable pages */
1981 if (MI_IS_PAGE_WRITEABLE(&TempPte
)) MI_MAKE_DIRTY_PAGE(&TempPte
);
1983 /* And now write down the PTE, making the address valid */
1984 MI_WRITE_VALID_PTE(PointerPte
, TempPte
);
1985 Pfn1
= MI_PFN_ELEMENT(PageFrameIndex
);
1986 ASSERT(Pfn1
->u1
.Event
== NULL
);
1989 ASSERT(KeGetCurrentIrql() <= APC_LEVEL
);
1990 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
1991 return STATUS_PAGE_FAULT_DEMAND_ZERO
;
1994 /* We should have a valid protection here */
1995 ASSERT(ProtectionCode
!= 0x100);
1997 /* Write the prototype PTE */
1998 TempPte
= PrototypePte
;
1999 TempPte
.u
.Soft
.Protection
= ProtectionCode
;
2000 NT_ASSERT(TempPte
.u
.Long
!= 0);
2001 MI_WRITE_INVALID_PTE(PointerPte
, TempPte
);
2005 /* Get the protection code and check if this is a proto PTE */
2006 ProtectionCode
= (ULONG
)TempPte
.u
.Soft
.Protection
;
2007 if (TempPte
.u
.Soft
.Prototype
)
2009 /* Do we need to go find the real PTE? */
2010 if (TempPte
.u
.Soft
.PageFileHigh
== MI_PTE_LOOKUP_NEEDED
)
2012 /* Get the prototype pte and VAD for it */
2013 ProtoPte
= MiCheckVirtualAddress(Address
,
2018 ASSERT(KeGetCurrentIrql() <= APC_LEVEL
);
2019 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
2020 return STATUS_ACCESS_VIOLATION
;
2025 /* Get the prototype PTE! */
2026 ProtoPte
= MiProtoPteToPte(&TempPte
);
2028 /* Is it read-only */
2029 if (TempPte
.u
.Proto
.ReadOnly
)
2031 /* Set read-only code */
2032 ProtectionCode
= MM_READONLY
;
2036 /* Set unknown protection */
2037 ProtectionCode
= 0x100;
2038 ASSERT(CurrentProcess
->CloneRoot
!= NULL
);
2044 /* Do we have a valid protection code? */
2045 if (ProtectionCode
!= 0x100)
2047 /* Run a software access check first, including to detect guard pages */
2048 Status
= MiAccessCheck(PointerPte
,
2054 if (Status
!= STATUS_SUCCESS
)
2057 ASSERT(CurrentThread
->ApcNeeded
== 0);
2059 /* Drop the working set lock */
2060 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
2061 ASSERT(KeGetCurrentIrql() == OldIrql
);
2063 /* Did we hit a guard page? */
2064 if (Status
== STATUS_GUARD_PAGE_VIOLATION
)
2066 /* Handle stack expansion */
2067 return MiCheckForUserStackOverflow(Address
, TrapInformation
);
2070 /* Otherwise, fail back to the caller directly */
2075 /* Dispatch the fault */
2076 Status
= MiDispatchFault(StoreInstruction
,
2085 /* Return the status */
2086 ASSERT(KeGetCurrentIrql() <= APC_LEVEL
);
2087 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
2093 MmGetExecuteOptions(IN PULONG ExecuteOptions
)
2095 PKPROCESS CurrentProcess
= &PsGetCurrentProcess()->Pcb
;
2096 ASSERT(KeGetCurrentIrql() == PASSIVE_LEVEL
);
2098 *ExecuteOptions
= 0;
2100 if (CurrentProcess
->Flags
.ExecuteDisable
)
2102 *ExecuteOptions
|= MEM_EXECUTE_OPTION_DISABLE
;
2105 if (CurrentProcess
->Flags
.ExecuteEnable
)
2107 *ExecuteOptions
|= MEM_EXECUTE_OPTION_ENABLE
;
2110 if (CurrentProcess
->Flags
.DisableThunkEmulation
)
2112 *ExecuteOptions
|= MEM_EXECUTE_OPTION_DISABLE_THUNK_EMULATION
;
2115 if (CurrentProcess
->Flags
.Permanent
)
2117 *ExecuteOptions
|= MEM_EXECUTE_OPTION_PERMANENT
;
2120 if (CurrentProcess
->Flags
.ExecuteDispatchEnable
)
2122 *ExecuteOptions
|= MEM_EXECUTE_OPTION_EXECUTE_DISPATCH_ENABLE
;
2125 if (CurrentProcess
->Flags
.ImageDispatchEnable
)
2127 *ExecuteOptions
|= MEM_EXECUTE_OPTION_IMAGE_DISPATCH_ENABLE
;
2130 return STATUS_SUCCESS
;
2135 MmSetExecuteOptions(IN ULONG ExecuteOptions
)
2137 PKPROCESS CurrentProcess
= &PsGetCurrentProcess()->Pcb
;
2138 KLOCK_QUEUE_HANDLE ProcessLock
;
2139 NTSTATUS Status
= STATUS_ACCESS_DENIED
;
2140 ASSERT(KeGetCurrentIrql() == PASSIVE_LEVEL
);
2142 /* Only accept valid flags */
2143 if (ExecuteOptions
& ~MEM_EXECUTE_OPTION_VALID_FLAGS
)
2146 DPRINT1("Invalid no-execute options\n");
2147 return STATUS_INVALID_PARAMETER
;
2150 /* Change the NX state in the process lock */
2151 KiAcquireProcessLock(CurrentProcess
, &ProcessLock
);
2153 /* Don't change anything if the permanent flag was set */
2154 if (!CurrentProcess
->Flags
.Permanent
)
2156 /* Start by assuming it's not disabled */
2157 CurrentProcess
->Flags
.ExecuteDisable
= FALSE
;
2159 /* Now process each flag and turn the equivalent bit on */
2160 if (ExecuteOptions
& MEM_EXECUTE_OPTION_DISABLE
)
2162 CurrentProcess
->Flags
.ExecuteDisable
= TRUE
;
2164 if (ExecuteOptions
& MEM_EXECUTE_OPTION_ENABLE
)
2166 CurrentProcess
->Flags
.ExecuteEnable
= TRUE
;
2168 if (ExecuteOptions
& MEM_EXECUTE_OPTION_DISABLE_THUNK_EMULATION
)
2170 CurrentProcess
->Flags
.DisableThunkEmulation
= TRUE
;
2172 if (ExecuteOptions
& MEM_EXECUTE_OPTION_PERMANENT
)
2174 CurrentProcess
->Flags
.Permanent
= TRUE
;
2176 if (ExecuteOptions
& MEM_EXECUTE_OPTION_EXECUTE_DISPATCH_ENABLE
)
2178 CurrentProcess
->Flags
.ExecuteDispatchEnable
= TRUE
;
2180 if (ExecuteOptions
& MEM_EXECUTE_OPTION_IMAGE_DISPATCH_ENABLE
)
2182 CurrentProcess
->Flags
.ImageDispatchEnable
= TRUE
;
2185 /* These are turned on by default if no-execution is also eanbled */
2186 if (CurrentProcess
->Flags
.ExecuteEnable
)
2188 CurrentProcess
->Flags
.ExecuteDispatchEnable
= TRUE
;
2189 CurrentProcess
->Flags
.ImageDispatchEnable
= TRUE
;
2193 Status
= STATUS_SUCCESS
;
2196 /* Release the lock and return status */
2197 KiReleaseProcessLock(&ProcessLock
);