[DMUSIC]
[reactos.git] / reactos / dll / opengl / mesa / src / mesa / program / ir_to_mesa.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 */
25
26 /**
27 * \file ir_to_mesa.cpp
28 *
29 * Translate GLSL IR to Mesa's gl_program representation.
30 */
31
32 #include <stdio.h>
33 #include "main/compiler.h"
34 #include "ir.h"
35 #include "ir_visitor.h"
36 #include "ir_print_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "ir_uniform.h"
39 #include "glsl_types.h"
40 #include "glsl_parser_extras.h"
41 #include "../glsl/program.h"
42 #include "ir_optimization.h"
43 #include "ast.h"
44 #include "linker.h"
45
46 #include "main/mtypes.h"
47 #include "main/shaderobj.h"
48 #include "program/hash_table.h"
49
50 extern "C" {
51 #include "main/shaderapi.h"
52 #include "main/uniforms.h"
53 #include "program/prog_instruction.h"
54 #include "program/prog_optimize.h"
55 #include "program/prog_print.h"
56 #include "program/program.h"
57 #include "program/prog_parameter.h"
58 #include "program/sampler.h"
59 }
60
61 class src_reg;
62 class dst_reg;
63
64 static int swizzle_for_size(int size);
65
66 /**
67 * This struct is a corresponding struct to Mesa prog_src_register, with
68 * wider fields.
69 */
70 class src_reg {
71 public:
72 src_reg(gl_register_file file, int index, const glsl_type *type)
73 {
74 this->file = file;
75 this->index = index;
76 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
77 this->swizzle = swizzle_for_size(type->vector_elements);
78 else
79 this->swizzle = SWIZZLE_XYZW;
80 this->negate = 0;
81 this->reladdr = NULL;
82 }
83
84 src_reg()
85 {
86 this->file = PROGRAM_UNDEFINED;
87 this->index = 0;
88 this->swizzle = 0;
89 this->negate = 0;
90 this->reladdr = NULL;
91 }
92
93 explicit src_reg(dst_reg reg);
94
95 gl_register_file file; /**< PROGRAM_* from Mesa */
96 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
97 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
98 int negate; /**< NEGATE_XYZW mask from mesa */
99 /** Register index should be offset by the integer in this reg. */
100 src_reg *reladdr;
101 };
102
103 class dst_reg {
104 public:
105 dst_reg(gl_register_file file, int writemask)
106 {
107 this->file = file;
108 this->index = 0;
109 this->writemask = writemask;
110 this->cond_mask = COND_TR;
111 this->reladdr = NULL;
112 }
113
114 dst_reg()
115 {
116 this->file = PROGRAM_UNDEFINED;
117 this->index = 0;
118 this->writemask = 0;
119 this->cond_mask = COND_TR;
120 this->reladdr = NULL;
121 }
122
123 explicit dst_reg(src_reg reg);
124
125 gl_register_file file; /**< PROGRAM_* from Mesa */
126 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
127 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
128 GLuint cond_mask:4;
129 /** Register index should be offset by the integer in this reg. */
130 src_reg *reladdr;
131 };
132
133 src_reg::src_reg(dst_reg reg)
134 {
135 this->file = reg.file;
136 this->index = reg.index;
137 this->swizzle = SWIZZLE_XYZW;
138 this->negate = 0;
139 this->reladdr = reg.reladdr;
140 }
141
142 dst_reg::dst_reg(src_reg reg)
143 {
144 this->file = reg.file;
145 this->index = reg.index;
146 this->writemask = WRITEMASK_XYZW;
147 this->cond_mask = COND_TR;
148 this->reladdr = reg.reladdr;
149 }
150
151 class ir_to_mesa_instruction : public exec_node {
152 public:
153 /* Callers of this ralloc-based new need not call delete. It's
154 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
155 static void* operator new(size_t size, void *ctx)
156 {
157 void *node;
158
159 node = rzalloc_size(ctx, size);
160 assert(node != NULL);
161
162 return node;
163 }
164
165 enum prog_opcode op;
166 dst_reg dst;
167 src_reg src[3];
168 /** Pointer to the ir source this tree came from for debugging */
169 ir_instruction *ir;
170 GLboolean cond_update;
171 bool saturate;
172 int sampler; /**< sampler index */
173 int tex_target; /**< One of TEXTURE_*_INDEX */
174 GLboolean tex_shadow;
175
176 class function_entry *function; /* Set on OPCODE_CAL or OPCODE_BGNSUB */
177 };
178
179 class variable_storage : public exec_node {
180 public:
181 variable_storage(ir_variable *var, gl_register_file file, int index)
182 : file(file), index(index), var(var)
183 {
184 /* empty */
185 }
186
187 gl_register_file file;
188 int index;
189 ir_variable *var; /* variable that maps to this, if any */
190 };
191
192 class function_entry : public exec_node {
193 public:
194 ir_function_signature *sig;
195
196 /**
197 * identifier of this function signature used by the program.
198 *
199 * At the point that Mesa instructions for function calls are
200 * generated, we don't know the address of the first instruction of
201 * the function body. So we make the BranchTarget that is called a
202 * small integer and rewrite them during set_branchtargets().
203 */
204 int sig_id;
205
206 /**
207 * Pointer to first instruction of the function body.
208 *
209 * Set during function body emits after main() is processed.
210 */
211 ir_to_mesa_instruction *bgn_inst;
212
213 /**
214 * Index of the first instruction of the function body in actual
215 * Mesa IR.
216 *
217 * Set after convertion from ir_to_mesa_instruction to prog_instruction.
218 */
219 int inst;
220
221 /** Storage for the return value. */
222 src_reg return_reg;
223 };
224
225 class ir_to_mesa_visitor : public ir_visitor {
226 public:
227 ir_to_mesa_visitor();
228 ~ir_to_mesa_visitor();
229
230 function_entry *current_function;
231
232 struct gl_context *ctx;
233 struct gl_program *prog;
234 struct gl_shader_program *shader_program;
235 struct gl_shader_compiler_options *options;
236
237 int next_temp;
238
239 variable_storage *find_variable_storage(ir_variable *var);
240
241 function_entry *get_function_signature(ir_function_signature *sig);
242
243 src_reg get_temp(const glsl_type *type);
244 void reladdr_to_temp(ir_instruction *ir, src_reg *reg, int *num_reladdr);
245
246 src_reg src_reg_for_float(float val);
247
248 /**
249 * \name Visit methods
250 *
251 * As typical for the visitor pattern, there must be one \c visit method for
252 * each concrete subclass of \c ir_instruction. Virtual base classes within
253 * the hierarchy should not have \c visit methods.
254 */
255 /*@{*/
256 virtual void visit(ir_variable *);
257 virtual void visit(ir_loop *);
258 virtual void visit(ir_loop_jump *);
259 virtual void visit(ir_function_signature *);
260 virtual void visit(ir_function *);
261 virtual void visit(ir_expression *);
262 virtual void visit(ir_swizzle *);
263 virtual void visit(ir_dereference_variable *);
264 virtual void visit(ir_dereference_array *);
265 virtual void visit(ir_dereference_record *);
266 virtual void visit(ir_assignment *);
267 virtual void visit(ir_constant *);
268 virtual void visit(ir_call *);
269 virtual void visit(ir_return *);
270 virtual void visit(ir_discard *);
271 virtual void visit(ir_texture *);
272 virtual void visit(ir_if *);
273 /*@}*/
274
275 src_reg result;
276
277 /** List of variable_storage */
278 exec_list variables;
279
280 /** List of function_entry */
281 exec_list function_signatures;
282 int next_signature_id;
283
284 /** List of ir_to_mesa_instruction */
285 exec_list instructions;
286
287 ir_to_mesa_instruction *emit(ir_instruction *ir, enum prog_opcode op);
288
289 ir_to_mesa_instruction *emit(ir_instruction *ir, enum prog_opcode op,
290 dst_reg dst, src_reg src0);
291
292 ir_to_mesa_instruction *emit(ir_instruction *ir, enum prog_opcode op,
293 dst_reg dst, src_reg src0, src_reg src1);
294
295 ir_to_mesa_instruction *emit(ir_instruction *ir, enum prog_opcode op,
296 dst_reg dst,
297 src_reg src0, src_reg src1, src_reg src2);
298
299 /**
300 * Emit the correct dot-product instruction for the type of arguments
301 */
302 ir_to_mesa_instruction * emit_dp(ir_instruction *ir,
303 dst_reg dst,
304 src_reg src0,
305 src_reg src1,
306 unsigned elements);
307
308 void emit_scalar(ir_instruction *ir, enum prog_opcode op,
309 dst_reg dst, src_reg src0);
310
311 void emit_scalar(ir_instruction *ir, enum prog_opcode op,
312 dst_reg dst, src_reg src0, src_reg src1);
313
314 void emit_scs(ir_instruction *ir, enum prog_opcode op,
315 dst_reg dst, const src_reg &src);
316
317 bool try_emit_mad(ir_expression *ir,
318 int mul_operand);
319 bool try_emit_mad_for_and_not(ir_expression *ir,
320 int mul_operand);
321 bool try_emit_sat(ir_expression *ir);
322
323 void emit_swz(ir_expression *ir);
324
325 bool process_move_condition(ir_rvalue *ir);
326
327 void copy_propagate(void);
328
329 void *mem_ctx;
330 };
331
332 src_reg undef_src = src_reg(PROGRAM_UNDEFINED, 0, NULL);
333
334 dst_reg undef_dst = dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP);
335
336 dst_reg address_reg = dst_reg(PROGRAM_ADDRESS, WRITEMASK_X);
337
338 static int
339 swizzle_for_size(int size)
340 {
341 int size_swizzles[4] = {
342 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
343 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
344 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
345 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
346 };
347
348 assert((size >= 1) && (size <= 4));
349 return size_swizzles[size - 1];
350 }
351
352 ir_to_mesa_instruction *
353 ir_to_mesa_visitor::emit(ir_instruction *ir, enum prog_opcode op,
354 dst_reg dst,
355 src_reg src0, src_reg src1, src_reg src2)
356 {
357 ir_to_mesa_instruction *inst = new(mem_ctx) ir_to_mesa_instruction();
358 int num_reladdr = 0;
359
360 /* If we have to do relative addressing, we want to load the ARL
361 * reg directly for one of the regs, and preload the other reladdr
362 * sources into temps.
363 */
364 num_reladdr += dst.reladdr != NULL;
365 num_reladdr += src0.reladdr != NULL;
366 num_reladdr += src1.reladdr != NULL;
367 num_reladdr += src2.reladdr != NULL;
368
369 reladdr_to_temp(ir, &src2, &num_reladdr);
370 reladdr_to_temp(ir, &src1, &num_reladdr);
371 reladdr_to_temp(ir, &src0, &num_reladdr);
372
373 if (dst.reladdr) {
374 emit(ir, OPCODE_ARL, address_reg, *dst.reladdr);
375 num_reladdr--;
376 }
377 assert(num_reladdr == 0);
378
379 inst->op = op;
380 inst->dst = dst;
381 inst->src[0] = src0;
382 inst->src[1] = src1;
383 inst->src[2] = src2;
384 inst->ir = ir;
385
386 inst->function = NULL;
387
388 this->instructions.push_tail(inst);
389
390 return inst;
391 }
392
393
394 ir_to_mesa_instruction *
395 ir_to_mesa_visitor::emit(ir_instruction *ir, enum prog_opcode op,
396 dst_reg dst, src_reg src0, src_reg src1)
397 {
398 return emit(ir, op, dst, src0, src1, undef_src);
399 }
400
401 ir_to_mesa_instruction *
402 ir_to_mesa_visitor::emit(ir_instruction *ir, enum prog_opcode op,
403 dst_reg dst, src_reg src0)
404 {
405 assert(dst.writemask != 0);
406 return emit(ir, op, dst, src0, undef_src, undef_src);
407 }
408
409 ir_to_mesa_instruction *
410 ir_to_mesa_visitor::emit(ir_instruction *ir, enum prog_opcode op)
411 {
412 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src);
413 }
414
415 ir_to_mesa_instruction *
416 ir_to_mesa_visitor::emit_dp(ir_instruction *ir,
417 dst_reg dst, src_reg src0, src_reg src1,
418 unsigned elements)
419 {
420 static const gl_inst_opcode dot_opcodes[] = {
421 OPCODE_DP2, OPCODE_DP3, OPCODE_DP4
422 };
423
424 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
425 }
426
427 /**
428 * Emits Mesa scalar opcodes to produce unique answers across channels.
429 *
430 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
431 * channel determines the result across all channels. So to do a vec4
432 * of this operation, we want to emit a scalar per source channel used
433 * to produce dest channels.
434 */
435 void
436 ir_to_mesa_visitor::emit_scalar(ir_instruction *ir, enum prog_opcode op,
437 dst_reg dst,
438 src_reg orig_src0, src_reg orig_src1)
439 {
440 int i, j;
441 int done_mask = ~dst.writemask;
442
443 /* Mesa RCP is a scalar operation splatting results to all channels,
444 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
445 * dst channels.
446 */
447 for (i = 0; i < 4; i++) {
448 GLuint this_mask = (1 << i);
449 ir_to_mesa_instruction *inst;
450 src_reg src0 = orig_src0;
451 src_reg src1 = orig_src1;
452
453 if (done_mask & this_mask)
454 continue;
455
456 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
457 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
458 for (j = i + 1; j < 4; j++) {
459 /* If there is another enabled component in the destination that is
460 * derived from the same inputs, generate its value on this pass as
461 * well.
462 */
463 if (!(done_mask & (1 << j)) &&
464 GET_SWZ(src0.swizzle, j) == src0_swiz &&
465 GET_SWZ(src1.swizzle, j) == src1_swiz) {
466 this_mask |= (1 << j);
467 }
468 }
469 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
470 src0_swiz, src0_swiz);
471 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
472 src1_swiz, src1_swiz);
473
474 inst = emit(ir, op, dst, src0, src1);
475 inst->dst.writemask = this_mask;
476 done_mask |= this_mask;
477 }
478 }
479
480 void
481 ir_to_mesa_visitor::emit_scalar(ir_instruction *ir, enum prog_opcode op,
482 dst_reg dst, src_reg src0)
483 {
484 src_reg undef = undef_src;
485
486 undef.swizzle = SWIZZLE_XXXX;
487
488 emit_scalar(ir, op, dst, src0, undef);
489 }
490
491 /**
492 * Emit an OPCODE_SCS instruction
493 *
494 * The \c SCS opcode functions a bit differently than the other Mesa (or
495 * ARB_fragment_program) opcodes. Instead of splatting its result across all
496 * four components of the destination, it writes one value to the \c x
497 * component and another value to the \c y component.
498 *
499 * \param ir IR instruction being processed
500 * \param op Either \c OPCODE_SIN or \c OPCODE_COS depending on which
501 * value is desired.
502 * \param dst Destination register
503 * \param src Source register
504 */
505 void
506 ir_to_mesa_visitor::emit_scs(ir_instruction *ir, enum prog_opcode op,
507 dst_reg dst,
508 const src_reg &src)
509 {
510 /* Vertex programs cannot use the SCS opcode.
511 */
512 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
513 emit_scalar(ir, op, dst, src);
514 return;
515 }
516
517 const unsigned component = (op == OPCODE_SIN) ? 0 : 1;
518 const unsigned scs_mask = (1U << component);
519 int done_mask = ~dst.writemask;
520 src_reg tmp;
521
522 assert(op == OPCODE_SIN || op == OPCODE_COS);
523
524 /* If there are compnents in the destination that differ from the component
525 * that will be written by the SCS instrution, we'll need a temporary.
526 */
527 if (scs_mask != unsigned(dst.writemask)) {
528 tmp = get_temp(glsl_type::vec4_type);
529 }
530
531 for (unsigned i = 0; i < 4; i++) {
532 unsigned this_mask = (1U << i);
533 src_reg src0 = src;
534
535 if ((done_mask & this_mask) != 0)
536 continue;
537
538 /* The source swizzle specified which component of the source generates
539 * sine / cosine for the current component in the destination. The SCS
540 * instruction requires that this value be swizzle to the X component.
541 * Replace the current swizzle with a swizzle that puts the source in
542 * the X component.
543 */
544 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
545
546 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
547 src0_swiz, src0_swiz);
548 for (unsigned j = i + 1; j < 4; j++) {
549 /* If there is another enabled component in the destination that is
550 * derived from the same inputs, generate its value on this pass as
551 * well.
552 */
553 if (!(done_mask & (1 << j)) &&
554 GET_SWZ(src0.swizzle, j) == src0_swiz) {
555 this_mask |= (1 << j);
556 }
557 }
558
559 if (this_mask != scs_mask) {
560 ir_to_mesa_instruction *inst;
561 dst_reg tmp_dst = dst_reg(tmp);
562
563 /* Emit the SCS instruction.
564 */
565 inst = emit(ir, OPCODE_SCS, tmp_dst, src0);
566 inst->dst.writemask = scs_mask;
567
568 /* Move the result of the SCS instruction to the desired location in
569 * the destination.
570 */
571 tmp.swizzle = MAKE_SWIZZLE4(component, component,
572 component, component);
573 inst = emit(ir, OPCODE_SCS, dst, tmp);
574 inst->dst.writemask = this_mask;
575 } else {
576 /* Emit the SCS instruction to write directly to the destination.
577 */
578 ir_to_mesa_instruction *inst = emit(ir, OPCODE_SCS, dst, src0);
579 inst->dst.writemask = scs_mask;
580 }
581
582 done_mask |= this_mask;
583 }
584 }
585
586 src_reg
587 ir_to_mesa_visitor::src_reg_for_float(float val)
588 {
589 src_reg src(PROGRAM_CONSTANT, -1, NULL);
590
591 src.index = _mesa_add_unnamed_constant(this->prog->Parameters,
592 (const gl_constant_value *)&val, 1, &src.swizzle);
593
594 return src;
595 }
596
597 static int
598 type_size(const struct glsl_type *type)
599 {
600 unsigned int i;
601 int size;
602
603 switch (type->base_type) {
604 case GLSL_TYPE_UINT:
605 case GLSL_TYPE_INT:
606 case GLSL_TYPE_FLOAT:
607 case GLSL_TYPE_BOOL:
608 if (type->is_matrix()) {
609 return type->matrix_columns;
610 } else {
611 /* Regardless of size of vector, it gets a vec4. This is bad
612 * packing for things like floats, but otherwise arrays become a
613 * mess. Hopefully a later pass over the code can pack scalars
614 * down if appropriate.
615 */
616 return 1;
617 }
618 case GLSL_TYPE_ARRAY:
619 assert(type->length > 0);
620 return type_size(type->fields.array) * type->length;
621 case GLSL_TYPE_STRUCT:
622 size = 0;
623 for (i = 0; i < type->length; i++) {
624 size += type_size(type->fields.structure[i].type);
625 }
626 return size;
627 case GLSL_TYPE_SAMPLER:
628 /* Samplers take up one slot in UNIFORMS[], but they're baked in
629 * at link time.
630 */
631 return 1;
632 default:
633 assert(0);
634 return 0;
635 }
636 }
637
638 /**
639 * In the initial pass of codegen, we assign temporary numbers to
640 * intermediate results. (not SSA -- variable assignments will reuse
641 * storage). Actual register allocation for the Mesa VM occurs in a
642 * pass over the Mesa IR later.
643 */
644 src_reg
645 ir_to_mesa_visitor::get_temp(const glsl_type *type)
646 {
647 src_reg src;
648
649 src.file = PROGRAM_TEMPORARY;
650 src.index = next_temp;
651 src.reladdr = NULL;
652 next_temp += type_size(type);
653
654 if (type->is_array() || type->is_record()) {
655 src.swizzle = SWIZZLE_NOOP;
656 } else {
657 src.swizzle = swizzle_for_size(type->vector_elements);
658 }
659 src.negate = 0;
660
661 return src;
662 }
663
664 variable_storage *
665 ir_to_mesa_visitor::find_variable_storage(ir_variable *var)
666 {
667
668 variable_storage *entry;
669
670 foreach_iter(exec_list_iterator, iter, this->variables) {
671 entry = (variable_storage *)iter.get();
672
673 if (entry->var == var)
674 return entry;
675 }
676
677 return NULL;
678 }
679
680 void
681 ir_to_mesa_visitor::visit(ir_variable *ir)
682 {
683 if (ir->mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
684 unsigned int i;
685 const ir_state_slot *const slots = ir->state_slots;
686 assert(ir->state_slots != NULL);
687
688 /* Check if this statevar's setup in the STATE file exactly
689 * matches how we'll want to reference it as a
690 * struct/array/whatever. If not, then we need to move it into
691 * temporary storage and hope that it'll get copy-propagated
692 * out.
693 */
694 for (i = 0; i < ir->num_state_slots; i++) {
695 if (slots[i].swizzle != SWIZZLE_XYZW) {
696 break;
697 }
698 }
699
700 variable_storage *storage;
701 dst_reg dst;
702 if (i == ir->num_state_slots) {
703 /* We'll set the index later. */
704 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
705 this->variables.push_tail(storage);
706
707 dst = undef_dst;
708 } else {
709 /* The variable_storage constructor allocates slots based on the size
710 * of the type. However, this had better match the number of state
711 * elements that we're going to copy into the new temporary.
712 */
713 assert((int) ir->num_state_slots == type_size(ir->type));
714
715 storage = new(mem_ctx) variable_storage(ir, PROGRAM_TEMPORARY,
716 this->next_temp);
717 this->variables.push_tail(storage);
718 this->next_temp += type_size(ir->type);
719
720 dst = dst_reg(src_reg(PROGRAM_TEMPORARY, storage->index, NULL));
721 }
722
723
724 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
725 int index = _mesa_add_state_reference(this->prog->Parameters,
726 (gl_state_index *)slots[i].tokens);
727
728 if (storage->file == PROGRAM_STATE_VAR) {
729 if (storage->index == -1) {
730 storage->index = index;
731 } else {
732 assert(index == storage->index + (int)i);
733 }
734 } else {
735 src_reg src(PROGRAM_STATE_VAR, index, NULL);
736 src.swizzle = slots[i].swizzle;
737 emit(ir, OPCODE_MOV, dst, src);
738 /* even a float takes up a whole vec4 reg in a struct/array. */
739 dst.index++;
740 }
741 }
742
743 if (storage->file == PROGRAM_TEMPORARY &&
744 dst.index != storage->index + (int) ir->num_state_slots) {
745 linker_error(this->shader_program,
746 "failed to load builtin uniform `%s' "
747 "(%d/%d regs loaded)\n",
748 ir->name, dst.index - storage->index,
749 type_size(ir->type));
750 }
751 }
752 }
753
754 void
755 ir_to_mesa_visitor::visit(ir_loop *ir)
756 {
757 ir_dereference_variable *counter = NULL;
758
759 if (ir->counter != NULL)
760 counter = new(mem_ctx) ir_dereference_variable(ir->counter);
761
762 if (ir->from != NULL) {
763 assert(ir->counter != NULL);
764
765 ir_assignment *a =
766 new(mem_ctx) ir_assignment(counter, ir->from, NULL);
767
768 a->accept(this);
769 }
770
771 emit(NULL, OPCODE_BGNLOOP);
772
773 if (ir->to) {
774 ir_expression *e =
775 new(mem_ctx) ir_expression(ir->cmp, glsl_type::bool_type,
776 counter, ir->to);
777 ir_if *if_stmt = new(mem_ctx) ir_if(e);
778
779 ir_loop_jump *brk =
780 new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break);
781
782 if_stmt->then_instructions.push_tail(brk);
783
784 if_stmt->accept(this);
785 }
786
787 visit_exec_list(&ir->body_instructions, this);
788
789 if (ir->increment) {
790 ir_expression *e =
791 new(mem_ctx) ir_expression(ir_binop_add, counter->type,
792 counter, ir->increment);
793
794 ir_assignment *a =
795 new(mem_ctx) ir_assignment(counter, e, NULL);
796
797 a->accept(this);
798 }
799
800 emit(NULL, OPCODE_ENDLOOP);
801 }
802
803 void
804 ir_to_mesa_visitor::visit(ir_loop_jump *ir)
805 {
806 switch (ir->mode) {
807 case ir_loop_jump::jump_break:
808 emit(NULL, OPCODE_BRK);
809 break;
810 case ir_loop_jump::jump_continue:
811 emit(NULL, OPCODE_CONT);
812 break;
813 }
814 }
815
816
817 void
818 ir_to_mesa_visitor::visit(ir_function_signature *ir)
819 {
820 assert(0);
821 (void)ir;
822 }
823
824 void
825 ir_to_mesa_visitor::visit(ir_function *ir)
826 {
827 /* Ignore function bodies other than main() -- we shouldn't see calls to
828 * them since they should all be inlined before we get to ir_to_mesa.
829 */
830 if (strcmp(ir->name, "main") == 0) {
831 const ir_function_signature *sig;
832 exec_list empty;
833
834 sig = ir->matching_signature(&empty);
835
836 assert(sig);
837
838 foreach_iter(exec_list_iterator, iter, sig->body) {
839 ir_instruction *ir = (ir_instruction *)iter.get();
840
841 ir->accept(this);
842 }
843 }
844 }
845
846 bool
847 ir_to_mesa_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
848 {
849 int nonmul_operand = 1 - mul_operand;
850 src_reg a, b, c;
851
852 ir_expression *expr = ir->operands[mul_operand]->as_expression();
853 if (!expr || expr->operation != ir_binop_mul)
854 return false;
855
856 expr->operands[0]->accept(this);
857 a = this->result;
858 expr->operands[1]->accept(this);
859 b = this->result;
860 ir->operands[nonmul_operand]->accept(this);
861 c = this->result;
862
863 this->result = get_temp(ir->type);
864 emit(ir, OPCODE_MAD, dst_reg(this->result), a, b, c);
865
866 return true;
867 }
868
869 /**
870 * Emit OPCODE_MAD(a, -b, a) instead of AND(a, NOT(b))
871 *
872 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
873 * implemented using multiplication, and logical-or is implemented using
874 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
875 * As result, the logical expression (a & !b) can be rewritten as:
876 *
877 * - a * !b
878 * - a * (1 - b)
879 * - (a * 1) - (a * b)
880 * - a + -(a * b)
881 * - a + (a * -b)
882 *
883 * This final expression can be implemented as a single MAD(a, -b, a)
884 * instruction.
885 */
886 bool
887 ir_to_mesa_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
888 {
889 const int other_operand = 1 - try_operand;
890 src_reg a, b;
891
892 ir_expression *expr = ir->operands[try_operand]->as_expression();
893 if (!expr || expr->operation != ir_unop_logic_not)
894 return false;
895
896 ir->operands[other_operand]->accept(this);
897 a = this->result;
898 expr->operands[0]->accept(this);
899 b = this->result;
900
901 b.negate = ~b.negate;
902
903 this->result = get_temp(ir->type);
904 emit(ir, OPCODE_MAD, dst_reg(this->result), a, b, a);
905
906 return true;
907 }
908
909 bool
910 ir_to_mesa_visitor::try_emit_sat(ir_expression *ir)
911 {
912 /* Saturates were only introduced to vertex programs in
913 * NV_vertex_program3, so don't give them to drivers in the VP.
914 */
915 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB)
916 return false;
917
918 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
919 if (!sat_src)
920 return false;
921
922 sat_src->accept(this);
923 src_reg src = this->result;
924
925 /* If we generated an expression instruction into a temporary in
926 * processing the saturate's operand, apply the saturate to that
927 * instruction. Otherwise, generate a MOV to do the saturate.
928 *
929 * Note that we have to be careful to only do this optimization if
930 * the instruction in question was what generated src->result. For
931 * example, ir_dereference_array might generate a MUL instruction
932 * to create the reladdr, and return us a src reg using that
933 * reladdr. That MUL result is not the value we're trying to
934 * saturate.
935 */
936 ir_expression *sat_src_expr = sat_src->as_expression();
937 ir_to_mesa_instruction *new_inst;
938 new_inst = (ir_to_mesa_instruction *)this->instructions.get_tail();
939 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
940 sat_src_expr->operation == ir_binop_add ||
941 sat_src_expr->operation == ir_binop_dot)) {
942 new_inst->saturate = true;
943 } else {
944 this->result = get_temp(ir->type);
945 ir_to_mesa_instruction *inst;
946 inst = emit(ir, OPCODE_MOV, dst_reg(this->result), src);
947 inst->saturate = true;
948 }
949
950 return true;
951 }
952
953 void
954 ir_to_mesa_visitor::reladdr_to_temp(ir_instruction *ir,
955 src_reg *reg, int *num_reladdr)
956 {
957 if (!reg->reladdr)
958 return;
959
960 emit(ir, OPCODE_ARL, address_reg, *reg->reladdr);
961
962 if (*num_reladdr != 1) {
963 src_reg temp = get_temp(glsl_type::vec4_type);
964
965 emit(ir, OPCODE_MOV, dst_reg(temp), *reg);
966 *reg = temp;
967 }
968
969 (*num_reladdr)--;
970 }
971
972 void
973 ir_to_mesa_visitor::emit_swz(ir_expression *ir)
974 {
975 /* Assume that the vector operator is in a form compatible with OPCODE_SWZ.
976 * This means that each of the operands is either an immediate value of -1,
977 * 0, or 1, or is a component from one source register (possibly with
978 * negation).
979 */
980 uint8_t components[4] = { 0 };
981 bool negate[4] = { false };
982 ir_variable *var = NULL;
983
984 for (unsigned i = 0; i < ir->type->vector_elements; i++) {
985 ir_rvalue *op = ir->operands[i];
986
987 assert(op->type->is_scalar());
988
989 while (op != NULL) {
990 switch (op->ir_type) {
991 case ir_type_constant: {
992
993 assert(op->type->is_scalar());
994
995 const ir_constant *const c = op->as_constant();
996 if (c->is_one()) {
997 components[i] = SWIZZLE_ONE;
998 } else if (c->is_zero()) {
999 components[i] = SWIZZLE_ZERO;
1000 } else if (c->is_negative_one()) {
1001 components[i] = SWIZZLE_ONE;
1002 negate[i] = true;
1003 } else {
1004 assert(!"SWZ constant must be 0.0 or 1.0.");
1005 }
1006
1007 op = NULL;
1008 break;
1009 }
1010
1011 case ir_type_dereference_variable: {
1012 ir_dereference_variable *const deref =
1013 (ir_dereference_variable *) op;
1014
1015 assert((var == NULL) || (deref->var == var));
1016 components[i] = SWIZZLE_X;
1017 var = deref->var;
1018 op = NULL;
1019 break;
1020 }
1021
1022 case ir_type_expression: {
1023 ir_expression *const expr = (ir_expression *) op;
1024
1025 assert(expr->operation == ir_unop_neg);
1026 negate[i] = true;
1027
1028 op = expr->operands[0];
1029 break;
1030 }
1031
1032 case ir_type_swizzle: {
1033 ir_swizzle *const swiz = (ir_swizzle *) op;
1034
1035 components[i] = swiz->mask.x;
1036 op = swiz->val;
1037 break;
1038 }
1039
1040 default:
1041 assert(!"Should not get here.");
1042 return;
1043 }
1044 }
1045 }
1046
1047 assert(var != NULL);
1048
1049 ir_dereference_variable *const deref =
1050 new(mem_ctx) ir_dereference_variable(var);
1051
1052 this->result.file = PROGRAM_UNDEFINED;
1053 deref->accept(this);
1054 if (this->result.file == PROGRAM_UNDEFINED) {
1055 ir_print_visitor v;
1056 printf("Failed to get tree for expression operand:\n");
1057 deref->accept(&v);
1058 exit(1);
1059 }
1060
1061 src_reg src;
1062
1063 src = this->result;
1064 src.swizzle = MAKE_SWIZZLE4(components[0],
1065 components[1],
1066 components[2],
1067 components[3]);
1068 src.negate = ((unsigned(negate[0]) << 0)
1069 | (unsigned(negate[1]) << 1)
1070 | (unsigned(negate[2]) << 2)
1071 | (unsigned(negate[3]) << 3));
1072
1073 /* Storage for our result. Ideally for an assignment we'd be using the
1074 * actual storage for the result here, instead.
1075 */
1076 const src_reg result_src = get_temp(ir->type);
1077 dst_reg result_dst = dst_reg(result_src);
1078
1079 /* Limit writes to the channels that will be used by result_src later.
1080 * This does limit this temp's use as a temporary for multi-instruction
1081 * sequences.
1082 */
1083 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1084
1085 emit(ir, OPCODE_SWZ, result_dst, src);
1086 this->result = result_src;
1087 }
1088
1089 void
1090 ir_to_mesa_visitor::visit(ir_expression *ir)
1091 {
1092 unsigned int operand;
1093 src_reg op[Elements(ir->operands)];
1094 src_reg result_src;
1095 dst_reg result_dst;
1096
1097 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
1098 */
1099 if (ir->operation == ir_binop_add) {
1100 if (try_emit_mad(ir, 1))
1101 return;
1102 if (try_emit_mad(ir, 0))
1103 return;
1104 }
1105
1106 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1107 */
1108 if (ir->operation == ir_binop_logic_and) {
1109 if (try_emit_mad_for_and_not(ir, 1))
1110 return;
1111 if (try_emit_mad_for_and_not(ir, 0))
1112 return;
1113 }
1114
1115 if (try_emit_sat(ir))
1116 return;
1117
1118 if (ir->operation == ir_quadop_vector) {
1119 this->emit_swz(ir);
1120 return;
1121 }
1122
1123 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1124 this->result.file = PROGRAM_UNDEFINED;
1125 ir->operands[operand]->accept(this);
1126 if (this->result.file == PROGRAM_UNDEFINED) {
1127 ir_print_visitor v;
1128 printf("Failed to get tree for expression operand:\n");
1129 ir->operands[operand]->accept(&v);
1130 exit(1);
1131 }
1132 op[operand] = this->result;
1133
1134 /* Matrix expression operands should have been broken down to vector
1135 * operations already.
1136 */
1137 assert(!ir->operands[operand]->type->is_matrix());
1138 }
1139
1140 int vector_elements = ir->operands[0]->type->vector_elements;
1141 if (ir->operands[1]) {
1142 vector_elements = MAX2(vector_elements,
1143 ir->operands[1]->type->vector_elements);
1144 }
1145
1146 this->result.file = PROGRAM_UNDEFINED;
1147
1148 /* Storage for our result. Ideally for an assignment we'd be using
1149 * the actual storage for the result here, instead.
1150 */
1151 result_src = get_temp(ir->type);
1152 /* convenience for the emit functions below. */
1153 result_dst = dst_reg(result_src);
1154 /* Limit writes to the channels that will be used by result_src later.
1155 * This does limit this temp's use as a temporary for multi-instruction
1156 * sequences.
1157 */
1158 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1159
1160 switch (ir->operation) {
1161 case ir_unop_logic_not:
1162 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1163 * older GPUs implement SEQ using multiple instructions (i915 uses two
1164 * SGE instructions and a MUL instruction). Since our logic values are
1165 * 0.0 and 1.0, 1-x also implements !x.
1166 */
1167 op[0].negate = ~op[0].negate;
1168 emit(ir, OPCODE_ADD, result_dst, op[0], src_reg_for_float(1.0));
1169 break;
1170 case ir_unop_neg:
1171 op[0].negate = ~op[0].negate;
1172 result_src = op[0];
1173 break;
1174 case ir_unop_abs:
1175 emit(ir, OPCODE_ABS, result_dst, op[0]);
1176 break;
1177 case ir_unop_sign:
1178 emit(ir, OPCODE_SSG, result_dst, op[0]);
1179 break;
1180 case ir_unop_rcp:
1181 emit_scalar(ir, OPCODE_RCP, result_dst, op[0]);
1182 break;
1183
1184 case ir_unop_exp2:
1185 emit_scalar(ir, OPCODE_EX2, result_dst, op[0]);
1186 break;
1187 case ir_unop_exp:
1188 case ir_unop_log:
1189 assert(!"not reached: should be handled by ir_explog_to_explog2");
1190 break;
1191 case ir_unop_log2:
1192 emit_scalar(ir, OPCODE_LG2, result_dst, op[0]);
1193 break;
1194 case ir_unop_sin:
1195 emit_scalar(ir, OPCODE_SIN, result_dst, op[0]);
1196 break;
1197 case ir_unop_cos:
1198 emit_scalar(ir, OPCODE_COS, result_dst, op[0]);
1199 break;
1200 case ir_unop_sin_reduced:
1201 emit_scs(ir, OPCODE_SIN, result_dst, op[0]);
1202 break;
1203 case ir_unop_cos_reduced:
1204 emit_scs(ir, OPCODE_COS, result_dst, op[0]);
1205 break;
1206
1207 case ir_unop_dFdx:
1208 emit(ir, OPCODE_DDX, result_dst, op[0]);
1209 break;
1210 case ir_unop_dFdy:
1211 emit(ir, OPCODE_DDY, result_dst, op[0]);
1212 break;
1213
1214 case ir_unop_noise: {
1215 const enum prog_opcode opcode =
1216 prog_opcode(OPCODE_NOISE1
1217 + (ir->operands[0]->type->vector_elements) - 1);
1218 assert((opcode >= OPCODE_NOISE1) && (opcode <= OPCODE_NOISE4));
1219
1220 emit(ir, opcode, result_dst, op[0]);
1221 break;
1222 }
1223
1224 case ir_binop_add:
1225 emit(ir, OPCODE_ADD, result_dst, op[0], op[1]);
1226 break;
1227 case ir_binop_sub:
1228 emit(ir, OPCODE_SUB, result_dst, op[0], op[1]);
1229 break;
1230
1231 case ir_binop_mul:
1232 emit(ir, OPCODE_MUL, result_dst, op[0], op[1]);
1233 break;
1234 case ir_binop_div:
1235 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1236 break;
1237 case ir_binop_mod:
1238 /* Floating point should be lowered by MOD_TO_FRACT in the compiler. */
1239 assert(ir->type->is_integer());
1240 emit(ir, OPCODE_MUL, result_dst, op[0], op[1]);
1241 break;
1242
1243 case ir_binop_less:
1244 emit(ir, OPCODE_SLT, result_dst, op[0], op[1]);
1245 break;
1246 case ir_binop_greater:
1247 emit(ir, OPCODE_SGT, result_dst, op[0], op[1]);
1248 break;
1249 case ir_binop_lequal:
1250 emit(ir, OPCODE_SLE, result_dst, op[0], op[1]);
1251 break;
1252 case ir_binop_gequal:
1253 emit(ir, OPCODE_SGE, result_dst, op[0], op[1]);
1254 break;
1255 case ir_binop_equal:
1256 emit(ir, OPCODE_SEQ, result_dst, op[0], op[1]);
1257 break;
1258 case ir_binop_nequal:
1259 emit(ir, OPCODE_SNE, result_dst, op[0], op[1]);
1260 break;
1261 case ir_binop_all_equal:
1262 /* "==" operator producing a scalar boolean. */
1263 if (ir->operands[0]->type->is_vector() ||
1264 ir->operands[1]->type->is_vector()) {
1265 src_reg temp = get_temp(glsl_type::vec4_type);
1266 emit(ir, OPCODE_SNE, dst_reg(temp), op[0], op[1]);
1267
1268 /* After the dot-product, the value will be an integer on the
1269 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1270 */
1271 emit_dp(ir, result_dst, temp, temp, vector_elements);
1272
1273 /* Negating the result of the dot-product gives values on the range
1274 * [-4, 0]. Zero becomes 1.0, and negative values become zero. This
1275 * achieved using SGE.
1276 */
1277 src_reg sge_src = result_src;
1278 sge_src.negate = ~sge_src.negate;
1279 emit(ir, OPCODE_SGE, result_dst, sge_src, src_reg_for_float(0.0));
1280 } else {
1281 emit(ir, OPCODE_SEQ, result_dst, op[0], op[1]);
1282 }
1283 break;
1284 case ir_binop_any_nequal:
1285 /* "!=" operator producing a scalar boolean. */
1286 if (ir->operands[0]->type->is_vector() ||
1287 ir->operands[1]->type->is_vector()) {
1288 src_reg temp = get_temp(glsl_type::vec4_type);
1289 emit(ir, OPCODE_SNE, dst_reg(temp), op[0], op[1]);
1290
1291 /* After the dot-product, the value will be an integer on the
1292 * range [0,4]. Zero stays zero, and positive values become 1.0.
1293 */
1294 ir_to_mesa_instruction *const dp =
1295 emit_dp(ir, result_dst, temp, temp, vector_elements);
1296 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1297 /* The clamping to [0,1] can be done for free in the fragment
1298 * shader with a saturate.
1299 */
1300 dp->saturate = true;
1301 } else {
1302 /* Negating the result of the dot-product gives values on the range
1303 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1304 * achieved using SLT.
1305 */
1306 src_reg slt_src = result_src;
1307 slt_src.negate = ~slt_src.negate;
1308 emit(ir, OPCODE_SLT, result_dst, slt_src, src_reg_for_float(0.0));
1309 }
1310 } else {
1311 emit(ir, OPCODE_SNE, result_dst, op[0], op[1]);
1312 }
1313 break;
1314
1315 case ir_unop_any: {
1316 assert(ir->operands[0]->type->is_vector());
1317
1318 /* After the dot-product, the value will be an integer on the
1319 * range [0,4]. Zero stays zero, and positive values become 1.0.
1320 */
1321 ir_to_mesa_instruction *const dp =
1322 emit_dp(ir, result_dst, op[0], op[0],
1323 ir->operands[0]->type->vector_elements);
1324 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1325 /* The clamping to [0,1] can be done for free in the fragment
1326 * shader with a saturate.
1327 */
1328 dp->saturate = true;
1329 } else {
1330 /* Negating the result of the dot-product gives values on the range
1331 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1332 * is achieved using SLT.
1333 */
1334 src_reg slt_src = result_src;
1335 slt_src.negate = ~slt_src.negate;
1336 emit(ir, OPCODE_SLT, result_dst, slt_src, src_reg_for_float(0.0));
1337 }
1338 break;
1339 }
1340
1341 case ir_binop_logic_xor:
1342 emit(ir, OPCODE_SNE, result_dst, op[0], op[1]);
1343 break;
1344
1345 case ir_binop_logic_or: {
1346 /* After the addition, the value will be an integer on the
1347 * range [0,2]. Zero stays zero, and positive values become 1.0.
1348 */
1349 ir_to_mesa_instruction *add =
1350 emit(ir, OPCODE_ADD, result_dst, op[0], op[1]);
1351 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1352 /* The clamping to [0,1] can be done for free in the fragment
1353 * shader with a saturate.
1354 */
1355 add->saturate = true;
1356 } else {
1357 /* Negating the result of the addition gives values on the range
1358 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1359 * is achieved using SLT.
1360 */
1361 src_reg slt_src = result_src;
1362 slt_src.negate = ~slt_src.negate;
1363 emit(ir, OPCODE_SLT, result_dst, slt_src, src_reg_for_float(0.0));
1364 }
1365 break;
1366 }
1367
1368 case ir_binop_logic_and:
1369 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
1370 emit(ir, OPCODE_MUL, result_dst, op[0], op[1]);
1371 break;
1372
1373 case ir_binop_dot:
1374 assert(ir->operands[0]->type->is_vector());
1375 assert(ir->operands[0]->type == ir->operands[1]->type);
1376 emit_dp(ir, result_dst, op[0], op[1],
1377 ir->operands[0]->type->vector_elements);
1378 break;
1379
1380 case ir_unop_sqrt:
1381 /* sqrt(x) = x * rsq(x). */
1382 emit_scalar(ir, OPCODE_RSQ, result_dst, op[0]);
1383 emit(ir, OPCODE_MUL, result_dst, result_src, op[0]);
1384 /* For incoming channels <= 0, set the result to 0. */
1385 op[0].negate = ~op[0].negate;
1386 emit(ir, OPCODE_CMP, result_dst,
1387 op[0], result_src, src_reg_for_float(0.0));
1388 break;
1389 case ir_unop_rsq:
1390 emit_scalar(ir, OPCODE_RSQ, result_dst, op[0]);
1391 break;
1392 case ir_unop_i2f:
1393 case ir_unop_u2f:
1394 case ir_unop_b2f:
1395 case ir_unop_b2i:
1396 case ir_unop_i2u:
1397 case ir_unop_u2i:
1398 /* Mesa IR lacks types, ints are stored as truncated floats. */
1399 result_src = op[0];
1400 break;
1401 case ir_unop_f2i:
1402 emit(ir, OPCODE_TRUNC, result_dst, op[0]);
1403 break;
1404 case ir_unop_f2b:
1405 case ir_unop_i2b:
1406 emit(ir, OPCODE_SNE, result_dst,
1407 op[0], src_reg_for_float(0.0));
1408 break;
1409 case ir_unop_trunc:
1410 emit(ir, OPCODE_TRUNC, result_dst, op[0]);
1411 break;
1412 case ir_unop_ceil:
1413 op[0].negate = ~op[0].negate;
1414 emit(ir, OPCODE_FLR, result_dst, op[0]);
1415 result_src.negate = ~result_src.negate;
1416 break;
1417 case ir_unop_floor:
1418 emit(ir, OPCODE_FLR, result_dst, op[0]);
1419 break;
1420 case ir_unop_fract:
1421 emit(ir, OPCODE_FRC, result_dst, op[0]);
1422 break;
1423
1424 case ir_binop_min:
1425 emit(ir, OPCODE_MIN, result_dst, op[0], op[1]);
1426 break;
1427 case ir_binop_max:
1428 emit(ir, OPCODE_MAX, result_dst, op[0], op[1]);
1429 break;
1430 case ir_binop_pow:
1431 emit_scalar(ir, OPCODE_POW, result_dst, op[0], op[1]);
1432 break;
1433
1434 /* GLSL 1.30 integer ops are unsupported in Mesa IR, but since
1435 * hardware backends have no way to avoid Mesa IR generation
1436 * even if they don't use it, we need to emit "something" and
1437 * continue.
1438 */
1439 case ir_binop_lshift:
1440 case ir_binop_rshift:
1441 case ir_binop_bit_and:
1442 case ir_binop_bit_xor:
1443 case ir_binop_bit_or:
1444 emit(ir, OPCODE_ADD, result_dst, op[0], op[1]);
1445 break;
1446
1447 case ir_unop_bit_not:
1448 case ir_unop_round_even:
1449 emit(ir, OPCODE_MOV, result_dst, op[0]);
1450 break;
1451
1452 case ir_quadop_vector:
1453 /* This operation should have already been handled.
1454 */
1455 assert(!"Should not get here.");
1456 break;
1457 }
1458
1459 this->result = result_src;
1460 }
1461
1462
1463 void
1464 ir_to_mesa_visitor::visit(ir_swizzle *ir)
1465 {
1466 src_reg src;
1467 int i;
1468 int swizzle[4];
1469
1470 /* Note that this is only swizzles in expressions, not those on the left
1471 * hand side of an assignment, which do write masking. See ir_assignment
1472 * for that.
1473 */
1474
1475 ir->val->accept(this);
1476 src = this->result;
1477 assert(src.file != PROGRAM_UNDEFINED);
1478
1479 for (i = 0; i < 4; i++) {
1480 if (i < ir->type->vector_elements) {
1481 switch (i) {
1482 case 0:
1483 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
1484 break;
1485 case 1:
1486 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
1487 break;
1488 case 2:
1489 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
1490 break;
1491 case 3:
1492 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
1493 break;
1494 }
1495 } else {
1496 /* If the type is smaller than a vec4, replicate the last
1497 * channel out.
1498 */
1499 swizzle[i] = swizzle[ir->type->vector_elements - 1];
1500 }
1501 }
1502
1503 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
1504
1505 this->result = src;
1506 }
1507
1508 void
1509 ir_to_mesa_visitor::visit(ir_dereference_variable *ir)
1510 {
1511 variable_storage *entry = find_variable_storage(ir->var);
1512 ir_variable *var = ir->var;
1513
1514 if (!entry) {
1515 switch (var->mode) {
1516 case ir_var_uniform:
1517 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
1518 var->location);
1519 this->variables.push_tail(entry);
1520 break;
1521 case ir_var_in:
1522 case ir_var_inout:
1523 /* The linker assigns locations for varyings and attributes,
1524 * including deprecated builtins (like gl_Color),
1525 * user-assigned generic attributes (glBindVertexLocation),
1526 * and user-defined varyings.
1527 *
1528 * FINISHME: We would hit this path for function arguments. Fix!
1529 */
1530 assert(var->location != -1);
1531 entry = new(mem_ctx) variable_storage(var,
1532 PROGRAM_INPUT,
1533 var->location);
1534 break;
1535 case ir_var_out:
1536 assert(var->location != -1);
1537 entry = new(mem_ctx) variable_storage(var,
1538 PROGRAM_OUTPUT,
1539 var->location);
1540 break;
1541 case ir_var_system_value:
1542 entry = new(mem_ctx) variable_storage(var,
1543 PROGRAM_SYSTEM_VALUE,
1544 var->location);
1545 break;
1546 case ir_var_auto:
1547 case ir_var_temporary:
1548 entry = new(mem_ctx) variable_storage(var, PROGRAM_TEMPORARY,
1549 this->next_temp);
1550 this->variables.push_tail(entry);
1551
1552 next_temp += type_size(var->type);
1553 break;
1554 }
1555
1556 if (!entry) {
1557 printf("Failed to make storage for %s\n", var->name);
1558 exit(1);
1559 }
1560 }
1561
1562 this->result = src_reg(entry->file, entry->index, var->type);
1563 }
1564
1565 void
1566 ir_to_mesa_visitor::visit(ir_dereference_array *ir)
1567 {
1568 ir_constant *index;
1569 src_reg src;
1570 int element_size = type_size(ir->type);
1571
1572 index = ir->array_index->constant_expression_value();
1573
1574 ir->array->accept(this);
1575 src = this->result;
1576
1577 if (index) {
1578 src.index += index->value.i[0] * element_size;
1579 } else {
1580 /* Variable index array dereference. It eats the "vec4" of the
1581 * base of the array and an index that offsets the Mesa register
1582 * index.
1583 */
1584 ir->array_index->accept(this);
1585
1586 src_reg index_reg;
1587
1588 if (element_size == 1) {
1589 index_reg = this->result;
1590 } else {
1591 index_reg = get_temp(glsl_type::float_type);
1592
1593 emit(ir, OPCODE_MUL, dst_reg(index_reg),
1594 this->result, src_reg_for_float(element_size));
1595 }
1596
1597 /* If there was already a relative address register involved, add the
1598 * new and the old together to get the new offset.
1599 */
1600 if (src.reladdr != NULL) {
1601 src_reg accum_reg = get_temp(glsl_type::float_type);
1602
1603 emit(ir, OPCODE_ADD, dst_reg(accum_reg),
1604 index_reg, *src.reladdr);
1605
1606 index_reg = accum_reg;
1607 }
1608
1609 src.reladdr = ralloc(mem_ctx, src_reg);
1610 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
1611 }
1612
1613 /* If the type is smaller than a vec4, replicate the last channel out. */
1614 if (ir->type->is_scalar() || ir->type->is_vector())
1615 src.swizzle = swizzle_for_size(ir->type->vector_elements);
1616 else
1617 src.swizzle = SWIZZLE_NOOP;
1618
1619 this->result = src;
1620 }
1621
1622 void
1623 ir_to_mesa_visitor::visit(ir_dereference_record *ir)
1624 {
1625 unsigned int i;
1626 const glsl_type *struct_type = ir->record->type;
1627 int offset = 0;
1628
1629 ir->record->accept(this);
1630
1631 for (i = 0; i < struct_type->length; i++) {
1632 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
1633 break;
1634 offset += type_size(struct_type->fields.structure[i].type);
1635 }
1636
1637 /* If the type is smaller than a vec4, replicate the last channel out. */
1638 if (ir->type->is_scalar() || ir->type->is_vector())
1639 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
1640 else
1641 this->result.swizzle = SWIZZLE_NOOP;
1642
1643 this->result.index += offset;
1644 }
1645
1646 /**
1647 * We want to be careful in assignment setup to hit the actual storage
1648 * instead of potentially using a temporary like we might with the
1649 * ir_dereference handler.
1650 */
1651 static dst_reg
1652 get_assignment_lhs(ir_dereference *ir, ir_to_mesa_visitor *v)
1653 {
1654 /* The LHS must be a dereference. If the LHS is a variable indexed array
1655 * access of a vector, it must be separated into a series conditional moves
1656 * before reaching this point (see ir_vec_index_to_cond_assign).
1657 */
1658 assert(ir->as_dereference());
1659 ir_dereference_array *deref_array = ir->as_dereference_array();
1660 if (deref_array) {
1661 assert(!deref_array->array->type->is_vector());
1662 }
1663
1664 /* Use the rvalue deref handler for the most part. We'll ignore
1665 * swizzles in it and write swizzles using writemask, though.
1666 */
1667 ir->accept(v);
1668 return dst_reg(v->result);
1669 }
1670
1671 /**
1672 * Process the condition of a conditional assignment
1673 *
1674 * Examines the condition of a conditional assignment to generate the optimal
1675 * first operand of a \c CMP instruction. If the condition is a relational
1676 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
1677 * used as the source for the \c CMP instruction. Otherwise the comparison
1678 * is processed to a boolean result, and the boolean result is used as the
1679 * operand to the CMP instruction.
1680 */
1681 bool
1682 ir_to_mesa_visitor::process_move_condition(ir_rvalue *ir)
1683 {
1684 ir_rvalue *src_ir = ir;
1685 bool negate = true;
1686 bool switch_order = false;
1687
1688 ir_expression *const expr = ir->as_expression();
1689 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
1690 bool zero_on_left = false;
1691
1692 if (expr->operands[0]->is_zero()) {
1693 src_ir = expr->operands[1];
1694 zero_on_left = true;
1695 } else if (expr->operands[1]->is_zero()) {
1696 src_ir = expr->operands[0];
1697 zero_on_left = false;
1698 }
1699
1700 /* a is - 0 + - 0 +
1701 * (a < 0) T F F ( a < 0) T F F
1702 * (0 < a) F F T (-a < 0) F F T
1703 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
1704 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
1705 * (a > 0) F F T (-a < 0) F F T
1706 * (0 > a) T F F ( a < 0) T F F
1707 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
1708 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
1709 *
1710 * Note that exchanging the order of 0 and 'a' in the comparison simply
1711 * means that the value of 'a' should be negated.
1712 */
1713 if (src_ir != ir) {
1714 switch (expr->operation) {
1715 case ir_binop_less:
1716 switch_order = false;
1717 negate = zero_on_left;
1718 break;
1719
1720 case ir_binop_greater:
1721 switch_order = false;
1722 negate = !zero_on_left;
1723 break;
1724
1725 case ir_binop_lequal:
1726 switch_order = true;
1727 negate = !zero_on_left;
1728 break;
1729
1730 case ir_binop_gequal:
1731 switch_order = true;
1732 negate = zero_on_left;
1733 break;
1734
1735 default:
1736 /* This isn't the right kind of comparison afterall, so make sure
1737 * the whole condition is visited.
1738 */
1739 src_ir = ir;
1740 break;
1741 }
1742 }
1743 }
1744
1745 src_ir->accept(this);
1746
1747 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
1748 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
1749 * choose which value OPCODE_CMP produces without an extra instruction
1750 * computing the condition.
1751 */
1752 if (negate)
1753 this->result.negate = ~this->result.negate;
1754
1755 return switch_order;
1756 }
1757
1758 void
1759 ir_to_mesa_visitor::visit(ir_assignment *ir)
1760 {
1761 dst_reg l;
1762 src_reg r;
1763 int i;
1764
1765 ir->rhs->accept(this);
1766 r = this->result;
1767
1768 l = get_assignment_lhs(ir->lhs, this);
1769
1770 /* FINISHME: This should really set to the correct maximal writemask for each
1771 * FINISHME: component written (in the loops below). This case can only
1772 * FINISHME: occur for matrices, arrays, and structures.
1773 */
1774 if (ir->write_mask == 0) {
1775 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
1776 l.writemask = WRITEMASK_XYZW;
1777 } else if (ir->lhs->type->is_scalar()) {
1778 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
1779 * FINISHME: W component of fragment shader output zero, work correctly.
1780 */
1781 l.writemask = WRITEMASK_XYZW;
1782 } else {
1783 int swizzles[4];
1784 int first_enabled_chan = 0;
1785 int rhs_chan = 0;
1786
1787 assert(ir->lhs->type->is_vector());
1788 l.writemask = ir->write_mask;
1789
1790 for (int i = 0; i < 4; i++) {
1791 if (l.writemask & (1 << i)) {
1792 first_enabled_chan = GET_SWZ(r.swizzle, i);
1793 break;
1794 }
1795 }
1796
1797 /* Swizzle a small RHS vector into the channels being written.
1798 *
1799 * glsl ir treats write_mask as dictating how many channels are
1800 * present on the RHS while Mesa IR treats write_mask as just
1801 * showing which channels of the vec4 RHS get written.
1802 */
1803 for (int i = 0; i < 4; i++) {
1804 if (l.writemask & (1 << i))
1805 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
1806 else
1807 swizzles[i] = first_enabled_chan;
1808 }
1809 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
1810 swizzles[2], swizzles[3]);
1811 }
1812
1813 assert(l.file != PROGRAM_UNDEFINED);
1814 assert(r.file != PROGRAM_UNDEFINED);
1815
1816 if (ir->condition) {
1817 const bool switch_order = this->process_move_condition(ir->condition);
1818 src_reg condition = this->result;
1819
1820 for (i = 0; i < type_size(ir->lhs->type); i++) {
1821 if (switch_order) {
1822 emit(ir, OPCODE_CMP, l, condition, src_reg(l), r);
1823 } else {
1824 emit(ir, OPCODE_CMP, l, condition, r, src_reg(l));
1825 }
1826
1827 l.index++;
1828 r.index++;
1829 }
1830 } else {
1831 for (i = 0; i < type_size(ir->lhs->type); i++) {
1832 emit(ir, OPCODE_MOV, l, r);
1833 l.index++;
1834 r.index++;
1835 }
1836 }
1837 }
1838
1839
1840 void
1841 ir_to_mesa_visitor::visit(ir_constant *ir)
1842 {
1843 src_reg src;
1844 GLfloat stack_vals[4] = { 0 };
1845 GLfloat *values = stack_vals;
1846 unsigned int i;
1847
1848 /* Unfortunately, 4 floats is all we can get into
1849 * _mesa_add_unnamed_constant. So, make a temp to store an
1850 * aggregate constant and move each constant value into it. If we
1851 * get lucky, copy propagation will eliminate the extra moves.
1852 */
1853
1854 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
1855 src_reg temp_base = get_temp(ir->type);
1856 dst_reg temp = dst_reg(temp_base);
1857
1858 foreach_iter(exec_list_iterator, iter, ir->components) {
1859 ir_constant *field_value = (ir_constant *)iter.get();
1860 int size = type_size(field_value->type);
1861
1862 assert(size > 0);
1863
1864 field_value->accept(this);
1865 src = this->result;
1866
1867 for (i = 0; i < (unsigned int)size; i++) {
1868 emit(ir, OPCODE_MOV, temp, src);
1869
1870 src.index++;
1871 temp.index++;
1872 }
1873 }
1874 this->result = temp_base;
1875 return;
1876 }
1877
1878 if (ir->type->is_array()) {
1879 src_reg temp_base = get_temp(ir->type);
1880 dst_reg temp = dst_reg(temp_base);
1881 int size = type_size(ir->type->fields.array);
1882
1883 assert(size > 0);
1884
1885 for (i = 0; i < ir->type->length; i++) {
1886 ir->array_elements[i]->accept(this);
1887 src = this->result;
1888 for (int j = 0; j < size; j++) {
1889 emit(ir, OPCODE_MOV, temp, src);
1890
1891 src.index++;
1892 temp.index++;
1893 }
1894 }
1895 this->result = temp_base;
1896 return;
1897 }
1898
1899 if (ir->type->is_matrix()) {
1900 src_reg mat = get_temp(ir->type);
1901 dst_reg mat_column = dst_reg(mat);
1902
1903 for (i = 0; i < ir->type->matrix_columns; i++) {
1904 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
1905 values = &ir->value.f[i * ir->type->vector_elements];
1906
1907 src = src_reg(PROGRAM_CONSTANT, -1, NULL);
1908 src.index = _mesa_add_unnamed_constant(this->prog->Parameters,
1909 (gl_constant_value *) values,
1910 ir->type->vector_elements,
1911 &src.swizzle);
1912 emit(ir, OPCODE_MOV, mat_column, src);
1913
1914 mat_column.index++;
1915 }
1916
1917 this->result = mat;
1918 return;
1919 }
1920
1921 src.file = PROGRAM_CONSTANT;
1922 switch (ir->type->base_type) {
1923 case GLSL_TYPE_FLOAT:
1924 values = &ir->value.f[0];
1925 break;
1926 case GLSL_TYPE_UINT:
1927 for (i = 0; i < ir->type->vector_elements; i++) {
1928 values[i] = ir->value.u[i];
1929 }
1930 break;
1931 case GLSL_TYPE_INT:
1932 for (i = 0; i < ir->type->vector_elements; i++) {
1933 values[i] = ir->value.i[i];
1934 }
1935 break;
1936 case GLSL_TYPE_BOOL:
1937 for (i = 0; i < ir->type->vector_elements; i++) {
1938 values[i] = ir->value.b[i];
1939 }
1940 break;
1941 default:
1942 assert(!"Non-float/uint/int/bool constant");
1943 }
1944
1945 this->result = src_reg(PROGRAM_CONSTANT, -1, ir->type);
1946 this->result.index = _mesa_add_unnamed_constant(this->prog->Parameters,
1947 (gl_constant_value *) values,
1948 ir->type->vector_elements,
1949 &this->result.swizzle);
1950 }
1951
1952 function_entry *
1953 ir_to_mesa_visitor::get_function_signature(ir_function_signature *sig)
1954 {
1955 function_entry *entry;
1956
1957 foreach_iter(exec_list_iterator, iter, this->function_signatures) {
1958 entry = (function_entry *)iter.get();
1959
1960 if (entry->sig == sig)
1961 return entry;
1962 }
1963
1964 entry = ralloc(mem_ctx, function_entry);
1965 entry->sig = sig;
1966 entry->sig_id = this->next_signature_id++;
1967 entry->bgn_inst = NULL;
1968
1969 /* Allocate storage for all the parameters. */
1970 foreach_iter(exec_list_iterator, iter, sig->parameters) {
1971 ir_variable *param = (ir_variable *)iter.get();
1972 variable_storage *storage;
1973
1974 storage = find_variable_storage(param);
1975 assert(!storage);
1976
1977 storage = new(mem_ctx) variable_storage(param, PROGRAM_TEMPORARY,
1978 this->next_temp);
1979 this->variables.push_tail(storage);
1980
1981 this->next_temp += type_size(param->type);
1982 }
1983
1984 if (!sig->return_type->is_void()) {
1985 entry->return_reg = get_temp(sig->return_type);
1986 } else {
1987 entry->return_reg = undef_src;
1988 }
1989
1990 this->function_signatures.push_tail(entry);
1991 return entry;
1992 }
1993
1994 void
1995 ir_to_mesa_visitor::visit(ir_call *ir)
1996 {
1997 ir_to_mesa_instruction *call_inst;
1998 ir_function_signature *sig = ir->get_callee();
1999 function_entry *entry = get_function_signature(sig);
2000 int i;
2001
2002 /* Process in parameters. */
2003 exec_list_iterator sig_iter = sig->parameters.iterator();
2004 foreach_iter(exec_list_iterator, iter, *ir) {
2005 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2006 ir_variable *param = (ir_variable *)sig_iter.get();
2007
2008 if (param->mode == ir_var_in ||
2009 param->mode == ir_var_inout) {
2010 variable_storage *storage = find_variable_storage(param);
2011 assert(storage);
2012
2013 param_rval->accept(this);
2014 src_reg r = this->result;
2015
2016 dst_reg l;
2017 l.file = storage->file;
2018 l.index = storage->index;
2019 l.reladdr = NULL;
2020 l.writemask = WRITEMASK_XYZW;
2021 l.cond_mask = COND_TR;
2022
2023 for (i = 0; i < type_size(param->type); i++) {
2024 emit(ir, OPCODE_MOV, l, r);
2025 l.index++;
2026 r.index++;
2027 }
2028 }
2029
2030 sig_iter.next();
2031 }
2032 assert(!sig_iter.has_next());
2033
2034 /* Emit call instruction */
2035 call_inst = emit(ir, OPCODE_CAL);
2036 call_inst->function = entry;
2037
2038 /* Process out parameters. */
2039 sig_iter = sig->parameters.iterator();
2040 foreach_iter(exec_list_iterator, iter, *ir) {
2041 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2042 ir_variable *param = (ir_variable *)sig_iter.get();
2043
2044 if (param->mode == ir_var_out ||
2045 param->mode == ir_var_inout) {
2046 variable_storage *storage = find_variable_storage(param);
2047 assert(storage);
2048
2049 src_reg r;
2050 r.file = storage->file;
2051 r.index = storage->index;
2052 r.reladdr = NULL;
2053 r.swizzle = SWIZZLE_NOOP;
2054 r.negate = 0;
2055
2056 param_rval->accept(this);
2057 dst_reg l = dst_reg(this->result);
2058
2059 for (i = 0; i < type_size(param->type); i++) {
2060 emit(ir, OPCODE_MOV, l, r);
2061 l.index++;
2062 r.index++;
2063 }
2064 }
2065
2066 sig_iter.next();
2067 }
2068 assert(!sig_iter.has_next());
2069
2070 /* Process return value. */
2071 this->result = entry->return_reg;
2072 }
2073
2074 void
2075 ir_to_mesa_visitor::visit(ir_texture *ir)
2076 {
2077 src_reg result_src, coord, lod_info, projector, dx, dy;
2078 dst_reg result_dst, coord_dst;
2079 ir_to_mesa_instruction *inst = NULL;
2080 prog_opcode opcode = OPCODE_NOP;
2081
2082 if (ir->op == ir_txs)
2083 this->result = src_reg_for_float(0.0);
2084 else
2085 ir->coordinate->accept(this);
2086
2087 /* Put our coords in a temp. We'll need to modify them for shadow,
2088 * projection, or LOD, so the only case we'd use it as is is if
2089 * we're doing plain old texturing. Mesa IR optimization should
2090 * handle cleaning up our mess in that case.
2091 */
2092 coord = get_temp(glsl_type::vec4_type);
2093 coord_dst = dst_reg(coord);
2094 emit(ir, OPCODE_MOV, coord_dst, this->result);
2095
2096 if (ir->projector) {
2097 ir->projector->accept(this);
2098 projector = this->result;
2099 }
2100
2101 /* Storage for our result. Ideally for an assignment we'd be using
2102 * the actual storage for the result here, instead.
2103 */
2104 result_src = get_temp(glsl_type::vec4_type);
2105 result_dst = dst_reg(result_src);
2106
2107 switch (ir->op) {
2108 case ir_tex:
2109 case ir_txs:
2110 opcode = OPCODE_TEX;
2111 break;
2112 case ir_txb:
2113 opcode = OPCODE_TXB;
2114 ir->lod_info.bias->accept(this);
2115 lod_info = this->result;
2116 break;
2117 case ir_txf:
2118 /* Pretend to be TXL so the sampler, coordinate, lod are available */
2119 case ir_txl:
2120 opcode = OPCODE_TXL;
2121 ir->lod_info.lod->accept(this);
2122 lod_info = this->result;
2123 break;
2124 case ir_txd:
2125 opcode = OPCODE_TXD;
2126 ir->lod_info.grad.dPdx->accept(this);
2127 dx = this->result;
2128 ir->lod_info.grad.dPdy->accept(this);
2129 dy = this->result;
2130 break;
2131 }
2132
2133 const glsl_type *sampler_type = ir->sampler->type;
2134
2135 if (ir->projector) {
2136 if (opcode == OPCODE_TEX) {
2137 /* Slot the projector in as the last component of the coord. */
2138 coord_dst.writemask = WRITEMASK_W;
2139 emit(ir, OPCODE_MOV, coord_dst, projector);
2140 coord_dst.writemask = WRITEMASK_XYZW;
2141 opcode = OPCODE_TXP;
2142 } else {
2143 src_reg coord_w = coord;
2144 coord_w.swizzle = SWIZZLE_WWWW;
2145
2146 /* For the other TEX opcodes there's no projective version
2147 * since the last slot is taken up by lod info. Do the
2148 * projective divide now.
2149 */
2150 coord_dst.writemask = WRITEMASK_W;
2151 emit(ir, OPCODE_RCP, coord_dst, projector);
2152
2153 /* In the case where we have to project the coordinates "by hand,"
2154 * the shadow comparitor value must also be projected.
2155 */
2156 src_reg tmp_src = coord;
2157 if (ir->shadow_comparitor) {
2158 /* Slot the shadow value in as the second to last component of the
2159 * coord.
2160 */
2161 ir->shadow_comparitor->accept(this);
2162
2163 tmp_src = get_temp(glsl_type::vec4_type);
2164 dst_reg tmp_dst = dst_reg(tmp_src);
2165
2166 tmp_dst.writemask = WRITEMASK_Z;
2167 emit(ir, OPCODE_MOV, tmp_dst, this->result);
2168
2169 tmp_dst.writemask = WRITEMASK_XY;
2170 emit(ir, OPCODE_MOV, tmp_dst, coord);
2171 }
2172
2173 coord_dst.writemask = WRITEMASK_XYZ;
2174 emit(ir, OPCODE_MUL, coord_dst, tmp_src, coord_w);
2175
2176 coord_dst.writemask = WRITEMASK_XYZW;
2177 coord.swizzle = SWIZZLE_XYZW;
2178 }
2179 }
2180
2181 /* If projection is done and the opcode is not OPCODE_TXP, then the shadow
2182 * comparitor was put in the correct place (and projected) by the code,
2183 * above, that handles by-hand projection.
2184 */
2185 if (ir->shadow_comparitor && (!ir->projector || opcode == OPCODE_TXP)) {
2186 /* Slot the shadow value in as the second to last component of the
2187 * coord.
2188 */
2189 ir->shadow_comparitor->accept(this);
2190
2191 /* XXX This will need to be updated for cubemap array samplers. */
2192 coord_dst.writemask = WRITEMASK_Z;
2193
2194 emit(ir, OPCODE_MOV, coord_dst, this->result);
2195 coord_dst.writemask = WRITEMASK_XYZW;
2196 }
2197
2198 if (opcode == OPCODE_TXL || opcode == OPCODE_TXB) {
2199 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
2200 coord_dst.writemask = WRITEMASK_W;
2201 emit(ir, OPCODE_MOV, coord_dst, lod_info);
2202 coord_dst.writemask = WRITEMASK_XYZW;
2203 }
2204
2205 if (opcode == OPCODE_TXD)
2206 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2207 else
2208 inst = emit(ir, opcode, result_dst, coord);
2209
2210 if (ir->shadow_comparitor)
2211 inst->tex_shadow = GL_TRUE;
2212
2213 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
2214 this->shader_program,
2215 this->prog);
2216
2217 switch (sampler_type->sampler_dimensionality) {
2218 case GLSL_SAMPLER_DIM_1D:
2219 inst->tex_target = TEXTURE_1D_INDEX;
2220 break;
2221 case GLSL_SAMPLER_DIM_2D:
2222 inst->tex_target = TEXTURE_2D_INDEX;
2223 break;
2224 case GLSL_SAMPLER_DIM_3D:
2225 inst->tex_target = TEXTURE_3D_INDEX;
2226 break;
2227 case GLSL_SAMPLER_DIM_CUBE:
2228 inst->tex_target = TEXTURE_CUBE_INDEX;
2229 break;
2230 default:
2231 assert(!"Should not get here.");
2232 }
2233
2234 this->result = result_src;
2235 }
2236
2237 void
2238 ir_to_mesa_visitor::visit(ir_return *ir)
2239 {
2240 if (ir->get_value()) {
2241 dst_reg l;
2242 int i;
2243
2244 assert(current_function);
2245
2246 ir->get_value()->accept(this);
2247 src_reg r = this->result;
2248
2249 l = dst_reg(current_function->return_reg);
2250
2251 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
2252 emit(ir, OPCODE_MOV, l, r);
2253 l.index++;
2254 r.index++;
2255 }
2256 }
2257
2258 emit(ir, OPCODE_RET);
2259 }
2260
2261 void
2262 ir_to_mesa_visitor::visit(ir_discard *ir)
2263 {
2264 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
2265
2266 if (ir->condition) {
2267 ir->condition->accept(this);
2268 this->result.negate = ~this->result.negate;
2269 emit(ir, OPCODE_KIL, undef_dst, this->result);
2270 } else {
2271 emit(ir, OPCODE_KIL_NV);
2272 }
2273
2274 fp->UsesKill = GL_TRUE;
2275 }
2276
2277 void
2278 ir_to_mesa_visitor::visit(ir_if *ir)
2279 {
2280 ir_to_mesa_instruction *cond_inst, *if_inst;
2281 ir_to_mesa_instruction *prev_inst;
2282
2283 prev_inst = (ir_to_mesa_instruction *)this->instructions.get_tail();
2284
2285 ir->condition->accept(this);
2286 assert(this->result.file != PROGRAM_UNDEFINED);
2287
2288 if (this->options->EmitCondCodes) {
2289 cond_inst = (ir_to_mesa_instruction *)this->instructions.get_tail();
2290
2291 /* See if we actually generated any instruction for generating
2292 * the condition. If not, then cook up a move to a temp so we
2293 * have something to set cond_update on.
2294 */
2295 if (cond_inst == prev_inst) {
2296 src_reg temp = get_temp(glsl_type::bool_type);
2297 cond_inst = emit(ir->condition, OPCODE_MOV, dst_reg(temp), result);
2298 }
2299 cond_inst->cond_update = GL_TRUE;
2300
2301 if_inst = emit(ir->condition, OPCODE_IF);
2302 if_inst->dst.cond_mask = COND_NE;
2303 } else {
2304 if_inst = emit(ir->condition, OPCODE_IF, undef_dst, this->result);
2305 }
2306
2307 this->instructions.push_tail(if_inst);
2308
2309 visit_exec_list(&ir->then_instructions, this);
2310
2311 if (!ir->else_instructions.is_empty()) {
2312 emit(ir->condition, OPCODE_ELSE);
2313 visit_exec_list(&ir->else_instructions, this);
2314 }
2315
2316 if_inst = emit(ir->condition, OPCODE_ENDIF);
2317 }
2318
2319 ir_to_mesa_visitor::ir_to_mesa_visitor()
2320 {
2321 result.file = PROGRAM_UNDEFINED;
2322 next_temp = 1;
2323 next_signature_id = 1;
2324 current_function = NULL;
2325 mem_ctx = ralloc_context(NULL);
2326 }
2327
2328 ir_to_mesa_visitor::~ir_to_mesa_visitor()
2329 {
2330 ralloc_free(mem_ctx);
2331 }
2332
2333 static struct prog_src_register
2334 mesa_src_reg_from_ir_src_reg(src_reg reg)
2335 {
2336 struct prog_src_register mesa_reg;
2337
2338 mesa_reg.File = reg.file;
2339 assert(reg.index < (1 << INST_INDEX_BITS));
2340 mesa_reg.Index = reg.index;
2341 mesa_reg.Swizzle = reg.swizzle;
2342 mesa_reg.RelAddr = reg.reladdr != NULL;
2343 mesa_reg.Negate = reg.negate;
2344 mesa_reg.Abs = 0;
2345 mesa_reg.HasIndex2 = GL_FALSE;
2346 mesa_reg.RelAddr2 = 0;
2347 mesa_reg.Index2 = 0;
2348
2349 return mesa_reg;
2350 }
2351
2352 static void
2353 set_branchtargets(ir_to_mesa_visitor *v,
2354 struct prog_instruction *mesa_instructions,
2355 int num_instructions)
2356 {
2357 int if_count = 0, loop_count = 0;
2358 int *if_stack, *loop_stack;
2359 int if_stack_pos = 0, loop_stack_pos = 0;
2360 int i, j;
2361
2362 for (i = 0; i < num_instructions; i++) {
2363 switch (mesa_instructions[i].Opcode) {
2364 case OPCODE_IF:
2365 if_count++;
2366 break;
2367 case OPCODE_BGNLOOP:
2368 loop_count++;
2369 break;
2370 case OPCODE_BRK:
2371 case OPCODE_CONT:
2372 mesa_instructions[i].BranchTarget = -1;
2373 break;
2374 default:
2375 break;
2376 }
2377 }
2378
2379 if_stack = rzalloc_array(v->mem_ctx, int, if_count);
2380 loop_stack = rzalloc_array(v->mem_ctx, int, loop_count);
2381
2382 for (i = 0; i < num_instructions; i++) {
2383 switch (mesa_instructions[i].Opcode) {
2384 case OPCODE_IF:
2385 if_stack[if_stack_pos] = i;
2386 if_stack_pos++;
2387 break;
2388 case OPCODE_ELSE:
2389 mesa_instructions[if_stack[if_stack_pos - 1]].BranchTarget = i;
2390 if_stack[if_stack_pos - 1] = i;
2391 break;
2392 case OPCODE_ENDIF:
2393 mesa_instructions[if_stack[if_stack_pos - 1]].BranchTarget = i;
2394 if_stack_pos--;
2395 break;
2396 case OPCODE_BGNLOOP:
2397 loop_stack[loop_stack_pos] = i;
2398 loop_stack_pos++;
2399 break;
2400 case OPCODE_ENDLOOP:
2401 loop_stack_pos--;
2402 /* Rewrite any breaks/conts at this nesting level (haven't
2403 * already had a BranchTarget assigned) to point to the end
2404 * of the loop.
2405 */
2406 for (j = loop_stack[loop_stack_pos]; j < i; j++) {
2407 if (mesa_instructions[j].Opcode == OPCODE_BRK ||
2408 mesa_instructions[j].Opcode == OPCODE_CONT) {
2409 if (mesa_instructions[j].BranchTarget == -1) {
2410 mesa_instructions[j].BranchTarget = i;
2411 }
2412 }
2413 }
2414 /* The loop ends point at each other. */
2415 mesa_instructions[i].BranchTarget = loop_stack[loop_stack_pos];
2416 mesa_instructions[loop_stack[loop_stack_pos]].BranchTarget = i;
2417 break;
2418 case OPCODE_CAL:
2419 foreach_iter(exec_list_iterator, iter, v->function_signatures) {
2420 function_entry *entry = (function_entry *)iter.get();
2421
2422 if (entry->sig_id == mesa_instructions[i].BranchTarget) {
2423 mesa_instructions[i].BranchTarget = entry->inst;
2424 break;
2425 }
2426 }
2427 break;
2428 default:
2429 break;
2430 }
2431 }
2432 }
2433
2434 static void
2435 print_program(struct prog_instruction *mesa_instructions,
2436 ir_instruction **mesa_instruction_annotation,
2437 int num_instructions)
2438 {
2439 ir_instruction *last_ir = NULL;
2440 int i;
2441 int indent = 0;
2442
2443 for (i = 0; i < num_instructions; i++) {
2444 struct prog_instruction *mesa_inst = mesa_instructions + i;
2445 ir_instruction *ir = mesa_instruction_annotation[i];
2446
2447 fprintf(stdout, "%3d: ", i);
2448
2449 if (last_ir != ir && ir) {
2450 int j;
2451
2452 for (j = 0; j < indent; j++) {
2453 fprintf(stdout, " ");
2454 }
2455 ir->print();
2456 printf("\n");
2457 last_ir = ir;
2458
2459 fprintf(stdout, " "); /* line number spacing. */
2460 }
2461
2462 indent = _mesa_fprint_instruction_opt(stdout, mesa_inst, indent,
2463 PROG_PRINT_DEBUG, NULL);
2464 }
2465 }
2466
2467 class add_uniform_to_shader : public uniform_field_visitor {
2468 public:
2469 add_uniform_to_shader(struct gl_shader_program *shader_program,
2470 struct gl_program_parameter_list *params)
2471 : shader_program(shader_program), params(params), idx(-1)
2472 {
2473 /* empty */
2474 }
2475
2476 void process(ir_variable *var)
2477 {
2478 this->idx = -1;
2479 this->uniform_field_visitor::process(var);
2480
2481 var->location = this->idx;
2482 }
2483
2484 private:
2485 virtual void visit_field(const glsl_type *type, const char *name);
2486
2487 struct gl_shader_program *shader_program;
2488 struct gl_program_parameter_list *params;
2489 int idx;
2490 };
2491
2492 void
2493 add_uniform_to_shader::visit_field(const glsl_type *type, const char *name)
2494 {
2495 unsigned int size;
2496
2497 if (type->is_vector() || type->is_scalar()) {
2498 size = type->vector_elements;
2499 } else {
2500 size = type_size(type) * 4;
2501 }
2502
2503 gl_register_file file;
2504 if (type->is_sampler() ||
2505 (type->is_array() && type->fields.array->is_sampler())) {
2506 file = PROGRAM_SAMPLER;
2507 } else {
2508 file = PROGRAM_UNIFORM;
2509 }
2510
2511 int index = _mesa_lookup_parameter_index(params, -1, name);
2512 if (index < 0) {
2513 index = _mesa_add_parameter(params, file, name, size, type->gl_type,
2514 NULL, NULL, 0x0);
2515
2516 /* Sampler uniform values are stored in prog->SamplerUnits,
2517 * and the entry in that array is selected by this index we
2518 * store in ParameterValues[].
2519 */
2520 if (file == PROGRAM_SAMPLER) {
2521 unsigned location;
2522 const bool found =
2523 this->shader_program->UniformHash->get(location,
2524 params->Parameters[index].Name);
2525 assert(found);
2526
2527 if (!found)
2528 return;
2529
2530 struct gl_uniform_storage *storage =
2531 &this->shader_program->UniformStorage[location];
2532
2533 for (unsigned int j = 0; j < size / 4; j++)
2534 params->ParameterValues[index + j][0].f = storage->sampler + j;
2535 }
2536 }
2537
2538 /* The first part of the uniform that's processed determines the base
2539 * location of the whole uniform (for structures).
2540 */
2541 if (this->idx < 0)
2542 this->idx = index;
2543 }
2544
2545 /**
2546 * Generate the program parameters list for the user uniforms in a shader
2547 *
2548 * \param shader_program Linked shader program. This is only used to
2549 * emit possible link errors to the info log.
2550 * \param sh Shader whose uniforms are to be processed.
2551 * \param params Parameter list to be filled in.
2552 */
2553 void
2554 _mesa_generate_parameters_list_for_uniforms(struct gl_shader_program
2555 *shader_program,
2556 struct gl_shader *sh,
2557 struct gl_program_parameter_list
2558 *params)
2559 {
2560 add_uniform_to_shader add(shader_program, params);
2561
2562 foreach_list(node, sh->ir) {
2563 ir_variable *var = ((ir_instruction *) node)->as_variable();
2564
2565 if ((var == NULL) || (var->mode != ir_var_uniform)
2566 || (strncmp(var->name, "gl_", 3) == 0))
2567 continue;
2568
2569 add.process(var);
2570 }
2571 }
2572
2573 void
2574 _mesa_associate_uniform_storage(struct gl_context *ctx,
2575 struct gl_shader_program *shader_program,
2576 struct gl_program_parameter_list *params)
2577 {
2578 /* After adding each uniform to the parameter list, connect the storage for
2579 * the parameter with the tracking structure used by the API for the
2580 * uniform.
2581 */
2582 unsigned last_location = unsigned(~0);
2583 for (unsigned i = 0; i < params->NumParameters; i++) {
2584 if (params->Parameters[i].Type != PROGRAM_UNIFORM)
2585 continue;
2586
2587 unsigned location;
2588 const bool found =
2589 shader_program->UniformHash->get(location, params->Parameters[i].Name);
2590 assert(found);
2591
2592 if (!found)
2593 continue;
2594
2595 if (location != last_location) {
2596 struct gl_uniform_storage *storage =
2597 &shader_program->UniformStorage[location];
2598 enum gl_uniform_driver_format format = uniform_native;
2599
2600 unsigned columns = 0;
2601 switch (storage->type->base_type) {
2602 case GLSL_TYPE_UINT:
2603 assert(ctx->Const.NativeIntegers);
2604 format = uniform_native;
2605 columns = 1;
2606 break;
2607 case GLSL_TYPE_INT:
2608 format =
2609 (ctx->Const.NativeIntegers) ? uniform_native : uniform_int_float;
2610 columns = 1;
2611 break;
2612 case GLSL_TYPE_FLOAT:
2613 format = uniform_native;
2614 columns = storage->type->matrix_columns;
2615 break;
2616 case GLSL_TYPE_BOOL:
2617 if (ctx->Const.NativeIntegers) {
2618 format = (ctx->Const.UniformBooleanTrue == 1)
2619 ? uniform_bool_int_0_1 : uniform_bool_int_0_not0;
2620 } else {
2621 format = uniform_bool_float;
2622 }
2623 columns = 1;
2624 break;
2625 case GLSL_TYPE_SAMPLER:
2626 format = uniform_native;
2627 columns = 1;
2628 break;
2629 default:
2630 assert(!"Should not get here.");
2631 break;
2632 }
2633
2634 _mesa_uniform_attach_driver_storage(storage,
2635 4 * sizeof(float) * columns,
2636 4 * sizeof(float),
2637 format,
2638 &params->ParameterValues[i]);
2639 last_location = location;
2640 }
2641 }
2642 }
2643
2644 static void
2645 set_uniform_initializer(struct gl_context *ctx, void *mem_ctx,
2646 struct gl_shader_program *shader_program,
2647 const char *name, const glsl_type *type,
2648 ir_constant *val)
2649 {
2650 if (type->is_record()) {
2651 ir_constant *field_constant;
2652
2653 field_constant = (ir_constant *)val->components.get_head();
2654
2655 for (unsigned int i = 0; i < type->length; i++) {
2656 const glsl_type *field_type = type->fields.structure[i].type;
2657 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name,
2658 type->fields.structure[i].name);
2659 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name,
2660 field_type, field_constant);
2661 field_constant = (ir_constant *)field_constant->next;
2662 }
2663 return;
2664 }
2665
2666 int loc = _mesa_get_uniform_location(ctx, shader_program, name);
2667
2668 if (loc == -1) {
2669 linker_error(shader_program,
2670 "Couldn't find uniform for initializer %s\n", name);
2671 return;
2672 }
2673
2674 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) {
2675 ir_constant *element;
2676 const glsl_type *element_type;
2677 if (type->is_array()) {
2678 element = val->array_elements[i];
2679 element_type = type->fields.array;
2680 } else {
2681 element = val;
2682 element_type = type;
2683 }
2684
2685 void *values;
2686
2687 if (element_type->base_type == GLSL_TYPE_BOOL) {
2688 int *conv = ralloc_array(mem_ctx, int, element_type->components());
2689 for (unsigned int j = 0; j < element_type->components(); j++) {
2690 conv[j] = element->value.b[j];
2691 }
2692 values = (void *)conv;
2693 element_type = glsl_type::get_instance(GLSL_TYPE_INT,
2694 element_type->vector_elements,
2695 1);
2696 } else {
2697 values = &element->value;
2698 }
2699
2700 if (element_type->is_matrix()) {
2701 _mesa_uniform_matrix(ctx, shader_program,
2702 element_type->matrix_columns,
2703 element_type->vector_elements,
2704 loc, 1, GL_FALSE, (GLfloat *)values);
2705 } else {
2706 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns,
2707 values, element_type->gl_type);
2708 }
2709
2710 loc++;
2711 }
2712 }
2713
2714 static void
2715 set_uniform_initializers(struct gl_context *ctx,
2716 struct gl_shader_program *shader_program)
2717 {
2718 void *mem_ctx = NULL;
2719
2720 for (unsigned int i = 0; i < MESA_SHADER_TYPES; i++) {
2721 struct gl_shader *shader = shader_program->_LinkedShaders[i];
2722
2723 if (shader == NULL)
2724 continue;
2725
2726 foreach_iter(exec_list_iterator, iter, *shader->ir) {
2727 ir_instruction *ir = (ir_instruction *)iter.get();
2728 ir_variable *var = ir->as_variable();
2729
2730 if (!var || var->mode != ir_var_uniform || !var->constant_value)
2731 continue;
2732
2733 if (!mem_ctx)
2734 mem_ctx = ralloc_context(NULL);
2735
2736 set_uniform_initializer(ctx, mem_ctx, shader_program, var->name,
2737 var->type, var->constant_value);
2738 }
2739 }
2740
2741 ralloc_free(mem_ctx);
2742 }
2743
2744 /*
2745 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
2746 * channels for copy propagation and updates following instructions to
2747 * use the original versions.
2748 *
2749 * The ir_to_mesa_visitor lazily produces code assuming that this pass
2750 * will occur. As an example, a TXP production before this pass:
2751 *
2752 * 0: MOV TEMP[1], INPUT[4].xyyy;
2753 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2754 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
2755 *
2756 * and after:
2757 *
2758 * 0: MOV TEMP[1], INPUT[4].xyyy;
2759 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2760 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
2761 *
2762 * which allows for dead code elimination on TEMP[1]'s writes.
2763 */
2764 void
2765 ir_to_mesa_visitor::copy_propagate(void)
2766 {
2767 ir_to_mesa_instruction **acp = rzalloc_array(mem_ctx,
2768 ir_to_mesa_instruction *,
2769 this->next_temp * 4);
2770 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
2771 int level = 0;
2772
2773 foreach_iter(exec_list_iterator, iter, this->instructions) {
2774 ir_to_mesa_instruction *inst = (ir_to_mesa_instruction *)iter.get();
2775
2776 assert(inst->dst.file != PROGRAM_TEMPORARY
2777 || inst->dst.index < this->next_temp);
2778
2779 /* First, do any copy propagation possible into the src regs. */
2780 for (int r = 0; r < 3; r++) {
2781 ir_to_mesa_instruction *first = NULL;
2782 bool good = true;
2783 int acp_base = inst->src[r].index * 4;
2784
2785 if (inst->src[r].file != PROGRAM_TEMPORARY ||
2786 inst->src[r].reladdr)
2787 continue;
2788
2789 /* See if we can find entries in the ACP consisting of MOVs
2790 * from the same src register for all the swizzled channels
2791 * of this src register reference.
2792 */
2793 for (int i = 0; i < 4; i++) {
2794 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
2795 ir_to_mesa_instruction *copy_chan = acp[acp_base + src_chan];
2796
2797 if (!copy_chan) {
2798 good = false;
2799 break;
2800 }
2801
2802 assert(acp_level[acp_base + src_chan] <= level);
2803
2804 if (!first) {
2805 first = copy_chan;
2806 } else {
2807 if (first->src[0].file != copy_chan->src[0].file ||
2808 first->src[0].index != copy_chan->src[0].index) {
2809 good = false;
2810 break;
2811 }
2812 }
2813 }
2814
2815 if (good) {
2816 /* We've now validated that we can copy-propagate to
2817 * replace this src register reference. Do it.
2818 */
2819 inst->src[r].file = first->src[0].file;
2820 inst->src[r].index = first->src[0].index;
2821
2822 int swizzle = 0;
2823 for (int i = 0; i < 4; i++) {
2824 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
2825 ir_to_mesa_instruction *copy_inst = acp[acp_base + src_chan];
2826 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
2827 (3 * i));
2828 }
2829 inst->src[r].swizzle = swizzle;
2830 }
2831 }
2832
2833 switch (inst->op) {
2834 case OPCODE_BGNLOOP:
2835 case OPCODE_ENDLOOP:
2836 /* End of a basic block, clear the ACP entirely. */
2837 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
2838 break;
2839
2840 case OPCODE_IF:
2841 ++level;
2842 break;
2843
2844 case OPCODE_ENDIF:
2845 case OPCODE_ELSE:
2846 /* Clear all channels written inside the block from the ACP, but
2847 * leaving those that were not touched.
2848 */
2849 for (int r = 0; r < this->next_temp; r++) {
2850 for (int c = 0; c < 4; c++) {
2851 if (!acp[4 * r + c])
2852 continue;
2853
2854 if (acp_level[4 * r + c] >= level)
2855 acp[4 * r + c] = NULL;
2856 }
2857 }
2858 if (inst->op == OPCODE_ENDIF)
2859 --level;
2860 break;
2861
2862 default:
2863 /* Continuing the block, clear any written channels from
2864 * the ACP.
2865 */
2866 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
2867 /* Any temporary might be written, so no copy propagation
2868 * across this instruction.
2869 */
2870 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
2871 } else if (inst->dst.file == PROGRAM_OUTPUT &&
2872 inst->dst.reladdr) {
2873 /* Any output might be written, so no copy propagation
2874 * from outputs across this instruction.
2875 */
2876 for (int r = 0; r < this->next_temp; r++) {
2877 for (int c = 0; c < 4; c++) {
2878 if (!acp[4 * r + c])
2879 continue;
2880
2881 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
2882 acp[4 * r + c] = NULL;
2883 }
2884 }
2885 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
2886 inst->dst.file == PROGRAM_OUTPUT) {
2887 /* Clear where it's used as dst. */
2888 if (inst->dst.file == PROGRAM_TEMPORARY) {
2889 for (int c = 0; c < 4; c++) {
2890 if (inst->dst.writemask & (1 << c)) {
2891 acp[4 * inst->dst.index + c] = NULL;
2892 }
2893 }
2894 }
2895
2896 /* Clear where it's used as src. */
2897 for (int r = 0; r < this->next_temp; r++) {
2898 for (int c = 0; c < 4; c++) {
2899 if (!acp[4 * r + c])
2900 continue;
2901
2902 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
2903
2904 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
2905 acp[4 * r + c]->src[0].index == inst->dst.index &&
2906 inst->dst.writemask & (1 << src_chan))
2907 {
2908 acp[4 * r + c] = NULL;
2909 }
2910 }
2911 }
2912 }
2913 break;
2914 }
2915
2916 /* If this is a copy, add it to the ACP. */
2917 if (inst->op == OPCODE_MOV &&
2918 inst->dst.file == PROGRAM_TEMPORARY &&
2919 !inst->dst.reladdr &&
2920 !inst->saturate &&
2921 !inst->src[0].reladdr &&
2922 !inst->src[0].negate) {
2923 for (int i = 0; i < 4; i++) {
2924 if (inst->dst.writemask & (1 << i)) {
2925 acp[4 * inst->dst.index + i] = inst;
2926 acp_level[4 * inst->dst.index + i] = level;
2927 }
2928 }
2929 }
2930 }
2931
2932 ralloc_free(acp_level);
2933 ralloc_free(acp);
2934 }
2935
2936
2937 /**
2938 * Convert a shader's GLSL IR into a Mesa gl_program.
2939 */
2940 static struct gl_program *
2941 get_mesa_program(struct gl_context *ctx,
2942 struct gl_shader_program *shader_program,
2943 struct gl_shader *shader)
2944 {
2945 ir_to_mesa_visitor v;
2946 struct prog_instruction *mesa_instructions, *mesa_inst;
2947 ir_instruction **mesa_instruction_annotation;
2948 int i;
2949 struct gl_program *prog;
2950 GLenum target;
2951 const char *target_string;
2952 GLboolean progress;
2953 struct gl_shader_compiler_options *options =
2954 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)];
2955
2956 switch (shader->Type) {
2957 case GL_VERTEX_SHADER:
2958 target = GL_VERTEX_PROGRAM_ARB;
2959 target_string = "vertex";
2960 break;
2961 case GL_FRAGMENT_SHADER:
2962 target = GL_FRAGMENT_PROGRAM_ARB;
2963 target_string = "fragment";
2964 break;
2965 default:
2966 assert(!"should not be reached");
2967 return NULL;
2968 }
2969
2970 validate_ir_tree(shader->ir);
2971
2972 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
2973 if (!prog)
2974 return NULL;
2975 prog->Parameters = _mesa_new_parameter_list();
2976 v.ctx = ctx;
2977 v.prog = prog;
2978 v.shader_program = shader_program;
2979 v.options = options;
2980
2981 _mesa_generate_parameters_list_for_uniforms(shader_program, shader,
2982 prog->Parameters);
2983
2984 /* Emit Mesa IR for main(). */
2985 visit_exec_list(shader->ir, &v);
2986 v.emit(NULL, OPCODE_END);
2987
2988 /* Now emit bodies for any functions that were used. */
2989 do {
2990 progress = GL_FALSE;
2991
2992 foreach_iter(exec_list_iterator, iter, v.function_signatures) {
2993 function_entry *entry = (function_entry *)iter.get();
2994
2995 if (!entry->bgn_inst) {
2996 v.current_function = entry;
2997
2998 entry->bgn_inst = v.emit(NULL, OPCODE_BGNSUB);
2999 entry->bgn_inst->function = entry;
3000
3001 visit_exec_list(&entry->sig->body, &v);
3002
3003 ir_to_mesa_instruction *last;
3004 last = (ir_to_mesa_instruction *)v.instructions.get_tail();
3005 if (last->op != OPCODE_RET)
3006 v.emit(NULL, OPCODE_RET);
3007
3008 ir_to_mesa_instruction *end;
3009 end = v.emit(NULL, OPCODE_ENDSUB);
3010 end->function = entry;
3011
3012 progress = GL_TRUE;
3013 }
3014 }
3015 } while (progress);
3016
3017 prog->NumTemporaries = v.next_temp;
3018
3019 int num_instructions = 0;
3020 foreach_iter(exec_list_iterator, iter, v.instructions) {
3021 num_instructions++;
3022 }
3023
3024 mesa_instructions =
3025 (struct prog_instruction *)calloc(num_instructions,
3026 sizeof(*mesa_instructions));
3027 mesa_instruction_annotation = ralloc_array(v.mem_ctx, ir_instruction *,
3028 num_instructions);
3029
3030 v.copy_propagate();
3031
3032 /* Convert ir_mesa_instructions into prog_instructions.
3033 */
3034 mesa_inst = mesa_instructions;
3035 i = 0;
3036 foreach_iter(exec_list_iterator, iter, v.instructions) {
3037 const ir_to_mesa_instruction *inst = (ir_to_mesa_instruction *)iter.get();
3038
3039 mesa_inst->Opcode = inst->op;
3040 mesa_inst->CondUpdate = inst->cond_update;
3041 if (inst->saturate)
3042 mesa_inst->SaturateMode = SATURATE_ZERO_ONE;
3043 mesa_inst->DstReg.File = inst->dst.file;
3044 mesa_inst->DstReg.Index = inst->dst.index;
3045 mesa_inst->DstReg.CondMask = inst->dst.cond_mask;
3046 mesa_inst->DstReg.WriteMask = inst->dst.writemask;
3047 mesa_inst->DstReg.RelAddr = inst->dst.reladdr != NULL;
3048 mesa_inst->SrcReg[0] = mesa_src_reg_from_ir_src_reg(inst->src[0]);
3049 mesa_inst->SrcReg[1] = mesa_src_reg_from_ir_src_reg(inst->src[1]);
3050 mesa_inst->SrcReg[2] = mesa_src_reg_from_ir_src_reg(inst->src[2]);
3051 mesa_inst->TexSrcUnit = inst->sampler;
3052 mesa_inst->TexSrcTarget = inst->tex_target;
3053 mesa_inst->TexShadow = inst->tex_shadow;
3054 mesa_instruction_annotation[i] = inst->ir;
3055
3056 /* Set IndirectRegisterFiles. */
3057 if (mesa_inst->DstReg.RelAddr)
3058 prog->IndirectRegisterFiles |= 1 << mesa_inst->DstReg.File;
3059
3060 /* Update program's bitmask of indirectly accessed register files */
3061 for (unsigned src = 0; src < 3; src++)
3062 if (mesa_inst->SrcReg[src].RelAddr)
3063 prog->IndirectRegisterFiles |= 1 << mesa_inst->SrcReg[src].File;
3064
3065 switch (mesa_inst->Opcode) {
3066 case OPCODE_IF:
3067 if (options->MaxIfDepth == 0) {
3068 linker_warning(shader_program,
3069 "Couldn't flatten if-statement. "
3070 "This will likely result in software "
3071 "rasterization.\n");
3072 }
3073 break;
3074 case OPCODE_BGNLOOP:
3075 if (options->EmitNoLoops) {
3076 linker_warning(shader_program,
3077 "Couldn't unroll loop. "
3078 "This will likely result in software "
3079 "rasterization.\n");
3080 }
3081 break;
3082 case OPCODE_CONT:
3083 if (options->EmitNoCont) {
3084 linker_warning(shader_program,
3085 "Couldn't lower continue-statement. "
3086 "This will likely result in software "
3087 "rasterization.\n");
3088 }
3089 break;
3090 case OPCODE_BGNSUB:
3091 inst->function->inst = i;
3092 mesa_inst->Comment = strdup(inst->function->sig->function_name());
3093 break;
3094 case OPCODE_ENDSUB:
3095 mesa_inst->Comment = strdup(inst->function->sig->function_name());
3096 break;
3097 case OPCODE_CAL:
3098 mesa_inst->BranchTarget = inst->function->sig_id; /* rewritten later */
3099 break;
3100 case OPCODE_ARL:
3101 prog->NumAddressRegs = 1;
3102 break;
3103 default:
3104 break;
3105 }
3106
3107 mesa_inst++;
3108 i++;
3109
3110 if (!shader_program->LinkStatus)
3111 break;
3112 }
3113
3114 if (!shader_program->LinkStatus) {
3115 goto fail_exit;
3116 }
3117
3118 set_branchtargets(&v, mesa_instructions, num_instructions);
3119
3120 if (ctx->Shader.Flags & GLSL_DUMP) {
3121 printf("\n");
3122 printf("GLSL IR for linked %s program %d:\n", target_string,
3123 shader_program->Name);
3124 _mesa_print_ir(shader->ir, NULL);
3125 printf("\n");
3126 printf("\n");
3127 printf("Mesa IR for linked %s program %d:\n", target_string,
3128 shader_program->Name);
3129 print_program(mesa_instructions, mesa_instruction_annotation,
3130 num_instructions);
3131 }
3132
3133 prog->Instructions = mesa_instructions;
3134 prog->NumInstructions = num_instructions;
3135
3136 /* Setting this to NULL prevents a possible double free in the fail_exit
3137 * path (far below).
3138 */
3139 mesa_instructions = NULL;
3140
3141 do_set_program_inouts(shader->ir, prog, shader->Type == GL_FRAGMENT_SHADER);
3142
3143 prog->SamplersUsed = shader->active_samplers;
3144 prog->ShadowSamplers = shader->shadow_samplers;
3145 _mesa_update_shader_textures_used(shader_program, prog);
3146
3147 /* Set the gl_FragDepth layout. */
3148 if (target == GL_FRAGMENT_PROGRAM_ARB) {
3149 struct gl_fragment_program *fp = (struct gl_fragment_program *)prog;
3150 fp->FragDepthLayout = shader_program->FragDepthLayout;
3151 }
3152
3153 _mesa_reference_program(ctx, &shader->Program, prog);
3154
3155 if ((ctx->Shader.Flags & GLSL_NO_OPT) == 0) {
3156 _mesa_optimize_program(ctx, prog);
3157 }
3158
3159 /* This has to be done last. Any operation that can cause
3160 * prog->ParameterValues to get reallocated (e.g., anything that adds a
3161 * program constant) has to happen before creating this linkage.
3162 */
3163 _mesa_associate_uniform_storage(ctx, shader_program, prog->Parameters);
3164 if (!shader_program->LinkStatus) {
3165 goto fail_exit;
3166 }
3167
3168 return prog;
3169
3170 fail_exit:
3171 free(mesa_instructions);
3172 _mesa_reference_program(ctx, &shader->Program, NULL);
3173 return NULL;
3174 }
3175
3176 extern "C" {
3177
3178 /**
3179 * Link a shader.
3180 * Called via ctx->Driver.LinkShader()
3181 * This actually involves converting GLSL IR into Mesa gl_programs with
3182 * code lowering and other optimizations.
3183 */
3184 GLboolean
3185 _mesa_ir_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
3186 {
3187 assert(prog->LinkStatus);
3188
3189 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
3190 if (prog->_LinkedShaders[i] == NULL)
3191 continue;
3192
3193 bool progress;
3194 exec_list *ir = prog->_LinkedShaders[i]->ir;
3195 const struct gl_shader_compiler_options *options =
3196 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)];
3197
3198 do {
3199 progress = false;
3200
3201 /* Lowering */
3202 do_mat_op_to_vec(ir);
3203 lower_instructions(ir, (MOD_TO_FRACT | DIV_TO_MUL_RCP | EXP_TO_EXP2
3204 | LOG_TO_LOG2 | INT_DIV_TO_MUL_RCP
3205 | ((options->EmitNoPow) ? POW_TO_EXP2 : 0)));
3206
3207 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
3208
3209 progress = do_common_optimization(ir, true, true,
3210 options->MaxUnrollIterations)
3211 || progress;
3212
3213 progress = lower_quadop_vector(ir, true) || progress;
3214
3215 if (options->MaxIfDepth == 0)
3216 progress = lower_discard(ir) || progress;
3217
3218 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
3219
3220 if (options->EmitNoNoise)
3221 progress = lower_noise(ir) || progress;
3222
3223 /* If there are forms of indirect addressing that the driver
3224 * cannot handle, perform the lowering pass.
3225 */
3226 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput
3227 || options->EmitNoIndirectTemp || options->EmitNoIndirectUniform)
3228 progress =
3229 lower_variable_index_to_cond_assign(ir,
3230 options->EmitNoIndirectInput,
3231 options->EmitNoIndirectOutput,
3232 options->EmitNoIndirectTemp,
3233 options->EmitNoIndirectUniform)
3234 || progress;
3235
3236 progress = do_vec_index_to_cond_assign(ir) || progress;
3237 } while (progress);
3238
3239 validate_ir_tree(ir);
3240 }
3241
3242 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
3243 struct gl_program *linked_prog;
3244
3245 if (prog->_LinkedShaders[i] == NULL)
3246 continue;
3247
3248 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
3249
3250 if (linked_prog) {
3251
3252 if (i == MESA_SHADER_VERTEX) {
3253 ((struct gl_vertex_program *)linked_prog)->UsesClipDistance
3254 = prog->Vert.UsesClipDistance;
3255 }
3256
3257 _mesa_reference_program(ctx, &prog->_LinkedShaders[i]->Program,
3258 linked_prog);
3259 }
3260
3261 _mesa_reference_program(ctx, &linked_prog, NULL);
3262 }
3263
3264 return prog->LinkStatus;
3265 }
3266
3267
3268 /**
3269 * Compile a GLSL shader. Called via glCompileShader().
3270 */
3271 void
3272 _mesa_glsl_compile_shader(struct gl_context *ctx, struct gl_shader *shader)
3273 {
3274 struct _mesa_glsl_parse_state *state =
3275 new(shader) _mesa_glsl_parse_state(ctx, shader->Type, shader);
3276
3277 const char *source = shader->Source;
3278 /* Check if the user called glCompileShader without first calling
3279 * glShaderSource. This should fail to compile, but not raise a GL_ERROR.
3280 */
3281 if (source == NULL) {
3282 shader->CompileStatus = GL_FALSE;
3283 return;
3284 }
3285
3286 state->error = preprocess(state, &source, &state->info_log,
3287 &ctx->Extensions);
3288
3289 if (ctx->Shader.Flags & GLSL_DUMP) {
3290 printf("GLSL source for %s shader %d:\n",
3291 _mesa_glsl_shader_target_name(state->target), shader->Name);
3292 printf("%s\n", shader->Source);
3293 }
3294
3295 if (!state->error) {
3296 _mesa_glsl_lexer_ctor(state, source);
3297 _mesa_glsl_parse(state);
3298 _mesa_glsl_lexer_dtor(state);
3299 }
3300
3301 ralloc_free(shader->ir);
3302 shader->ir = new(shader) exec_list;
3303 if (!state->error && !state->translation_unit.is_empty())
3304 _mesa_ast_to_hir(shader->ir, state);
3305
3306 if (!state->error && !shader->ir->is_empty()) {
3307 validate_ir_tree(shader->ir);
3308
3309 /* Do some optimization at compile time to reduce shader IR size
3310 * and reduce later work if the same shader is linked multiple times
3311 */
3312 while (do_common_optimization(shader->ir, false, false, 32))
3313 ;
3314
3315 validate_ir_tree(shader->ir);
3316 }
3317
3318 shader->symbols = state->symbols;
3319
3320 shader->CompileStatus = !state->error;
3321 shader->InfoLog = state->info_log;
3322 shader->Version = state->language_version;
3323 memcpy(shader->builtins_to_link, state->builtins_to_link,
3324 sizeof(shader->builtins_to_link[0]) * state->num_builtins_to_link);
3325 shader->num_builtins_to_link = state->num_builtins_to_link;
3326
3327 if (ctx->Shader.Flags & GLSL_LOG) {
3328 _mesa_write_shader_to_file(shader);
3329 }
3330
3331 if (ctx->Shader.Flags & GLSL_DUMP) {
3332 if (shader->CompileStatus) {
3333 printf("GLSL IR for shader %d:\n", shader->Name);
3334 _mesa_print_ir(shader->ir, NULL);
3335 printf("\n\n");
3336 } else {
3337 printf("GLSL shader %d failed to compile.\n", shader->Name);
3338 }
3339 if (shader->InfoLog && shader->InfoLog[0] != 0) {
3340 printf("GLSL shader %d info log:\n", shader->Name);
3341 printf("%s\n", shader->InfoLog);
3342 }
3343 }
3344
3345 /* Retain any live IR, but trash the rest. */
3346 reparent_ir(shader->ir, shader->ir);
3347
3348 ralloc_free(state);
3349 }
3350
3351
3352 /**
3353 * Link a GLSL shader program. Called via glLinkProgram().
3354 */
3355 void
3356 _mesa_glsl_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
3357 {
3358 unsigned int i;
3359
3360 _mesa_clear_shader_program_data(ctx, prog);
3361
3362 prog->LinkStatus = GL_TRUE;
3363
3364 for (i = 0; i < prog->NumShaders; i++) {
3365 if (!prog->Shaders[i]->CompileStatus) {
3366 linker_error(prog, "linking with uncompiled shader");
3367 prog->LinkStatus = GL_FALSE;
3368 }
3369 }
3370
3371 if (prog->LinkStatus) {
3372 link_shaders(ctx, prog);
3373 }
3374
3375 if (prog->LinkStatus) {
3376 if (!ctx->Driver.LinkShader(ctx, prog)) {
3377 prog->LinkStatus = GL_FALSE;
3378 }
3379 }
3380
3381 if (prog->LinkStatus) {
3382 set_uniform_initializers(ctx, prog);
3383 }
3384
3385 if (ctx->Shader.Flags & GLSL_DUMP) {
3386 if (!prog->LinkStatus) {
3387 printf("GLSL shader program %d failed to link\n", prog->Name);
3388 }
3389
3390 if (prog->InfoLog && prog->InfoLog[0] != 0) {
3391 printf("GLSL shader program %d info log:\n", prog->Name);
3392 printf("%s\n", prog->InfoLog);
3393 }
3394 }
3395 }
3396
3397 } /* extern "C" */