1 /*******************************************************************************
3 * Module Name: hwregs - Read/write access functions for the various ACPI
4 * control and status registers.
6 ******************************************************************************/
8 /******************************************************************************
12 * Some or all of this work - Copyright (c) 1999 - 2015, Intel Corp.
13 * All rights reserved.
17 * 2.1. This is your license from Intel Corp. under its intellectual property
18 * rights. You may have additional license terms from the party that provided
19 * you this software, covering your right to use that party's intellectual
22 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
23 * copy of the source code appearing in this file ("Covered Code") an
24 * irrevocable, perpetual, worldwide license under Intel's copyrights in the
25 * base code distributed originally by Intel ("Original Intel Code") to copy,
26 * make derivatives, distribute, use and display any portion of the Covered
27 * Code in any form, with the right to sublicense such rights; and
29 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
30 * license (with the right to sublicense), under only those claims of Intel
31 * patents that are infringed by the Original Intel Code, to make, use, sell,
32 * offer to sell, and import the Covered Code and derivative works thereof
33 * solely to the minimum extent necessary to exercise the above copyright
34 * license, and in no event shall the patent license extend to any additions
35 * to or modifications of the Original Intel Code. No other license or right
36 * is granted directly or by implication, estoppel or otherwise;
38 * The above copyright and patent license is granted only if the following
43 * 3.1. Redistribution of Source with Rights to Further Distribute Source.
44 * Redistribution of source code of any substantial portion of the Covered
45 * Code or modification with rights to further distribute source must include
46 * the above Copyright Notice, the above License, this list of Conditions,
47 * and the following Disclaimer and Export Compliance provision. In addition,
48 * Licensee must cause all Covered Code to which Licensee contributes to
49 * contain a file documenting the changes Licensee made to create that Covered
50 * Code and the date of any change. Licensee must include in that file the
51 * documentation of any changes made by any predecessor Licensee. Licensee
52 * must include a prominent statement that the modification is derived,
53 * directly or indirectly, from Original Intel Code.
55 * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
56 * Redistribution of source code of any substantial portion of the Covered
57 * Code or modification without rights to further distribute source must
58 * include the following Disclaimer and Export Compliance provision in the
59 * documentation and/or other materials provided with distribution. In
60 * addition, Licensee may not authorize further sublicense of source of any
61 * portion of the Covered Code, and must include terms to the effect that the
62 * license from Licensee to its licensee is limited to the intellectual
63 * property embodied in the software Licensee provides to its licensee, and
64 * not to intellectual property embodied in modifications its licensee may
67 * 3.3. Redistribution of Executable. Redistribution in executable form of any
68 * substantial portion of the Covered Code or modification must reproduce the
69 * above Copyright Notice, and the following Disclaimer and Export Compliance
70 * provision in the documentation and/or other materials provided with the
73 * 3.4. Intel retains all right, title, and interest in and to the Original
76 * 3.5. Neither the name Intel nor any other trademark owned or controlled by
77 * Intel shall be used in advertising or otherwise to promote the sale, use or
78 * other dealings in products derived from or relating to the Covered Code
79 * without prior written authorization from Intel.
81 * 4. Disclaimer and Export Compliance
83 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
84 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
85 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
86 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
87 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
88 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
91 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
92 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
93 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
94 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
95 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
96 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
97 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
100 * 4.3. Licensee shall not export, either directly or indirectly, any of this
101 * software or system incorporating such software without first obtaining any
102 * required license or other approval from the U. S. Department of Commerce or
103 * any other agency or department of the United States Government. In the
104 * event Licensee exports any such software from the United States or
105 * re-exports any such software from a foreign destination, Licensee shall
106 * ensure that the distribution and export/re-export of the software is in
107 * compliance with all laws, regulations, orders, or other restrictions of the
108 * U.S. Export Administration Regulations. Licensee agrees that neither it nor
109 * any of its subsidiaries will export/re-export any technical data, process,
110 * software, or service, directly or indirectly, to any country for which the
111 * United States government or any agency thereof requires an export license,
112 * other governmental approval, or letter of assurance, without first obtaining
113 * such license, approval or letter.
115 *****************************************************************************/
118 #include "accommon.h"
119 #include "acevents.h"
121 #define _COMPONENT ACPI_HARDWARE
122 ACPI_MODULE_NAME ("hwregs")
125 #if (!ACPI_REDUCED_HARDWARE)
127 /* Local Prototypes */
132 ACPI_GENERIC_ADDRESS
*RegisterA
,
133 ACPI_GENERIC_ADDRESS
*RegisterB
);
136 AcpiHwWriteMultiple (
138 ACPI_GENERIC_ADDRESS
*RegisterA
,
139 ACPI_GENERIC_ADDRESS
*RegisterB
);
141 #endif /* !ACPI_REDUCED_HARDWARE */
143 /******************************************************************************
145 * FUNCTION: AcpiHwValidateRegister
147 * PARAMETERS: Reg - GAS register structure
148 * MaxBitWidth - Max BitWidth supported (32 or 64)
149 * Address - Pointer to where the gas->address
154 * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS
155 * pointer, Address, SpaceId, BitWidth, and BitOffset.
157 ******************************************************************************/
160 AcpiHwValidateRegister (
161 ACPI_GENERIC_ADDRESS
*Reg
,
166 /* Must have a valid pointer to a GAS structure */
170 return (AE_BAD_PARAMETER
);
174 * Copy the target address. This handles possible alignment issues.
175 * Address must not be null. A null address also indicates an optional
176 * ACPI register that is not supported, so no error message.
178 ACPI_MOVE_64_TO_64 (Address
, &Reg
->Address
);
181 return (AE_BAD_ADDRESS
);
184 /* Validate the SpaceID */
186 if ((Reg
->SpaceId
!= ACPI_ADR_SPACE_SYSTEM_MEMORY
) &&
187 (Reg
->SpaceId
!= ACPI_ADR_SPACE_SYSTEM_IO
))
189 ACPI_ERROR ((AE_INFO
,
190 "Unsupported address space: 0x%X", Reg
->SpaceId
));
194 /* Validate the BitWidth */
196 if ((Reg
->BitWidth
!= 8) &&
197 (Reg
->BitWidth
!= 16) &&
198 (Reg
->BitWidth
!= 32) &&
199 (Reg
->BitWidth
!= MaxBitWidth
))
201 ACPI_ERROR ((AE_INFO
,
202 "Unsupported register bit width: 0x%X", Reg
->BitWidth
));
206 /* Validate the BitOffset. Just a warning for now. */
208 if (Reg
->BitOffset
!= 0)
210 ACPI_WARNING ((AE_INFO
,
211 "Unsupported register bit offset: 0x%X", Reg
->BitOffset
));
218 /******************************************************************************
220 * FUNCTION: AcpiHwRead
222 * PARAMETERS: Value - Where the value is returned
223 * Reg - GAS register structure
227 * DESCRIPTION: Read from either memory or IO space. This is a 32-bit max
228 * version of AcpiRead, used internally since the overhead of
229 * 64-bit values is not needed.
231 * LIMITATIONS: <These limitations also apply to AcpiHwWrite>
232 * BitWidth must be exactly 8, 16, or 32.
233 * SpaceID must be SystemMemory or SystemIO.
234 * BitOffset and AccessWidth are currently ignored, as there has
235 * not been a need to implement these.
237 ******************************************************************************/
242 ACPI_GENERIC_ADDRESS
*Reg
)
249 ACPI_FUNCTION_NAME (HwRead
);
252 /* Validate contents of the GAS register */
254 Status
= AcpiHwValidateRegister (Reg
, 32, &Address
);
255 if (ACPI_FAILURE (Status
))
260 /* Initialize entire 32-bit return value to zero */
265 * Two address spaces supported: Memory or IO. PCI_Config is
266 * not supported here because the GAS structure is insufficient
268 if (Reg
->SpaceId
== ACPI_ADR_SPACE_SYSTEM_MEMORY
)
270 Status
= AcpiOsReadMemory ((ACPI_PHYSICAL_ADDRESS
)
271 Address
, &Value64
, Reg
->BitWidth
);
273 *Value
= (UINT32
) Value64
;
275 else /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
277 Status
= AcpiHwReadPort ((ACPI_IO_ADDRESS
)
278 Address
, Value
, Reg
->BitWidth
);
281 ACPI_DEBUG_PRINT ((ACPI_DB_IO
,
282 "Read: %8.8X width %2d from %8.8X%8.8X (%s)\n",
283 *Value
, Reg
->BitWidth
, ACPI_FORMAT_UINT64 (Address
),
284 AcpiUtGetRegionName (Reg
->SpaceId
)));
290 /******************************************************************************
292 * FUNCTION: AcpiHwWrite
294 * PARAMETERS: Value - Value to be written
295 * Reg - GAS register structure
299 * DESCRIPTION: Write to either memory or IO space. This is a 32-bit max
300 * version of AcpiWrite, used internally since the overhead of
301 * 64-bit values is not needed.
303 ******************************************************************************/
308 ACPI_GENERIC_ADDRESS
*Reg
)
314 ACPI_FUNCTION_NAME (HwWrite
);
317 /* Validate contents of the GAS register */
319 Status
= AcpiHwValidateRegister (Reg
, 32, &Address
);
320 if (ACPI_FAILURE (Status
))
326 * Two address spaces supported: Memory or IO. PCI_Config is
327 * not supported here because the GAS structure is insufficient
329 if (Reg
->SpaceId
== ACPI_ADR_SPACE_SYSTEM_MEMORY
)
331 Status
= AcpiOsWriteMemory ((ACPI_PHYSICAL_ADDRESS
)
332 Address
, (UINT64
) Value
, Reg
->BitWidth
);
334 else /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
336 Status
= AcpiHwWritePort ((ACPI_IO_ADDRESS
)
337 Address
, Value
, Reg
->BitWidth
);
340 ACPI_DEBUG_PRINT ((ACPI_DB_IO
,
341 "Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n",
342 Value
, Reg
->BitWidth
, ACPI_FORMAT_UINT64 (Address
),
343 AcpiUtGetRegionName (Reg
->SpaceId
)));
349 #if (!ACPI_REDUCED_HARDWARE)
350 /*******************************************************************************
352 * FUNCTION: AcpiHwClearAcpiStatus
358 * DESCRIPTION: Clears all fixed and general purpose status bits
360 ******************************************************************************/
363 AcpiHwClearAcpiStatus (
367 ACPI_CPU_FLAGS LockFlags
= 0;
370 ACPI_FUNCTION_TRACE (HwClearAcpiStatus
);
373 ACPI_DEBUG_PRINT ((ACPI_DB_IO
, "About to write %04X to %8.8X%8.8X\n",
374 ACPI_BITMASK_ALL_FIXED_STATUS
,
375 ACPI_FORMAT_UINT64 (AcpiGbl_XPm1aStatus
.Address
)));
377 LockFlags
= AcpiOsAcquireLock (AcpiGbl_HardwareLock
);
379 /* Clear the fixed events in PM1 A/B */
381 Status
= AcpiHwRegisterWrite (ACPI_REGISTER_PM1_STATUS
,
382 ACPI_BITMASK_ALL_FIXED_STATUS
);
384 AcpiOsReleaseLock (AcpiGbl_HardwareLock
, LockFlags
);
386 if (ACPI_FAILURE (Status
))
391 /* Clear the GPE Bits in all GPE registers in all GPE blocks */
393 Status
= AcpiEvWalkGpeList (AcpiHwClearGpeBlock
, NULL
);
396 return_ACPI_STATUS (Status
);
400 /*******************************************************************************
402 * FUNCTION: AcpiHwGetBitRegisterInfo
404 * PARAMETERS: RegisterId - Index of ACPI Register to access
406 * RETURN: The bitmask to be used when accessing the register
408 * DESCRIPTION: Map RegisterId into a register bitmask.
410 ******************************************************************************/
412 ACPI_BIT_REGISTER_INFO
*
413 AcpiHwGetBitRegisterInfo (
416 ACPI_FUNCTION_ENTRY ();
419 if (RegisterId
> ACPI_BITREG_MAX
)
421 ACPI_ERROR ((AE_INFO
, "Invalid BitRegister ID: 0x%X", RegisterId
));
425 return (&AcpiGbl_BitRegisterInfo
[RegisterId
]);
429 /******************************************************************************
431 * FUNCTION: AcpiHwWritePm1Control
433 * PARAMETERS: Pm1aControl - Value to be written to PM1A control
434 * Pm1bControl - Value to be written to PM1B control
438 * DESCRIPTION: Write the PM1 A/B control registers. These registers are
439 * different than than the PM1 A/B status and enable registers
440 * in that different values can be written to the A/B registers.
441 * Most notably, the SLP_TYP bits can be different, as per the
442 * values returned from the _Sx predefined methods.
444 ******************************************************************************/
447 AcpiHwWritePm1Control (
454 ACPI_FUNCTION_TRACE (HwWritePm1Control
);
457 Status
= AcpiHwWrite (Pm1aControl
, &AcpiGbl_FADT
.XPm1aControlBlock
);
458 if (ACPI_FAILURE (Status
))
460 return_ACPI_STATUS (Status
);
463 if (AcpiGbl_FADT
.XPm1bControlBlock
.Address
)
465 Status
= AcpiHwWrite (Pm1bControl
, &AcpiGbl_FADT
.XPm1bControlBlock
);
467 return_ACPI_STATUS (Status
);
471 /******************************************************************************
473 * FUNCTION: AcpiHwRegisterRead
475 * PARAMETERS: RegisterId - ACPI Register ID
476 * ReturnValue - Where the register value is returned
478 * RETURN: Status and the value read.
480 * DESCRIPTION: Read from the specified ACPI register
482 ******************************************************************************/
493 ACPI_FUNCTION_TRACE (HwRegisterRead
);
498 case ACPI_REGISTER_PM1_STATUS
: /* PM1 A/B: 16-bit access each */
500 Status
= AcpiHwReadMultiple (&Value
,
501 &AcpiGbl_XPm1aStatus
,
502 &AcpiGbl_XPm1bStatus
);
505 case ACPI_REGISTER_PM1_ENABLE
: /* PM1 A/B: 16-bit access each */
507 Status
= AcpiHwReadMultiple (&Value
,
508 &AcpiGbl_XPm1aEnable
,
509 &AcpiGbl_XPm1bEnable
);
512 case ACPI_REGISTER_PM1_CONTROL
: /* PM1 A/B: 16-bit access each */
514 Status
= AcpiHwReadMultiple (&Value
,
515 &AcpiGbl_FADT
.XPm1aControlBlock
,
516 &AcpiGbl_FADT
.XPm1bControlBlock
);
519 * Zero the write-only bits. From the ACPI specification, "Hardware
520 * Write-Only Bits": "Upon reads to registers with write-only bits,
521 * software masks out all write-only bits."
523 Value
&= ~ACPI_PM1_CONTROL_WRITEONLY_BITS
;
526 case ACPI_REGISTER_PM2_CONTROL
: /* 8-bit access */
528 Status
= AcpiHwRead (&Value
, &AcpiGbl_FADT
.XPm2ControlBlock
);
531 case ACPI_REGISTER_PM_TIMER
: /* 32-bit access */
533 Status
= AcpiHwRead (&Value
, &AcpiGbl_FADT
.XPmTimerBlock
);
536 case ACPI_REGISTER_SMI_COMMAND_BLOCK
: /* 8-bit access */
538 Status
= AcpiHwReadPort (AcpiGbl_FADT
.SmiCommand
, &Value
, 8);
543 ACPI_ERROR ((AE_INFO
, "Unknown Register ID: 0x%X",
545 Status
= AE_BAD_PARAMETER
;
549 if (ACPI_SUCCESS (Status
))
551 *ReturnValue
= Value
;
554 return_ACPI_STATUS (Status
);
558 /******************************************************************************
560 * FUNCTION: AcpiHwRegisterWrite
562 * PARAMETERS: RegisterId - ACPI Register ID
563 * Value - The value to write
567 * DESCRIPTION: Write to the specified ACPI register
569 * NOTE: In accordance with the ACPI specification, this function automatically
570 * preserves the value of the following bits, meaning that these bits cannot be
571 * changed via this interface:
573 * PM1_CONTROL[0] = SCI_EN
578 * 1) Hardware Ignored Bits: When software writes to a register with ignored
579 * bit fields, it preserves the ignored bit fields
580 * 2) SCI_EN: OSPM always preserves this bit position
582 ******************************************************************************/
585 AcpiHwRegisterWrite (
593 ACPI_FUNCTION_TRACE (HwRegisterWrite
);
598 case ACPI_REGISTER_PM1_STATUS
: /* PM1 A/B: 16-bit access each */
600 * Handle the "ignored" bit in PM1 Status. According to the ACPI
601 * specification, ignored bits are to be preserved when writing.
602 * Normally, this would mean a read/modify/write sequence. However,
603 * preserving a bit in the status register is different. Writing a
604 * one clears the status, and writing a zero preserves the status.
605 * Therefore, we must always write zero to the ignored bit.
607 * This behavior is clarified in the ACPI 4.0 specification.
609 Value
&= ~ACPI_PM1_STATUS_PRESERVED_BITS
;
611 Status
= AcpiHwWriteMultiple (Value
,
612 &AcpiGbl_XPm1aStatus
,
613 &AcpiGbl_XPm1bStatus
);
616 case ACPI_REGISTER_PM1_ENABLE
: /* PM1 A/B: 16-bit access each */
618 Status
= AcpiHwWriteMultiple (Value
,
619 &AcpiGbl_XPm1aEnable
,
620 &AcpiGbl_XPm1bEnable
);
623 case ACPI_REGISTER_PM1_CONTROL
: /* PM1 A/B: 16-bit access each */
625 * Perform a read first to preserve certain bits (per ACPI spec)
626 * Note: This includes SCI_EN, we never want to change this bit
628 Status
= AcpiHwReadMultiple (&ReadValue
,
629 &AcpiGbl_FADT
.XPm1aControlBlock
,
630 &AcpiGbl_FADT
.XPm1bControlBlock
);
631 if (ACPI_FAILURE (Status
))
636 /* Insert the bits to be preserved */
638 ACPI_INSERT_BITS (Value
, ACPI_PM1_CONTROL_PRESERVED_BITS
, ReadValue
);
640 /* Now we can write the data */
642 Status
= AcpiHwWriteMultiple (Value
,
643 &AcpiGbl_FADT
.XPm1aControlBlock
,
644 &AcpiGbl_FADT
.XPm1bControlBlock
);
647 case ACPI_REGISTER_PM2_CONTROL
: /* 8-bit access */
649 * For control registers, all reserved bits must be preserved,
650 * as per the ACPI spec.
652 Status
= AcpiHwRead (&ReadValue
, &AcpiGbl_FADT
.XPm2ControlBlock
);
653 if (ACPI_FAILURE (Status
))
658 /* Insert the bits to be preserved */
660 ACPI_INSERT_BITS (Value
, ACPI_PM2_CONTROL_PRESERVED_BITS
, ReadValue
);
662 Status
= AcpiHwWrite (Value
, &AcpiGbl_FADT
.XPm2ControlBlock
);
665 case ACPI_REGISTER_PM_TIMER
: /* 32-bit access */
667 Status
= AcpiHwWrite (Value
, &AcpiGbl_FADT
.XPmTimerBlock
);
670 case ACPI_REGISTER_SMI_COMMAND_BLOCK
: /* 8-bit access */
672 /* SMI_CMD is currently always in IO space */
674 Status
= AcpiHwWritePort (AcpiGbl_FADT
.SmiCommand
, Value
, 8);
679 ACPI_ERROR ((AE_INFO
, "Unknown Register ID: 0x%X",
681 Status
= AE_BAD_PARAMETER
;
686 return_ACPI_STATUS (Status
);
690 /******************************************************************************
692 * FUNCTION: AcpiHwReadMultiple
694 * PARAMETERS: Value - Where the register value is returned
695 * RegisterA - First ACPI register (required)
696 * RegisterB - Second ACPI register (optional)
700 * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B)
702 ******************************************************************************/
707 ACPI_GENERIC_ADDRESS
*RegisterA
,
708 ACPI_GENERIC_ADDRESS
*RegisterB
)
715 /* The first register is always required */
717 Status
= AcpiHwRead (&ValueA
, RegisterA
);
718 if (ACPI_FAILURE (Status
))
723 /* Second register is optional */
725 if (RegisterB
->Address
)
727 Status
= AcpiHwRead (&ValueB
, RegisterB
);
728 if (ACPI_FAILURE (Status
))
735 * OR the two return values together. No shifting or masking is necessary,
736 * because of how the PM1 registers are defined in the ACPI specification:
738 * "Although the bits can be split between the two register blocks (each
739 * register block has a unique pointer within the FADT), the bit positions
740 * are maintained. The register block with unimplemented bits (that is,
741 * those implemented in the other register block) always returns zeros,
742 * and writes have no side effects"
744 *Value
= (ValueA
| ValueB
);
749 /******************************************************************************
751 * FUNCTION: AcpiHwWriteMultiple
753 * PARAMETERS: Value - The value to write
754 * RegisterA - First ACPI register (required)
755 * RegisterB - Second ACPI register (optional)
759 * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B)
761 ******************************************************************************/
764 AcpiHwWriteMultiple (
766 ACPI_GENERIC_ADDRESS
*RegisterA
,
767 ACPI_GENERIC_ADDRESS
*RegisterB
)
772 /* The first register is always required */
774 Status
= AcpiHwWrite (Value
, RegisterA
);
775 if (ACPI_FAILURE (Status
))
781 * Second register is optional
783 * No bit shifting or clearing is necessary, because of how the PM1
784 * registers are defined in the ACPI specification:
786 * "Although the bits can be split between the two register blocks (each
787 * register block has a unique pointer within the FADT), the bit positions
788 * are maintained. The register block with unimplemented bits (that is,
789 * those implemented in the other register block) always returns zeros,
790 * and writes have no side effects"
792 if (RegisterB
->Address
)
794 Status
= AcpiHwWrite (Value
, RegisterB
);
800 #endif /* !ACPI_REDUCED_HARDWARE */