- Add support for PnP IRP to PDO: IRP_MN_QUERY_BUS_INFORMATION (PciQueryBusInformatio...
[reactos.git] / reactos / drivers / bus / pcix / pci.h
1 /*
2 * PROJECT: ReactOS PCI Bus Driver
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: drivers/bus/pci/pci.h
5 * PURPOSE: Main Header File
6 * PROGRAMMERS: ReactOS Portable Systems Group
7 */
8
9 #include <initguid.h>
10 #include <ntifs.h>
11 #include <ntagp.h>
12 #include <wdmguid.h>
13 #include <wchar.h>
14 #include <acpiioct.h>
15 #include <drivers/pci/pci.h>
16 #include <drivers/acpi/acpi.h>
17 #include "halfuncs.h"
18 #include "rtlfuncs.h"
19 #include "vffuncs.h"
20 #include "bugcodes.h"
21
22 //
23 // Tag used in all pool allocations (Pci Bus)
24 //
25 #define PCI_POOL_TAG 'BicP'
26
27 //
28 // Checks if the specified FDO is the FDO for the Root PCI Bus
29 //
30 #define PCI_IS_ROOT_FDO(x) ((x)->BusRootFdoExtension == x)
31
32 //
33 // Assertions to make sure we are dealing with the right kind of extension
34 //
35 #define ASSERT_FDO(x) ASSERT((x)->ExtensionType == PciFdoExtensionType);
36 #define ASSERT_PDO(x) ASSERT((x)->ExtensionType == PciPdoExtensionType);
37
38 //
39 // PCI Hack Entry Name Lengths
40 //
41 #define PCI_HACK_ENTRY_SIZE sizeof(L"VVVVdddd") - sizeof(UNICODE_NULL)
42 #define PCI_HACK_ENTRY_REV_SIZE sizeof(L"VVVVddddRR") - sizeof(UNICODE_NULL)
43 #define PCI_HACK_ENTRY_SUBSYS_SIZE sizeof(L"VVVVddddssssIIII") - sizeof(UNICODE_NULL)
44 #define PCI_HACK_ENTRY_FULL_SIZE sizeof(L"VVVVddddssssIIIIRR") - sizeof(UNICODE_NULL)
45
46 //
47 // PCI Hack Entry Flags
48 //
49 #define PCI_HACK_HAS_REVISION_INFO 0x01
50 #define PCI_HACK_HAS_SUBSYSTEM_INFO 0x02
51
52 //
53 // PCI Interface Flags
54 //
55 #define PCI_INTERFACE_PDO 0x01
56 #define PCI_INTERFACE_FDO 0x02
57 #define PCI_INTERFACE_ROOT 0x04
58
59 //
60 // PCI Skip Function Flags
61 //
62 #define PCI_SKIP_DEVICE_ENUMERATION 0x01
63 #define PCI_SKIP_RESOURCE_ENUMERATION 0x02
64
65 //
66 // PCI Apply Hack Flags
67 //
68 #define PCI_HACK_FIXUP_BEFORE_CONFIGURATION 0x00
69 #define PCI_HACK_FIXUP_AFTER_CONFIGURATION 0x01
70 #define PCI_HACK_FIXUP_BEFORE_UPDATE 0x03
71
72 //
73 // PCI Debugging Device Support
74 //
75 #define MAX_DEBUGGING_DEVICES_SUPPORTED 0x04
76
77 //
78 // PCI Driver Verifier Failures
79 //
80 #define PCI_VERIFIER_CODES 0x04
81
82 //
83 // PCI ID Buffer ANSI Strings
84 //
85 #define MAX_ANSI_STRINGS 0x08
86
87 //
88 // Device Extension, Interface, Translator and Arbiter Signatures
89 //
90 typedef enum _PCI_SIGNATURE
91 {
92 PciPdoExtensionType = 'icP0',
93 PciFdoExtensionType = 'icP1',
94 PciArb_Io = 'icP2',
95 PciArb_Memory = 'icP3',
96 PciArb_Interrupt = 'icP4',
97 PciArb_BusNumber = 'icP5',
98 PciTrans_Interrupt = 'icP6',
99 PciInterface_BusHandler = 'icP7',
100 PciInterface_IntRouteHandler = 'icP8',
101 PciInterface_PciCb = 'icP9',
102 PciInterface_LegacyDeviceDetection = 'icP:',
103 PciInterface_PmeHandler = 'icP;',
104 PciInterface_DevicePresent = 'icP<',
105 PciInterface_NativeIde = 'icP=',
106 PciInterface_AgpTarget = 'icP>',
107 PciInterface_Location = 'icP?'
108 } PCI_SIGNATURE, *PPCI_SIGNATURE;
109
110 //
111 // Driver-handled PCI Device Types
112 //
113 typedef enum _PCI_DEVICE_TYPES
114 {
115 PciTypeInvalid,
116 PciTypeHostBridge,
117 PciTypePciBridge,
118 PciTypeCardbusBridge,
119 PciTypeDevice
120 } PCI_DEVICE_TYPES;
121
122 //
123 // Device Extension Logic States
124 //
125 typedef enum _PCI_STATE
126 {
127 PciNotStarted,
128 PciStarted,
129 PciDeleted,
130 PciStopped,
131 PciSurpriseRemoved,
132 PciSynchronizedOperation,
133 PciMaxObjectState
134 } PCI_STATE;
135
136 //
137 // IRP Dispatch Logic Style
138 //
139 typedef enum _PCI_DISPATCH_STYLE
140 {
141 IRP_COMPLETE,
142 IRP_DOWNWARD,
143 IRP_UPWARD,
144 IRP_DISPATCH,
145 } PCI_DISPATCH_STYLE;
146
147 //
148 // PCI Hack Entry Information
149 //
150 typedef struct _PCI_HACK_ENTRY
151 {
152 USHORT VendorID;
153 USHORT DeviceID;
154 USHORT SubVendorID;
155 USHORT SubSystemID;
156 ULONGLONG HackFlags;
157 USHORT RevisionID;
158 UCHAR Flags;
159 } PCI_HACK_ENTRY, *PPCI_HACK_ENTRY;
160
161 //
162 // Power State Information for Device Extension
163 //
164 typedef struct _PCI_POWER_STATE
165 {
166 SYSTEM_POWER_STATE CurrentSystemState;
167 DEVICE_POWER_STATE CurrentDeviceState;
168 SYSTEM_POWER_STATE SystemWakeLevel;
169 DEVICE_POWER_STATE DeviceWakeLevel;
170 DEVICE_POWER_STATE SystemStateMapping[7];
171 PIRP WaitWakeIrp;
172 PVOID SavedCancelRoutine;
173 LONG Paging;
174 LONG Hibernate;
175 LONG CrashDump;
176 } PCI_POWER_STATE, *PPCI_POWER_STATE;
177
178 //
179 // Internal PCI Lock Structure
180 //
181 typedef struct _PCI_LOCK
182 {
183 LONG Atom;
184 BOOLEAN OldIrql;
185 } PCI_LOCK, *PPCI_LOCK;
186
187 //
188 // Device Extension for a Bus FDO
189 //
190 typedef struct _PCI_FDO_EXTENSION
191 {
192 SINGLE_LIST_ENTRY List;
193 ULONG ExtensionType;
194 struct _PCI_MJ_DISPATCH_TABLE *IrpDispatchTable;
195 BOOLEAN DeviceState;
196 BOOLEAN TentativeNextState;
197 KEVENT SecondaryExtLock;
198 PDEVICE_OBJECT PhysicalDeviceObject;
199 PDEVICE_OBJECT FunctionalDeviceObject;
200 PDEVICE_OBJECT AttachedDeviceObject;
201 KEVENT ChildListLock;
202 struct _PCI_PDO_EXTENSION *ChildPdoList;
203 struct _PCI_FDO_EXTENSION *BusRootFdoExtension;
204 struct _PCI_FDO_EXTENSION *ParentFdoExtension;
205 struct _PCI_PDO_EXTENSION *ChildBridgePdoList;
206 PPCI_BUS_INTERFACE_STANDARD PciBusInterface;
207 BOOLEAN MaxSubordinateBus;
208 BUS_HANDLER *BusHandler;
209 BOOLEAN BaseBus;
210 BOOLEAN Fake;
211 BOOLEAN ChildDelete;
212 BOOLEAN Scanned;
213 BOOLEAN ArbitersInitialized;
214 BOOLEAN BrokenVideoHackApplied;
215 BOOLEAN Hibernated;
216 PCI_POWER_STATE PowerState;
217 SINGLE_LIST_ENTRY SecondaryExtension;
218 LONG ChildWaitWakeCount;
219 PPCI_COMMON_CONFIG PreservedConfig;
220 PCI_LOCK Lock;
221 struct
222 {
223 BOOLEAN Acquired;
224 BOOLEAN CacheLineSize;
225 BOOLEAN LatencyTimer;
226 BOOLEAN EnablePERR;
227 BOOLEAN EnableSERR;
228 } HotPlugParameters;
229 LONG BusHackFlags;
230 } PCI_FDO_EXTENSION, *PPCI_FDO_EXTENSION;
231
232 typedef struct _PCI_FUNCTION_RESOURCES
233 {
234 IO_RESOURCE_DESCRIPTOR Limit[7];
235 CM_PARTIAL_RESOURCE_DESCRIPTOR Current[7];
236 } PCI_FUNCTION_RESOURCES, *PPCI_FUNCTION_RESOURCES;
237
238 typedef union _PCI_HEADER_TYPE_DEPENDENT
239 {
240 struct
241 {
242 UCHAR Spare[4];
243 } type0;
244 struct
245 {
246 UCHAR PrimaryBus;
247 UCHAR SecondaryBus;
248 UCHAR SubordinateBus;
249 UCHAR SubtractiveDecode:1;
250 UCHAR IsaBitSet:1;
251 UCHAR VgaBitSet:1;
252 UCHAR WeChangedBusNumbers:1;
253 UCHAR IsaBitRequired:1;
254 } type1;
255 struct
256 {
257 UCHAR Spare[4];
258 } type2;
259 } PCI_HEADER_TYPE_DEPENDENT, *PPCI_HEADER_TYPE_DEPENDENT;
260
261 typedef struct _PCI_PDO_EXTENSION
262 {
263 PVOID Next;
264 ULONG ExtensionType;
265 struct _PCI_MJ_DISPATCH_TABLE *IrpDispatchTable;
266 BOOLEAN DeviceState;
267 BOOLEAN TentativeNextState;
268
269 KEVENT SecondaryExtLock;
270 PCI_SLOT_NUMBER Slot;
271 PDEVICE_OBJECT PhysicalDeviceObject;
272 PPCI_FDO_EXTENSION ParentFdoExtension;
273 SINGLE_LIST_ENTRY SecondaryExtension;
274 LONG BusInterfaceReferenceCount;
275 LONG AgpInterfaceReferenceCount;
276 USHORT VendorId;
277 USHORT DeviceId;
278 USHORT SubsystemVendorId;
279 USHORT SubsystemId;
280 BOOLEAN RevisionId;
281 BOOLEAN ProgIf;
282 BOOLEAN SubClass;
283 BOOLEAN BaseClass;
284 BOOLEAN AdditionalResourceCount;
285 BOOLEAN AdjustedInterruptLine;
286 BOOLEAN InterruptPin;
287 BOOLEAN RawInterruptLine;
288 BOOLEAN CapabilitiesPtr;
289 BOOLEAN SavedLatencyTimer;
290 BOOLEAN SavedCacheLineSize;
291 BOOLEAN HeaderType;
292 BOOLEAN NotPresent;
293 BOOLEAN ReportedMissing;
294 BOOLEAN ExpectedWritebackFailure;
295 BOOLEAN NoTouchPmeEnable;
296 BOOLEAN LegacyDriver;
297 BOOLEAN UpdateHardware;
298 BOOLEAN MovedDevice;
299 BOOLEAN DisablePowerDown;
300 BOOLEAN NeedsHotPlugConfiguration;
301 BOOLEAN SwitchedIDEToNativeMode;
302 BOOLEAN BIOSAllowsIDESwitchToNativeMode;
303 BOOLEAN IoSpaceUnderNativeIdeControl;
304 BOOLEAN OnDebugPath;
305 PCI_POWER_STATE PowerState;
306 PCI_HEADER_TYPE_DEPENDENT Dependent;
307 ULONGLONG HackFlags;
308 PCI_FUNCTION_RESOURCES *Resources;
309 PCI_FDO_EXTENSION *BridgeFdoExtension;
310 struct _PCI_PDO_EXTENSION *NextBridge;
311 struct _PCI_PDO_EXTENSION *NextHashEntry;
312 PCI_LOCK Lock;
313 PCI_PMC PowerCapabilities;
314 BOOLEAN TargetAgpCapabilityId;
315 USHORT CommandEnables;
316 USHORT InitialCommand;
317 } PCI_PDO_EXTENSION, *PPCI_PDO_EXTENSION;
318
319 //
320 // IRP Dispatch Function Type
321 //
322 typedef NTSTATUS (NTAPI *PCI_DISPATCH_FUNCTION)(
323 IN PIRP Irp,
324 IN PIO_STACK_LOCATION IoStackLocation,
325 IN PVOID DeviceExtension
326 );
327
328 //
329 // IRP Dispatch Minor Table
330 //
331 typedef struct _PCI_MN_DISPATCH_TABLE
332 {
333 PCI_DISPATCH_STYLE DispatchStyle;
334 PCI_DISPATCH_FUNCTION DispatchFunction;
335 } PCI_MN_DISPATCH_TABLE, *PPCI_MN_DISPATCH_TABLE;
336
337 //
338 // IRP Dispatch Major Table
339 //
340 typedef struct _PCI_MJ_DISPATCH_TABLE
341 {
342 ULONG PnpIrpMaximumMinorFunction;
343 PPCI_MN_DISPATCH_TABLE PnpIrpDispatchTable;
344 ULONG PowerIrpMaximumMinorFunction;
345 PPCI_MN_DISPATCH_TABLE PowerIrpDispatchTable;
346 PCI_DISPATCH_STYLE SystemControlIrpDispatchStyle;
347 PCI_DISPATCH_FUNCTION SystemControlIrpDispatchFunction;
348 PCI_DISPATCH_STYLE OtherIrpDispatchStyle;
349 PCI_DISPATCH_FUNCTION OtherIrpDispatchFunction;
350 } PCI_MJ_DISPATCH_TABLE, *PPCI_MJ_DISPATCH_TABLE;
351
352 //
353 // Generic PCI Interface Constructor and Initializer
354 //
355 struct _PCI_INTERFACE;
356 typedef NTSTATUS (NTAPI *PCI_INTERFACE_CONSTRUCTOR)(
357 IN PVOID DeviceExtension,
358 IN PVOID Instance,
359 IN PVOID InterfaceData,
360 IN USHORT Version,
361 IN USHORT Size,
362 IN PINTERFACE Interface
363 );
364
365 typedef NTSTATUS (NTAPI *PCI_INTERFACE_INITIALIZER)(
366 IN PVOID Instance
367 );
368
369 //
370 // Generic PCI Interface (Interface, Translator, Arbiter)
371 //
372 typedef struct _PCI_INTERFACE
373 {
374 CONST GUID *InterfaceType;
375 USHORT MinSize;
376 USHORT MinVersion;
377 USHORT MaxVersion;
378 USHORT Flags;
379 LONG ReferenceCount;
380 PCI_SIGNATURE Signature;
381 PCI_INTERFACE_CONSTRUCTOR Constructor;
382 PCI_INTERFACE_INITIALIZER Initializer;
383 } PCI_INTERFACE, *PPCI_INTERFACE;
384
385 //
386 // Generic Secondary Extension Instance Header (Interface, Translator, Arbiter)
387 //
388 typedef struct PCI_SECONDARY_EXTENSION
389 {
390 SINGLE_LIST_ENTRY List;
391 PCI_SIGNATURE ExtensionType;
392 PVOID Destructor;
393 } PCI_SECONDARY_EXTENSION, *PPCI_SECONDARY_EXTENSION;
394
395 //
396 // PCI Arbiter Instance
397 //
398 typedef struct PCI_ARBITER_INSTANCE
399 {
400 PCI_SECONDARY_EXTENSION Header;
401 PPCI_INTERFACE Interface;
402 PPCI_FDO_EXTENSION BusFdoExtension;
403 WCHAR InstanceName[24];
404 //ARBITER_INSTANCE CommonInstance; FIXME: Need Arbiter Headers
405 } PCI_ARBITER_INSTANCE, *PPCI_ARBITER_INSTANCE;
406
407 //
408 // PCI Verifier Data
409 //
410 typedef struct _PCI_VERIFIER_DATA
411 {
412 ULONG FailureCode;
413 VF_FAILURE_CLASS FailureClass;
414 ULONG AssertionControl;
415 PCHAR DebuggerMessageText;
416 } PCI_VERIFIER_DATA, *PPCI_VERIFIER_DATA;
417
418 //
419 // PCI ID Buffer Descriptor
420 //
421 typedef struct _PCI_ID_BUFFER
422 {
423 ULONG Count;
424 ANSI_STRING Strings[MAX_ANSI_STRINGS];
425 ULONG StringSize[MAX_ANSI_STRINGS];
426 ULONG TotalLength;
427 PCHAR CharBuffer;
428 CHAR BufferData[256];
429 } PCI_ID_BUFFER, *PPCI_ID_BUFFER;
430
431 //
432 // PCI Configuration Callbacks
433 //
434 struct _PCI_CONFIGURATOR_CONTEXT;
435
436 typedef VOID (NTAPI *PCI_CONFIGURATOR_INITIALIZE)(
437 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
438 );
439
440 typedef VOID (NTAPI *PCI_CONFIGURATOR_RESTORE_CURRENT)(
441 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
442 );
443
444 typedef VOID (NTAPI *PCI_CONFIGURATOR_SAVE_LIMITS)(
445 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
446 );
447
448 typedef VOID (NTAPI *PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS)(
449 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
450 );
451
452 typedef VOID (NTAPI *PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS)(
453 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
454 );
455
456 typedef VOID (NTAPI *PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS)(
457 IN struct _PCI_CONFIGURATOR_CONTEXT* Context,
458 IN PPCI_COMMON_HEADER PciData,
459 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
460 );
461
462 typedef VOID (NTAPI *PCI_CONFIGURATOR_RESET_DEVICE)(
463 IN struct _PCI_CONFIGURATOR_CONTEXT* Context
464 );
465
466 //
467 // PCI Configurator
468 //
469 typedef struct _PCI_CONFIGURATOR
470 {
471 PCI_CONFIGURATOR_INITIALIZE Initialize;
472 PCI_CONFIGURATOR_RESTORE_CURRENT RestoreCurrent;
473 PCI_CONFIGURATOR_SAVE_LIMITS SaveLimits;
474 PCI_CONFIGURATOR_SAVE_CURRENT_SETTINGS SaveCurrentSettings;
475 PCI_CONFIGURATOR_CHANGE_RESOURCE_SETTINGS ChangeResourceSettings;
476 PCI_CONFIGURATOR_GET_ADDITIONAL_RESOURCE_DESCRIPTORS GetAdditionalResourceDescriptors;
477 PCI_CONFIGURATOR_RESET_DEVICE ResetDevice;
478 } PCI_CONFIGURATOR, *PPCI_CONFIGURATOR;
479
480 //
481 // PCI Configurator Context
482 //
483 typedef struct _PCI_CONFIGURATOR_CONTEXT
484 {
485 PPCI_PDO_EXTENSION PdoExtension;
486 PPCI_COMMON_HEADER Current;
487 PPCI_COMMON_HEADER PciData;
488 PPCI_CONFIGURATOR Configurator;
489 USHORT SecondaryStatus;
490 USHORT Status;
491 USHORT Command;
492 } PCI_CONFIGURATOR_CONTEXT, *PPCI_CONFIGURATOR_CONTEXT;
493
494 //
495 // PCI IPI Function
496 //
497 typedef VOID (NTAPI *PCI_IPI_FUNCTION)(
498 IN PVOID Reserved,
499 IN PPCI_CONFIGURATOR_CONTEXT Context
500 );
501
502 //
503 // PCI IPI Context
504 //
505 typedef struct _PCI_IPI_CONTEXT
506 {
507 LONG RunCount;
508 ULONG Barrier;
509 PPCI_PDO_EXTENSION PdoExtension;
510 PCI_IPI_FUNCTION Function;
511 PVOID Context;
512 } PCI_IPI_CONTEXT, *PPCI_IPI_CONTEXT;
513
514 //
515 // IRP Dispatch Routines
516 //
517 NTSTATUS
518 NTAPI
519 PciDispatchIrp(
520 IN PDEVICE_OBJECT DeviceObject,
521 IN PIRP Irp
522 );
523
524 NTSTATUS
525 NTAPI
526 PciIrpNotSupported(
527 IN PIRP Irp,
528 IN PIO_STACK_LOCATION IoStackLocation,
529 IN PPCI_FDO_EXTENSION DeviceExtension
530 );
531
532 NTSTATUS
533 NTAPI
534 PciPassIrpFromFdoToPdo(
535 IN PPCI_FDO_EXTENSION DeviceExtension,
536 IN PIRP Irp
537 );
538
539 NTSTATUS
540 NTAPI
541 PciCallDownIrpStack(
542 IN PPCI_FDO_EXTENSION DeviceExtension,
543 IN PIRP Irp
544 );
545
546 NTSTATUS
547 NTAPI
548 PciIrpInvalidDeviceRequest(
549 IN PIRP Irp,
550 IN PIO_STACK_LOCATION IoStackLocation,
551 IN PPCI_FDO_EXTENSION DeviceExtension
552 );
553
554 //
555 // Power Routines
556 //
557 NTSTATUS
558 NTAPI
559 PciFdoWaitWake(
560 IN PIRP Irp,
561 IN PIO_STACK_LOCATION IoStackLocation,
562 IN PPCI_FDO_EXTENSION DeviceExtension
563 );
564
565 NTSTATUS
566 NTAPI
567 PciFdoSetPowerState(
568 IN PIRP Irp,
569 IN PIO_STACK_LOCATION IoStackLocation,
570 IN PPCI_FDO_EXTENSION DeviceExtension
571 );
572
573 NTSTATUS
574 NTAPI
575 PciFdoIrpQueryPower(
576 IN PIRP Irp,
577 IN PIO_STACK_LOCATION IoStackLocation,
578 IN PPCI_FDO_EXTENSION DeviceExtension
579 );
580
581 NTSTATUS
582 NTAPI
583 PciSetPowerManagedDevicePowerState(
584 IN PPCI_PDO_EXTENSION DeviceExtension,
585 IN DEVICE_POWER_STATE DeviceState,
586 IN BOOLEAN IrpSet
587 );
588
589 //
590 // Bus FDO Routines
591 //
592 NTSTATUS
593 NTAPI
594 PciAddDevice(
595 IN PDRIVER_OBJECT DriverObject,
596 IN PDEVICE_OBJECT PhysicalDeviceObject
597 );
598
599 NTSTATUS
600 NTAPI
601 PciFdoIrpStartDevice(
602 IN PIRP Irp,
603 IN PIO_STACK_LOCATION IoStackLocation,
604 IN PPCI_FDO_EXTENSION DeviceExtension
605 );
606
607 NTSTATUS
608 NTAPI
609 PciFdoIrpQueryRemoveDevice(
610 IN PIRP Irp,
611 IN PIO_STACK_LOCATION IoStackLocation,
612 IN PPCI_FDO_EXTENSION DeviceExtension
613 );
614
615 NTSTATUS
616 NTAPI
617 PciFdoIrpRemoveDevice(
618 IN PIRP Irp,
619 IN PIO_STACK_LOCATION IoStackLocation,
620 IN PPCI_FDO_EXTENSION DeviceExtension
621 );
622
623 NTSTATUS
624 NTAPI
625 PciFdoIrpCancelRemoveDevice(
626 IN PIRP Irp,
627 IN PIO_STACK_LOCATION IoStackLocation,
628 IN PPCI_FDO_EXTENSION DeviceExtension
629 );
630
631 NTSTATUS
632 NTAPI
633 PciFdoIrpStopDevice(
634 IN PIRP Irp,
635 IN PIO_STACK_LOCATION IoStackLocation,
636 IN PPCI_FDO_EXTENSION DeviceExtension
637 );
638
639 NTSTATUS
640 NTAPI
641 PciFdoIrpQueryStopDevice(
642 IN PIRP Irp,
643 IN PIO_STACK_LOCATION IoStackLocation,
644 IN PPCI_FDO_EXTENSION DeviceExtension
645 );
646
647 NTSTATUS
648 NTAPI
649 PciFdoIrpCancelStopDevice(
650 IN PIRP Irp,
651 IN PIO_STACK_LOCATION IoStackLocation,
652 IN PPCI_FDO_EXTENSION DeviceExtension
653 );
654
655 NTSTATUS
656 NTAPI
657 PciFdoIrpQueryDeviceRelations(
658 IN PIRP Irp,
659 IN PIO_STACK_LOCATION IoStackLocation,
660 IN PPCI_FDO_EXTENSION DeviceExtension
661 );
662
663 NTSTATUS
664 NTAPI
665 PciFdoIrpQueryInterface(
666 IN PIRP Irp,
667 IN PIO_STACK_LOCATION IoStackLocation,
668 IN PPCI_FDO_EXTENSION DeviceExtension
669 );
670
671 NTSTATUS
672 NTAPI
673 PciFdoIrpQueryCapabilities(
674 IN PIRP Irp,
675 IN PIO_STACK_LOCATION IoStackLocation,
676 IN PPCI_FDO_EXTENSION DeviceExtension
677 );
678
679 NTSTATUS
680 NTAPI
681 PciFdoIrpDeviceUsageNotification(
682 IN PIRP Irp,
683 IN PIO_STACK_LOCATION IoStackLocation,
684 IN PPCI_FDO_EXTENSION DeviceExtension
685 );
686
687 NTSTATUS
688 NTAPI
689 PciFdoIrpSurpriseRemoval(
690 IN PIRP Irp,
691 IN PIO_STACK_LOCATION IoStackLocation,
692 IN PPCI_FDO_EXTENSION DeviceExtension
693 );
694
695 NTSTATUS
696 NTAPI
697 PciFdoIrpQueryLegacyBusInformation(
698 IN PIRP Irp,
699 IN PIO_STACK_LOCATION IoStackLocation,
700 IN PPCI_FDO_EXTENSION DeviceExtension
701 );
702
703 //
704 // Device PDO Routines
705 //
706 NTSTATUS
707 NTAPI
708 PciPdoCreate(
709 IN PPCI_FDO_EXTENSION DeviceExtension,
710 IN PCI_SLOT_NUMBER Slot,
711 OUT PDEVICE_OBJECT *PdoDeviceObject
712 );
713
714 NTSTATUS
715 NTAPI
716 PciPdoWaitWake(
717 IN PIRP Irp,
718 IN PIO_STACK_LOCATION IoStackLocation,
719 IN PPCI_PDO_EXTENSION DeviceExtension
720 );
721
722 NTSTATUS
723 NTAPI
724 PciPdoSetPowerState(
725 IN PIRP Irp,
726 IN PIO_STACK_LOCATION IoStackLocation,
727 IN PPCI_PDO_EXTENSION DeviceExtension
728 );
729
730 NTSTATUS
731 NTAPI
732 PciPdoIrpQueryPower(
733 IN PIRP Irp,
734 IN PIO_STACK_LOCATION IoStackLocation,
735 IN PPCI_PDO_EXTENSION DeviceExtension
736 );
737
738 NTSTATUS
739 NTAPI
740 PciPdoIrpStartDevice(
741 IN PIRP Irp,
742 IN PIO_STACK_LOCATION IoStackLocation,
743 IN PPCI_PDO_EXTENSION DeviceExtension
744 );
745
746 NTSTATUS
747 NTAPI
748 PciPdoIrpQueryRemoveDevice(
749 IN PIRP Irp,
750 IN PIO_STACK_LOCATION IoStackLocation,
751 IN PPCI_PDO_EXTENSION DeviceExtension
752 );
753
754 NTSTATUS
755 NTAPI
756 PciPdoIrpRemoveDevice(
757 IN PIRP Irp,
758 IN PIO_STACK_LOCATION IoStackLocation,
759 IN PPCI_PDO_EXTENSION DeviceExtension
760 );
761
762 NTSTATUS
763 NTAPI
764 PciPdoIrpCancelRemoveDevice(
765 IN PIRP Irp,
766 IN PIO_STACK_LOCATION IoStackLocation,
767 IN PPCI_PDO_EXTENSION DeviceExtension
768 );
769
770 NTSTATUS
771 NTAPI
772 PciPdoIrpStopDevice(
773 IN PIRP Irp,
774 IN PIO_STACK_LOCATION IoStackLocation,
775 IN PPCI_PDO_EXTENSION DeviceExtension
776 );
777
778 NTSTATUS
779 NTAPI
780 PciPdoIrpQueryStopDevice(
781 IN PIRP Irp,
782 IN PIO_STACK_LOCATION IoStackLocation,
783 IN PPCI_PDO_EXTENSION DeviceExtension
784 );
785
786 NTSTATUS
787 NTAPI
788 PciPdoIrpCancelStopDevice(
789 IN PIRP Irp,
790 IN PIO_STACK_LOCATION IoStackLocation,
791 IN PPCI_PDO_EXTENSION DeviceExtension
792 );
793
794 NTSTATUS
795 NTAPI
796 PciPdoIrpQueryDeviceRelations(
797 IN PIRP Irp,
798 IN PIO_STACK_LOCATION IoStackLocation,
799 IN PPCI_PDO_EXTENSION DeviceExtension
800 );
801
802 NTSTATUS
803 NTAPI
804 PciPdoIrpQueryInterface(
805 IN PIRP Irp,
806 IN PIO_STACK_LOCATION IoStackLocation,
807 IN PPCI_PDO_EXTENSION DeviceExtension
808 );
809
810 NTSTATUS
811 NTAPI
812 PciPdoIrpQueryCapabilities(
813 IN PIRP Irp,
814 IN PIO_STACK_LOCATION IoStackLocation,
815 IN PPCI_PDO_EXTENSION DeviceExtension
816 );
817
818 NTSTATUS
819 NTAPI
820 PciPdoIrpQueryResources(
821 IN PIRP Irp,
822 IN PIO_STACK_LOCATION IoStackLocation,
823 IN PPCI_PDO_EXTENSION DeviceExtension
824 );
825
826 NTSTATUS
827 NTAPI
828 PciPdoIrpQueryResourceRequirements(
829 IN PIRP Irp,
830 IN PIO_STACK_LOCATION IoStackLocation,
831 IN PPCI_PDO_EXTENSION DeviceExtension
832 );
833
834 NTSTATUS
835 NTAPI
836 PciPdoIrpQueryDeviceText(
837 IN PIRP Irp,
838 IN PIO_STACK_LOCATION IoStackLocation,
839 IN PPCI_PDO_EXTENSION DeviceExtension
840 );
841
842 NTSTATUS
843 NTAPI
844 PciPdoIrpReadConfig(
845 IN PIRP Irp,
846 IN PIO_STACK_LOCATION IoStackLocation,
847 IN PPCI_PDO_EXTENSION DeviceExtension
848 );
849
850 NTSTATUS
851 NTAPI
852 PciPdoIrpWriteConfig(
853 IN PIRP Irp,
854 IN PIO_STACK_LOCATION IoStackLocation,
855 IN PPCI_PDO_EXTENSION DeviceExtension
856 );
857
858 NTSTATUS
859 NTAPI
860 PciPdoIrpQueryId(
861 IN PIRP Irp,
862 IN PIO_STACK_LOCATION IoStackLocation,
863 IN PPCI_PDO_EXTENSION DeviceExtension
864 );
865
866 NTSTATUS
867 NTAPI
868 PciPdoIrpQueryDeviceState(
869 IN PIRP Irp,
870 IN PIO_STACK_LOCATION IoStackLocation,
871 IN PPCI_PDO_EXTENSION DeviceExtension
872 );
873
874 NTSTATUS
875 NTAPI
876 PciPdoIrpQueryBusInformation(
877 IN PIRP Irp,
878 IN PIO_STACK_LOCATION IoStackLocation,
879 IN PPCI_PDO_EXTENSION DeviceExtension
880 );
881
882 NTSTATUS
883 NTAPI
884 PciPdoIrpDeviceUsageNotification(
885 IN PIRP Irp,
886 IN PIO_STACK_LOCATION IoStackLocation,
887 IN PPCI_PDO_EXTENSION DeviceExtension
888 );
889
890 NTSTATUS
891 NTAPI
892 PciPdoIrpSurpriseRemoval(
893 IN PIRP Irp,
894 IN PIO_STACK_LOCATION IoStackLocation,
895 IN PPCI_PDO_EXTENSION DeviceExtension
896 );
897
898 NTSTATUS
899 NTAPI
900 PciPdoIrpQueryLegacyBusInformation(
901 IN PIRP Irp,
902 IN PIO_STACK_LOCATION IoStackLocation,
903 IN PPCI_PDO_EXTENSION DeviceExtension
904 );
905
906
907 //
908 // HAL Callback/Hook Routines
909 //
910 VOID
911 NTAPI
912 PciHookHal(
913 VOID
914 );
915
916 //
917 // PCI Verifier Routines
918 //
919 VOID
920 NTAPI
921 PciVerifierInit(
922 IN PDRIVER_OBJECT DriverObject
923 );
924
925 PPCI_VERIFIER_DATA
926 NTAPI
927 PciVerifierRetrieveFailureData(
928 IN ULONG FailureCode
929 );
930
931 //
932 // Utility Routines
933 //
934 BOOLEAN
935 NTAPI
936 PciStringToUSHORT(
937 IN PWCHAR String,
938 OUT PUSHORT Value
939 );
940
941 BOOLEAN
942 NTAPI
943 PciIsDatacenter(
944 VOID
945 );
946
947 NTSTATUS
948 NTAPI
949 PciBuildDefaultExclusionLists(
950 VOID
951 );
952
953 BOOLEAN
954 NTAPI
955 PciUnicodeStringStrStr(
956 IN PUNICODE_STRING InputString,
957 IN PCUNICODE_STRING EqualString,
958 IN BOOLEAN CaseInSensitive
959 );
960
961 BOOLEAN
962 NTAPI
963 PciOpenKey(
964 IN PWCHAR KeyName,
965 IN HANDLE RootKey,
966 IN ACCESS_MASK DesiredAccess,
967 OUT PHANDLE KeyHandle,
968 OUT PNTSTATUS KeyStatus
969 );
970
971 NTSTATUS
972 NTAPI
973 PciGetRegistryValue(
974 IN PWCHAR ValueName,
975 IN PWCHAR KeyName,
976 IN HANDLE RootHandle,
977 IN ULONG Type,
978 OUT PVOID *OutputBuffer,
979 OUT PULONG OutputLength
980 );
981
982 PPCI_FDO_EXTENSION
983 NTAPI
984 PciFindParentPciFdoExtension(
985 IN PDEVICE_OBJECT DeviceObject,
986 IN PKEVENT Lock
987 );
988
989 VOID
990 NTAPI
991 PciInsertEntryAtTail(
992 IN PSINGLE_LIST_ENTRY ListHead,
993 IN PPCI_FDO_EXTENSION DeviceExtension,
994 IN PKEVENT Lock
995 );
996
997 NTSTATUS
998 NTAPI
999 PciGetDeviceProperty(
1000 IN PDEVICE_OBJECT DeviceObject,
1001 IN DEVICE_REGISTRY_PROPERTY DeviceProperty,
1002 OUT PVOID *OutputBuffer
1003 );
1004
1005 NTSTATUS
1006 NTAPI
1007 PciSendIoctl(
1008 IN PDEVICE_OBJECT DeviceObject,
1009 IN ULONG IoControlCode,
1010 IN PVOID InputBuffer,
1011 IN ULONG InputBufferLength,
1012 IN PVOID OutputBuffer,
1013 IN ULONG OutputBufferLength
1014 );
1015
1016 VOID
1017 NTAPI
1018 PcipLinkSecondaryExtension(
1019 IN PSINGLE_LIST_ENTRY List,
1020 IN PVOID Lock,
1021 IN PPCI_SECONDARY_EXTENSION SecondaryExtension,
1022 IN PCI_SIGNATURE ExtensionType,
1023 IN PVOID Destructor
1024 );
1025
1026 PPCI_SECONDARY_EXTENSION
1027 NTAPI
1028 PciFindNextSecondaryExtension(
1029 IN PSINGLE_LIST_ENTRY ListHead,
1030 IN PCI_SIGNATURE ExtensionType
1031 );
1032
1033 ULONGLONG
1034 NTAPI
1035 PciGetHackFlags(
1036 IN USHORT VendorId,
1037 IN USHORT DeviceId,
1038 IN USHORT SubVendorId,
1039 IN USHORT SubSystemId,
1040 IN UCHAR RevisionId
1041 );
1042
1043 PPCI_PDO_EXTENSION
1044 NTAPI
1045 PciFindPdoByFunction(
1046 IN PPCI_FDO_EXTENSION DeviceExtension,
1047 IN ULONG FunctionNumber,
1048 IN PPCI_COMMON_HEADER PciData
1049 );
1050
1051 BOOLEAN
1052 NTAPI
1053 PciIsCriticalDeviceClass(
1054 IN UCHAR BaseClass,
1055 IN UCHAR SubClass
1056 );
1057
1058 BOOLEAN
1059 NTAPI
1060 PciIsDeviceOnDebugPath(
1061 IN PPCI_PDO_EXTENSION DeviceExtension
1062 );
1063
1064 NTSTATUS
1065 NTAPI
1066 PciGetBiosConfig(
1067 IN PPCI_PDO_EXTENSION DeviceExtension,
1068 OUT PPCI_COMMON_HEADER PciData
1069 );
1070
1071 NTSTATUS
1072 NTAPI
1073 PciSaveBiosConfig(
1074 IN PPCI_PDO_EXTENSION DeviceExtension,
1075 OUT PPCI_COMMON_HEADER PciData
1076 );
1077
1078 UCHAR
1079 NTAPI
1080 PciReadDeviceCapability(
1081 IN PPCI_PDO_EXTENSION DeviceExtension,
1082 IN UCHAR Offset,
1083 IN ULONG CapabilityId,
1084 OUT PPCI_CAPABILITIES_HEADER Buffer,
1085 IN ULONG Length
1086 );
1087
1088 BOOLEAN
1089 NTAPI
1090 PciCanDisableDecodes(
1091 IN PPCI_PDO_EXTENSION DeviceExtension,
1092 IN PPCI_COMMON_HEADER Config,
1093 IN ULONGLONG HackFlags,
1094 IN BOOLEAN ForPowerDown
1095 );
1096
1097 PCI_DEVICE_TYPES
1098 NTAPI
1099 PciClassifyDeviceType(
1100 IN PPCI_PDO_EXTENSION PdoExtension
1101 );
1102
1103 ULONG_PTR
1104 NTAPI
1105 PciExecuteCriticalSystemRoutine(
1106 IN ULONG_PTR IpiContext
1107 );
1108
1109 BOOLEAN
1110 NTAPI
1111 PciCreateIoDescriptorFromBarLimit(
1112 PIO_RESOURCE_DESCRIPTOR ResourceDescriptor,
1113 IN PULONG BarArray,
1114 IN BOOLEAN Rom
1115 );
1116
1117 BOOLEAN
1118 NTAPI
1119 PciIsSlotPresentInParentMethod(
1120 IN PPCI_PDO_EXTENSION PdoExtension,
1121 IN ULONG Method
1122 );
1123
1124 VOID
1125 NTAPI
1126 PciDecodeEnable(
1127 IN PPCI_PDO_EXTENSION PdoExtension,
1128 IN BOOLEAN Enable,
1129 OUT PUSHORT Command
1130 );
1131
1132 NTSTATUS
1133 NTAPI
1134 PciQueryBusInformation(
1135 IN PPCI_PDO_EXTENSION PdoExtension,
1136 IN PPNP_BUS_INFORMATION* Buffer
1137 );
1138
1139 NTSTATUS
1140 NTAPI
1141 PciQueryCapabilities(
1142 IN PPCI_PDO_EXTENSION PdoExtension,
1143 IN OUT PDEVICE_CAPABILITIES DeviceCapability
1144 );
1145
1146 //
1147 // Configuration Routines
1148 //
1149 NTSTATUS
1150 NTAPI
1151 PciGetConfigHandlers(
1152 IN PPCI_FDO_EXTENSION FdoExtension
1153 );
1154
1155 VOID
1156 NTAPI
1157 PciReadSlotConfig(
1158 IN PPCI_FDO_EXTENSION DeviceExtension,
1159 IN PCI_SLOT_NUMBER Slot,
1160 IN PVOID Buffer,
1161 IN ULONG Offset,
1162 IN ULONG Length
1163 );
1164
1165 VOID
1166 NTAPI
1167 PciWriteDeviceConfig(
1168 IN PPCI_PDO_EXTENSION DeviceExtension,
1169 IN PVOID Buffer,
1170 IN ULONG Offset,
1171 IN ULONG Length
1172 );
1173
1174 VOID
1175 NTAPI
1176 PciReadDeviceConfig(
1177 IN PPCI_PDO_EXTENSION DeviceExtension,
1178 IN PVOID Buffer,
1179 IN ULONG Offset,
1180 IN ULONG Length
1181 );
1182
1183 UCHAR
1184 NTAPI
1185 PciGetAdjustedInterruptLine(
1186 IN PPCI_PDO_EXTENSION PdoExtension
1187 );
1188
1189 //
1190 // State Machine Logic Transition Routines
1191 //
1192 VOID
1193 NTAPI
1194 PciInitializeState(
1195 IN PPCI_FDO_EXTENSION DeviceExtension
1196 );
1197
1198 NTSTATUS
1199 NTAPI
1200 PciBeginStateTransition(
1201 IN PPCI_FDO_EXTENSION DeviceExtension,
1202 IN PCI_STATE NewState
1203 );
1204
1205 NTSTATUS
1206 NTAPI
1207 PciCancelStateTransition(
1208 IN PPCI_FDO_EXTENSION DeviceExtension,
1209 IN PCI_STATE NewState
1210 );
1211
1212 VOID
1213 NTAPI
1214 PciCommitStateTransition(
1215 IN PPCI_FDO_EXTENSION DeviceExtension,
1216 IN PCI_STATE NewState
1217 );
1218
1219 //
1220 // Arbiter Support
1221 //
1222 NTSTATUS
1223 NTAPI
1224 PciInitializeArbiters(
1225 IN PPCI_FDO_EXTENSION FdoExtension
1226 );
1227
1228 NTSTATUS
1229 NTAPI
1230 PciInitializeArbiterRanges(
1231 IN PPCI_FDO_EXTENSION DeviceExtension,
1232 IN PCM_RESOURCE_LIST Resources
1233 );
1234
1235 //
1236 // Debug Helpers
1237 //
1238 BOOLEAN
1239 NTAPI
1240 PciDebugIrpDispatchDisplay(
1241 IN PIO_STACK_LOCATION IoStackLocation,
1242 IN PPCI_FDO_EXTENSION DeviceExtension,
1243 IN USHORT MaxMinor
1244 );
1245
1246 VOID
1247 NTAPI
1248 PciDebugDumpCommonConfig(
1249 IN PPCI_COMMON_HEADER PciData
1250 );
1251
1252 VOID
1253 NTAPI
1254 PciDebugDumpQueryCapabilities(
1255 IN PDEVICE_CAPABILITIES DeviceCaps
1256 );
1257
1258 //
1259 // Interface Support
1260 //
1261 NTSTATUS
1262 NTAPI
1263 PciQueryInterface(
1264 IN PPCI_FDO_EXTENSION DeviceExtension,
1265 IN CONST GUID* InterfaceType,
1266 IN ULONG Size,
1267 IN ULONG Version,
1268 IN PVOID InterfaceData,
1269 IN PINTERFACE Interface,
1270 IN BOOLEAN LastChance
1271 );
1272
1273 NTSTATUS
1274 NTAPI
1275 PciPmeInterfaceInitializer(
1276 IN PVOID Instance
1277 );
1278
1279 NTSTATUS
1280 NTAPI
1281 routeintrf_Initializer(
1282 IN PVOID Instance
1283 );
1284
1285 NTSTATUS
1286 NTAPI
1287 arbusno_Initializer(
1288 IN PVOID Instance
1289 );
1290
1291 NTSTATUS
1292 NTAPI
1293 agpintrf_Initializer(
1294 IN PVOID Instance
1295 );
1296
1297 NTSTATUS
1298 NTAPI
1299 tranirq_Initializer(
1300 IN PVOID Instance
1301 );
1302
1303 NTSTATUS
1304 NTAPI
1305 busintrf_Initializer(
1306 IN PVOID Instance
1307 );
1308
1309 NTSTATUS
1310 NTAPI
1311 armem_Initializer(
1312 IN PVOID Instance
1313 );
1314
1315 NTSTATUS
1316 NTAPI
1317 ario_Initializer(
1318 IN PVOID Instance
1319 );
1320
1321 NTSTATUS
1322 NTAPI
1323 locintrf_Initializer(
1324 IN PVOID Instance
1325 );
1326
1327 NTSTATUS
1328 NTAPI
1329 pcicbintrf_Initializer(
1330 IN PVOID Instance
1331 );
1332
1333 NTSTATUS
1334 NTAPI
1335 lddintrf_Initializer(
1336 IN PVOID Instance
1337 );
1338
1339 NTSTATUS
1340 NTAPI
1341 devpresent_Initializer(
1342 IN PVOID Instance
1343 );
1344
1345 NTSTATUS
1346 NTAPI
1347 agpintrf_Constructor(
1348 IN PVOID DeviceExtension,
1349 IN PVOID Instance,
1350 IN PVOID InterfaceData,
1351 IN USHORT Version,
1352 IN USHORT Size,
1353 IN PINTERFACE Interface
1354 );
1355
1356 NTSTATUS
1357 NTAPI
1358 arbusno_Constructor(
1359 IN PVOID DeviceExtension,
1360 IN PVOID Instance,
1361 IN PVOID InterfaceData,
1362 IN USHORT Version,
1363 IN USHORT Size,
1364 IN PINTERFACE Interface
1365 );
1366
1367 NTSTATUS
1368 NTAPI
1369 tranirq_Constructor(
1370 IN PVOID DeviceExtension,
1371 IN PVOID Instance,
1372 IN PVOID InterfaceData,
1373 IN USHORT Version,
1374 IN USHORT Size,
1375 IN PINTERFACE Interface
1376 );
1377
1378 NTSTATUS
1379 NTAPI
1380 armem_Constructor(
1381 IN PVOID DeviceExtension,
1382 IN PVOID Instance,
1383 IN PVOID InterfaceData,
1384 IN USHORT Version,
1385 IN USHORT Size,
1386 IN PINTERFACE Interface
1387 );
1388
1389 NTSTATUS
1390 NTAPI
1391 busintrf_Constructor(
1392 IN PVOID DeviceExtension,
1393 IN PVOID Instance,
1394 IN PVOID InterfaceData,
1395 IN USHORT Version,
1396 IN USHORT Size,
1397 IN PINTERFACE Interface
1398 );
1399
1400 NTSTATUS
1401 NTAPI
1402 ario_Constructor(
1403 IN PVOID DeviceExtension,
1404 IN PVOID Instance,
1405 IN PVOID InterfaceData,
1406 IN USHORT Version,
1407 IN USHORT Size,
1408 IN PINTERFACE Interface
1409 );
1410
1411 VOID
1412 NTAPI
1413 ario_ApplyBrokenVideoHack(
1414 IN PPCI_FDO_EXTENSION FdoExtension
1415 );
1416
1417 NTSTATUS
1418 NTAPI
1419 pcicbintrf_Constructor(
1420 IN PVOID DeviceExtension,
1421 IN PVOID Instance,
1422 IN PVOID InterfaceData,
1423 IN USHORT Version,
1424 IN USHORT Size,
1425 IN PINTERFACE Interface
1426 );
1427
1428 NTSTATUS
1429 NTAPI
1430 lddintrf_Constructor(
1431 IN PVOID DeviceExtension,
1432 IN PVOID Instance,
1433 IN PVOID InterfaceData,
1434 IN USHORT Version,
1435 IN USHORT Size,
1436 IN PINTERFACE Interface
1437 );
1438
1439 NTSTATUS
1440 NTAPI
1441 locintrf_Constructor(
1442 IN PVOID DeviceExtension,
1443 IN PVOID Instance,
1444 IN PVOID InterfaceData,
1445 IN USHORT Version,
1446 IN USHORT Size,
1447 IN PINTERFACE Interface
1448 );
1449
1450 NTSTATUS
1451 NTAPI
1452 PciPmeInterfaceConstructor(
1453 IN PVOID DeviceExtension,
1454 IN PVOID Instance,
1455 IN PVOID InterfaceData,
1456 IN USHORT Version,
1457 IN USHORT Size,
1458 IN PINTERFACE Interface
1459 );
1460
1461 NTSTATUS
1462 NTAPI
1463 routeintrf_Constructor(
1464 IN PVOID DeviceExtension,
1465 IN PVOID Instance,
1466 IN PVOID InterfaceData,
1467 IN USHORT Version,
1468 IN USHORT Size,
1469 IN PINTERFACE Interface
1470 );
1471
1472 NTSTATUS
1473 NTAPI
1474 devpresent_Constructor(
1475 IN PVOID DeviceExtension,
1476 IN PVOID Instance,
1477 IN PVOID InterfaceData,
1478 IN USHORT Version,
1479 IN USHORT Size,
1480 IN PINTERFACE Interface
1481 );
1482
1483 //
1484 // PCI Enumeration and Resources
1485 //
1486 NTSTATUS
1487 NTAPI
1488 PciQueryDeviceRelations(
1489 IN PPCI_FDO_EXTENSION DeviceExtension,
1490 IN OUT PDEVICE_RELATIONS *pDeviceRelations
1491 );
1492
1493 NTSTATUS
1494 NTAPI
1495 PciQueryResources(
1496 IN PPCI_PDO_EXTENSION PdoExtension,
1497 OUT PCM_RESOURCE_LIST *Buffer
1498 );
1499
1500 NTSTATUS
1501 NTAPI
1502 PciQueryTargetDeviceRelations(
1503 IN PPCI_PDO_EXTENSION PdoExtension,
1504 IN OUT PDEVICE_RELATIONS *pDeviceRelations
1505 );
1506
1507 NTSTATUS
1508 NTAPI
1509 PciQueryEjectionRelations(
1510 IN PPCI_PDO_EXTENSION PdoExtension,
1511 IN OUT PDEVICE_RELATIONS *pDeviceRelations
1512 );
1513
1514 NTSTATUS
1515 NTAPI
1516 PciQueryRequirements(
1517 IN PPCI_PDO_EXTENSION PdoExtension,
1518 IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *RequirementsList
1519 );
1520
1521 //
1522 // Identification Functions
1523 //
1524 PWCHAR
1525 NTAPI
1526 PciGetDeviceDescriptionMessage(
1527 IN UCHAR BaseClass,
1528 IN UCHAR SubClass
1529 );
1530
1531 NTSTATUS
1532 NTAPI
1533 PciQueryDeviceText(
1534 IN PPCI_PDO_EXTENSION PdoExtension,
1535 IN DEVICE_TEXT_TYPE QueryType,
1536 IN ULONG Locale,
1537 OUT PWCHAR *Buffer
1538 );
1539
1540 NTSTATUS
1541 NTAPI
1542 PciQueryId(
1543 IN PPCI_PDO_EXTENSION DeviceExtension,
1544 IN BUS_QUERY_ID_TYPE QueryType,
1545 OUT PWCHAR *Buffer
1546 );
1547
1548 //
1549 // CardBUS Support
1550 //
1551 VOID
1552 NTAPI
1553 Cardbus_MassageHeaderForLimitsDetermination(
1554 IN PPCI_CONFIGURATOR_CONTEXT Context
1555 );
1556
1557 VOID
1558 NTAPI
1559 Cardbus_SaveCurrentSettings(
1560 IN PPCI_CONFIGURATOR_CONTEXT Context
1561 );
1562
1563 VOID
1564 NTAPI
1565 Cardbus_SaveLimits(
1566 IN PPCI_CONFIGURATOR_CONTEXT Context
1567 );
1568
1569 VOID
1570 NTAPI
1571 Cardbus_RestoreCurrent(
1572 IN PPCI_CONFIGURATOR_CONTEXT Context
1573 );
1574
1575 VOID
1576 NTAPI
1577 Cardbus_GetAdditionalResourceDescriptors(
1578 IN PPCI_CONFIGURATOR_CONTEXT Context,
1579 IN PPCI_COMMON_HEADER PciData,
1580 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1581 );
1582
1583 VOID
1584 NTAPI
1585 Cardbus_ResetDevice(
1586 IN PPCI_CONFIGURATOR_CONTEXT Context
1587 );
1588
1589 VOID
1590 NTAPI
1591 Cardbus_ChangeResourceSettings(
1592 IN PPCI_CONFIGURATOR_CONTEXT Context
1593 );
1594
1595 //
1596 // PCI Device Support
1597 //
1598 VOID
1599 NTAPI
1600 Device_MassageHeaderForLimitsDetermination(
1601 IN PPCI_CONFIGURATOR_CONTEXT Context
1602 );
1603
1604 VOID
1605 NTAPI
1606 Device_SaveCurrentSettings(
1607 IN PPCI_CONFIGURATOR_CONTEXT Context
1608 );
1609
1610 VOID
1611 NTAPI
1612 Device_SaveLimits(
1613 IN PPCI_CONFIGURATOR_CONTEXT Context
1614 );
1615
1616 VOID
1617 NTAPI
1618 Device_RestoreCurrent(
1619 IN PPCI_CONFIGURATOR_CONTEXT Context
1620 );
1621
1622 VOID
1623 NTAPI
1624 Device_GetAdditionalResourceDescriptors(
1625 IN PPCI_CONFIGURATOR_CONTEXT Context,
1626 IN PPCI_COMMON_HEADER PciData,
1627 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1628 );
1629
1630 VOID
1631 NTAPI
1632 Device_ResetDevice(
1633 IN PPCI_CONFIGURATOR_CONTEXT Context
1634 );
1635
1636 VOID
1637 NTAPI
1638 Device_ChangeResourceSettings(
1639 IN PPCI_CONFIGURATOR_CONTEXT Context
1640 );
1641
1642 //
1643 // PCI-to-PCI Bridge Device Support
1644 //
1645 VOID
1646 NTAPI
1647 PPBridge_MassageHeaderForLimitsDetermination(
1648 IN PPCI_CONFIGURATOR_CONTEXT Context
1649 );
1650
1651 VOID
1652 NTAPI
1653 PPBridge_SaveCurrentSettings(
1654 IN PPCI_CONFIGURATOR_CONTEXT Context
1655 );
1656
1657 VOID
1658 NTAPI
1659 PPBridge_SaveLimits(
1660 IN PPCI_CONFIGURATOR_CONTEXT Context
1661 );
1662
1663 VOID
1664 NTAPI
1665 PPBridge_RestoreCurrent(
1666 IN PPCI_CONFIGURATOR_CONTEXT Context
1667 );
1668
1669 VOID
1670 NTAPI
1671 PPBridge_GetAdditionalResourceDescriptors(
1672 IN PPCI_CONFIGURATOR_CONTEXT Context,
1673 IN PPCI_COMMON_HEADER PciData,
1674 IN PIO_RESOURCE_DESCRIPTOR IoDescriptor
1675 );
1676
1677 VOID
1678 NTAPI
1679 PPBridge_ResetDevice(
1680 IN PPCI_CONFIGURATOR_CONTEXT Context
1681 );
1682
1683 VOID
1684 NTAPI
1685 PPBridge_ChangeResourceSettings(
1686 IN PPCI_CONFIGURATOR_CONTEXT Context
1687 );
1688
1689 //
1690 // External Resources
1691 //
1692 extern SINGLE_LIST_ENTRY PciFdoExtensionListHead;
1693 extern KEVENT PciGlobalLock;
1694 extern PPCI_INTERFACE PciInterfaces[];
1695 extern PCI_INTERFACE ArbiterInterfaceBusNumber;
1696 extern PCI_INTERFACE ArbiterInterfaceMemory;
1697 extern PCI_INTERFACE ArbiterInterfaceIo;
1698 extern PCI_INTERFACE BusHandlerInterface;
1699 extern PCI_INTERFACE PciRoutingInterface;
1700 extern PCI_INTERFACE PciCardbusPrivateInterface;
1701 extern PCI_INTERFACE PciLegacyDeviceDetectionInterface;
1702 extern PCI_INTERFACE PciPmeInterface;
1703 extern PCI_INTERFACE PciDevicePresentInterface;
1704 //extern PCI_INTERFACE PciNativeIdeInterface;
1705 extern PCI_INTERFACE PciLocationInterface;
1706 extern PCI_INTERFACE AgpTargetInterface;
1707 extern PCI_INTERFACE TranslatorInterfaceInterrupt;
1708 extern PDRIVER_OBJECT PciDriverObject;
1709 extern PWATCHDOG_TABLE WdTable;
1710 extern PPCI_HACK_ENTRY PciHackTable;
1711 extern BOOLEAN PciAssignBusNumbers;
1712 extern BOOLEAN PciEnableNativeModeATA;
1713 extern PPCI_IRQ_ROUTING_TABLE PciIrqRoutingTable;
1714 extern BOOLEAN PciRunningDatacenter;
1715
1716 /* Exported by NTOS, should this go in the NDK? */
1717 extern NTSYSAPI BOOLEAN InitSafeBootMode;
1718
1719 /* EOF */