[USB]
[reactos.git] / reactos / drivers / bus / pcix / utils.c
1 /*
2 * PROJECT: ReactOS PCI Bus Driver
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: drivers/bus/pci/utils.c
5 * PURPOSE: Utility/Helper Support Code
6 * PROGRAMMERS: ReactOS Portable Systems Group
7 */
8
9 /* INCLUDES *******************************************************************/
10
11 #include <pci.h>
12 #define NDEBUG
13 #include <debug.h>
14
15 /* GLOBALS ********************************************************************/
16
17 ULONG PciDebugPortsCount;
18
19 RTL_RANGE_LIST PciIsaBitExclusionList;
20 RTL_RANGE_LIST PciVgaAndIsaBitExclusionList;
21
22 /* FUNCTIONS ******************************************************************/
23
24 BOOLEAN
25 NTAPI
26 PciUnicodeStringStrStr(IN PUNICODE_STRING InputString,
27 IN PCUNICODE_STRING EqualString,
28 IN BOOLEAN CaseInSensitive)
29 {
30 UNICODE_STRING PartialString;
31 LONG EqualChars, TotalChars;
32
33 /* Build a partial string with the smaller substring */
34 PartialString.Length = EqualString->Length;
35 PartialString.MaximumLength = InputString->MaximumLength;;
36 PartialString.Buffer = InputString->Buffer;
37
38 /* Check how many characters that need comparing */
39 EqualChars = 0;
40 TotalChars = (InputString->Length - EqualString->Length) / sizeof(WCHAR);
41
42 /* If the substring is bigger, just fail immediately */
43 if (TotalChars < 0) return FALSE;
44
45 /* Keep checking each character */
46 while (!RtlEqualUnicodeString(EqualString, &PartialString, CaseInSensitive))
47 {
48 /* Continue checking until all the required characters are equal */
49 PartialString.Buffer++;
50 PartialString.MaximumLength -= sizeof(WCHAR);
51 if (++EqualChars > TotalChars) return FALSE;
52 }
53
54 /* The string is equal */
55 return TRUE;
56 }
57
58 BOOLEAN
59 NTAPI
60 PciStringToUSHORT(IN PWCHAR String,
61 OUT PUSHORT Value)
62 {
63 USHORT Short;
64 ULONG Low, High, Length;
65 WCHAR Char;
66
67 /* Initialize everything to zero */
68 Short = 0;
69 Length = 0;
70 while (TRUE)
71 {
72 /* Get the character and set the high byte based on the previous one */
73 Char = *String++;
74 High = 16 * Short;
75
76 /* Check for numbers */
77 if ( Char >= '0' && Char <= '9' )
78 {
79 /* Convert them to a byte */
80 Low = Char - '0';
81 }
82 else if ( Char >= 'A' && Char <= 'F' )
83 {
84 /* Convert upper-case hex letters into a byte */
85 Low = Char - '7';
86 }
87 else if ( Char >= 'a' && Char <= 'f' )
88 {
89 /* Convert lower-case hex letters into a byte */
90 Low = Char - 'W';
91 }
92 else
93 {
94 /* Invalid string, fail the conversion */
95 return FALSE;
96 }
97
98 /* Combine the high and low byte */
99 Short = High | Low;
100
101 /* If 4 letters have been reached, the 16-bit integer should exist */
102 if (++Length >= 4)
103 {
104 /* Return it to the caller */
105 *Value = Short;
106 return TRUE;
107 }
108 }
109 }
110
111 BOOLEAN
112 NTAPI
113 PciIsSuiteVersion(IN USHORT SuiteMask)
114 {
115 ULONGLONG Mask = 0;
116 RTL_OSVERSIONINFOEXW VersionInfo;
117
118 /* Initialize the version information */
119 RtlZeroMemory(&VersionInfo, sizeof(RTL_OSVERSIONINFOEXW));
120 VersionInfo.dwOSVersionInfoSize = sizeof(RTL_OSVERSIONINFOEXW);
121 VersionInfo.wSuiteMask = SuiteMask;
122
123 /* Set the comparison mask and return if the passed suite mask matches */
124 VER_SET_CONDITION(Mask, VER_SUITENAME, VER_AND);
125 return NT_SUCCESS(RtlVerifyVersionInfo(&VersionInfo, VER_SUITENAME, Mask));
126 }
127
128 BOOLEAN
129 NTAPI
130 PciIsDatacenter(VOID)
131 {
132 BOOLEAN Result;
133 PVOID Value;
134 ULONG ResultLength;
135 NTSTATUS Status;
136
137 /* Assume this isn't Datacenter */
138 Result = FALSE;
139
140 /* First, try opening the setup key */
141 Status = PciGetRegistryValue(L"",
142 L"\\REGISTRY\\MACHINE\\SYSTEM\\CurrentControlSet\\Services\\setupdd",
143 0,
144 REG_BINARY,
145 &Value,
146 &ResultLength);
147 if (!NT_SUCCESS(Status))
148 {
149 /* This is not an in-progress Setup boot, so query the suite version */
150 Result = PciIsSuiteVersion(VER_SUITE_DATACENTER);
151 }
152 else
153 {
154 /* This scenario shouldn't happen yet, since SetupDD isn't used */
155 UNIMPLEMENTED;
156 while (TRUE);
157 }
158
159 /* Return if this is Datacenter or not */
160 return Result;
161 }
162
163 BOOLEAN
164 NTAPI
165 PciOpenKey(IN PWCHAR KeyName,
166 IN HANDLE RootKey,
167 IN ACCESS_MASK DesiredAccess,
168 OUT PHANDLE KeyHandle,
169 OUT PNTSTATUS KeyStatus)
170 {
171 NTSTATUS Status;
172 OBJECT_ATTRIBUTES ObjectAttributes;
173 UNICODE_STRING KeyString;
174 PAGED_CODE();
175
176 /* Initialize the object attributes */
177 RtlInitUnicodeString(&KeyString, KeyName);
178 InitializeObjectAttributes(&ObjectAttributes,
179 &KeyString,
180 OBJ_CASE_INSENSITIVE,
181 RootKey,
182 NULL);
183
184 /* Open the key, returning a boolean, and the status, if requested */
185 Status = ZwOpenKey(KeyHandle, DesiredAccess, &ObjectAttributes);
186 if (KeyStatus) *KeyStatus = Status;
187 return NT_SUCCESS(Status);
188 }
189
190 NTSTATUS
191 NTAPI
192 PciGetRegistryValue(IN PWCHAR ValueName,
193 IN PWCHAR KeyName,
194 IN HANDLE RootHandle,
195 IN ULONG Type,
196 OUT PVOID *OutputBuffer,
197 OUT PULONG OutputLength)
198 {
199 NTSTATUS Status;
200 PKEY_VALUE_PARTIAL_INFORMATION PartialInfo;
201 ULONG NeededLength, ActualLength;
202 UNICODE_STRING ValueString;
203 HANDLE KeyHandle;
204 BOOLEAN Result;
205
206 /* So we know what to free at the end of the body */
207 PartialInfo = NULL;
208 KeyHandle = NULL;
209 do
210 {
211 /* Open the key by name, rooted off the handle passed */
212 Result = PciOpenKey(KeyName,
213 RootHandle,
214 KEY_QUERY_VALUE,
215 &KeyHandle,
216 &Status);
217 if (!Result) break;
218
219 /* Query for the size that's needed for the value that was passed in */
220 RtlInitUnicodeString(&ValueString, ValueName);
221 Status = ZwQueryValueKey(KeyHandle,
222 &ValueString,
223 KeyValuePartialInformation,
224 NULL,
225 0,
226 &NeededLength);
227 ASSERT(!NT_SUCCESS(Status));
228 if (Status != STATUS_BUFFER_TOO_SMALL) break;
229
230 /* Allocate an appropriate buffer for the size that was returned */
231 ASSERT(NeededLength != 0);
232 Status = STATUS_INSUFFICIENT_RESOURCES;
233 PartialInfo = ExAllocatePoolWithTag(PagedPool,
234 NeededLength,
235 PCI_POOL_TAG);
236 if (!PartialInfo) break;
237
238 /* Query the actual value information now that the size is known */
239 Status = ZwQueryValueKey(KeyHandle,
240 &ValueString,
241 KeyValuePartialInformation,
242 PartialInfo,
243 NeededLength,
244 &ActualLength);
245 if (!NT_SUCCESS(Status)) break;
246
247 /* Make sure it's of the type that the caller expects */
248 Status = STATUS_INVALID_PARAMETER;
249 if (PartialInfo->Type != Type) break;
250
251 /* Subtract the registry-specific header, to get the data size */
252 ASSERT(NeededLength == ActualLength);
253 NeededLength -= sizeof(KEY_VALUE_PARTIAL_INFORMATION);
254
255 /* Allocate a buffer to hold the data and return it to the caller */
256 Status = STATUS_INSUFFICIENT_RESOURCES;
257 *OutputBuffer = ExAllocatePoolWithTag(PagedPool,
258 NeededLength,
259 PCI_POOL_TAG);
260 if (!*OutputBuffer) break;
261
262 /* Copy the data into the buffer and return its length to the caller */
263 RtlCopyMemory(*OutputBuffer, PartialInfo->Data, NeededLength);
264 if (OutputLength) *OutputLength = NeededLength;
265 Status = STATUS_SUCCESS;
266 } while (0);
267
268 /* Close any opened keys and free temporary allocations */
269 if (KeyHandle) ZwClose(KeyHandle);
270 if (PartialInfo) ExFreePoolWithTag(PartialInfo, 0);
271 return Status;
272 }
273
274 NTSTATUS
275 NTAPI
276 PciBuildDefaultExclusionLists(VOID)
277 {
278 ULONG Start;
279 NTSTATUS Status;
280 ASSERT(PciIsaBitExclusionList.Count == 0);
281 ASSERT(PciVgaAndIsaBitExclusionList.Count == 0);
282
283 /* Initialize the range lists */
284 RtlInitializeRangeList(&PciIsaBitExclusionList);
285 RtlInitializeRangeList(&PciVgaAndIsaBitExclusionList);
286
287 /* Loop x86 I/O ranges */
288 for (Start = 0x100; Start <= 0xFEFF; Start += 0x400)
289 {
290 /* Add the ISA I/O ranges */
291 Status = RtlAddRange(&PciIsaBitExclusionList,
292 Start,
293 Start + 0x2FF,
294 0,
295 RTL_RANGE_LIST_ADD_IF_CONFLICT,
296 NULL,
297 NULL);
298 if (!NT_SUCCESS(Status)) break;
299
300 /* Add the ISA I/O ranges */
301 Status = RtlAddRange(&PciVgaAndIsaBitExclusionList,
302 Start,
303 Start + 0x2AF,
304 0,
305 RTL_RANGE_LIST_ADD_IF_CONFLICT,
306 NULL,
307 NULL);
308 if (!NT_SUCCESS(Status)) break;
309
310 /* Add the VGA I/O range for Monochrome Video */
311 Status = RtlAddRange(&PciVgaAndIsaBitExclusionList,
312 Start + 0x2BC,
313 Start + 0x2BF,
314 0,
315 RTL_RANGE_LIST_ADD_IF_CONFLICT,
316 NULL,
317 NULL);
318 if (!NT_SUCCESS(Status)) break;
319
320 /* Add the VGA I/O range for certain CGA adapters */
321 Status = RtlAddRange(&PciVgaAndIsaBitExclusionList,
322 Start + 0x2E0,
323 Start + 0x2FF,
324 0,
325 RTL_RANGE_LIST_ADD_IF_CONFLICT,
326 NULL,
327 NULL);
328 if (!NT_SUCCESS(Status)) break;
329
330 /* Success, ranges added done */
331 };
332
333 RtlFreeRangeList(&PciIsaBitExclusionList);
334 RtlFreeRangeList(&PciVgaAndIsaBitExclusionList);
335 return Status;
336 }
337
338 PPCI_FDO_EXTENSION
339 NTAPI
340 PciFindParentPciFdoExtension(IN PDEVICE_OBJECT DeviceObject,
341 IN PKEVENT Lock)
342 {
343 PPCI_FDO_EXTENSION DeviceExtension;
344 PPCI_PDO_EXTENSION SearchExtension, FoundExtension;
345
346 /* Assume we'll find nothing */
347 SearchExtension = DeviceObject->DeviceExtension;
348 FoundExtension = NULL;
349
350 /* Check if a lock was specified */
351 if (Lock)
352 {
353 /* Wait for the lock to be released */
354 KeEnterCriticalRegion();
355 KeWaitForSingleObject(Lock, Executive, KernelMode, FALSE, NULL);
356 }
357
358 /* Now search for the extension */
359 DeviceExtension = (PPCI_FDO_EXTENSION)PciFdoExtensionListHead.Next;
360 while (DeviceExtension)
361 {
362 /* Acquire this device's lock */
363 KeEnterCriticalRegion();
364 KeWaitForSingleObject(&DeviceExtension->ChildListLock,
365 Executive,
366 KernelMode,
367 FALSE,
368 NULL);
369
370 /* Scan all children PDO, stop when no more PDOs, or found it */
371 for (FoundExtension = DeviceExtension->ChildPdoList;
372 ((FoundExtension) && (FoundExtension != SearchExtension));
373 FoundExtension = FoundExtension->Next);
374
375 /* Release this device's lock */
376 KeSetEvent(&DeviceExtension->ChildListLock, IO_NO_INCREMENT, FALSE);
377 KeLeaveCriticalRegion();
378
379 /* If we found it, break out */
380 if (FoundExtension) break;
381
382 /* Move to the next device */
383 DeviceExtension = (PPCI_FDO_EXTENSION)DeviceExtension->List.Next;
384 }
385
386 /* Check if we had acquired a lock previously */
387 if (Lock)
388 {
389 /* Release it */
390 KeSetEvent(Lock, IO_NO_INCREMENT, FALSE);
391 KeLeaveCriticalRegion();
392 }
393
394 /* Return which extension was found, if any */
395 return DeviceExtension;
396 }
397
398 VOID
399 NTAPI
400 PciInsertEntryAtTail(IN PSINGLE_LIST_ENTRY ListHead,
401 IN PPCI_FDO_EXTENSION DeviceExtension,
402 IN PKEVENT Lock)
403 {
404 PSINGLE_LIST_ENTRY NextEntry;
405 PAGED_CODE();
406
407 /* Check if a lock was specified */
408 if (Lock)
409 {
410 /* Wait for the lock to be released */
411 KeEnterCriticalRegion();
412 KeWaitForSingleObject(Lock, Executive, KernelMode, FALSE, NULL);
413 }
414
415 /* Loop the list until we get to the end, then insert this entry there */
416 for (NextEntry = ListHead; NextEntry->Next; NextEntry = NextEntry->Next);
417 NextEntry->Next = &DeviceExtension->List;
418
419 /* Check if we had acquired a lock previously */
420 if (Lock)
421 {
422 /* Release it */
423 KeSetEvent(Lock, IO_NO_INCREMENT, FALSE);
424 KeLeaveCriticalRegion();
425 }
426 }
427
428 VOID
429 NTAPI
430 PciInsertEntryAtHead(IN PSINGLE_LIST_ENTRY ListHead,
431 IN PSINGLE_LIST_ENTRY Entry,
432 IN PKEVENT Lock)
433 {
434 PAGED_CODE();
435
436 /* Check if a lock was specified */
437 if (Lock)
438 {
439 /* Wait for the lock to be released */
440 KeEnterCriticalRegion();
441 KeWaitForSingleObject(Lock, Executive, KernelMode, FALSE, NULL);
442 }
443
444 /* Make the entry point to the current head and make the head point to it */
445 Entry->Next = ListHead->Next;
446 ListHead->Next = Entry;
447
448 /* Check if we had acquired a lock previously */
449 if (Lock)
450 {
451 /* Release it */
452 KeSetEvent(Lock, IO_NO_INCREMENT, FALSE);
453 KeLeaveCriticalRegion();
454 }
455 }
456
457 VOID
458 NTAPI
459 PcipLinkSecondaryExtension(IN PSINGLE_LIST_ENTRY List,
460 IN PVOID Lock,
461 IN PPCI_SECONDARY_EXTENSION SecondaryExtension,
462 IN PCI_SIGNATURE ExtensionType,
463 IN PVOID Destructor)
464 {
465 PAGED_CODE();
466
467 /* Setup the extension data, and insert it into the primary's list */
468 SecondaryExtension->ExtensionType = ExtensionType;
469 SecondaryExtension->Destructor = Destructor;
470 PciInsertEntryAtHead(List, &SecondaryExtension->List, Lock);
471 }
472
473 NTSTATUS
474 NTAPI
475 PciGetDeviceProperty(IN PDEVICE_OBJECT DeviceObject,
476 IN DEVICE_REGISTRY_PROPERTY DeviceProperty,
477 OUT PVOID *OutputBuffer)
478 {
479 NTSTATUS Status;
480 ULONG BufferLength, ResultLength;
481 PVOID Buffer;
482 do
483 {
484 /* Query the requested property size */
485 Status = IoGetDeviceProperty(DeviceObject,
486 DeviceProperty,
487 0,
488 NULL,
489 &BufferLength);
490 if (Status != STATUS_BUFFER_TOO_SMALL)
491 {
492 /* Call should've failed with buffer too small! */
493 DPRINT1("PCI - Unexpected status from GetDeviceProperty, saw %08X, expected %08X.\n",
494 Status,
495 STATUS_BUFFER_TOO_SMALL);
496 *OutputBuffer = NULL;
497 ASSERTMSG(FALSE, "PCI Successfully did the impossible!");
498 break;
499 }
500
501 /* Allocate the required buffer */
502 Buffer = ExAllocatePoolWithTag(PagedPool, BufferLength, 'BicP');
503 if (!Buffer)
504 {
505 /* No memory, fail the request */
506 DPRINT1("PCI - Failed to allocate DeviceProperty buffer (%d bytes).\n", BufferLength);
507 Status = STATUS_INSUFFICIENT_RESOURCES;
508 break;
509 }
510
511 /* Do the actual property query call */
512 Status = IoGetDeviceProperty(DeviceObject,
513 DeviceProperty,
514 BufferLength,
515 Buffer,
516 &ResultLength);
517 if (!NT_SUCCESS(Status)) break;
518
519 /* Return the buffer to the caller */
520 ASSERT(BufferLength == ResultLength);
521 *OutputBuffer = Buffer;
522 return STATUS_SUCCESS;
523 } while (FALSE);
524
525 /* Failure path */
526 return STATUS_UNSUCCESSFUL;
527 }
528
529 NTSTATUS
530 NTAPI
531 PciSendIoctl(IN PDEVICE_OBJECT DeviceObject,
532 IN ULONG IoControlCode,
533 IN PVOID InputBuffer,
534 IN ULONG InputBufferLength,
535 IN PVOID OutputBuffer,
536 IN ULONG OutputBufferLength)
537 {
538 PIRP Irp;
539 NTSTATUS Status;
540 KEVENT Event;
541 IO_STATUS_BLOCK IoStatusBlock;
542 PDEVICE_OBJECT AttachedDevice;
543 PAGED_CODE();
544
545 /* Initialize the pending IRP event */
546 KeInitializeEvent(&Event, SynchronizationEvent, FALSE);
547
548 /* Get a reference to the root PDO (ACPI) */
549 AttachedDevice = IoGetAttachedDeviceReference(DeviceObject);
550 if (!AttachedDevice) return STATUS_INVALID_PARAMETER;
551
552 /* Build the requested IOCTL IRP */
553 Irp = IoBuildDeviceIoControlRequest(IoControlCode,
554 AttachedDevice,
555 InputBuffer,
556 InputBufferLength,
557 OutputBuffer,
558 OutputBufferLength,
559 0,
560 &Event,
561 &IoStatusBlock);
562 if (!Irp) return STATUS_INSUFFICIENT_RESOURCES;
563
564 /* Send the IOCTL to the driver */
565 Status = IoCallDriver(AttachedDevice, Irp);
566 if (Status == STATUS_PENDING)
567 {
568 /* Wait for a response */
569 KeWaitForSingleObject(&Event,
570 Executive,
571 KernelMode,
572 FALSE,
573 NULL);
574 Status = Irp->IoStatus.Status;
575 }
576
577 /* Take away the reference we took and return the result to the caller */
578 ObDereferenceObject(AttachedDevice);
579 return Status;
580 }
581
582 PPCI_SECONDARY_EXTENSION
583 NTAPI
584 PciFindNextSecondaryExtension(IN PSINGLE_LIST_ENTRY ListHead,
585 IN PCI_SIGNATURE ExtensionType)
586 {
587 PSINGLE_LIST_ENTRY NextEntry;
588 PPCI_SECONDARY_EXTENSION Extension;
589
590 /* Scan the list */
591 for (NextEntry = ListHead; NextEntry; NextEntry = NextEntry->Next)
592 {
593 /* Grab each extension and check if it's the one requested */
594 Extension = CONTAINING_RECORD(NextEntry, PCI_SECONDARY_EXTENSION, List);
595 if (Extension->ExtensionType == ExtensionType) return Extension;
596 }
597
598 /* Nothing was found */
599 return NULL;
600 }
601
602 ULONGLONG
603 NTAPI
604 PciGetHackFlags(IN USHORT VendorId,
605 IN USHORT DeviceId,
606 IN USHORT SubVendorId,
607 IN USHORT SubSystemId,
608 IN UCHAR RevisionId)
609 {
610 PPCI_HACK_ENTRY HackEntry;
611 ULONGLONG HackFlags;
612 ULONG LastWeight, MatchWeight;
613 ULONG EntryFlags;
614
615 /* ReactOS SetupLDR Hack */
616 if (!PciHackTable) return 0;
617
618 /* Initialize the variables before looping */
619 LastWeight = 0;
620 HackFlags = 0;
621 ASSERT(PciHackTable);
622
623 /* Scan the hack table */
624 for (HackEntry = PciHackTable;
625 HackEntry->VendorID != PCI_INVALID_VENDORID;
626 ++HackEntry)
627 {
628 /* Check if there's an entry for this device */
629 if ((HackEntry->DeviceID == DeviceId) &&
630 (HackEntry->VendorID == VendorId))
631 {
632 /* This is a basic match */
633 EntryFlags = HackEntry->Flags;
634 MatchWeight = 1;
635
636 /* Does the entry have revision information? */
637 if (EntryFlags & PCI_HACK_HAS_REVISION_INFO)
638 {
639 /* Check if the revision matches, if so, this is a better match */
640 if (HackEntry->RevisionID != RevisionId) continue;
641 MatchWeight = 3;
642 }
643
644 /* Does the netry have subsystem information? */
645 if (EntryFlags & PCI_HACK_HAS_SUBSYSTEM_INFO)
646 {
647 /* Check if it matches, if so, this is the best possible match */
648 if ((HackEntry->SubVendorID != SubVendorId) ||
649 (HackEntry->SubSystemID != SubSystemId))
650 {
651 continue;
652 }
653 MatchWeight += 4;
654 }
655
656 /* Is this the best match yet? */
657 if (MatchWeight > LastWeight)
658 {
659 /* This is the best match for now, use this as the hack flags */
660 HackFlags = HackEntry->HackFlags;
661 LastWeight = MatchWeight;
662 }
663 }
664 }
665
666 /* Return the best match */
667 return HackFlags;
668 }
669
670 BOOLEAN
671 NTAPI
672 PciIsCriticalDeviceClass(IN UCHAR BaseClass,
673 IN UCHAR SubClass)
674 {
675 /* Check for system or bridge devices */
676 if (BaseClass == PCI_CLASS_BASE_SYSTEM_DEV)
677 {
678 /* Interrupt controlers are critical */
679 return SubClass == PCI_SUBCLASS_SYS_INTERRUPT_CTLR;
680 }
681 else if (BaseClass == PCI_CLASS_BRIDGE_DEV)
682 {
683 /* ISA Bridges are critical */
684 return SubClass == PCI_SUBCLASS_BR_ISA;
685 }
686 else
687 {
688 /* All display controllers are critical */
689 return BaseClass == PCI_CLASS_DISPLAY_CTLR;
690 }
691 }
692
693 PPCI_PDO_EXTENSION
694 NTAPI
695 PciFindPdoByFunction(IN PPCI_FDO_EXTENSION DeviceExtension,
696 IN ULONG FunctionNumber,
697 IN PPCI_COMMON_HEADER PciData)
698 {
699 KIRQL Irql;
700 PPCI_PDO_EXTENSION PdoExtension;
701
702 /* Get the current IRQL when this call was made */
703 Irql = KeGetCurrentIrql();
704
705 /* Is this a low-IRQL call? */
706 if (Irql < DISPATCH_LEVEL)
707 {
708 /* Acquire this device's lock */
709 KeEnterCriticalRegion();
710 KeWaitForSingleObject(&DeviceExtension->ChildListLock,
711 Executive,
712 KernelMode,
713 FALSE,
714 NULL);
715 }
716
717 /* Loop every child PDO */
718 for (PdoExtension = DeviceExtension->ChildPdoList;
719 PdoExtension;
720 PdoExtension = PdoExtension->Next)
721 {
722 /* Find only enumerated PDOs */
723 if (!PdoExtension->ReportedMissing)
724 {
725 /* Check if the function number and header data matches */
726 if ((FunctionNumber == PdoExtension->Slot.u.AsULONG) &&
727 (PdoExtension->VendorId == PciData->VendorID) &&
728 (PdoExtension->DeviceId == PciData->DeviceID) &&
729 (PdoExtension->RevisionId == PciData->RevisionID))
730 {
731 /* This is considered to be the same PDO */
732 break;
733 }
734 }
735 }
736
737 /* Was this a low-IRQL call? */
738 if (Irql < DISPATCH_LEVEL)
739 {
740 /* Release this device's lock */
741 KeSetEvent(&DeviceExtension->ChildListLock, IO_NO_INCREMENT, FALSE);
742 KeLeaveCriticalRegion();
743 }
744
745 /* If the search found something, this is non-NULL, otherwise it's NULL */
746 return PdoExtension;
747 }
748
749 BOOLEAN
750 NTAPI
751 PciIsDeviceOnDebugPath(IN PPCI_PDO_EXTENSION DeviceExtension)
752 {
753 PAGED_CODE();
754
755 /* Check for too many, or no, debug ports */
756 ASSERT(PciDebugPortsCount <= MAX_DEBUGGING_DEVICES_SUPPORTED);
757 if (!PciDebugPortsCount) return FALSE;
758
759 /* eVb has not been able to test such devices yet */
760 UNIMPLEMENTED;
761 while (TRUE);
762 }
763
764 NTSTATUS
765 NTAPI
766 PciGetBiosConfig(IN PPCI_PDO_EXTENSION DeviceExtension,
767 OUT PPCI_COMMON_HEADER PciData)
768 {
769 HANDLE KeyHandle, SubKeyHandle;
770 OBJECT_ATTRIBUTES ObjectAttributes;
771 UNICODE_STRING KeyName, KeyValue;
772 WCHAR Buffer[32];
773 WCHAR DataBuffer[sizeof(KEY_VALUE_PARTIAL_INFORMATION) + PCI_COMMON_HDR_LENGTH];
774 PKEY_VALUE_PARTIAL_INFORMATION PartialInfo = (PVOID)DataBuffer;
775 NTSTATUS Status;
776 ULONG ResultLength;
777 PAGED_CODE();
778
779 /* Open the PCI key */
780 Status = IoOpenDeviceRegistryKey(DeviceExtension->ParentFdoExtension->
781 PhysicalDeviceObject,
782 TRUE,
783 KEY_ALL_ACCESS,
784 &KeyHandle);
785 if (!NT_SUCCESS(Status)) return Status;
786
787 /* Create a volatile BIOS configuration key */
788 RtlInitUnicodeString(&KeyName, L"BiosConfig");
789 InitializeObjectAttributes(&ObjectAttributes,
790 &KeyName,
791 OBJ_KERNEL_HANDLE,
792 KeyHandle,
793 NULL);
794 Status = ZwCreateKey(&SubKeyHandle,
795 KEY_READ,
796 &ObjectAttributes,
797 0,
798 NULL,
799 REG_OPTION_VOLATILE,
800 NULL);
801 ZwClose(KeyHandle);
802 if (!NT_SUCCESS(Status)) return Status;
803
804 /* Create the key value based on the device and function number */
805 swprintf(Buffer,
806 L"DEV_%02x&FUN_%02x",
807 DeviceExtension->Slot.u.bits.DeviceNumber,
808 DeviceExtension->Slot.u.bits.FunctionNumber);
809 RtlInitUnicodeString(&KeyValue, Buffer);
810
811 /* Query the value information (PCI BIOS configuration header) */
812 Status = ZwQueryValueKey(SubKeyHandle,
813 &KeyValue,
814 KeyValuePartialInformation,
815 PartialInfo,
816 sizeof(DataBuffer),
817 &ResultLength);
818 ZwClose(SubKeyHandle);
819 if (!NT_SUCCESS(Status)) return Status;
820
821 /* If any information was returned, go ahead and copy its data */
822 ASSERT(PartialInfo->DataLength == PCI_COMMON_HDR_LENGTH);
823 RtlCopyMemory(PciData, PartialInfo->Data, PCI_COMMON_HDR_LENGTH);
824 return Status;
825 }
826
827 NTSTATUS
828 NTAPI
829 PciSaveBiosConfig(IN PPCI_PDO_EXTENSION DeviceExtension,
830 IN PPCI_COMMON_HEADER PciData)
831 {
832 HANDLE KeyHandle, SubKeyHandle;
833 OBJECT_ATTRIBUTES ObjectAttributes;
834 UNICODE_STRING KeyName, KeyValue;
835 WCHAR Buffer[32];
836 NTSTATUS Status;
837 PAGED_CODE();
838
839 /* Open the PCI key */
840 Status = IoOpenDeviceRegistryKey(DeviceExtension->ParentFdoExtension->
841 PhysicalDeviceObject,
842 TRUE,
843 KEY_READ | KEY_WRITE,
844 &KeyHandle);
845 if (!NT_SUCCESS(Status)) return Status;
846
847 /* Create a volatile BIOS configuration key */
848 RtlInitUnicodeString(&KeyName, L"BiosConfig");
849 InitializeObjectAttributes(&ObjectAttributes,
850 &KeyName,
851 OBJ_KERNEL_HANDLE,
852 KeyHandle,
853 NULL);
854 Status = ZwCreateKey(&SubKeyHandle,
855 KEY_READ | KEY_WRITE,
856 &ObjectAttributes,
857 0,
858 NULL,
859 REG_OPTION_VOLATILE,
860 NULL);
861 ZwClose(KeyHandle);
862 if (!NT_SUCCESS(Status)) return Status;
863
864 /* Create the key value based on the device and function number */
865 swprintf(Buffer,
866 L"DEV_%02x&FUN_%02x",
867 DeviceExtension->Slot.u.bits.DeviceNumber,
868 DeviceExtension->Slot.u.bits.FunctionNumber);
869 RtlInitUnicodeString(&KeyValue, Buffer);
870
871 /* Set the value data (the PCI BIOS configuration header) */
872 Status = ZwSetValueKey(SubKeyHandle,
873 &KeyValue,
874 0,
875 REG_BINARY,
876 PciData,
877 PCI_COMMON_HDR_LENGTH);
878 ZwClose(SubKeyHandle);
879 return Status;
880 }
881
882 UCHAR
883 NTAPI
884 PciReadDeviceCapability(IN PPCI_PDO_EXTENSION DeviceExtension,
885 IN UCHAR Offset,
886 IN ULONG CapabilityId,
887 OUT PPCI_CAPABILITIES_HEADER Buffer,
888 IN ULONG Length)
889 {
890 ULONG CapabilityCount = 0;
891
892 /* If the device has no capabilility list, fail */
893 if (!Offset) return 0;
894
895 /* Validate a PDO with capabilities, a valid buffer, and a valid length */
896 ASSERT(DeviceExtension->ExtensionType == PciPdoExtensionType);
897 ASSERT(DeviceExtension->CapabilitiesPtr != 0);
898 ASSERT(Buffer);
899 ASSERT(Length >= sizeof(PCI_CAPABILITIES_HEADER));
900
901 /* Loop all capabilities */
902 while (Offset)
903 {
904 /* Make sure the pointer is spec-aligned and spec-sized */
905 ASSERT((Offset >= PCI_COMMON_HDR_LENGTH) && ((Offset & 0x3) == 0));
906
907 /* Read the capability header */
908 PciReadDeviceConfig(DeviceExtension,
909 Buffer,
910 Offset,
911 sizeof(PCI_CAPABILITIES_HEADER));
912
913 /* Check if this is the capability being looked up */
914 if ((Buffer->CapabilityID == CapabilityId) || !(CapabilityId))
915 {
916 /* Check if was at a valid offset and length */
917 if ((Offset) && (Length > sizeof(PCI_CAPABILITIES_HEADER)))
918 {
919 /* Sanity check */
920 ASSERT(Length <= (sizeof(PCI_COMMON_CONFIG) - Offset));
921
922 /* Now read the whole capability data into the buffer */
923 PciReadDeviceConfig(DeviceExtension,
924 (PVOID)((ULONG_PTR)Buffer +
925 sizeof(PCI_CAPABILITIES_HEADER)),
926 Offset + sizeof(PCI_CAPABILITIES_HEADER),
927 Length - sizeof(PCI_CAPABILITIES_HEADER));
928 }
929
930 /* Return the offset where the capability was found */
931 return Offset;
932 }
933
934 /* Try the next capability instead */
935 CapabilityCount++;
936 Offset = Buffer->Next;
937
938 /* There can't be more than 48 capabilities (256 bytes max) */
939 if (CapabilityCount > 48)
940 {
941 /* Fail, since this is basically a broken PCI device */
942 DPRINT1("PCI device %p capabilities list is broken.\n", DeviceExtension);
943 return 0;
944 }
945 }
946
947 /* Capability wasn't found, fail */
948 return 0;
949 }
950
951 BOOLEAN
952 NTAPI
953 PciCanDisableDecodes(IN PPCI_PDO_EXTENSION DeviceExtension,
954 IN PPCI_COMMON_HEADER Config,
955 IN ULONGLONG HackFlags,
956 IN BOOLEAN ForPowerDown)
957 {
958 UCHAR BaseClass, SubClass;
959 BOOLEAN IsVga;
960
961 /* Is there a device extension or should the PCI header be used? */
962 if (DeviceExtension)
963 {
964 /* Never disable decodes for a debug PCI Device */
965 if (DeviceExtension->OnDebugPath) return FALSE;
966
967 /* Hack flags will be obtained from the extension, not the caller */
968 ASSERT(HackFlags == 0);
969
970 /* Get hacks and classification from the device extension */
971 HackFlags = DeviceExtension->HackFlags;
972 SubClass = DeviceExtension->SubClass;
973 BaseClass = DeviceExtension->BaseClass;
974 }
975 else
976 {
977 /* There must be a PCI header, go read the classification information */
978 ASSERT(Config != NULL);
979 BaseClass = Config->BaseClass;
980 SubClass = Config->SubClass;
981 }
982
983 /* Check for hack flags that prevent disabling the decodes */
984 if (HackFlags & (PCI_HACK_PRESERVE_COMMAND |
985 PCI_HACK_CB_SHARE_CMD_BITS |
986 PCI_HACK_DONT_DISABLE_DECODES))
987 {
988 /* Don't do it */
989 return FALSE;
990 }
991
992 /* Is this a VGA adapter? */
993 if ((BaseClass == PCI_CLASS_DISPLAY_CTLR) &&
994 (SubClass == PCI_SUBCLASS_VID_VGA_CTLR))
995 {
996 /* Never disable decodes if this is for power down */
997 return ForPowerDown;
998 }
999
1000 /* Check for legacy devices */
1001 if (BaseClass == PCI_CLASS_PRE_20)
1002 {
1003 /* Never disable video adapter cards if this is for power down */
1004 if (SubClass == PCI_SUBCLASS_PRE_20_VGA) return ForPowerDown;
1005 }
1006 else if (BaseClass == PCI_CLASS_DISPLAY_CTLR)
1007 {
1008 /* Never disable VGA adapters if this is for power down */
1009 if (SubClass == PCI_SUBCLASS_VID_VGA_CTLR) return ForPowerDown;
1010 }
1011 else if (BaseClass == PCI_CLASS_BRIDGE_DEV)
1012 {
1013 /* Check for legacy bridges */
1014 if ((SubClass == PCI_SUBCLASS_BR_ISA) ||
1015 (SubClass == PCI_SUBCLASS_BR_EISA) ||
1016 (SubClass == PCI_SUBCLASS_BR_MCA) ||
1017 (SubClass == PCI_SUBCLASS_BR_HOST) ||
1018 (SubClass == PCI_SUBCLASS_BR_OTHER))
1019 {
1020 /* Never disable these */
1021 return FALSE;
1022 }
1023 else if ((SubClass == PCI_SUBCLASS_BR_PCI_TO_PCI) ||
1024 (SubClass == PCI_SUBCLASS_BR_CARDBUS))
1025 {
1026 /* This is a supported bridge, but does it have a VGA card? */
1027 if (!DeviceExtension)
1028 {
1029 /* Read the bridge control flag from the PCI header */
1030 IsVga = Config->u.type1.BridgeControl & PCI_ENABLE_BRIDGE_VGA;
1031 }
1032 else
1033 {
1034 /* Read the cached flag in the device extension */
1035 IsVga = DeviceExtension->Dependent.type1.VgaBitSet;
1036 }
1037
1038 /* Never disable VGA adapters if this is for power down */
1039 if (IsVga) return ForPowerDown;
1040 }
1041 }
1042
1043 /* Finally, never disable decodes if there's no power management */
1044 return !(HackFlags & PCI_HACK_NO_PM_CAPS);
1045 }
1046
1047 PCI_DEVICE_TYPES
1048 NTAPI
1049 PciClassifyDeviceType(IN PPCI_PDO_EXTENSION PdoExtension)
1050 {
1051 ASSERT(PdoExtension->ExtensionType == PciPdoExtensionType);
1052
1053 /* Differenriate between devices and bridges */
1054 if (PdoExtension->BaseClass != PCI_CLASS_BRIDGE_DEV) return PciTypeDevice;
1055
1056 /* The PCI Bus driver handles only CardBus and PCI bridges (plus host) */
1057 if (PdoExtension->SubClass == PCI_SUBCLASS_BR_HOST) return PciTypeHostBridge;
1058 if (PdoExtension->SubClass == PCI_SUBCLASS_BR_PCI_TO_PCI) return PciTypePciBridge;
1059 if (PdoExtension->SubClass == PCI_SUBCLASS_BR_CARDBUS) return PciTypeCardbusBridge;
1060
1061 /* Any other kind of bridge is treated like a device */
1062 return PciTypeDevice;
1063 }
1064
1065 ULONG_PTR
1066 NTAPI
1067 PciExecuteCriticalSystemRoutine(IN ULONG_PTR IpiContext)
1068 {
1069 PPCI_IPI_CONTEXT Context = (PPCI_IPI_CONTEXT)IpiContext;
1070
1071 /* Check if the IPI is already running */
1072 if (!InterlockedDecrement(&Context->RunCount))
1073 {
1074 /* Nope, this is the first instance, so execute the IPI function */
1075 Context->Function(Context->DeviceExtension, Context->Context);
1076
1077 /* Notify anyone that was spinning that they can stop now */
1078 Context->Barrier = 0;
1079 }
1080 else
1081 {
1082 /* Spin until it has finished running */
1083 while (Context->Barrier);
1084 }
1085
1086 /* Done */
1087 return 0;
1088 }
1089
1090 BOOLEAN
1091 NTAPI
1092 PciIsSlotPresentInParentMethod(IN PPCI_PDO_EXTENSION PdoExtension,
1093 IN ULONG Method)
1094 {
1095 BOOLEAN FoundSlot;
1096 PACPI_METHOD_ARGUMENT Argument;
1097 ACPI_EVAL_INPUT_BUFFER InputBuffer;
1098 PACPI_EVAL_OUTPUT_BUFFER OutputBuffer;
1099 ULONG i, Length;
1100 NTSTATUS Status;
1101 PAGED_CODE();
1102
1103 /* Assume slot is not part of the parent method */
1104 FoundSlot = FALSE;
1105
1106 /* Allocate a 2KB buffer for the method return parameters */
1107 Length = sizeof(ACPI_EVAL_OUTPUT_BUFFER) + 2048;
1108 OutputBuffer = ExAllocatePoolWithTag(PagedPool, Length, 'BicP');
1109 if (OutputBuffer)
1110 {
1111 /* Clear out the output buffer */
1112 RtlZeroMemory(OutputBuffer, Length);
1113
1114 /* Initialize the input buffer with the method requested */
1115 InputBuffer.Signature = 0;
1116 *(PULONG)InputBuffer.MethodName = Method;
1117 InputBuffer.Signature = ACPI_EVAL_INPUT_BUFFER_SIGNATURE;
1118
1119 /* Send it to the ACPI driver */
1120 Status = PciSendIoctl(PdoExtension->ParentFdoExtension->PhysicalDeviceObject,
1121 IOCTL_ACPI_EVAL_METHOD,
1122 &InputBuffer,
1123 sizeof(ACPI_EVAL_INPUT_BUFFER),
1124 OutputBuffer,
1125 Length);
1126 if (NT_SUCCESS(Status))
1127 {
1128 /* Scan all output arguments */
1129 for (i = 0; i < OutputBuffer->Count; i++)
1130 {
1131 /* Make sure it's an integer */
1132 Argument = &OutputBuffer->Argument[i];
1133 if (Argument->Type != ACPI_METHOD_ARGUMENT_INTEGER) continue;
1134
1135 /* Check if the argument matches this PCI slot structure */
1136 if (Argument->Argument == ((PdoExtension->Slot.u.bits.DeviceNumber) |
1137 ((PdoExtension->Slot.u.bits.FunctionNumber) << 16)))
1138 {
1139 /* This slot has been found, return it */
1140 FoundSlot = TRUE;
1141 break;
1142 }
1143 }
1144 }
1145
1146 /* Finished with the buffer, free it */
1147 ExFreePoolWithTag(OutputBuffer, 0);
1148 }
1149
1150 /* Return if the slot was found */
1151 return FoundSlot;
1152 }
1153
1154 ULONG
1155 NTAPI
1156 PciGetLengthFromBar(IN ULONG Bar)
1157 {
1158 ULONG Length;
1159
1160 /* I/O addresses vs. memory addresses start differently due to alignment */
1161 Length = 1 << ((Bar & PCI_ADDRESS_IO_SPACE) ? 2 : 4);
1162
1163 /* Keep going until a set bit */
1164 while (!(Length & Bar) && (Length)) Length <<= 1;
1165
1166 /* Return the length (might be 0 on 64-bit because it's the low-word) */
1167 if ((Bar & PCI_ADDRESS_MEMORY_TYPE_MASK) != PCI_TYPE_64BIT) ASSERT(Length);
1168 return Length;
1169 }
1170
1171 BOOLEAN
1172 NTAPI
1173 PciCreateIoDescriptorFromBarLimit(PIO_RESOURCE_DESCRIPTOR ResourceDescriptor,
1174 IN PULONG BarArray,
1175 IN BOOLEAN Rom)
1176 {
1177 ULONG CurrentBar, BarLength, BarMask;
1178 BOOLEAN Is64BitBar = FALSE;
1179
1180 /* Check if the BAR is nor I/O nor memory */
1181 CurrentBar = BarArray[0];
1182 if (!(CurrentBar & ~PCI_ADDRESS_IO_SPACE))
1183 {
1184 /* Fail this descriptor */
1185 ResourceDescriptor->Type = CmResourceTypeNull;
1186 return FALSE;
1187 }
1188
1189 /* Set default flag and clear high words */
1190 ResourceDescriptor->Flags = 0;
1191 ResourceDescriptor->u.Generic.MaximumAddress.HighPart = 0;
1192 ResourceDescriptor->u.Generic.MinimumAddress.LowPart = 0;
1193 ResourceDescriptor->u.Generic.MinimumAddress.HighPart = 0;
1194
1195 /* Check for ROM Address */
1196 if (Rom)
1197 {
1198 /* Clean up the BAR to get just the address */
1199 CurrentBar &= PCI_ADDRESS_ROM_ADDRESS_MASK;
1200 if (!CurrentBar)
1201 {
1202 /* Invalid ar, fail this descriptor */
1203 ResourceDescriptor->Type = CmResourceTypeNull;
1204 return FALSE;
1205 }
1206
1207 /* ROM Addresses are always read only */
1208 ResourceDescriptor->Flags = CM_RESOURCE_MEMORY_READ_ONLY;
1209 }
1210
1211 /* Compute the length, assume it's the alignment for now */
1212 BarLength = PciGetLengthFromBar(CurrentBar);
1213 ResourceDescriptor->u.Generic.Length = BarLength;
1214 ResourceDescriptor->u.Generic.Alignment = BarLength;
1215
1216 /* Check what kind of BAR this is */
1217 if (CurrentBar & PCI_ADDRESS_IO_SPACE)
1218 {
1219 /* Use correct mask to decode the address */
1220 BarMask = PCI_ADDRESS_IO_ADDRESS_MASK;
1221
1222 /* Set this as an I/O Port descriptor */
1223 ResourceDescriptor->Type = CmResourceTypePort;
1224 ResourceDescriptor->Flags = CM_RESOURCE_PORT_IO;
1225 }
1226 else
1227 {
1228 /* Use correct mask to decode the address */
1229 BarMask = PCI_ADDRESS_MEMORY_ADDRESS_MASK;
1230
1231 /* Set this as a memory descriptor */
1232 ResourceDescriptor->Type = CmResourceTypeMemory;
1233
1234 /* Check if it's 64-bit or 20-bit decode */
1235 if ((CurrentBar & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_64BIT)
1236 {
1237 /* The next BAR has the high word, read it */
1238 ResourceDescriptor->u.Port.MaximumAddress.HighPart = BarArray[1];
1239 Is64BitBar = TRUE;
1240 }
1241 else if ((CurrentBar & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_20BIT)
1242 {
1243 /* Use the correct mask to decode the address */
1244 BarMask = ~0xFFF0000F;
1245 }
1246
1247 /* Check if the BAR is listed as prefetchable memory */
1248 if (CurrentBar & PCI_ADDRESS_MEMORY_PREFETCHABLE)
1249 {
1250 /* Mark the descriptor in the same way */
1251 ResourceDescriptor->Flags |= CM_RESOURCE_MEMORY_PREFETCHABLE;
1252 }
1253 }
1254
1255 /* Now write down the maximum address based on the base + length */
1256 ResourceDescriptor->u.Port.MaximumAddress.QuadPart = (CurrentBar & BarMask) +
1257 BarLength - 1;
1258
1259 /* Return if this is a 64-bit BAR, so the loop code knows to skip the next one */
1260 return Is64BitBar;
1261 }
1262
1263 VOID
1264 NTAPI
1265 PciDecodeEnable(IN PPCI_PDO_EXTENSION PdoExtension,
1266 IN BOOLEAN Enable,
1267 OUT PUSHORT Command)
1268 {
1269 USHORT CommandValue;
1270
1271 /*
1272 * If decodes are being disabled, make sure it's allowed, and in both cases,
1273 * make sure that a hackflag isn't preventing touching the decodes at all.
1274 */
1275 if (((Enable) || (PciCanDisableDecodes(PdoExtension, 0, 0, 0))) &&
1276 !(PdoExtension->HackFlags & PCI_HACK_PRESERVE_COMMAND))
1277 {
1278 /* Did the caller already have a command word? */
1279 if (Command)
1280 {
1281 /* Use the caller's */
1282 CommandValue = *Command;
1283 }
1284 else
1285 {
1286 /* Otherwise, read the current command */
1287 PciReadDeviceConfig(PdoExtension,
1288 &Command,
1289 FIELD_OFFSET(PCI_COMMON_HEADER, Command),
1290 sizeof(USHORT));
1291 }
1292
1293 /* Turn off decodes by default */
1294 CommandValue &= ~(PCI_ENABLE_IO_SPACE |
1295 PCI_ENABLE_MEMORY_SPACE |
1296 PCI_ENABLE_BUS_MASTER);
1297
1298 /* If requested, enable the decodes that were enabled at init time */
1299 if (Enable) CommandValue |= PdoExtension->CommandEnables &
1300 (PCI_ENABLE_IO_SPACE |
1301 PCI_ENABLE_MEMORY_SPACE |
1302 PCI_ENABLE_BUS_MASTER);
1303
1304 /* Update the command word */
1305 PciWriteDeviceConfig(PdoExtension,
1306 &CommandValue,
1307 FIELD_OFFSET(PCI_COMMON_HEADER, Command),
1308 sizeof(USHORT));
1309 }
1310 }
1311
1312 NTSTATUS
1313 NTAPI
1314 PciQueryBusInformation(IN PPCI_PDO_EXTENSION PdoExtension,
1315 IN PPNP_BUS_INFORMATION* Buffer)
1316 {
1317 PPNP_BUS_INFORMATION BusInfo;
1318
1319 /* Allocate a structure for the bus information */
1320 BusInfo = ExAllocatePoolWithTag(PagedPool,
1321 sizeof(PNP_BUS_INFORMATION),
1322 'BicP');
1323 if (!BusInfo) return STATUS_INSUFFICIENT_RESOURCES;
1324
1325 /* Write the correct GUID and bus type identifier, and fill the bus number */
1326 BusInfo->BusTypeGuid = GUID_BUS_TYPE_PCI;
1327 BusInfo->LegacyBusType = PCIBus;
1328 BusInfo->BusNumber = PdoExtension->ParentFdoExtension->BaseBus;
1329 return STATUS_SUCCESS;
1330 }
1331
1332 NTSTATUS
1333 NTAPI
1334 PciDetermineSlotNumber(IN PPCI_PDO_EXTENSION PdoExtension,
1335 OUT PULONG SlotNumber)
1336 {
1337 PPCI_FDO_EXTENSION ParentExtension;
1338 ULONG ResultLength;
1339 NTSTATUS Status;
1340 PSLOT_INFO SlotInfo;
1341
1342 /* Check if a $PIR from the BIOS is used (legacy IRQ routing) */
1343 ParentExtension = PdoExtension->ParentFdoExtension;
1344 DPRINT1("Slot lookup for %d.%d.%d\n",
1345 ParentExtension ? ParentExtension->BaseBus : -1,
1346 PdoExtension->Slot.u.bits.DeviceNumber,
1347 PdoExtension->Slot.u.bits.FunctionNumber);
1348 if ((PciIrqRoutingTable) && (ParentExtension))
1349 {
1350 /* Read every slot information entry */
1351 SlotInfo = &PciIrqRoutingTable->Slot[0];
1352 DPRINT1("PIR$ %p is %lx bytes, slot 0 is at: %lx\n",
1353 PciIrqRoutingTable, PciIrqRoutingTable->TableSize, SlotInfo);
1354 while (SlotInfo < (PSLOT_INFO)((ULONG_PTR)PciIrqRoutingTable +
1355 PciIrqRoutingTable->TableSize))
1356 {
1357 DPRINT1("Slot Info: %d.%d->#%d\n",
1358 SlotInfo->BusNumber,
1359 SlotInfo->DeviceNumber,
1360 SlotInfo->SlotNumber);
1361
1362 /* Check if this slot information matches the PDO being queried */
1363 if ((ParentExtension->BaseBus == SlotInfo->BusNumber) &&
1364 (PdoExtension->Slot.u.bits.DeviceNumber == SlotInfo->DeviceNumber >> 3) &&
1365 (SlotInfo->SlotNumber))
1366 {
1367 /* We found it, return it and return success */
1368 *SlotNumber = SlotInfo->SlotNumber;
1369 return STATUS_SUCCESS;
1370 }
1371
1372 /* Try the next slot */
1373 SlotInfo++;
1374 }
1375 }
1376
1377 /* Otherwise, grab the parent FDO and check if it's the root */
1378 if (PCI_IS_ROOT_FDO(ParentExtension))
1379 {
1380 /* The root FDO doesn't have a slot number */
1381 Status = STATUS_UNSUCCESSFUL;
1382 }
1383 else
1384 {
1385 /* Otherwise, query the slot/UI address/number as a device property */
1386 Status = IoGetDeviceProperty(ParentExtension->PhysicalDeviceObject,
1387 DevicePropertyUINumber,
1388 sizeof(ULONG),
1389 SlotNumber,
1390 &ResultLength);
1391 }
1392
1393 /* Return the status of this endeavour */
1394 return Status;
1395 }
1396
1397 NTSTATUS
1398 NTAPI
1399 PciGetDeviceCapabilities(IN PDEVICE_OBJECT DeviceObject,
1400 IN OUT PDEVICE_CAPABILITIES DeviceCapability)
1401 {
1402 PIRP Irp;
1403 NTSTATUS Status;
1404 KEVENT Event;
1405 PDEVICE_OBJECT AttachedDevice;
1406 PIO_STACK_LOCATION IoStackLocation;
1407 IO_STATUS_BLOCK IoStatusBlock;
1408 PAGED_CODE();
1409
1410 /* Zero out capabilities and set undefined values to start with */
1411 RtlZeroMemory(DeviceCapability, sizeof(DEVICE_CAPABILITIES));
1412 DeviceCapability->Size = sizeof(DEVICE_CAPABILITIES);
1413 DeviceCapability->Version = 1;
1414 DeviceCapability->Address = -1;
1415 DeviceCapability->UINumber = -1;
1416
1417 /* Build the wait event for the IOCTL */
1418 KeInitializeEvent(&Event, SynchronizationEvent, FALSE);
1419
1420 /* Find the device the PDO is attached to */
1421 AttachedDevice = IoGetAttachedDeviceReference(DeviceObject);
1422
1423 /* And build an IRP for it */
1424 Irp = IoBuildSynchronousFsdRequest(IRP_MJ_PNP,
1425 AttachedDevice,
1426 NULL,
1427 0,
1428 NULL,
1429 &Event,
1430 &IoStatusBlock);
1431 if (!Irp)
1432 {
1433 /* The IRP failed, fail the request as well */
1434 ObDereferenceObject(AttachedDevice);
1435 return STATUS_INSUFFICIENT_RESOURCES;
1436 }
1437
1438 /* Set default status */
1439 Irp->IoStatus.Information = 0;
1440 Irp->IoStatus.Status = STATUS_NOT_SUPPORTED;
1441
1442 /* Get a stack location in this IRP */
1443 IoStackLocation = IoGetNextIrpStackLocation(Irp);
1444 ASSERT(IoStackLocation);
1445
1446 /* Initialize it as a query capabilities IRP, with no completion routine */
1447 RtlZeroMemory(IoStackLocation, sizeof(IO_STACK_LOCATION));
1448 IoStackLocation->MajorFunction = IRP_MJ_PNP;
1449 IoStackLocation->MinorFunction = IRP_MN_QUERY_CAPABILITIES;
1450 IoStackLocation->Parameters.DeviceCapabilities.Capabilities = DeviceCapability;
1451 IoSetCompletionRoutine(Irp, NULL, NULL, FALSE, FALSE, FALSE);
1452
1453 /* Send the IOCTL to the driver */
1454 Status = IoCallDriver(AttachedDevice, Irp);
1455 if (Status == STATUS_PENDING)
1456 {
1457 /* Wait for a response and update the actual status */
1458 KeWaitForSingleObject(&Event,
1459 Executive,
1460 KernelMode,
1461 FALSE,
1462 NULL);
1463 Status = Irp->IoStatus.Status;
1464 }
1465
1466 /* Done, dereference the attached device and return the final result */
1467 ObDereferenceObject(AttachedDevice);
1468 return Status;
1469 }
1470
1471 NTSTATUS
1472 NTAPI
1473 PciQueryPowerCapabilities(IN PPCI_PDO_EXTENSION PdoExtension,
1474 IN PDEVICE_CAPABILITIES DeviceCapability)
1475 {
1476 PDEVICE_OBJECT DeviceObject;
1477 NTSTATUS Status;
1478 DEVICE_CAPABILITIES AttachedCaps;
1479 DEVICE_POWER_STATE NewPowerState, DevicePowerState, DeviceWakeLevel, DeviceWakeState;
1480 SYSTEM_POWER_STATE SystemWakeState, DeepestWakeState, CurrentState;
1481
1482 /* Nothing is known at first */
1483 DeviceWakeState = PowerDeviceUnspecified;
1484 SystemWakeState = DeepestWakeState = PowerSystemUnspecified;
1485
1486 /* Get the PCI capabilities for the parent PDO */
1487 DeviceObject = PdoExtension->ParentFdoExtension->PhysicalDeviceObject;
1488 Status = PciGetDeviceCapabilities(DeviceObject, &AttachedCaps);
1489 ASSERT(NT_SUCCESS(Status));
1490 if (!NT_SUCCESS(Status)) return Status;
1491
1492 /* Check if there's not an existing device state for S0 */
1493 if (!AttachedCaps.DeviceState[PowerSystemWorking])
1494 {
1495 /* Set D0<->S0 mapping */
1496 AttachedCaps.DeviceState[PowerSystemWorking] = PowerDeviceD0;
1497 }
1498
1499 /* Check if there's not an existing device state for S3 */
1500 if (!AttachedCaps.DeviceState[PowerSystemShutdown])
1501 {
1502 /* Set D3<->S3 mapping */
1503 AttachedCaps.DeviceState[PowerSystemShutdown] = PowerDeviceD3;
1504 }
1505
1506 /* Check for a PDO with broken, or no, power capabilities */
1507 if (PdoExtension->HackFlags & PCI_HACK_NO_PM_CAPS)
1508 {
1509 /* Unknown wake device states */
1510 DeviceCapability->DeviceWake = PowerDeviceUnspecified;
1511 DeviceCapability->SystemWake = PowerSystemUnspecified;
1512
1513 /* No device state support */
1514 DeviceCapability->DeviceD1 = FALSE;
1515 DeviceCapability->DeviceD2 = FALSE;
1516
1517 /* No waking from any low-power device state is supported */
1518 DeviceCapability->WakeFromD0 = FALSE;
1519 DeviceCapability->WakeFromD1 = FALSE;
1520 DeviceCapability->WakeFromD2 = FALSE;
1521 DeviceCapability->WakeFromD3 = FALSE;
1522
1523 /* For the rest, copy whatever the parent PDO had */
1524 RtlCopyMemory(DeviceCapability->DeviceState,
1525 AttachedCaps.DeviceState,
1526 sizeof(DeviceCapability->DeviceState));
1527 return STATUS_SUCCESS;
1528 }
1529
1530 /* The PCI Device has power capabilities, so read which ones are supported */
1531 DeviceCapability->DeviceD1 = PdoExtension->PowerCapabilities.Support.D1;
1532 DeviceCapability->DeviceD2 = PdoExtension->PowerCapabilities.Support.D2;
1533 DeviceCapability->WakeFromD0 = PdoExtension->PowerCapabilities.Support.PMED0;
1534 DeviceCapability->WakeFromD1 = PdoExtension->PowerCapabilities.Support.PMED1;
1535 DeviceCapability->WakeFromD2 = PdoExtension->PowerCapabilities.Support.PMED2;
1536
1537 /* Can the attached device wake from D3? */
1538 if (AttachedCaps.DeviceWake != PowerDeviceD3)
1539 {
1540 /* It can't, so check if this PDO supports hot D3 wake */
1541 DeviceCapability->WakeFromD3 = PdoExtension->PowerCapabilities.Support.PMED3Hot;
1542 }
1543 else
1544 {
1545 /* It can, is this the root bus? */
1546 if (PCI_IS_ROOT_FDO(PdoExtension->ParentFdoExtension))
1547 {
1548 /* This is the root bus, so just check if it supports hot D3 wake */
1549 DeviceCapability->WakeFromD3 = PdoExtension->PowerCapabilities.Support.PMED3Hot;
1550 }
1551 else
1552 {
1553 /* Take the minimums? -- need to check with briang at work */
1554 UNIMPLEMENTED;
1555 }
1556 }
1557
1558 /* Now loop each system power state to determine its device state mapping */
1559 for (CurrentState = PowerSystemWorking;
1560 CurrentState < PowerSystemMaximum;
1561 CurrentState++)
1562 {
1563 /* Read the current mapping from the attached device */
1564 DevicePowerState = AttachedCaps.DeviceState[CurrentState];
1565 NewPowerState = DevicePowerState;
1566
1567 /* The attachee suports D1, but this PDO does not */
1568 if ((NewPowerState == PowerDeviceD1) &&
1569 !(PdoExtension->PowerCapabilities.Support.D1))
1570 {
1571 /* Fall back to D2 */
1572 NewPowerState = PowerDeviceD2;
1573 }
1574
1575 /* The attachee supports D2, but this PDO does not */
1576 if ((NewPowerState == PowerDeviceD2) &&
1577 !(PdoExtension->PowerCapabilities.Support.D2))
1578 {
1579 /* Fall back to D3 */
1580 NewPowerState = PowerDeviceD3;
1581 }
1582
1583 /* Set the mapping based on the best state supported */
1584 DeviceCapability->DeviceState[CurrentState] = NewPowerState;
1585
1586 /* Check if sleep states are being processed, and a mapping was found */
1587 if ((CurrentState < PowerSystemHibernate) &&
1588 (NewPowerState != PowerDeviceUnspecified))
1589 {
1590 /* Save this state as being the deepest one found until now */
1591 DeepestWakeState = CurrentState;
1592 }
1593
1594 /*
1595 * Finally, check if the computed sleep state is within the states that
1596 * this device can wake the system from, and if it's higher or equal to
1597 * the sleep state mapping that came from the attachee, assuming that it
1598 * had a valid mapping to begin with.
1599 *
1600 * It this is the case, then make sure that the computed sleep state is
1601 * matched by the device's ability to actually wake from that state.
1602 *
1603 * For devices that support D3, the PCI device only needs Hot D3 as long
1604 * as the attachee's state is less than D3. Otherwise, if the attachee
1605 * might also be at D3, this would require a Cold D3 wake, so check that
1606 * the device actually support this.
1607 */
1608 if ((CurrentState < AttachedCaps.SystemWake) &&
1609 (NewPowerState >= DevicePowerState) &&
1610 (DevicePowerState != PowerDeviceUnspecified) &&
1611 (((NewPowerState == PowerDeviceD0) && (DeviceCapability->WakeFromD0)) ||
1612 ((NewPowerState == PowerDeviceD1) && (DeviceCapability->WakeFromD1)) ||
1613 ((NewPowerState == PowerDeviceD2) && (DeviceCapability->WakeFromD2)) ||
1614 ((NewPowerState == PowerDeviceD3) &&
1615 (PdoExtension->PowerCapabilities.Support.PMED3Hot) &&
1616 ((DevicePowerState < PowerDeviceD3) ||
1617 (PdoExtension->PowerCapabilities.Support.PMED3Cold)))))
1618 {
1619 /* The mapping is valid, so this will be the lowest wake state */
1620 SystemWakeState = CurrentState;
1621 DeviceWakeState = NewPowerState;
1622 }
1623 }
1624
1625 /* Read the current wake level */
1626 DeviceWakeLevel = PdoExtension->PowerState.DeviceWakeLevel;
1627
1628 /* Check if the attachee's wake levels are valid, and the PDO's is higher */
1629 if ((AttachedCaps.SystemWake != PowerSystemUnspecified) &&
1630 (AttachedCaps.DeviceWake != PowerDeviceUnspecified) &&
1631 (DeviceWakeLevel != PowerDeviceUnspecified) &&
1632 (DeviceWakeLevel >= AttachedCaps.DeviceWake))
1633 {
1634 /* Inherit the system wake from the attachee, and this PDO's wake level */
1635 DeviceCapability->SystemWake = AttachedCaps.SystemWake;
1636 DeviceCapability->DeviceWake = DeviceWakeLevel;
1637
1638 /* Now check if the wake level is D0, but the PDO doesn't support it */
1639 if ((DeviceCapability->DeviceWake == PowerDeviceD0) &&
1640 !(DeviceCapability->WakeFromD0))
1641 {
1642 /* Bump to D1 */
1643 DeviceCapability->DeviceWake = PowerDeviceD1;
1644 }
1645
1646 /* Now check if the wake level is D1, but the PDO doesn't support it */
1647 if ((DeviceCapability->DeviceWake == PowerDeviceD1) &&
1648 !(DeviceCapability->WakeFromD1))
1649 {
1650 /* Bump to D2 */
1651 DeviceCapability->DeviceWake = PowerDeviceD2;
1652 }
1653
1654 /* Now check if the wake level is D2, but the PDO doesn't support it */
1655 if ((DeviceCapability->DeviceWake == PowerDeviceD2) &&
1656 !(DeviceCapability->WakeFromD2))
1657 {
1658 /* Bump it to D3 */
1659 DeviceCapability->DeviceWake = PowerDeviceD3;
1660 }
1661
1662 /* Now check if the wake level is D3, but the PDO doesn't support it */
1663 if ((DeviceCapability->DeviceWake == PowerDeviceD3) &&
1664 !(DeviceCapability->WakeFromD3))
1665 {
1666 /* Then no valid wake state exists */
1667 DeviceCapability->DeviceWake = PowerDeviceUnspecified;
1668 DeviceCapability->SystemWake = PowerSystemUnspecified;
1669 }
1670
1671 /* Check if no valid wake state was found */
1672 if ((DeviceCapability->DeviceWake == PowerDeviceUnspecified) ||
1673 (DeviceCapability->SystemWake == PowerSystemUnspecified))
1674 {
1675 /* Check if one was computed earlier */
1676 if ((SystemWakeState != PowerSystemUnspecified) &&
1677 (DeviceWakeState != PowerDeviceUnspecified))
1678 {
1679 /* Use the wake state that had been computed earlier */
1680 DeviceCapability->DeviceWake = DeviceWakeState;
1681 DeviceCapability->SystemWake = SystemWakeState;
1682
1683 /* If that state was D3, then the device supports Hot/Cold D3 */
1684 if (DeviceWakeState == PowerDeviceD3) DeviceCapability->WakeFromD3 = TRUE;
1685 }
1686 }
1687
1688 /*
1689 * Finally, check for off states (lower than S3, such as hibernate) and
1690 * make sure that the device both supports waking from D3 as well as
1691 * supports a Cold wake
1692 */
1693 if ((DeviceCapability->SystemWake > PowerSystemSleeping3) &&
1694 ((DeviceCapability->DeviceWake != PowerDeviceD3) ||
1695 !(PdoExtension->PowerCapabilities.Support.PMED3Cold)))
1696 {
1697 /* It doesn't, so pick the computed lowest wake state from earlier */
1698 DeviceCapability->SystemWake = DeepestWakeState;
1699 }
1700
1701 /* Set the PCI Specification mandated maximum latencies for transitions */
1702 DeviceCapability->D1Latency = 0;
1703 DeviceCapability->D2Latency = 2;
1704 DeviceCapability->D3Latency = 100;
1705
1706 /* Sanity check */
1707 ASSERT(DeviceCapability->DeviceState[PowerSystemWorking] == PowerDeviceD0);
1708 }
1709 else
1710 {
1711 /* No valid sleep states, no latencies to worry about */
1712 DeviceCapability->D1Latency = 0;
1713 DeviceCapability->D2Latency = 0;
1714 DeviceCapability->D3Latency = 0;
1715 }
1716
1717 /* This function always succeeds, even without power management support */
1718 return STATUS_SUCCESS;
1719 }
1720
1721 NTSTATUS
1722 NTAPI
1723 PciQueryCapabilities(IN PPCI_PDO_EXTENSION PdoExtension,
1724 IN OUT PDEVICE_CAPABILITIES DeviceCapability)
1725 {
1726 NTSTATUS Status;
1727
1728 /* A PDO ID is never unique, and its address is its function and device */
1729 DeviceCapability->UniqueID = FALSE;
1730 DeviceCapability->Address = PdoExtension->Slot.u.bits.FunctionNumber |
1731 (PdoExtension->Slot.u.bits.DeviceNumber << 16);
1732
1733 /* Check for host bridges */
1734 if ((PdoExtension->BaseClass == PCI_CLASS_BRIDGE_DEV) &&
1735 (PdoExtension->SubClass == PCI_SUBCLASS_BR_HOST))
1736 {
1737 /* Raw device opens to a host bridge are acceptable */
1738 DeviceCapability->RawDeviceOK = TRUE;
1739 }
1740 else
1741 {
1742 /* Otherwise, other PDOs cannot be directly opened */
1743 DeviceCapability->RawDeviceOK = FALSE;
1744 }
1745
1746 /* PCI PDOs are pretty fixed things */
1747 DeviceCapability->LockSupported = FALSE;
1748 DeviceCapability->EjectSupported = FALSE;
1749 DeviceCapability->Removable = FALSE;
1750 DeviceCapability->DockDevice = FALSE;
1751
1752 /* The slot number is stored as a device property, go query it */
1753 PciDetermineSlotNumber(PdoExtension, &DeviceCapability->UINumber);
1754
1755 /* Finally, query and power capabilities and convert them for PnP usage */
1756 Status = PciQueryPowerCapabilities(PdoExtension, DeviceCapability);
1757
1758 /* Dump the capabilities if it all worked, and return the status */
1759 if (NT_SUCCESS(Status)) PciDebugDumpQueryCapabilities(DeviceCapability);
1760 return Status;
1761 }
1762
1763 PCM_PARTIAL_RESOURCE_DESCRIPTOR
1764 NTAPI
1765 PciNextPartialDescriptor(PCM_PARTIAL_RESOURCE_DESCRIPTOR CmDescriptor)
1766 {
1767 PCM_PARTIAL_RESOURCE_DESCRIPTOR NextDescriptor;
1768
1769 /* Assume the descriptors are the fixed size ones */
1770 NextDescriptor = CmDescriptor + 1;
1771
1772 /* But check if this is actually a variable-sized descriptor */
1773 if (CmDescriptor->Type == CmResourceTypeDeviceSpecific)
1774 {
1775 /* Add the size of the variable section as well */
1776 NextDescriptor = (PVOID)((ULONG_PTR)NextDescriptor +
1777 CmDescriptor->u.DeviceSpecificData.DataSize);
1778 }
1779
1780 /* Now the correct pointer has been computed, return it */
1781 return NextDescriptor;
1782 }
1783
1784 /* EOF */