reactos/drivers/dd/bootvid/pixelsup_i386.S

   1 /* $Id: pixelsup_i386.S,v 1.1 2003/08/24 12:11:13 dwelch Exp $
   2  *
   3  * COPYRIGHT:       See COPYING in the top level directory
   4  * PROJECT:         ReactOS kernel
   5  * FILE:            ntoskrnl/inbv/i386/pixelsup.S
   6  * PURPOSE:         Boot video support
   7  * PROGRAMMER:      Casper S. Hornstrup (chorns@users.sourceforge.net)
   8  */
   9
  10 /*
  11  * VOID
  12  * InbvPutPixels(int x, int y, unsigned long c);
  13  *
  14  * Will put 4 pixels on the screen at
  15  * (x+0*8,y), (x+1*8,y), (x+2*8,y), and (x+3*8,y)
  16  * c will contain:
  17  * bits  0- 3: Palette index for pixel at (x+0*8,y)
  18  * bits  8-11: Palette index for pixel at (x+1*8,y)
  19  * bits 16-19: Palette index for pixel at (x+2*8,y)
  20  * bits 24-27: Palette index for pixel at (x+3*8,y)
  21  *
  22  * Parameters:
  23  *   [EBP+08h] - x X-coordinate of first pixel
  24  *   [ESP+0Ch] - y Y-coordinate of first pixel
  25  *   [ESP+10h] - c 4*4-bit color indices
  26  */
  27 .globl _InbvPutPixels
  28 _InbvPutPixels:
  29         pushl   %ebp
  30         movl    %esp, %ebp
  31
  32   /* Compute mask and put it in EBX
  33      mask = maskbit[x] */
  34   movl  0x8(%ebp), %esi
  35   movl  _maskbit(,%esi, 4), %ebx
  36
  37   /* Don't set bit mask if it is already set */
  38   cmpl  (inbv_last_mask),%ebx
  39   je  .nomask
  40
  41   /* Set Mask Bit Register
  42      WRITE_PORT_UCHAR((PUCHAR)0x3ce,0x08);
  43      WRITE_PORT_UCHAR((PUCHAR)0x3cf,mask); */
  44   movl  %ebx,(inbv_last_mask)
  45   movw  $0x3ce,%dx
  46   movb  $0x08,%al
  47   outb  %al,%dx
  48   movw  $0x3cf,%dx
  49   movb  %bl,%al
  50   outb  %al,%dx
  51
  52 .nomask:
  53
  54   /* Compute offset in video memory and put it in EBX
  55      offset = (x >> 3) + y80[y]; */
  56   movl  0xC(%ebp), %esi   /* y */
  57   movl  _y80(,%esi, 4), %ebx
  58   movl  0x8(%ebp), %eax   /* x */
  59   shrl  $0x3, %eax
  60   addl  %eax, %ebx
  61
  62   /* Latch first byte
  63     (UCHAR) READ_REGISTER_UCHAR(vidmem + offset+0); */
  64   movl  (_vidmem), %esi
  65   addl  %ebx, %esi
  66   movb  0x0(%esi), %bl
  67   /* Write color index for first pixel
  68      *((PUCHAR)(vidmem + offset+0)) = (c >> 0*8) & 0xff; */
  69   movl  0x10(%ebp), %eax
  70   movb  %al, 0x0(%esi)
  71
  72   /* Latch second byte
  73     (UCHAR) READ_REGISTER_UCHAR(vidmem + offset+1); */
  74   movb  0x1(%esi), %bl
  75   /* Write color index for second pixel
  76      *((PUCHAR)(vidmem + offset+1)) = (c >> 1*8) & 0xff; */
  77   shrl  $0x8, %eax
  78   movb  %al, 0x1(%esi)
  79
  80   /* Latch third byte
  81     (UCHAR) READ_REGISTER_UCHAR(vidmem + offset+2); */
  82   movb  0x2(%esi), %bl
  83   /* Write color index for third pixel
  84      *((PUCHAR)(vidmem + offset+2)) = (c >> 2*8) & 0xff; */
  85   shrl  $0x8, %eax
  86   movb  %al, 0x2(%esi)
  87
  88   /* Latch fourth byte
  89     (UCHAR) READ_REGISTER_UCHAR(vidmem + offset+3); */
  90   movb  0x3(%esi), %bl
  91   /* Write color index for fourth pixel
  92      *((PUCHAR)(vidmem + offset+3)) = (c >> 3*8) & 0xff; */
  93   shrl  $0x8, %eax
  94   movb  %al, 0x3(%esi)
  95
  96   popl  %ebp
  97         ret
  98
  99 .bss
 100 inbv_last_mask:
 101         .short 0