minor corrections by M.Taguchi
[reactos.git] / reactos / drivers / dd / floppy / floppy.h
1 //
2 // Floppy register definitions
3 //
4
5 #define FLOPPY_REG_DOR 0x0002
6 #define FLOPPY_DOR_ENABLE 0x04
7 #define FLOPPY_DOR_DMA 0x08
8 #define FLOPPY_DOR_MOTOR0 0x10
9 #define FLOPPY_DOR_MOTOR1 0x20
10 #define FLOPPY_DRIVE0_ON ( FLOPPY_DOR_ENABLE | FLOPPY_DOR_DMA | FLOPPY_DOR_MOTOR0 )
11 #define FLOPPY_DRIVE1_ON ( FLOPPY_DOR_ENABLE | FLOPPY_DOR_DMA | FLOPPY_DOR_MOTOR1 | 1 )
12 #define FLOPPY_REG_MSTAT 0x0004
13 #define FLOPPY_MS_DRV0BUSY 0x01
14 #define FLOPPY_MS_DRV1BUSY 0x02
15 #define FLOPPY_MS_DRV2BUSY 0x04
16 #define FLOPPY_MS_DRV3BUSY 0x08
17 #define FLOPPY_MS_FDCBUSY 0x10
18 #define FLOPPY_MS_DMAMODE 0x20
19 #define FLOPPY_MS_DATADIR 0x40
20 #define FLOPPY_MS_RDYMASK 0xC0
21 #define FLOPPY_MS_DATARDYW 0x80
22 #define FLOPPY_MS_DATARDYR 0xC0
23 #define FLOPPY_REG_DATA 0x0005
24 #define FLOPPY_REG_DIR 0x0007 /* READ ONLY */
25 #define FLOPPY_DI_DSKCHNG 0x80
26 #define FLOPPY_REG_CCNTL 0x0007 /* WRITE ONLY */
27 #define FLOPPY_CCNTL_1MBIT 0x03
28
29 #define FLOPPY_CMD_RD_TRK 0x02
30 #define FLOPPY_CMD_SPEC_CHARS 0x03
31 #define FLOPPY_CSC_SRT_SHIFT 4
32 #define FLOPPY_CSC_HUT_MASK 0x0f
33 #define FLOPPY_CSC_HLT_SHIFT 1
34 #define FLOPPY_CSC_NON_DMA 0x01
35 #define FLOPPY_CMD_SNS_DRV 0x04
36 #define FLOPPY_CMD_WRT_DATA 0x05
37 #define FLOPPY_CMD_RD_DATA 0x06
38 #define FLOPPY_CMD_RECAL 0x07
39 #define FLOPPY_CMD_SNS_INTR 0x08
40 #define FLOPPY_ST0_SEEKGD 0x20
41 #define FLOPPY_ST0_GDMASK 0xd8
42 #define FLOPPY_CMD_WRT_DEL 0x09
43 #define FLOPPY_CMD_RD_ID 0x0a
44 #define FLOPPY_CMD_RD_DEL 0x0c
45 #define FLOPPY_CMD_FMT_TRK 0x0d
46 #define FLOPPY_CMD_DUMP_FDC 0x0e
47 #define FLOPPY_CMD_SEEK 0x0f
48 #define FLOPPY_CMD_VERSION 0x10
49 #define FLOPPY_CMD_SCN_EQ 0x11
50 #define FLOPPY_CMD_PPND_RW 0x12
51 #define FLOPPY_CMD_CFG_FIFO 0x13
52 #define FLOPPY_CMD_LCK_FIFO 0x14
53 #define FLOPPY_CMD_PARTID 0x18
54 #define FLOPPY_CMD_SCN_LE 0x19
55 #define FLOPPY_CMD_SCN_GE 0x1d
56 #define FLOPPY_CMD_CFG_PWR 0x27
57 #define FLOPPY_CMD_SAVE_FDC 0x2e
58 #define FLOPPY_CMD_FMT_ISO 0x33
59 #define FLOPPY_CMD_DMA_READ 0x46
60 #define FLOPPY_CMD_DMA_WRT 0x4a
61 #define FLOPPY_CMD_REST_FDC 0x4e
62 #define FLOPPY_CMD_DRV_SPEC 0x8e
63 #define FLOPPY_CMD_RSEEK_OUT 0x8f
64 #define FLOPPY_CMD_ULK_FIFO 0x94
65 #define FLOPPY_CMD_RSEEK_IN 0xcf
66 #define FLOPPY_CMD_FMT_WRT 0xef
67
68 // Command Code modifiers
69 #define FLOPPY_C0M_SK 0x20
70 #define FLOPPY_C0M_MFM 0x40
71 #define FLOPPY_C0M_MT 0x80
72 #define FLOPPY_C1M_DRVMASK 0x03
73 #define FLOPPY_C1M_HEAD1 0x04
74
75 // Status code values and masks
76 #define FLOPPY_ST0_INVALID 0x80
77
78 // useful command defines
79 #define FLOPPY_CMD_READ (FLOPPY_CMD_RD_DATA | FLOPPY_C0M_SK | FLOPPY_C0M_MFM | FLOPPY_C0M_MT)
80 #define FLOPPY_CMD_WRITE (FLOPPY_CMD_WRT_DATA | FLOPPY_C0M_MFM | FLOPPY_C0M_MT)
81 #define FLOPPY_CMD_FORMAT (FLOPPY_CMD_FMT_TRK | FLOPPY_C0M_MFM)
82
83 //
84 // HAL floppy register access commands
85 //
86 #define FloppyWriteDOR(A, V) (WRITE_PORT_UCHAR((PVOID)(A) + FLOPPY_REG_DOR, (V)))
87 #define FloppyReadMSTAT(A) (READ_PORT_UCHAR((PVOID)(A) + FLOPPY_REG_MSTAT))
88 #define FloppyWriteMSTAT(A, V) (WRITE_PORT_UCHAR((PVOID)(A) + FLOPPY_REG_MSTAT, (V)))
89 #define FloppyReadDATA(A) (READ_PORT_UCHAR((PVOID)(A) + FLOPPY_REG_DATA))
90 #define FloppyWriteDATA(A, V) (WRITE_PORT_UCHAR((PVOID)(A) + FLOPPY_REG_DATA, (V)))
91 #define FloppyReadDIR(A) (READ_PORT_UCHAR((PVOID)(A) + FLOPPY_REG_DIR))
92 #define FloppyWriteCCNTL(A, V) (WRITE_PORT_UCHAR((PVOID)(A) + FLOPPY_REG_CCNTL, (V)))
93
94 typedef struct _FLOPPY_ERROR_THRESHOLDS
95 {
96 /* number of errors to be reached before aborting */
97 unsigned int Abort;
98 /* maximal number of errors permitted to read an entire track at once */
99 unsigned int ReadTrack;
100 /* maximal number of errors before a reset is tried */
101 unsigned int Reset;
102 /* maximal number of errors before a recalibrate is tried */
103 unsigned int Recal;
104 /*
105 * Threshold for reporting FDC errors to the console.
106 * Setting this to zero may flood your screen when using
107 * ultra cheap floppies ;-)
108 */
109 unsigned int Reporting;
110 } FLOPPY_ERROR_THRESHOLDS;
111
112 typedef struct _FLOPPY_MEDIA_TYPE
113 {
114 BYTE SectorSizeCode;
115 BYTE MaximumTrack;
116 BYTE Heads;
117 DWORD SectorsPerTrack;
118 ULONG BytesPerSector;
119 } FLOPPY_MEDIA_TYPE;
120
121 extern const FLOPPY_MEDIA_TYPE MediaTypes[];
122
123 #define FDP_DEBUG 0x02
124 #define FDP_SILENT_DCL_CLEAR 0x04
125 #define FDP_MSG 0x10
126 #define FDP_BROKEN_DCL 0x20
127 #define FDP_INVERTED_DCL 0x80
128
129 // time to hold reset line low
130 #define FLOPPY_RESET_TIME 50000
131 #define FLOPPY_MOTOR_SPINUP_TIME -15000000
132 #define FLOPPY_MOTOR_SPINDOWN_TIME -50000000
133 #define FLOPPY_RECAL_TIMEOUT -30000000
134
135 typedef BOOLEAN (*FloppyIsrStateRoutine)( PCONTROLLER_OBJECT Controller );
136 typedef PIO_DPC_ROUTINE FloppyDpcStateRoutine;
137
138 typedef struct _FLOPPY_DEVICE_EXTENSION
139 {
140 PCONTROLLER_OBJECT Controller;
141 CHAR DriveSelect;
142 CHAR Cyl; // current cylinder
143 ULONG MediaType; // Media type index
144 } FLOPPY_DEVICE_EXTENSION, *PFLOPPY_DEVICE_EXTENSION;
145
146 typedef struct _FLOPPY_CONTROLLER_EXTENSION
147 {
148 PKINTERRUPT Interrupt;
149 KSPIN_LOCK SpinLock;
150 ULONG Number;
151 ULONG PortBase;
152 ULONG Vector;
153 KEVENT Event; // Event set by ISR/DPC to wake DeviceEntry
154 PDEVICE_OBJECT Device; // Pointer to the primary device on this controller
155 PIRP Irp; // Current IRP
156 CHAR St0; // Status registers
157 CHAR St1;
158 CHAR St2;
159 CHAR SectorSizeCode;
160 FloppyIsrStateRoutine IsrState; // pointer to state routine handler for ISR
161 FloppyDpcStateRoutine DpcState; // pointer to state routine handler for DPC
162 CHAR MotorOn; // drive select for drive with motor on
163 KDPC MotorSpinupDpc; // DPC for motor spin up time
164 KTIMER SpinupTimer; // Timer for motor spin up time
165 KDPC MotorSpindownDpc; // DPC for motor spin down
166 PADAPTER_OBJECT AdapterObject; // Adapter object for dma
167 PVOID MapRegisterBase;
168 DWORD TransferLength; // Length of the transfer
169 } FLOPPY_CONTROLLER_EXTENSION, *PFLOPPY_CONTROLLER_EXTENSION;
170
171 typedef struct _FLOPPY_CONTROLLER_PARAMETERS
172 {
173 ULONG PortBase;
174 ULONG Vector;
175 ULONG DmaChannel;
176 KINTERRUPT_MODE InterruptMode;
177 } FLOPPY_CONTROLLER_PARAMETERS, *PFLOPPY_CONTROLLER_PARAMETERS;
178
179 #define FLOPPY_MAX_CONTROLLERS 1
180
181 VOID STDCALL
182 FloppyDpcDetectMedia(PKDPC Dpc,
183 PDEVICE_OBJECT DeviceObject,
184 PIRP Irp,
185 PVOID Context);
186 VOID STDCALL
187 FloppyDpcFailIrp(PKDPC Dpc,
188 PDEVICE_OBJECT DeviceObject,
189 PIRP Irp,
190 PVOID Context);
191
192 IO_ALLOCATION_ACTION STDCALL
193 FloppyExecuteReadWrite(PDEVICE_OBJECT DeviceObject,
194 PIRP Irp,
195 PVOID MapRegisterbase,
196 PVOID Context);
197
198 IO_ALLOCATION_ACTION STDCALL
199 FloppyExecuteSpindown(PDEVICE_OBJECT DeviceObject,
200 PIRP Irp,
201 PVOID MapRegisterbase,
202 PVOID Context);
203
204 VOID STDCALL
205 FloppyMotorSpinupDpc(PKDPC Dpc,
206 PVOID Context,
207 PVOID Arg1,
208 PVOID Arg2);
209
210 VOID STDCALL
211 FloppySeekDpc(PKDPC Dpc,
212 PDEVICE_OBJECT DeviceObject,
213 PIRP Irp,
214 PVOID Context);
215
216 VOID STDCALL
217 FloppyMotorSpindownDpc(PKDPC Dpc,
218 PVOID Context,
219 PVOID Arg1,
220 PVOID Arg2);
221
222 VOID STDCALL
223 FloppyDpcDetect(PKDPC Dpc,
224 PDEVICE_OBJECT DeviceObject,
225 PIRP Irp,
226 PVOID Context );
227
228 VOID STDCALL
229 FloppyDpcReadWrite(PKDPC Dpc,
230 PDEVICE_OBJECT DeviceObject,
231 PIRP Irp,
232 PVOID Context);
233
234 VOID STDCALL
235 FloppyDpc(PKDPC Dpc,
236 PDEVICE_OBJECT DeviceObject,
237 PIRP Irp,
238 PVOID Context);
239
240 BOOLEAN FloppyIsrDetect( PCONTROLLER_OBJECT Controller );
241
242 BOOLEAN FloppyIsrReadWrite( PCONTROLLER_OBJECT Controller );
243
244 BOOLEAN FloppyIsrUnexpected( PCONTROLLER_OBJECT Controller );
245
246 BOOLEAN FloppyIsrDetectMedia( PCONTROLLER_OBJECT Controller );
247
248 BOOLEAN FloppyIsrRecal( PCONTROLLER_OBJECT Controller );
249
250 BOOLEAN STDCALL
251 FloppyIsr(PKINTERRUPT Interrupt,
252 PVOID ServiceContext);
253
254 IO_ALLOCATION_ACTION STDCALL
255 FloppyAdapterControl(PDEVICE_OBJECT DeviceObject,
256 PIRP Irp,
257 PVOID MapRegisterBase,
258 PVOID Context);