reactos/drivers/storage/ide/uniata/uata_ctl.h

   1 /*++
   2
   3 Copyright (c) 2004-2005 Alexandr A. Telyatnikov (Alter)
   4
   5 Module Name:
   6     uata_ctl.h
   7
   8 Abstract:
   9     This header contains definitions for private UniATA SRB_IOCTL.
  10
  11 Author:
  12     Alexander A. Telyatnikov (Alter)
  13
  14 Environment:
  15     kernel mode only
  16
  17 Notes:
  18
  19     THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  20     IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  21     OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  22     IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  23     INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  24     NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  25     DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  26     THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27     (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  28     THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29
  30 Revision History:
  31
  32 --*/
  33
  34 #ifndef __UNIATA_IO_CONTROL_CODES__H__
  35 #define __UNIATA_IO_CONTROL_CODES__H__
  36
  37 //#include "scsi.h"
  38
  39 #pragma pack(push, 8)
  40
  41 #ifdef __cplusplus
  42 extern "C" {
  43 #endif //__cplusplus
  44
  45 #define AHCI_MAX_PORT                   32
  46 #define IDE_MAX_CHAN          8
  47 // Thanks to SATA Port Multipliers:
  48 #define IDE_MAX_LUN_PER_CHAN  16
  49 #define IDE_MAX_LUN           (AHCI_MAX_PORT*IDE_MAX_LUN_PER_CHAN)
  50
  51 #define MAX_QUEUE_STAT        8
  52
  53 #define UNIATA_COMM_PORT_VENDOR_STR "UNIATA  " "Management Port " UNIATA_VER_STR
  54
  55 #ifndef UNIATA_CORE
  56
  57 #define IOCTL_SCSI_MINIPORT_UNIATA_FIND_DEVICES    ((FILE_DEVICE_SCSI << 16) + 0x09a0)
  58 #define IOCTL_SCSI_MINIPORT_UNIATA_DELETE_DEVICE   ((FILE_DEVICE_SCSI << 16) + 0x09a1)
  59 #define IOCTL_SCSI_MINIPORT_UNIATA_SET_MAX_MODE    ((FILE_DEVICE_SCSI << 16) + 0x09a2)
  60 #define IOCTL_SCSI_MINIPORT_UNIATA_GET_MODE        ((FILE_DEVICE_SCSI << 16) + 0x09a3)
  61 #define IOCTL_SCSI_MINIPORT_UNIATA_ADAPTER_INFO    ((FILE_DEVICE_SCSI << 16) + 0x09a4)
  62 //#define IOCTL_SCSI_MINIPORT_UNIATA_LUN_IDENT       ((FILE_DEVICE_SCSI << 16) + 0x09a5) -> IOCTL_SCSI_MINIPORT_IDENTIFY
  63 #define IOCTL_SCSI_MINIPORT_UNIATA_RESETBB         ((FILE_DEVICE_SCSI << 16) + 0x09a5)
  64 #define IOCTL_SCSI_MINIPORT_UNIATA_RESET_DEVICE    ((FILE_DEVICE_SCSI << 16) + 0x09a6)
  65 #define IOCTL_SCSI_MINIPORT_UNIATA_REG_IO          ((FILE_DEVICE_SCSI << 16) + 0x09a7)
  66
  67 typedef struct _ADDREMOVEDEV {
  68     ULONG WaitForPhysicalLink; // us
  69     ULONG Flags;
  70
  71 #define UNIATA_REMOVE_FLAGS_HIDE   0x01
  72 #define UNIATA_ADD_FLAGS_UNHIDE    0x01
  73
  74 } ADDREMOVEDEV, *PADDREMOVEDEV;
  75
  76 typedef struct _SETTRANSFERMODE {
  77     ULONG MaxMode;
  78     ULONG OrigMode;
  79     BOOLEAN ApplyImmediately;
  80     UCHAR Reserved[3];
  81 } SETTRANSFERMODE, *PSETTRANSFERMODE;
  82
  83 typedef struct _GETTRANSFERMODE {
  84     ULONG MaxMode;
  85     ULONG OrigMode;
  86     ULONG CurrentMode;
  87     ULONG Reserved;
  88 } GETTRANSFERMODE, *PGETTRANSFERMODE;
  89
  90 typedef struct _CHANINFO {
  91     ULONG               MaxTransferMode; // may differ from Controller's value due to 40-pin cable
  92     ULONG               ChannelCtrlFlags;
  93 //#ifdef QUEUE_STATISTICS
  94     LONGLONG QueueStat[MAX_QUEUE_STAT];
  95     LONGLONG ReorderCount;
  96     LONGLONG IntersectCount;
  97     LONGLONG TryReorderCount;
  98     LONGLONG TryReorderHeadCount;
  99     LONGLONG TryReorderTailCount; /* in-order requests */
 100 //#endif //QUEUE_STATISTICS
 101 } CHANINFO, *PCHANINFO;
 102
 103 typedef struct _ADAPTERINFO {
 104     // Device identification
 105     ULONG HeaderLength;
 106     ULONG DevID;
 107     ULONG RevID;
 108     ULONG slotNumber;
 109     ULONG SystemIoBusNumber;
 110     ULONG DevIndex;
 111
 112     ULONG Channel;
 113
 114     ULONG   HbaCtrlFlags;
 115     BOOLEAN simplexOnly;
 116     BOOLEAN MemIo;
 117     BOOLEAN UnknownDev;
 118     BOOLEAN MasterDev;
 119
 120     ULONG   MaxTransferMode;
 121     ULONG   HwFlags;
 122     ULONG   OrigAdapterInterfaceType;
 123
 124     CHAR    DeviceName[64];
 125
 126     ULONG BusInterruptLevel;    // Interrupt level
 127     ULONG InterruptMode;        // Interrupt Mode (Level or Edge)
 128     ULONG BusInterruptVector;
 129     // Number of channels being supported by one instantiation
 130     // of the device extension. Normally (and correctly) one, but
 131     // with so many broken PCI IDE controllers being sold, we have
 132     // to support them.
 133     ULONG NumberChannels;
 134
 135     BOOLEAN ChanInfoValid;
 136     CHAR    Reserved[3];
 137
 138     ULONG   AdapterInterfaceType;
 139
 140     CHANINFO Chan[AHCI_MAX_PORT];
 141
 142 } ADAPTERINFO, *PADAPTERINFO;
 143
 144 #ifdef USER_MODE
 145
 146 typedef enum _INTERFACE_TYPE {
 147     InterfaceTypeUndefined = -1,
 148     Internal,
 149     Isa,
 150     Eisa,
 151     MicroChannel,
 152     TurboChannel,
 153     PCIBus,
 154     VMEBus,
 155     NuBus,
 156     PCMCIABus,
 157     CBus,
 158     MPIBus,
 159     MPSABus,
 160     ProcessorInternal,
 161     InternalPowerBus,
 162     PNPISABus,
 163     MaximumInterfaceType
 164 } INTERFACE_TYPE, *PINTERFACE_TYPE;
 165
 166 typedef struct _PCI_SLOT_NUMBER {
 167     union {
 168         struct {
 169             ULONG   DeviceNumber:5;
 170             ULONG   FunctionNumber:3;
 171             ULONG   Reserved:24;
 172         } bits;
 173         ULONG   AsULONG;
 174     } u;
 175 } PCI_SLOT_NUMBER, *PPCI_SLOT_NUMBER;
 176
 177 #endif
 178
 179 #ifndef ATA_FLAGS_DRDY_REQUIRED
 180
 181 //The ATA_PASS_THROUGH_DIRECT structure is used in conjunction with an IOCTL_ATA_PASS_THROUGH_DIRECT request to instruct the port driver to send an embedded ATA command to the target device.
 182
 183 typedef struct _ATA_PASS_THROUGH_DIRECT {
 184   USHORT  Length;
 185   USHORT  AtaFlags;
 186   UCHAR  PathId;
 187   UCHAR  TargetId;
 188   UCHAR  Lun;
 189   UCHAR  ReservedAsUchar;
 190   ULONG  DataTransferLength;
 191   ULONG  TimeOutValue;
 192   ULONG  ReservedAsUlong;
 193   PVOID  DataBuffer;
 194   UCHAR  PreviousTaskFile[8];
 195   UCHAR  CurrentTaskFile[8];
 196 } ATA_PASS_THROUGH_DIRECT, *PATA_PASS_THROUGH_DIRECT;
 197
 198 #define    ATA_FLAGS_DRDY_REQUIRED 0x01 // Wait for DRDY status from the device before sending the command to the device.
 199 #define    ATA_FLAGS_DATA_OUT      0x02 // Write data to the device.
 200 #define    ATA_FLAGS_DATA_IN       0x04 // Read data from the device.
 201 #define    ATA_FLAGS_48BIT_COMMAND 0x08 // The ATA command to be send uses the 48 bit LBA feature set.
 202                                         //   When this flag is set, the contents of the PreviousTaskFile member in the
 203                                         //   ATA_PASS_THROUGH_DIRECT structure should be valid.
 204
 205 #endif //ATA_FLAGS_DRDY_REQUIRED
 206
 207 #pragma pack(1)
 208 typedef struct _IDEREGS_EX {
 209         UCHAR    bFeaturesReg;           // Used for specifying SMART "commands".
 210         UCHAR    bSectorCountReg;        // IDE sector count register
 211         UCHAR    bSectorNumberReg;       // IDE sector number register
 212         UCHAR    bCylLowReg;             // IDE low order cylinder value
 213         UCHAR    bCylHighReg;            // IDE high order cylinder value
 214         UCHAR    bDriveHeadReg;          // IDE drive/head register
 215         UCHAR    bCommandReg;            // Actual IDE command.
 216         UCHAR    bOpFlags;               // 00 - send
 217                                          // 01 - read regs
 218                                          // 08 - lba48
 219                                          // 10 - treat timeout as msec
 220
 221 #define UNIATA_SPTI_EX_SND               0x00
 222 #define UNIATA_SPTI_EX_RCV               0x01
 223 #define UNIATA_SPTI_EX_LBA48             0x08
 224 #define UNIATA_SPTI_EX_SPEC_TO           0x10
 225 //#define UNIATA_SPTI_EX_FREEZE_TO         0x20 // do not reset device on timeout and keep interrupts disabled
 226 #define UNIATA_SPTI_EX_USE_DMA           0x20 // Force DMA transfer mode
 227
 228         UCHAR    bFeaturesRegH;          // feature (high part for LBA48 mode)
 229         UCHAR    bSectorCountRegH;       // IDE sector count register (high part for LBA48 mode)
 230         UCHAR    bSectorNumberRegH;      // IDE sector number register (high part for LBA48 mode)
 231         UCHAR    bCylLowRegH;            // IDE low order cylinder value (high part for LBA48 mode)
 232         UCHAR    bCylHighRegH;           // IDE high order cylinder value (high part for LBA48 mode)
 233         UCHAR    bReserved2;             // 0
 234 } IDEREGS_EX, *PIDEREGS_EX, *LPIDEREGS_EX;
 235
 236 typedef struct _UNIATA_REG_IO {
 237     USHORT RegIDX;
 238     UCHAR  RegSz:3;   // 0=1, 1=2, 2=4, 3=1+1 (for lba48) 4=2+2 (for lba48)
 239     UCHAR  InOut:1;   // 0=in, 1=out
 240     UCHAR  Reserved:4;
 241     UCHAR  Reserved1;
 242     union {
 243         ULONG  Data;
 244         ULONG  d32;
 245         USHORT d16[2];
 246         USHORT d8[2];
 247     };
 248 } UNIATA_REG_IO, *PUNIATA_REG_IO;
 249
 250 typedef struct _UNIATA_REG_IO_HDR {
 251     ULONG          ItemCount;
 252     UNIATA_REG_IO  r[1];
 253 } UNIATA_REG_IO_HDR, *PUNIATA_REG_IO_HDR;
 254 #pragma pack()
 255
 256 typedef struct _UNIATA_CTL {
 257     SRB_IO_CONTROL hdr;
 258     SCSI_ADDRESS   addr;
 259     union {
 260         UCHAR                   RawData[1];
 261         ADDREMOVEDEV            FindDelDev;
 262         SETTRANSFERMODE         SetMode;
 263         GETTRANSFERMODE         GetMode;
 264         ADAPTERINFO             AdapterInfo;
 265 //        IDENTIFY_DATA2        LunIdent;
 266 //        ATA_PASS_THROUGH_DIRECT AtaDirect;
 267         UNIATA_REG_IO_HDR       RegIo;
 268     };
 269 } UNIATA_CTL, *PUNIATA_CTL;
 270
 271 #endif //UNIATA_CORE
 272
 273 #ifdef __cplusplus
 274 };
 275 #endif //__cplusplus
 276
 277 #pragma pack(pop)
 278
 279 #endif //__UNIATA_IO_CONTROL_CODES__H__