2 * OHCI HCD (Host Controller Driver) for USB.
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
7 * This file is licenced under the GPL.
10 /*-------------------------------------------------------------------------*/
14 #define edstring(ed_type) ({ char *temp; \
16 case PIPE_CONTROL: temp = "ctrl"; break; \
17 case PIPE_BULK: temp = "bulk"; break; \
18 case PIPE_INTERRUPT: temp = "intr"; break; \
19 default: temp = "isoc"; break; \
21 #define pipestring(pipe) edstring(usb_pipetype(pipe))
23 /* debug| print the main components of an URB
24 * small: 0) header + data packets 1) just header
26 static void __attribute__((unused
))
27 urb_print (struct urb
* urb
, char * str
, int small
)
29 unsigned int pipe
= urb
->pipe
;
31 if (!urb
->dev
|| !urb
->dev
->bus
) {
32 dbg("%s URB: no dev", str
);
36 #ifndef OHCI_VERBOSE_DEBUG
39 dbg("%s %p dev=%d ep=%d%s-%s flags=%x len=%d/%d stat=%d",
42 usb_pipedevice (pipe
),
43 usb_pipeendpoint (pipe
),
44 usb_pipeout (pipe
)? "out" : "in",
48 urb
->transfer_buffer_length
,
51 #ifdef OHCI_VERBOSE_DEBUG
55 if (usb_pipecontrol (pipe
)) {
56 printk (KERN_DEBUG __FILE__
": setup(8):");
57 for (i
= 0; i
< 8 ; i
++)
58 printk (" %02x", ((__u8
*) urb
->setup_packet
) [i
]);
61 if (urb
->transfer_buffer_length
> 0 && urb
->transfer_buffer
) {
62 printk (KERN_DEBUG __FILE__
": data(%d/%d):",
64 urb
->transfer_buffer_length
);
65 len
= usb_pipeout (pipe
)?
66 urb
->transfer_buffer_length
: urb
->actual_length
;
67 for (i
= 0; i
< 16 && i
< len
; i
++)
68 printk (" %02x", ((__u8
*) urb
->transfer_buffer
) [i
]);
69 printk ("%s stat:%d\n", i
< len
? "...": "", urb
->status
);
75 #define ohci_dbg_sw(ohci, next, size, format, arg...) \
79 s_len = snprintf (*next, *size, format, ## arg ); \
80 *size -= s_len; *next += s_len; \
82 ohci_dbg(ohci,format, ## arg ); \
86 static void ohci_dump_intr_mask (
87 struct ohci_hcd
*ohci
,
93 ohci_dbg_sw (ohci
, next
, size
, "%s 0x%08x%s%s%s%s%s%s%s%s%s\n",
96 (mask
& OHCI_INTR_MIE
) ? " MIE" : "",
97 (mask
& OHCI_INTR_OC
) ? " OC" : "",
98 (mask
& OHCI_INTR_RHSC
) ? " RHSC" : "",
99 (mask
& OHCI_INTR_FNO
) ? " FNO" : "",
100 (mask
& OHCI_INTR_UE
) ? " UE" : "",
101 (mask
& OHCI_INTR_RD
) ? " RD" : "",
102 (mask
& OHCI_INTR_SF
) ? " SF" : "",
103 (mask
& OHCI_INTR_WDH
) ? " WDH" : "",
104 (mask
& OHCI_INTR_SO
) ? " SO" : ""
108 static void maybe_print_eds (
109 struct ohci_hcd
*ohci
,
116 ohci_dbg_sw (ohci
, next
, size
, "%s %08x\n", label
, value
);
119 static char *hcfs2string (int state
)
122 case OHCI_USB_RESET
: return "reset";
123 case OHCI_USB_RESUME
: return "resume";
124 case OHCI_USB_OPER
: return "operational";
125 case OHCI_USB_SUSPEND
: return "suspend";
130 // dump control and status registers
132 ohci_dump_status (struct ohci_hcd
*controller
, char **next
, unsigned *size
)
134 struct ohci_regs
*regs
= controller
->regs
;
137 temp
= readl (®s
->revision
) & 0xff;
138 ohci_dbg_sw (controller
, next
, size
,
139 "OHCI %d.%d, %s legacy support registers\n",
140 0x03 & (temp
>> 4), (temp
& 0x0f),
141 (temp
& 0x10) ? "with" : "NO");
143 temp
= readl (®s
->control
);
144 ohci_dbg_sw (controller
, next
, size
,
145 "control 0x%03x%s%s%s HCFS=%s%s%s%s%s CBSR=%d\n",
147 (temp
& OHCI_CTRL_RWE
) ? " RWE" : "",
148 (temp
& OHCI_CTRL_RWC
) ? " RWC" : "",
149 (temp
& OHCI_CTRL_IR
) ? " IR" : "",
150 hcfs2string (temp
& OHCI_CTRL_HCFS
),
151 (temp
& OHCI_CTRL_BLE
) ? " BLE" : "",
152 (temp
& OHCI_CTRL_CLE
) ? " CLE" : "",
153 (temp
& OHCI_CTRL_IE
) ? " IE" : "",
154 (temp
& OHCI_CTRL_PLE
) ? " PLE" : "",
155 temp
& OHCI_CTRL_CBSR
158 temp
= readl (®s
->cmdstatus
);
159 ohci_dbg_sw (controller
, next
, size
,
160 "cmdstatus 0x%05x SOC=%d%s%s%s%s\n", temp
,
161 (temp
& OHCI_SOC
) >> 16,
162 (temp
& OHCI_OCR
) ? " OCR" : "",
163 (temp
& OHCI_BLF
) ? " BLF" : "",
164 (temp
& OHCI_CLF
) ? " CLF" : "",
165 (temp
& OHCI_HCR
) ? " HCR" : ""
168 ohci_dump_intr_mask (controller
, "intrstatus",
169 readl (®s
->intrstatus
), next
, size
);
170 ohci_dump_intr_mask (controller
, "intrenable",
171 readl (®s
->intrenable
), next
, size
);
172 // intrdisable always same as intrenable
174 maybe_print_eds (controller
, "ed_periodcurrent",
175 readl (®s
->ed_periodcurrent
), next
, size
);
177 maybe_print_eds (controller
, "ed_controlhead",
178 readl (®s
->ed_controlhead
), next
, size
);
179 maybe_print_eds (controller
, "ed_controlcurrent",
180 readl (®s
->ed_controlcurrent
), next
, size
);
182 maybe_print_eds (controller
, "ed_bulkhead",
183 readl (®s
->ed_bulkhead
), next
, size
);
184 maybe_print_eds (controller
, "ed_bulkcurrent",
185 readl (®s
->ed_bulkcurrent
), next
, size
);
187 maybe_print_eds (controller
, "donehead",
188 readl (®s
->donehead
), next
, size
);
191 #define dbg_port_sw(hc,num,value,next,size) \
192 ohci_dbg_sw (hc, next, size, \
193 "roothub.portstatus [%d] " \
194 "0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
196 (temp & RH_PS_PRSC) ? " PRSC" : "", \
197 (temp & RH_PS_OCIC) ? " OCIC" : "", \
198 (temp & RH_PS_PSSC) ? " PSSC" : "", \
199 (temp & RH_PS_PESC) ? " PESC" : "", \
200 (temp & RH_PS_CSC) ? " CSC" : "", \
202 (temp & RH_PS_LSDA) ? " LSDA" : "", \
203 (temp & RH_PS_PPS) ? " PPS" : "", \
204 (temp & RH_PS_PRS) ? " PRS" : "", \
205 (temp & RH_PS_POCI) ? " POCI" : "", \
206 (temp & RH_PS_PSS) ? " PSS" : "", \
208 (temp & RH_PS_PES) ? " PES" : "", \
209 (temp & RH_PS_CCS) ? " CCS" : "" \
215 struct ohci_hcd
*controller
,
222 temp
= roothub_a (controller
);
225 ndp
= (temp
& RH_A_NDP
);
228 ohci_dbg_sw (controller
, next
, size
,
229 "roothub.a %08x POTPGT=%d%s%s%s%s%s NDP=%d\n", temp
,
230 ((temp
& RH_A_POTPGT
) >> 24) & 0xff,
231 (temp
& RH_A_NOCP
) ? " NOCP" : "",
232 (temp
& RH_A_OCPM
) ? " OCPM" : "",
233 (temp
& RH_A_DT
) ? " DT" : "",
234 (temp
& RH_A_NPS
) ? " NPS" : "",
235 (temp
& RH_A_PSM
) ? " PSM" : "",
238 temp
= roothub_b (controller
);
239 ohci_dbg_sw (controller
, next
, size
,
240 "roothub.b %08x PPCM=%04x DR=%04x\n",
242 (temp
& RH_B_PPCM
) >> 16,
245 temp
= roothub_status (controller
);
246 ohci_dbg_sw (controller
, next
, size
,
247 "roothub.status %08x%s%s%s%s%s%s\n",
249 (temp
& RH_HS_CRWE
) ? " CRWE" : "",
250 (temp
& RH_HS_OCIC
) ? " OCIC" : "",
251 (temp
& RH_HS_LPSC
) ? " LPSC" : "",
252 (temp
& RH_HS_DRWE
) ? " DRWE" : "",
253 (temp
& RH_HS_OCI
) ? " OCI" : "",
254 (temp
& RH_HS_LPS
) ? " LPS" : ""
258 for (i
= 0; i
< ndp
; i
++) {
259 temp
= roothub_portstatus (controller
, i
);
260 dbg_port_sw (controller
, i
, temp
, next
, size
);
264 static void ohci_dump (struct ohci_hcd
*controller
, int verbose
)
266 ohci_dbg (controller
, "OHCI controller state\n");
268 // dumps some of the state we know about
269 ohci_dump_status (controller
, NULL
, 0);
270 if (controller
->hcca
)
271 ohci_dbg (controller
,
272 "hcca frame #%04x\n", controller
->hcca
->frame_no
);
273 ohci_dump_roothub (controller
, 1, NULL
, 0);
276 static const char data0
[] = "DATA0";
277 static const char data1
[] = "DATA1";
279 static void ohci_dump_td (struct ohci_hcd
*ohci
, char *label
, struct td
*td
)
281 u32 tmp
= le32_to_cpup (&td
->hwINFO
);
283 ohci_dbg (ohci
, "%s td %p%s; urb %p index %d; hw next td %08x",
285 (tmp
& TD_DONE
) ? " (DONE)" : "",
287 le32_to_cpup (&td
->hwNextTD
));
288 if ((tmp
& TD_ISO
) == 0) {
289 const char *toggle
, *pid
;
292 switch (tmp
& TD_T
) {
293 case TD_T_DATA0
: toggle
= data0
; break;
294 case TD_T_DATA1
: toggle
= data1
; break;
295 case TD_T_TOGGLE
: toggle
= "(CARRY)"; break;
296 default: toggle
= "(?)"; break;
298 switch (tmp
& TD_DP
) {
299 case TD_DP_SETUP
: pid
= "SETUP"; break;
300 case TD_DP_IN
: pid
= "IN"; break;
301 case TD_DP_OUT
: pid
= "OUT"; break;
302 default: pid
= "(bad pid)"; break;
304 ohci_dbg (ohci
, " info %08x CC=%x %s DI=%d %s %s", tmp
,
305 TD_CC_GET(tmp
), /* EC, */ toggle
,
306 (tmp
& TD_DI
) >> 21, pid
,
307 (tmp
& TD_R
) ? "R" : "");
308 cbp
= le32_to_cpup (&td
->hwCBP
);
309 be
= le32_to_cpup (&td
->hwBE
);
310 ohci_dbg (ohci
, " cbp %08x be %08x (len %d)", cbp
, be
,
311 cbp
? (be
+ 1 - cbp
) : 0);
314 ohci_dbg (ohci
, " info %08x CC=%x FC=%d DI=%d SF=%04x", tmp
,
319 ohci_dbg (ohci
, " bp0 %08x be %08x",
320 le32_to_cpup (&td
->hwCBP
) & ~0x0fff,
321 le32_to_cpup (&td
->hwBE
));
322 for (i
= 0; i
< MAXPSW
; i
++) {
323 u16 psw
= le16_to_cpup (&td
->hwPSW
[i
]);
324 int cc
= (psw
>> 12) & 0x0f;
325 ohci_dbg (ohci
, " psw [%d] = %2x, CC=%x %s=%d", i
,
327 (cc
>= 0x0e) ? "OFFSET" : "SIZE",
333 /* caller MUST own hcd spinlock if verbose is set! */
334 static void __attribute__((unused
))
335 ohci_dump_ed (struct ohci_hcd
*ohci
, char *label
, struct ed
*ed
, int verbose
)
337 u32 tmp
= ed
->hwINFO
;
340 ohci_dbg (ohci
, "%s, ed %p state 0x%x type %s; next ed %08x",
342 ed
, ed
->state
, edstring (ed
->type
),
343 le32_to_cpup (&ed
->hwNextED
));
344 switch (tmp
& (ED_IN
|ED_OUT
)) {
345 case ED_OUT
: type
= "-OUT"; break;
346 case ED_IN
: type
= "-IN"; break;
347 /* else from TDs ... control */
350 " info %08x MAX=%d%s%s%s%s EP=%d%s DEV=%d", le32_to_cpu (tmp
),
351 0x03ff & (le32_to_cpu (tmp
) >> 16),
352 (tmp
& ED_DEQUEUE
) ? " DQ" : "",
353 (tmp
& ED_ISO
) ? " ISO" : "",
354 (tmp
& ED_SKIP
) ? " SKIP" : "",
355 (tmp
& ED_LOWSPEED
) ? " LOW" : "",
356 0x000f & (le32_to_cpu (tmp
) >> 7),
358 0x007f & le32_to_cpu (tmp
));
359 ohci_dbg (ohci
, " tds: head %08x %s%s tail %08x%s",
360 tmp
= le32_to_cpup (&ed
->hwHeadP
),
361 (ed
->hwHeadP
& ED_C
) ? data1
: data0
,
362 (ed
->hwHeadP
& ED_H
) ? " HALT" : "",
363 le32_to_cpup (&ed
->hwTailP
),
364 verbose
? "" : " (not listing)");
366 struct list_head
*tmp
;
368 /* use ed->td_list because HC concurrently modifies
369 * hwNextTD as it accumulates ed_donelist.
371 list_for_each (tmp
, &ed
->td_list
) {
373 td
= list_entry (tmp
, struct td
, td_list
);
374 ohci_dump_td (ohci
, " ->", td
);
380 static inline void ohci_dump (struct ohci_hcd
*controller
, int verbose
) {}
382 #undef OHCI_VERBOSE_DEBUG
386 /*-------------------------------------------------------------------------*/
388 #ifdef STUB_DEBUG_FILES
390 static inline void create_debug_files (struct ohci_hcd
*bus
) { }
391 static inline void remove_debug_files (struct ohci_hcd
*bus
) { }
395 static inline struct ohci_hcd
*dev_to_ohci (struct device
*dev
)
397 struct usb_hcd
*hcd
= dev_get_drvdata (dev
);
399 return hcd_to_ohci (hcd
);
403 show_list (struct ohci_hcd
*ohci
, char *buf
, size_t count
, struct ed
*ed
)
405 unsigned temp
, size
= count
;
410 /* print first --> last */
414 /* dump a snapshot of the bulk or control schedule */
416 u32 info
= ed
->hwINFO
;
417 u32 scratch
= cpu_to_le32p (&ed
->hwINFO
);
418 struct list_head
*entry
;
421 temp
= snprintf (buf
, size
,
422 "ed/%p %cs dev%d ep%d%s max %d %08x%s%s %s",
424 (info
& ED_LOWSPEED
) ? 'l' : 'f',
426 (scratch
>> 7) & 0xf,
427 (info
& ED_IN
) ? "in" : "out",
428 0x03ff & (scratch
>> 16),
430 (info
& ED_SKIP
) ? " s" : "",
431 (ed
->hwHeadP
& ED_H
) ? " H" : "",
432 (ed
->hwHeadP
& ED_C
) ? data1
: data0
);
436 list_for_each (entry
, &ed
->td_list
) {
439 td
= list_entry (entry
, struct td
, td_list
);
440 scratch
= cpu_to_le32p (&td
->hwINFO
);
441 cbp
= le32_to_cpup (&td
->hwCBP
);
442 be
= le32_to_cpup (&td
->hwBE
);
443 temp
= snprintf (buf
, size
,
444 "\n\ttd %p %s %d cc=%x urb %p (%08x)",
447 switch (scratch
& TD_DP
) {
448 case TD_DP_SETUP
: pid
= "setup"; break;
449 case TD_DP_IN
: pid
= "in"; break;
450 case TD_DP_OUT
: pid
= "out"; break;
451 default: pid
= "(?)"; break;
453 cbp
? (be
+ 1 - cbp
) : 0,
454 TD_CC_GET (scratch
), td
->urb
, scratch
);
459 temp
= snprintf (buf
, size
, "\n");
469 show_async (struct device
*dev
, char *buf
)
471 struct ohci_hcd
*ohci
;
475 ohci
= dev_to_ohci(dev
);
477 /* display control and bulk lists together, for simplicity */
478 spin_lock_irqsave (&ohci
->lock
, flags
);
479 temp
= show_list (ohci
, buf
, PAGE_SIZE
, ohci
->ed_controltail
);
480 temp
+= show_list (ohci
, buf
+ temp
, PAGE_SIZE
- temp
, ohci
->ed_bulktail
);
481 spin_unlock_irqrestore (&ohci
->lock
, flags
);
485 static DEVICE_ATTR (async
, S_IRUGO
, show_async
, NULL
);
488 #define DBG_SCHED_LIMIT 64
491 show_periodic (struct device
*dev
, char *buf
)
493 struct ohci_hcd
*ohci
;
494 struct ed
**seen
, *ed
;
496 unsigned temp
, size
, seen_count
;
500 if (!(seen
= kmalloc (DBG_SCHED_LIMIT
* sizeof *seen
, SLAB_ATOMIC
)))
504 ohci
= dev_to_ohci(dev
);
508 temp
= snprintf (next
, size
, "size = %d\n", NUM_INTS
);
512 /* dump a snapshot of the periodic schedule (and load) */
513 spin_lock_irqsave (&ohci
->lock
, flags
);
514 for (i
= 0; i
< NUM_INTS
; i
++) {
515 if (!(ed
= ohci
->periodic
[i
]))
518 temp
= snprintf (next
, size
, "%2d [%3d]:", i
, ohci
->load
[i
]);
523 temp
= snprintf (next
, size
, " ed%d/%p",
527 for (temp
= 0; temp
< seen_count
; temp
++) {
528 if (seen
[temp
] == ed
)
532 /* show more info the first time around */
533 if (temp
== seen_count
) {
534 u32 info
= ed
->hwINFO
;
535 u32 scratch
= cpu_to_le32p (&ed
->hwINFO
);
537 temp
= snprintf (next
, size
,
538 " (%cs dev%d%s ep%d%s"
540 (info
& ED_LOWSPEED
) ? 'l' : 'f',
542 (info
& ED_ISO
) ? " iso" : "",
543 (scratch
>> 7) & 0xf,
544 (info
& ED_IN
) ? "in" : "out",
545 0x03ff & (scratch
>> 16),
547 (info
& ED_SKIP
) ? " s" : "",
548 (ed
->hwHeadP
& ED_H
) ? " H" : "");
552 // FIXME some TD info too
554 if (seen_count
< DBG_SCHED_LIMIT
)
555 seen
[seen_count
++] = ed
;
560 /* we've seen it and what's after */
567 temp
= snprintf (next
, size
, "\n");
571 spin_unlock_irqrestore (&ohci
->lock
, flags
);
574 return PAGE_SIZE
- size
;
576 static DEVICE_ATTR (periodic
, S_IRUGO
, show_periodic
, NULL
);
579 #undef DBG_SCHED_LIMIT
582 show_registers (struct device
*dev
, char *buf
)
584 struct ohci_hcd
*ohci
;
585 struct ohci_regs
*regs
;
591 ohci
= dev_to_ohci(dev
);
596 spin_lock_irqsave (&ohci
->lock
, flags
);
598 /* dump driver info, then registers in spec order */
600 ohci_dbg_sw (ohci
, &next
, &size
,
601 "%s version " DRIVER_VERSION
"\n", hcd_name
);
603 ohci_dump_status(ohci
, &next
, &size
);
607 ohci_dbg_sw (ohci
, &next
, &size
,
608 "hcca frame 0x%04x\n", ohci
->hcca
->frame_no
);
610 /* other registers mostly affect frame timings */
611 rdata
= readl (®s
->fminterval
);
612 temp
= snprintf (next
, size
,
613 "fmintvl 0x%08x %sFSMPS=0x%04x FI=0x%04x\n",
614 rdata
, (rdata
>> 31) ? " FIT" : "",
615 (rdata
>> 16) & 0xefff, rdata
& 0xffff);
619 rdata
= readl (®s
->fmremaining
);
620 temp
= snprintf (next
, size
, "fmremaining 0x%08x %sFR=0x%04x\n",
621 rdata
, (rdata
>> 31) ? " FRT" : "",
626 rdata
= readl (®s
->periodicstart
);
627 temp
= snprintf (next
, size
, "periodicstart 0x%04x\n",
632 rdata
= readl (®s
->lsthresh
);
633 temp
= snprintf (next
, size
, "lsthresh 0x%04x\n",
639 ohci_dump_roothub (ohci
, 1, &next
, &size
);
641 spin_unlock_irqrestore (&ohci
->lock
, flags
);
643 return PAGE_SIZE
- size
;
645 static DEVICE_ATTR (registers
, S_IRUGO
, show_registers
, NULL
);
648 static inline void create_debug_files (struct ohci_hcd
*bus
)
650 device_create_file (bus
->hcd
.controller
, &dev_attr_async
);
651 device_create_file (bus
->hcd
.controller
, &dev_attr_periodic
);
652 device_create_file (bus
->hcd
.controller
, &dev_attr_registers
);
653 ohci_dbg (bus
, "created debug files\n");
656 static inline void remove_debug_files (struct ohci_hcd
*bus
)
658 device_remove_file (bus
->hcd
.controller
, &dev_attr_async
);
659 device_remove_file (bus
->hcd
.controller
, &dev_attr_periodic
);
660 device_remove_file (bus
->hcd
.controller
, &dev_attr_registers
);
665 /*-------------------------------------------------------------------------*/