Let OHCI miniport use shared code in drivers/usb/miniport/common/*, instead of duplic...
[reactos.git] / reactos / drivers / usb / miniport / usbohci / ohci-hcd.c
1 /*
2 * OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
6 *
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
11 *
12 *
13 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
14 * interfaces (though some non-x86 Intel chips use it). It supports
15 * smarter hardware than UHCI. A download link for the spec available
16 * through the http://www.usb.org website.
17 *
18 * History:
19 *
20 * 2003/02/24 show registers in sysfs (Kevin Brosius)
21 *
22 * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and
23 * bandwidth accounting; if debugging, show schedules in driverfs
24 * 2002/07/19 fixes to management of ED and schedule state.
25 * 2002/06/09 SA-1111 support (Christopher Hoover)
26 * 2002/06/01 remember frame when HC won't see EDs any more; use that info
27 * to fix urb unlink races caused by interrupt latency assumptions;
28 * minor ED field and function naming updates
29 * 2002/01/18 package as a patch for 2.5.3; this should match the
30 * 2.4.17 kernel modulo some bugs being fixed.
31 *
32 * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes
33 * from post-2.4.5 patches.
34 * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning
35 * 2001/09/07 match PCI PM changes, errnos from Linus' tree
36 * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify;
37 * pbook pci quirks gone (please fix pbook pci sw!) (db)
38 *
39 * 2001/04/08 Identify version on module load (gb)
40 * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam);
41 pci_map_single (db)
42 * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db)
43 * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam)
44 *
45 * 2000/09/26 fixed races in removing the private portion of the urb
46 * 2000/09/07 disable bulk and control lists when unlinking the last
47 * endpoint descriptor in order to avoid unrecoverable errors on
48 * the Lucent chips. (rwc@sgi)
49 * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some
50 * urb unlink probs, indentation fixes
51 * 2000/08/11 various oops fixes mostly affecting iso and cleanup from
52 * device unplugs.
53 * 2000/06/28 use PCI hotplug framework, for better power management
54 * and for Cardbus support (David Brownell)
55 * 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling
56 * when the controller loses power; handle UE; cleanup; ...
57 *
58 * v5.2 1999/12/07 URB 3rd preview,
59 * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
60 * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
61 * i386: HUB, Keyboard, Mouse, Printer
62 *
63 * v4.3 1999/10/27 multiple HCs, bulk_request
64 * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
65 * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
66 * v4.0 1999/08/18
67 * v3.0 1999/06/25
68 * v2.1 1999/05/09 code clean up
69 * v2.0 1999/05/04
70 * v1.0 1999/04/27 initial release
71 *
72 * This file is licenced under the GPL.
73 */
74
75 #if 0
76 #include <linux/config.h>
77
78 #ifdef CONFIG_USB_DEBUG
79 # define DEBUG
80 #else
81 # undef DEBUG
82 #endif
83
84
85
86 #include <linux/module.h>
87 #include <linux/pci.h>
88 #include <linux/kernel.h>
89 #include <linux/delay.h>
90 #include <linux/ioport.h>
91 #include <linux/sched.h>
92 #include <linux/slab.h>
93 #include <linux/smp_lock.h>
94 #include <linux/errno.h>
95 #include <linux/init.h>
96 #include <linux/timer.h>
97 #include <linux/list.h>
98 #include <linux/interrupt.h> /* for in_interrupt () */
99 #include <linux/usb.h>
100 #include "hcd.h"
101
102 #include <asm/io.h>
103 #include <asm/irq.h>
104 #include <asm/system.h>
105 #include <asm/unaligned.h>
106 #include <asm/byteorder.h>
107 #else
108 #include "ohci_config.h"
109
110 #include "../../usbport/hcd.h"
111
112 //#define OHCI_VERBOSE_DEBUG
113 #endif
114
115 /*
116 * TO DO:
117 *
118 * - "disabled" and "sleeping" should be in hcd->state
119 * - lots more testing!!
120 */
121
122 #define DRIVER_VERSION "2003 Feb 24"
123 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
124 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
125
126 /*-------------------------------------------------------------------------*/
127
128 // #define OHCI_VERBOSE_DEBUG /* not always helpful */
129
130 /* For initializing controller (mask in an HCFS mode too) */
131 #define OHCI_CONTROL_INIT \
132 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
133
134 #define OHCI_UNLINK_TIMEOUT (HZ / 10)
135
136 /*-------------------------------------------------------------------------*/
137
138 static const char hcd_name [] = "ohci-hcd";
139
140 #include "ohci.h"
141
142 static inline void disable (struct ohci_hcd *ohci)
143 {
144 ohci->disabled = 1;
145 ohci->hcd.state = USB_STATE_HALT;
146 }
147
148 #include "ohci-hub.c"
149 #include "ohci-dbg.c"
150 #include "ohci-mem.c"
151 #include "ohci-q.c"
152
153 /*-------------------------------------------------------------------------*/
154
155 /*
156 * queue up an urb for anything except the root hub
157 */
158 static int ohci_urb_enqueue (
159 struct usb_hcd *hcd,
160 struct urb *urb,
161 int mem_flags
162 ) {
163 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
164 struct ed *ed;
165 urb_priv_t *urb_priv;
166 unsigned int pipe = urb->pipe;
167 int i, size = 0;
168 unsigned long flags;
169 int retval = 0;
170
171 #ifdef OHCI_VERBOSE_DEBUG
172 urb_print (urb, "SUB", usb_pipein (pipe));
173 #endif
174
175 /* every endpoint has a ed, locate and maybe (re)initialize it */
176 if (! (ed = ed_get (ohci, urb->dev, pipe, urb->interval)))
177 return -ENOMEM;
178
179 /* for the private part of the URB we need the number of TDs (size) */
180 switch (ed->type) {
181 case PIPE_CONTROL:
182 /* td_submit_urb() doesn't yet handle these */
183 if (urb->transfer_buffer_length > 4096)
184 return -EMSGSIZE;
185
186 /* 1 TD for setup, 1 for ACK, plus ... */
187 size = 2;
188 /* FALLTHROUGH */
189 // case PIPE_INTERRUPT:
190 // case PIPE_BULK:
191 default:
192 /* one TD for every 4096 Bytes (can be upto 8K) */
193 size += urb->transfer_buffer_length / 4096;
194 /* ... and for any remaining bytes ... */
195 if ((urb->transfer_buffer_length % 4096) != 0)
196 size++;
197 /* ... and maybe a zero length packet to wrap it up */
198 if (size == 0)
199 size++;
200 else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
201 && (urb->transfer_buffer_length
202 % usb_maxpacket (urb->dev, pipe,
203 usb_pipeout (pipe))) == 0)
204 size++;
205 break;
206 case PIPE_ISOCHRONOUS: /* number of packets from URB */
207 size = urb->number_of_packets;
208 break;
209 }
210
211 /* allocate the private part of the URB */
212 urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
213 mem_flags);
214 if (!urb_priv)
215 return -ENOMEM;
216 memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
217
218 /* fill the private part of the URB */
219 urb_priv->length = size;
220 urb_priv->ed = ed;
221
222 /* allocate the TDs (deferring hash chain updates) */
223 for (i = 0; i < size; i++) {
224 urb_priv->td [i] = td_alloc (ohci, mem_flags);
225 if (!urb_priv->td [i]) {
226 urb_priv->length = i;
227 urb_free_priv (ohci, urb_priv);
228 return -ENOMEM;
229 }
230 }
231
232 spin_lock_irqsave (&ohci->lock, flags);
233
234 /* don't submit to a dead HC */
235 if (ohci->disabled || ohci->sleeping) {
236 retval = -ENODEV;
237 goto fail;
238 }
239
240 /* schedule the ed if needed */
241 if (ed->state == ED_IDLE) {
242 retval = ed_schedule (ohci, ed);
243 if (retval < 0)
244 goto fail;
245 if (ed->type == PIPE_ISOCHRONOUS) {
246 u16 frame = le16_to_cpu (ohci->hcca->frame_no);
247
248 /* delay a few frames before the first TD */
249 frame += max_t (u16, 8, ed->interval);
250 frame &= ~(ed->interval - 1);
251 frame |= ed->branch;
252 urb->start_frame = frame;
253
254 /* yes, only URB_ISO_ASAP is supported, and
255 * urb->start_frame is never used as input.
256 */
257 }
258 } else if (ed->type == PIPE_ISOCHRONOUS)
259 urb->start_frame = ed->last_iso + ed->interval;
260
261 /* fill the TDs and link them to the ed; and
262 * enable that part of the schedule, if needed
263 * and update count of queued periodic urbs
264 */
265 urb->hcpriv = urb_priv;
266 td_submit_urb (ohci, urb);
267
268 fail:
269 if (retval)
270 urb_free_priv (ohci, urb_priv);
271 spin_unlock_irqrestore (&ohci->lock, flags);
272 return retval;
273 }
274
275 /*
276 * decouple the URB from the HC queues (TDs, urb_priv); it's
277 * already marked using urb->status. reporting is always done
278 * asynchronously, and we might be dealing with an urb that's
279 * partially transferred, or an ED with other urbs being unlinked.
280 */
281 static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
282 {
283 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
284 unsigned long flags;
285
286 #ifdef OHCI_VERBOSE_DEBUG
287 urb_print (urb, "UNLINK", 1);
288 #endif
289
290 spin_lock_irqsave (&ohci->lock, flags);
291 if (!ohci->disabled) {
292 urb_priv_t *urb_priv;
293
294 /* Unless an IRQ completed the unlink while it was being
295 * handed to us, flag it for unlink and giveback, and force
296 * some upcoming INTR_SF to call finish_unlinks()
297 */
298 urb_priv = urb->hcpriv;
299 if (urb_priv) {
300 urb_priv->state = URB_DEL;
301 if (urb_priv->ed->state == ED_OPER)
302 start_urb_unlink (ohci, urb_priv->ed);
303 }
304 } else {
305 /*
306 * with HC dead, we won't respect hc queue pointers
307 * any more ... just clean up every urb's memory.
308 */
309 if (urb->hcpriv) {
310 spin_unlock (&ohci->lock);
311 finish_urb (ohci, urb, NULL);
312 spin_lock (&ohci->lock);
313 }
314 }
315 spin_unlock_irqrestore (&ohci->lock, flags);
316 return 0;
317 }
318
319 /*-------------------------------------------------------------------------*/
320
321 /* frees config/altsetting state for endpoints,
322 * including ED memory, dummy TD, and bulk/intr data toggle
323 */
324
325 static void
326 ohci_endpoint_disable (struct usb_hcd *hcd, struct hcd_dev *dev, int ep)
327 {
328 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
329 int epnum = ep & USB_ENDPOINT_NUMBER_MASK;
330 unsigned long flags;
331 struct ed *ed;
332
333 /* ASSERT: any requests/urbs are being unlinked */
334 /* ASSERT: nobody can be submitting urbs for this any more */
335
336 epnum <<= 1;
337 if (epnum != 0 && !(ep & USB_DIR_IN))
338 epnum |= 1;
339
340 rescan:
341 spin_lock_irqsave (&ohci->lock, flags);
342 ed = dev->ep [epnum];
343 if (!ed)
344 goto done;
345
346 if (!HCD_IS_RUNNING (ohci->hcd.state) || ohci->disabled)
347 ed->state = ED_IDLE;
348 switch (ed->state) {
349 case ED_UNLINK: /* wait for hw to finish? */
350 spin_unlock_irqrestore (&ohci->lock, flags);
351 set_current_state (TASK_UNINTERRUPTIBLE);
352 schedule_timeout (1);
353 goto rescan;
354 case ED_IDLE: /* fully unlinked */
355 if (list_empty (&ed->td_list)) {
356 td_free (ohci, ed->dummy);
357 ed_free (ohci, ed);
358 break;
359 }
360 /* else FALL THROUGH */
361 default:
362 /* caller was supposed to have unlinked any requests;
363 * that's not our job. can't recover; must leak ed.
364 */
365 ohci_err (ohci, "ed %p (#%d) state %d%s\n",
366 ed, epnum, ed->state,
367 list_empty (&ed->td_list) ? "" : "(has tds)");
368 td_free (ohci, ed->dummy);
369 break;
370 }
371 dev->ep [epnum] = 0;
372 done:
373 spin_unlock_irqrestore (&ohci->lock, flags);
374 return;
375 }
376
377 static int ohci_get_frame (struct usb_hcd *hcd)
378 {
379 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
380
381 return le16_to_cpu (ohci->hcca->frame_no);
382 }
383
384 /*-------------------------------------------------------------------------*
385 * HC functions
386 *-------------------------------------------------------------------------*/
387
388 /* reset the HC and BUS */
389
390 static int hc_reset (struct ohci_hcd *ohci)
391 {
392 u32 temp;
393
394 /* SMM owns the HC? not for long!
395 * On PA-RISC, PDC can leave IR set incorrectly; ignore it there.
396 */
397 #ifndef __hppa__
398 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
399 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
400
401 /* this timeout is arbitrary. we make it long, so systems
402 * depending on usb keyboards may be usable even if the
403 * BIOS/SMM code seems pretty broken.
404 */
405 temp = 500; /* arbitrary: five seconds */
406
407 writel (OHCI_INTR_OC, &ohci->regs->intrenable);
408 writel (OHCI_OCR, &ohci->regs->cmdstatus);
409 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
410 wait_ms (10);
411 if (--temp == 0) {
412 ohci_err (ohci, "USB HC TakeOver failed!\n");
413 return -1;
414 }
415 }
416 }
417 #endif
418
419 /* Disable HC interrupts */
420 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
421
422 ohci_dbg (ohci, "USB HC reset_hc %s: ctrl = 0x%x ;\n",
423 hcd_to_bus (&ohci->hcd)->bus_name,
424 readl (&ohci->regs->control));
425
426 /* Reset USB (needed by some controllers); RemoteWakeupConnected
427 * saved if boot firmware (BIOS/SMM/...) told us it's connected
428 */
429 ohci->hc_control = readl (&ohci->regs->control);
430 ohci->hc_control &= OHCI_CTRL_RWC; /* hcfs 0 = RESET */
431 writel (ohci->hc_control, &ohci->regs->control);
432 // flush those pci writes
433 (void) readl (&ohci->regs->control);
434 wait_ms (50);
435
436 /* HC Reset requires max 10 us delay */
437 writel (OHCI_HCR, &ohci->regs->cmdstatus);
438 temp = 30; /* ... allow extra time */
439 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
440 if (--temp == 0) {
441 ohci_err (ohci, "USB HC reset timed out!\n");
442 return -1;
443 }
444 udelay (1);
445 }
446
447 /* now we're in the SUSPEND state ... must go OPERATIONAL
448 * within 2msec else HC enters RESUME
449 *
450 * ... but some hardware won't init fmInterval "by the book"
451 * (SiS, OPTi ...), so reset again instead. SiS doesn't need
452 * this if we write fmInterval after we're OPERATIONAL.
453 */
454 writel (ohci->hc_control, &ohci->regs->control);
455 // flush those pci writes
456 (void) readl (&ohci->regs->control);
457
458 return 0;
459 }
460
461 /*-------------------------------------------------------------------------*/
462
463 #define FI 0x2edf /* 12000 bits per frame (-1) */
464 #define LSTHRESH 0x628 /* lowspeed bit threshold */
465
466 /* Start an OHCI controller, set the BUS operational
467 * enable interrupts
468 * connect the virtual root hub
469 */
470 static int hc_start (struct ohci_hcd *ohci)
471 {
472 u32 mask, tmp;
473 struct usb_device *udev;
474 struct usb_bus *bus;
475
476 spin_lock_init (&ohci->lock);
477 ohci->disabled = 1;
478 ohci->sleeping = 0;
479
480 /* Tell the controller where the control and bulk lists are
481 * The lists are empty now. */
482 writel (0, &ohci->regs->ed_controlhead);
483 writel (0, &ohci->regs->ed_bulkhead);
484
485 /* a reset clears this */
486 writel ((u32) ohci->hcca_dma, &ohci->regs->hcca);
487 usbprintk("HCCA: %p \n",ohci->regs->hcca);
488
489 /* force default fmInterval (we won't adjust it); init thresholds
490 * for last FS and LS packets, reserve 90% for periodic.
491 */
492 writel ((((6 * (FI - 210)) / 7) << 16) | FI, &ohci->regs->fminterval);
493 writel (((9 * FI) / 10) & 0x3fff, &ohci->regs->periodicstart);
494 writel (LSTHRESH, &ohci->regs->lsthresh);
495
496 /* some OHCI implementations are finicky about how they init.
497 * bogus values here mean not even enumeration could work.
498 */
499 if ((readl (&ohci->regs->fminterval) & 0x3fff0000) == 0
500 || !readl (&ohci->regs->periodicstart)) {
501 ohci_err (ohci, "init err\n");
502 return -EOVERFLOW;
503 }
504
505 /* start controller operations */
506 ohci->hc_control &= OHCI_CTRL_RWC;
507 ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
508 ohci->disabled = 0;
509 writel (ohci->hc_control, &ohci->regs->control);
510
511 /* Choose the interrupts we care about now, others later on demand */
512 mask = OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_WDH;
513 writel (mask, &ohci->regs->intrstatus);
514 writel (mask, &ohci->regs->intrenable);
515
516 /* handle root hub init quirks ... */
517 tmp = roothub_a (ohci);
518 tmp &= ~(RH_A_PSM | RH_A_OCPM);
519 if (ohci->flags & OHCI_QUIRK_SUPERIO) {
520 /* NSC 87560 and maybe others */
521 tmp |= RH_A_NOCP;
522 tmp &= ~(RH_A_POTPGT | RH_A_NPS);
523 } else {
524 /* hub power always on; required for AMD-756 and some
525 * Mac platforms, use this mode everywhere by default
526 */
527 tmp |= RH_A_NPS;
528 }
529 writel (tmp, &ohci->regs->roothub.a);
530 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
531 writel (0, &ohci->regs->roothub.b);
532 // flush those pci writes
533 (void) readl (&ohci->regs->control);
534
535 // POTPGT delay is bits 24-31, in 2 ms units.
536 mdelay (((int)(roothub_a (ohci) >> 23) & 0x1fe));
537
538 /* connect the virtual root hub */
539 bus = hcd_to_bus (&ohci->hcd);
540 bus->root_hub = udev = usb_alloc_dev (NULL, bus);
541 ohci->hcd.state = USB_STATE_READY;
542 if (!udev) {
543 disable (ohci);
544 ohci->hc_control &= ~OHCI_CTRL_HCFS;
545 writel (ohci->hc_control, &ohci->regs->control);
546 ohci_err(ohci,"out of mem");
547 return -ENOMEM;
548 }
549
550 usb_connect (udev);
551 udev->speed = USB_SPEED_FULL;
552 if (hcd_register_root (&ohci->hcd) != 0) {
553 usb_put_dev (udev);
554 bus->root_hub = NULL;
555 disable (ohci);
556 ohci->hc_control &= ~OHCI_CTRL_HCFS;
557 writel (ohci->hc_control, &ohci->regs->control);
558 return -ENODEV;
559 }
560 create_debug_files (ohci);
561 return 0;
562 }
563
564 /*-------------------------------------------------------------------------*/
565
566 /* an interrupt happens */
567
568 static
569 int ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs)
570 {
571 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
572 struct ohci_regs *regs = ohci->regs;
573 int ints;
574
575 /* we can eliminate a (slow) readl() if _only_ WDH caused this irq */
576 if ((ohci->hcca->done_head != 0)
577 && ! (le32_to_cpup (&ohci->hcca->done_head) & 0x01)) {
578 ints = OHCI_INTR_WDH;
579
580 /* cardbus/... hardware gone before remove() */
581 } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
582 disable (ohci);
583 ohci_dbg (ohci, "device removed!\n");
584 return 0;
585
586 /* interrupt for some other device? */
587 } else if ((ints &= readl (&regs->intrenable)) == 0) {
588 return 0;
589 }
590
591 if (ints & OHCI_INTR_UE) {
592 disable (ohci);
593 ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
594 // e.g. due to PCI Master/Target Abort
595
596 ohci_dump (ohci, 1);
597 hc_reset (ohci);
598 }
599
600 if (ints & OHCI_INTR_WDH) {
601 writel (OHCI_INTR_WDH, &regs->intrdisable);
602 dl_done_list (ohci, dl_reverse_done_list (ohci), ptregs);
603 writel (OHCI_INTR_WDH, &regs->intrenable);
604 }
605
606 /* could track INTR_SO to reduce available PCI/... bandwidth */
607
608 /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
609 * when there's still unlinking to be done (next frame).
610 */
611 spin_lock (&ohci->lock);
612 if (ohci->ed_rm_list)
613 finish_unlinks (ohci, le16_to_cpu (ohci->hcca->frame_no),
614 ptregs);
615 if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list)
616 writel (OHCI_INTR_SF, &regs->intrdisable);
617 spin_unlock (&ohci->lock);
618
619 writel (ints, &regs->intrstatus);
620 writel (OHCI_INTR_MIE, &regs->intrenable);
621 // flush those pci writes
622 (void) readl (&ohci->regs->control);
623 return 0;
624 }
625
626 /*-------------------------------------------------------------------------*/
627
628 // HCFS itself
629 static char *hcfs2string (int state)
630 {
631 switch (state) {
632 case OHCI_USB_RESET: return "reset";
633 case OHCI_USB_RESUME: return "resume";
634 case OHCI_USB_OPER: return "operational";
635 case OHCI_USB_SUSPEND: return "suspend";
636 }
637 return "?";
638 }
639
640 static void ohci_stop (struct usb_hcd *hcd)
641 {
642 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
643
644 ohci_dbg (ohci, "stop %s controller%s\n",
645 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
646 ohci->disabled ? " (disabled)" : ""
647 );
648 //ohci_dump (ohci, 1);
649
650 if (!ohci->disabled)
651 hc_reset (ohci);
652
653 //remove_debug_files (ohci);
654 ohci_mem_cleanup (ohci);
655 if (ohci->hcca) {
656 pci_free_consistent (ohci->hcd.pdev, sizeof *ohci->hcca,
657 ohci->hcca, ohci->hcca_dma);
658 ohci->hcca = NULL;
659 ohci->hcca_dma = 0;
660 }
661 }
662
663 /*-------------------------------------------------------------------------*/
664
665 // FIXME: this restart logic should be generic,
666 // and handle full hcd state cleanup
667
668 /* controller died; cleanup debris, then restart */
669 /* must not be called from interrupt context */
670
671 #ifdef CONFIG_PM
672 static int hc_restart (struct ohci_hcd *ohci)
673 {
674 int temp;
675 int i;
676
677 ohci->disabled = 1;
678 ohci->sleeping = 0;
679 if (hcd_to_bus (&ohci->hcd)->root_hub)
680 usb_disconnect (&hcd_to_bus (&ohci->hcd)->root_hub);
681
682 /* empty the interrupt branches */
683 for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
684 for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
685
686 /* no EDs to remove */
687 ohci->ed_rm_list = NULL;
688
689 /* empty control and bulk lists */
690 ohci->ed_controltail = NULL;
691 ohci->ed_bulktail = NULL;
692
693 if ((temp = hc_reset (ohci)) < 0 || (temp = hc_start (ohci)) < 0) {
694 ohci_err (ohci, "can't restart, %d\n", temp);
695 return temp;
696 } else
697 ohci_dbg (ohci, "restart complete\n");
698 return 0;
699 }
700 #endif
701
702 /*-------------------------------------------------------------------------*/
703
704 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
705
706 MODULE_AUTHOR (DRIVER_AUTHOR);
707 MODULE_DESCRIPTION (DRIVER_INFO);
708 MODULE_LICENSE ("GPL");
709
710 #ifdef CONFIG_PCI
711 #include "ohci-pci.c"
712 #endif
713
714 #ifdef CONFIG_SA1111
715 #include "ohci-sa1111.c"
716 #endif
717
718 #if !(defined(CONFIG_PCI) || defined(CONFIG_SA1111))
719 #error "missing bus glue for ohci-hcd"
720 #endif