Rename drivers to their right name
[reactos.git] / reactos / drivers / usb / miniport / usbohci / ohci-hcd.c
1 /*
2 * OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
6 *
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
11 *
12 *
13 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
14 * interfaces (though some non-x86 Intel chips use it). It supports
15 * smarter hardware than UHCI. A download link for the spec available
16 * through the http://www.usb.org website.
17 *
18 * History:
19 *
20 * 2003/02/24 show registers in sysfs (Kevin Brosius)
21 *
22 * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and
23 * bandwidth accounting; if debugging, show schedules in driverfs
24 * 2002/07/19 fixes to management of ED and schedule state.
25 * 2002/06/09 SA-1111 support (Christopher Hoover)
26 * 2002/06/01 remember frame when HC won't see EDs any more; use that info
27 * to fix urb unlink races caused by interrupt latency assumptions;
28 * minor ED field and function naming updates
29 * 2002/01/18 package as a patch for 2.5.3; this should match the
30 * 2.4.17 kernel modulo some bugs being fixed.
31 *
32 * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes
33 * from post-2.4.5 patches.
34 * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning
35 * 2001/09/07 match PCI PM changes, errnos from Linus' tree
36 * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify;
37 * pbook pci quirks gone (please fix pbook pci sw!) (db)
38 *
39 * 2001/04/08 Identify version on module load (gb)
40 * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam);
41 pci_map_single (db)
42 * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db)
43 * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam)
44 *
45 * 2000/09/26 fixed races in removing the private portion of the urb
46 * 2000/09/07 disable bulk and control lists when unlinking the last
47 * endpoint descriptor in order to avoid unrecoverable errors on
48 * the Lucent chips. (rwc@sgi)
49 * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some
50 * urb unlink probs, indentation fixes
51 * 2000/08/11 various oops fixes mostly affecting iso and cleanup from
52 * device unplugs.
53 * 2000/06/28 use PCI hotplug framework, for better power management
54 * and for Cardbus support (David Brownell)
55 * 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling
56 * when the controller loses power; handle UE; cleanup; ...
57 *
58 * v5.2 1999/12/07 URB 3rd preview,
59 * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
60 * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
61 * i386: HUB, Keyboard, Mouse, Printer
62 *
63 * v4.3 1999/10/27 multiple HCs, bulk_request
64 * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
65 * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
66 * v4.0 1999/08/18
67 * v3.0 1999/06/25
68 * v2.1 1999/05/09 code clean up
69 * v2.0 1999/05/04
70 * v1.0 1999/04/27 initial release
71 *
72 * This file is licenced under the GPL.
73 */
74
75 #if 0
76 #include <linux/config.h>
77
78 #ifdef CONFIG_USB_DEBUG
79 # define DEBUG
80 #else
81 # undef DEBUG
82 #endif
83
84
85
86 #include <linux/module.h>
87 #include <linux/pci.h>
88 #include <linux/kernel.h>
89 #include <linux/delay.h>
90 #include <linux/ioport.h>
91 #include <linux/sched.h>
92 #include <linux/slab.h>
93 #include <linux/smp_lock.h>
94 #include <linux/errno.h>
95 #include <linux/init.h>
96 #include <linux/timer.h>
97 #include <linux/list.h>
98 #include <linux/interrupt.h> /* for in_interrupt () */
99 #include <linux/usb.h>
100 #include "../core/hcd.h"
101
102 #include <asm/io.h>
103 #include <asm/irq.h>
104 #include <asm/system.h>
105 #include <asm/unaligned.h>
106 #include <asm/byteorder.h>
107 #else
108 #include "ohci_config.h"
109
110 #include "../usb_wrapper.h"
111 #include "../core/hcd.h"
112
113 //#define OHCI_VERBOSE_DEBUG
114 #endif
115
116 /*
117 * TO DO:
118 *
119 * - "disabled" and "sleeping" should be in hcd->state
120 * - lots more testing!!
121 */
122
123 #define DRIVER_VERSION "2003 Feb 24"
124 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
125 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
126
127 /*-------------------------------------------------------------------------*/
128
129 // #define OHCI_VERBOSE_DEBUG /* not always helpful */
130
131 /* For initializing controller (mask in an HCFS mode too) */
132 #define OHCI_CONTROL_INIT \
133 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
134
135 #define OHCI_UNLINK_TIMEOUT (HZ / 10)
136
137 /*-------------------------------------------------------------------------*/
138
139 static const char hcd_name [] = "ohci-hcd";
140
141 #include "ohci.h"
142
143 static inline void disable (struct ohci_hcd *ohci)
144 {
145 ohci->disabled = 1;
146 ohci->hcd.state = USB_STATE_HALT;
147 }
148
149 #include "ohci-hub.c"
150 #include "ohci-dbg.c"
151 #include "ohci-mem.c"
152 #include "ohci-q.c"
153
154 /*-------------------------------------------------------------------------*/
155
156 /*
157 * queue up an urb for anything except the root hub
158 */
159 static int ohci_urb_enqueue (
160 struct usb_hcd *hcd,
161 struct urb *urb,
162 int mem_flags
163 ) {
164 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
165 struct ed *ed;
166 urb_priv_t *urb_priv;
167 unsigned int pipe = urb->pipe;
168 int i, size = 0;
169 unsigned long flags;
170 int retval = 0;
171
172 #ifdef OHCI_VERBOSE_DEBUG
173 urb_print (urb, "SUB", usb_pipein (pipe));
174 #endif
175
176 /* every endpoint has a ed, locate and maybe (re)initialize it */
177 if (! (ed = ed_get (ohci, urb->dev, pipe, urb->interval)))
178 return -ENOMEM;
179
180 /* for the private part of the URB we need the number of TDs (size) */
181 switch (ed->type) {
182 case PIPE_CONTROL:
183 /* td_submit_urb() doesn't yet handle these */
184 if (urb->transfer_buffer_length > 4096)
185 return -EMSGSIZE;
186
187 /* 1 TD for setup, 1 for ACK, plus ... */
188 size = 2;
189 /* FALLTHROUGH */
190 // case PIPE_INTERRUPT:
191 // case PIPE_BULK:
192 default:
193 /* one TD for every 4096 Bytes (can be upto 8K) */
194 size += urb->transfer_buffer_length / 4096;
195 /* ... and for any remaining bytes ... */
196 if ((urb->transfer_buffer_length % 4096) != 0)
197 size++;
198 /* ... and maybe a zero length packet to wrap it up */
199 if (size == 0)
200 size++;
201 else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
202 && (urb->transfer_buffer_length
203 % usb_maxpacket (urb->dev, pipe,
204 usb_pipeout (pipe))) == 0)
205 size++;
206 break;
207 case PIPE_ISOCHRONOUS: /* number of packets from URB */
208 size = urb->number_of_packets;
209 break;
210 }
211
212 /* allocate the private part of the URB */
213 urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
214 mem_flags);
215 if (!urb_priv)
216 return -ENOMEM;
217 memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
218
219 /* fill the private part of the URB */
220 urb_priv->length = size;
221 urb_priv->ed = ed;
222
223 /* allocate the TDs (deferring hash chain updates) */
224 for (i = 0; i < size; i++) {
225 urb_priv->td [i] = td_alloc (ohci, mem_flags);
226 if (!urb_priv->td [i]) {
227 urb_priv->length = i;
228 urb_free_priv (ohci, urb_priv);
229 return -ENOMEM;
230 }
231 }
232
233 spin_lock_irqsave (&ohci->lock, flags);
234
235 /* don't submit to a dead HC */
236 if (ohci->disabled || ohci->sleeping) {
237 retval = -ENODEV;
238 goto fail;
239 }
240
241 /* schedule the ed if needed */
242 if (ed->state == ED_IDLE) {
243 retval = ed_schedule (ohci, ed);
244 if (retval < 0)
245 goto fail;
246 if (ed->type == PIPE_ISOCHRONOUS) {
247 u16 frame = le16_to_cpu (ohci->hcca->frame_no);
248
249 /* delay a few frames before the first TD */
250 frame += max_t (u16, 8, ed->interval);
251 frame &= ~(ed->interval - 1);
252 frame |= ed->branch;
253 urb->start_frame = frame;
254
255 /* yes, only URB_ISO_ASAP is supported, and
256 * urb->start_frame is never used as input.
257 */
258 }
259 } else if (ed->type == PIPE_ISOCHRONOUS)
260 urb->start_frame = ed->last_iso + ed->interval;
261
262 /* fill the TDs and link them to the ed; and
263 * enable that part of the schedule, if needed
264 * and update count of queued periodic urbs
265 */
266 urb->hcpriv = urb_priv;
267 td_submit_urb (ohci, urb);
268
269 fail:
270 if (retval)
271 urb_free_priv (ohci, urb_priv);
272 spin_unlock_irqrestore (&ohci->lock, flags);
273 return retval;
274 }
275
276 /*
277 * decouple the URB from the HC queues (TDs, urb_priv); it's
278 * already marked using urb->status. reporting is always done
279 * asynchronously, and we might be dealing with an urb that's
280 * partially transferred, or an ED with other urbs being unlinked.
281 */
282 static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
283 {
284 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
285 unsigned long flags;
286
287 #ifdef OHCI_VERBOSE_DEBUG
288 urb_print (urb, "UNLINK", 1);
289 #endif
290
291 spin_lock_irqsave (&ohci->lock, flags);
292 if (!ohci->disabled) {
293 urb_priv_t *urb_priv;
294
295 /* Unless an IRQ completed the unlink while it was being
296 * handed to us, flag it for unlink and giveback, and force
297 * some upcoming INTR_SF to call finish_unlinks()
298 */
299 urb_priv = urb->hcpriv;
300 if (urb_priv) {
301 urb_priv->state = URB_DEL;
302 if (urb_priv->ed->state == ED_OPER)
303 start_urb_unlink (ohci, urb_priv->ed);
304 }
305 } else {
306 /*
307 * with HC dead, we won't respect hc queue pointers
308 * any more ... just clean up every urb's memory.
309 */
310 if (urb->hcpriv) {
311 spin_unlock (&ohci->lock);
312 finish_urb (ohci, urb, NULL);
313 spin_lock (&ohci->lock);
314 }
315 }
316 spin_unlock_irqrestore (&ohci->lock, flags);
317 return 0;
318 }
319
320 /*-------------------------------------------------------------------------*/
321
322 /* frees config/altsetting state for endpoints,
323 * including ED memory, dummy TD, and bulk/intr data toggle
324 */
325
326 static void
327 ohci_endpoint_disable (struct usb_hcd *hcd, struct hcd_dev *dev, int ep)
328 {
329 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
330 int epnum = ep & USB_ENDPOINT_NUMBER_MASK;
331 unsigned long flags;
332 struct ed *ed;
333
334 /* ASSERT: any requests/urbs are being unlinked */
335 /* ASSERT: nobody can be submitting urbs for this any more */
336
337 epnum <<= 1;
338 if (epnum != 0 && !(ep & USB_DIR_IN))
339 epnum |= 1;
340
341 rescan:
342 spin_lock_irqsave (&ohci->lock, flags);
343 ed = dev->ep [epnum];
344 if (!ed)
345 goto done;
346
347 if (!HCD_IS_RUNNING (ohci->hcd.state) || ohci->disabled)
348 ed->state = ED_IDLE;
349 switch (ed->state) {
350 case ED_UNLINK: /* wait for hw to finish? */
351 spin_unlock_irqrestore (&ohci->lock, flags);
352 set_current_state (TASK_UNINTERRUPTIBLE);
353 schedule_timeout (1);
354 goto rescan;
355 case ED_IDLE: /* fully unlinked */
356 if (list_empty (&ed->td_list)) {
357 td_free (ohci, ed->dummy);
358 ed_free (ohci, ed);
359 break;
360 }
361 /* else FALL THROUGH */
362 default:
363 /* caller was supposed to have unlinked any requests;
364 * that's not our job. can't recover; must leak ed.
365 */
366 ohci_err (ohci, "ed %p (#%d) state %d%s\n",
367 ed, epnum, ed->state,
368 list_empty (&ed->td_list) ? "" : "(has tds)");
369 td_free (ohci, ed->dummy);
370 break;
371 }
372 dev->ep [epnum] = 0;
373 done:
374 spin_unlock_irqrestore (&ohci->lock, flags);
375 return;
376 }
377
378 static int ohci_get_frame (struct usb_hcd *hcd)
379 {
380 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
381
382 return le16_to_cpu (ohci->hcca->frame_no);
383 }
384
385 /*-------------------------------------------------------------------------*
386 * HC functions
387 *-------------------------------------------------------------------------*/
388
389 /* reset the HC and BUS */
390
391 static int hc_reset (struct ohci_hcd *ohci)
392 {
393 u32 temp;
394
395 /* SMM owns the HC? not for long!
396 * On PA-RISC, PDC can leave IR set incorrectly; ignore it there.
397 */
398 #ifndef __hppa__
399 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
400 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
401
402 /* this timeout is arbitrary. we make it long, so systems
403 * depending on usb keyboards may be usable even if the
404 * BIOS/SMM code seems pretty broken.
405 */
406 temp = 500; /* arbitrary: five seconds */
407
408 writel (OHCI_INTR_OC, &ohci->regs->intrenable);
409 writel (OHCI_OCR, &ohci->regs->cmdstatus);
410 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
411 wait_ms (10);
412 if (--temp == 0) {
413 ohci_err (ohci, "USB HC TakeOver failed!\n");
414 return -1;
415 }
416 }
417 }
418 #endif
419
420 /* Disable HC interrupts */
421 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
422
423 ohci_dbg (ohci, "USB HC reset_hc %s: ctrl = 0x%x ;\n",
424 hcd_to_bus (&ohci->hcd)->bus_name,
425 readl (&ohci->regs->control));
426
427 /* Reset USB (needed by some controllers); RemoteWakeupConnected
428 * saved if boot firmware (BIOS/SMM/...) told us it's connected
429 */
430 ohci->hc_control = readl (&ohci->regs->control);
431 ohci->hc_control &= OHCI_CTRL_RWC; /* hcfs 0 = RESET */
432 writel (ohci->hc_control, &ohci->regs->control);
433 // flush those pci writes
434 (void) readl (&ohci->regs->control);
435 wait_ms (50);
436
437 /* HC Reset requires max 10 us delay */
438 writel (OHCI_HCR, &ohci->regs->cmdstatus);
439 temp = 30; /* ... allow extra time */
440 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
441 if (--temp == 0) {
442 ohci_err (ohci, "USB HC reset timed out!\n");
443 return -1;
444 }
445 udelay (1);
446 }
447
448 /* now we're in the SUSPEND state ... must go OPERATIONAL
449 * within 2msec else HC enters RESUME
450 *
451 * ... but some hardware won't init fmInterval "by the book"
452 * (SiS, OPTi ...), so reset again instead. SiS doesn't need
453 * this if we write fmInterval after we're OPERATIONAL.
454 */
455 writel (ohci->hc_control, &ohci->regs->control);
456 // flush those pci writes
457 (void) readl (&ohci->regs->control);
458
459 return 0;
460 }
461
462 /*-------------------------------------------------------------------------*/
463
464 #define FI 0x2edf /* 12000 bits per frame (-1) */
465 #define LSTHRESH 0x628 /* lowspeed bit threshold */
466
467 /* Start an OHCI controller, set the BUS operational
468 * enable interrupts
469 * connect the virtual root hub
470 */
471 static int hc_start (struct ohci_hcd *ohci)
472 {
473 u32 mask, tmp;
474 struct usb_device *udev;
475 struct usb_bus *bus;
476
477 spin_lock_init (&ohci->lock);
478 ohci->disabled = 1;
479 ohci->sleeping = 0;
480
481 /* Tell the controller where the control and bulk lists are
482 * The lists are empty now. */
483 writel (0, &ohci->regs->ed_controlhead);
484 writel (0, &ohci->regs->ed_bulkhead);
485
486 /* a reset clears this */
487 writel ((u32) ohci->hcca_dma, &ohci->regs->hcca);
488 usbprintk("HCCA: %p \n",ohci->regs->hcca);
489
490 /* force default fmInterval (we won't adjust it); init thresholds
491 * for last FS and LS packets, reserve 90% for periodic.
492 */
493 writel ((((6 * (FI - 210)) / 7) << 16) | FI, &ohci->regs->fminterval);
494 writel (((9 * FI) / 10) & 0x3fff, &ohci->regs->periodicstart);
495 writel (LSTHRESH, &ohci->regs->lsthresh);
496
497 /* some OHCI implementations are finicky about how they init.
498 * bogus values here mean not even enumeration could work.
499 */
500 if ((readl (&ohci->regs->fminterval) & 0x3fff0000) == 0
501 || !readl (&ohci->regs->periodicstart)) {
502 ohci_err (ohci, "init err\n");
503 return -EOVERFLOW;
504 }
505
506 /* start controller operations */
507 ohci->hc_control &= OHCI_CTRL_RWC;
508 ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
509 ohci->disabled = 0;
510 writel (ohci->hc_control, &ohci->regs->control);
511
512 /* Choose the interrupts we care about now, others later on demand */
513 mask = OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_WDH;
514 writel (mask, &ohci->regs->intrstatus);
515 writel (mask, &ohci->regs->intrenable);
516
517 /* handle root hub init quirks ... */
518 tmp = roothub_a (ohci);
519 tmp &= ~(RH_A_PSM | RH_A_OCPM);
520 if (ohci->flags & OHCI_QUIRK_SUPERIO) {
521 /* NSC 87560 and maybe others */
522 tmp |= RH_A_NOCP;
523 tmp &= ~(RH_A_POTPGT | RH_A_NPS);
524 } else {
525 /* hub power always on; required for AMD-756 and some
526 * Mac platforms, use this mode everywhere by default
527 */
528 tmp |= RH_A_NPS;
529 }
530 writel (tmp, &ohci->regs->roothub.a);
531 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
532 writel (0, &ohci->regs->roothub.b);
533 // flush those pci writes
534 (void) readl (&ohci->regs->control);
535
536 // POTPGT delay is bits 24-31, in 2 ms units.
537 mdelay (((int)(roothub_a (ohci) >> 23) & 0x1fe));
538
539 /* connect the virtual root hub */
540 bus = hcd_to_bus (&ohci->hcd);
541 bus->root_hub = udev = usb_alloc_dev (NULL, bus);
542 ohci->hcd.state = USB_STATE_READY;
543 if (!udev) {
544 disable (ohci);
545 ohci->hc_control &= ~OHCI_CTRL_HCFS;
546 writel (ohci->hc_control, &ohci->regs->control);
547 ohci_err(ohci,"out of mem");
548 return -ENOMEM;
549 }
550
551 usb_connect (udev);
552 udev->speed = USB_SPEED_FULL;
553 if (hcd_register_root (&ohci->hcd) != 0) {
554 usb_put_dev (udev);
555 bus->root_hub = NULL;
556 disable (ohci);
557 ohci->hc_control &= ~OHCI_CTRL_HCFS;
558 writel (ohci->hc_control, &ohci->regs->control);
559 return -ENODEV;
560 }
561 create_debug_files (ohci);
562 return 0;
563 }
564
565 /*-------------------------------------------------------------------------*/
566
567 /* an interrupt happens */
568
569 static
570 int ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs)
571 {
572 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
573 struct ohci_regs *regs = ohci->regs;
574 int ints;
575
576 /* we can eliminate a (slow) readl() if _only_ WDH caused this irq */
577 if ((ohci->hcca->done_head != 0)
578 && ! (le32_to_cpup (&ohci->hcca->done_head) & 0x01)) {
579 ints = OHCI_INTR_WDH;
580
581 /* cardbus/... hardware gone before remove() */
582 } else if ((ints = readl (&regs->intrstatus)) == ~(u32)0) {
583 disable (ohci);
584 ohci_dbg (ohci, "device removed!\n");
585 return 0;
586
587 /* interrupt for some other device? */
588 } else if ((ints &= readl (&regs->intrenable)) == 0) {
589 return 0;
590 }
591
592 if (ints & OHCI_INTR_UE) {
593 disable (ohci);
594 ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
595 // e.g. due to PCI Master/Target Abort
596
597 ohci_dump (ohci, 1);
598 hc_reset (ohci);
599 }
600
601 if (ints & OHCI_INTR_WDH) {
602 writel (OHCI_INTR_WDH, &regs->intrdisable);
603 dl_done_list (ohci, dl_reverse_done_list (ohci), ptregs);
604 writel (OHCI_INTR_WDH, &regs->intrenable);
605 }
606
607 /* could track INTR_SO to reduce available PCI/... bandwidth */
608
609 /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
610 * when there's still unlinking to be done (next frame).
611 */
612 spin_lock (&ohci->lock);
613 if (ohci->ed_rm_list)
614 finish_unlinks (ohci, le16_to_cpu (ohci->hcca->frame_no),
615 ptregs);
616 if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list)
617 writel (OHCI_INTR_SF, &regs->intrdisable);
618 spin_unlock (&ohci->lock);
619
620 writel (ints, &regs->intrstatus);
621 writel (OHCI_INTR_MIE, &regs->intrenable);
622 // flush those pci writes
623 (void) readl (&ohci->regs->control);
624 return 0;
625 }
626
627 /*-------------------------------------------------------------------------*/
628
629 static void ohci_stop (struct usb_hcd *hcd)
630 {
631 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
632
633 ohci_dbg (ohci, "stop %s controller%s\n",
634 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
635 ohci->disabled ? " (disabled)" : ""
636 );
637 //ohci_dump (ohci, 1);
638
639 if (!ohci->disabled)
640 hc_reset (ohci);
641
642 //remove_debug_files (ohci);
643 ohci_mem_cleanup (ohci);
644 if (ohci->hcca) {
645 pci_free_consistent (ohci->hcd.pdev, sizeof *ohci->hcca,
646 ohci->hcca, ohci->hcca_dma);
647 ohci->hcca = NULL;
648 ohci->hcca_dma = 0;
649 }
650 }
651
652 /*-------------------------------------------------------------------------*/
653
654 // FIXME: this restart logic should be generic,
655 // and handle full hcd state cleanup
656
657 /* controller died; cleanup debris, then restart */
658 /* must not be called from interrupt context */
659
660 #ifdef CONFIG_PM
661 static int hc_restart (struct ohci_hcd *ohci)
662 {
663 int temp;
664 int i;
665
666 ohci->disabled = 1;
667 ohci->sleeping = 0;
668 if (hcd_to_bus (&ohci->hcd)->root_hub)
669 usb_disconnect (&hcd_to_bus (&ohci->hcd)->root_hub);
670
671 /* empty the interrupt branches */
672 for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
673 for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
674
675 /* no EDs to remove */
676 ohci->ed_rm_list = NULL;
677
678 /* empty control and bulk lists */
679 ohci->ed_controltail = NULL;
680 ohci->ed_bulktail = NULL;
681
682 if ((temp = hc_reset (ohci)) < 0 || (temp = hc_start (ohci)) < 0) {
683 ohci_err (ohci, "can't restart, %d\n", temp);
684 return temp;
685 } else
686 ohci_dbg (ohci, "restart complete\n");
687 return 0;
688 }
689 #endif
690
691 /*-------------------------------------------------------------------------*/
692
693 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
694
695 MODULE_AUTHOR (DRIVER_AUTHOR);
696 MODULE_DESCRIPTION (DRIVER_INFO);
697 MODULE_LICENSE ("GPL");
698
699 #ifdef CONFIG_PCI
700 #include "ohci-pci.c"
701 #endif
702
703 #ifdef CONFIG_SA1111
704 #include "ohci-sa1111.c"
705 #endif
706
707 #if !(defined(CONFIG_PCI) || defined(CONFIG_SA1111))
708 #error "missing bus glue for ohci-hcd"
709 #endif