reactos/drivers/usb/miniport/usbohci/ohci-pci.c

   1 /*
   2  * OHCI HCD (Host Controller Driver) for USB.
   3  *
   4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   5  * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
   6  *
   7  * [ Initialisation is based on Linus'  ]
   8  * [ uhci code and gregs ohci fragments ]
   9  * [ (C) Copyright 1999 Linus Torvalds  ]
  10  * [ (C) Copyright 1999 Gregory P. Smith]
  11  *
  12  * PCI Bus Glue
  13  *
  14  * This file is licenced under the GPL.
  15  */
  16
  17 #ifdef CONFIG_PMAC_PBOOK
  18 #include <asm/machdep.h>
  19 #include <asm/pmac_feature.h>
  20 #include <asm/pci-bridge.h>
  21 #include <asm/prom.h>
  22 #ifndef CONFIG_PM
  23 #       define CONFIG_PM
  24 #endif
  25 #endif
  26
  27 #ifndef CONFIG_PCI
  28 #error "This file is PCI bus glue.  CONFIG_PCI must be defined."
  29 #endif
  30
  31 #include "../linux/pci_ids.h"
  32
  33 /*-------------------------------------------------------------------------*/
  34
  35 static int __devinit
  36 ohci_pci_start (struct usb_hcd *hcd)
  37 {
  38         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  39         int             ret;
  40
  41         DPRINT("ohci_pci_start()\n");
  42
  43         if (hcd->pdev) {
  44                 ohci->hcca = pci_alloc_consistent (hcd->pdev,
  45                                 sizeof *ohci->hcca, &ohci->hcca_dma);
  46                 if (!ohci->hcca)
  47                         return -ENOMEM;
  48
  49                 /* AMD 756, for most chips (early revs), corrupts register
  50                  * values on read ... so enable the vendor workaround.
  51                  */
  52                 if (hcd->pdev->vendor == PCI_VENDOR_ID_AMD
  53                                 && hcd->pdev->device == 0x740c) {
  54                         ohci->flags = OHCI_QUIRK_AMD756;
  55                         ohci_info (ohci, "AMD756 erratum 4 workaround\n");
  56                 }
  57
  58                 /* FIXME for some of the early AMD 760 southbridges, OHCI
  59                  * won't work at all.  blacklist them.
  60                  */
  61
  62                 /* Apple's OHCI driver has a lot of bizarre workarounds
  63                  * for this chip.  Evidently control and bulk lists
  64                  * can get confused.  (B&W G3 models, and ...)
  65                  */
  66                 else if (hcd->pdev->vendor == PCI_VENDOR_ID_OPTI
  67                                 && hcd->pdev->device == 0xc861) {
  68                         ohci_info (ohci,
  69                                 "WARNING: OPTi workarounds unavailable\n");
  70                 }
  71
  72                 /* Check for NSC87560. We have to look at the bridge (fn1) to
  73                  * identify the USB (fn2). This quirk might apply to more or
  74                  * even all NSC stuff.
  75                  */
  76                 else if (hcd->pdev->vendor == PCI_VENDOR_ID_NS) {
  77                         struct pci_dev  *b, *hc;
  78
  79                         hc = hcd->pdev;
  80                         b  = pci_find_slot (hc->bus->number,
  81                                         PCI_DEVFN (PCI_SLOT (hc->devfn), 1));
  82                         if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
  83                                         && b->vendor == PCI_VENDOR_ID_NS) {
  84                                 ohci->flags |= OHCI_QUIRK_SUPERIO;
  85                                 ohci_info (ohci, "Using NSC SuperIO setup\n");
  86                         }
  87                 }
  88
  89         }
  90
  91     memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
  92         if ((ret = ohci_mem_init (ohci)) < 0) {
  93                 ohci_stop (hcd);
  94                 return ret;
  95         }
  96         ohci->regs = hcd->regs;
  97
  98     DPRINT("Controller memory init done\n");
  99
 100         if (hc_reset (ohci) < 0) {
 101                 ohci_stop (hcd);
 102                 return -ENODEV;
 103         }
 104         DPRINT("Controller reset done\n");
 105
 106         if (hc_start (ohci) < 0) {
 107                 ohci_err (ohci, "can't start\n");
 108                 ohci_stop (hcd);
 109                 return -EBUSY;
 110         }
 111         DPRINT("Controller start done\n");
 112
 113 #ifdef  DEBUG
 114         ohci_dump (ohci, 1);
 115 #endif
 116         return 0;
 117 }
 118
 119 #ifdef  CONFIG_PM
 120
 121 static int ohci_pci_suspend (struct usb_hcd *hcd, u32 state)
 122 {
 123         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 124         unsigned long           flags;
 125         u16                     cmd;
 126
 127         if ((ohci->hc_control & OHCI_CTRL_HCFS) != OHCI_USB_OPER) {
 128                 ohci_dbg (ohci, "can't suspend (state is %s)\n",
 129                         hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS));
 130                 return -EIO;
 131         }
 132
 133         /* act as if usb suspend can always be used */
 134         ohci_dbg (ohci, "suspend to %d\n", state);
 135         ohci->sleeping = 1;
 136
 137         /* First stop processing */
 138         spin_lock_irqsave (&ohci->lock, flags);
 139         ohci->hc_control &=
 140                 ~(OHCI_CTRL_PLE|OHCI_CTRL_CLE|OHCI_CTRL_BLE|OHCI_CTRL_IE);
 141         writel (ohci->hc_control, &ohci->regs->control);
 142         writel (OHCI_INTR_SF, &ohci->regs->intrstatus);
 143         (void) readl (&ohci->regs->intrstatus);
 144         spin_unlock_irqrestore (&ohci->lock, flags);
 145
 146         /* Wait a frame or two */
 147         mdelay (1);
 148         if (!readl (&ohci->regs->intrstatus) & OHCI_INTR_SF)
 149                 mdelay (1);
 150
 151 #ifdef CONFIG_PMAC_PBOOK
 152         if (_machine == _MACH_Pmac)
 153                 disable_irq (hcd->pdev->irq);
 154         /* else, 2.4 assumes shared irqs -- don't disable */
 155 #endif
 156
 157         /* Enable remote wakeup */
 158         writel (readl (&ohci->regs->intrenable) | OHCI_INTR_RD,
 159                 &ohci->regs->intrenable);
 160
 161         /* Suspend chip and let things settle down a bit */
 162         ohci->hc_control = OHCI_USB_SUSPEND;
 163         writel (ohci->hc_control, &ohci->regs->control);
 164         (void) readl (&ohci->regs->control);
 165         mdelay (500); /* No schedule here ! */
 166
 167         switch (readl (&ohci->regs->control) & OHCI_CTRL_HCFS) {
 168                 case OHCI_USB_RESET:
 169                         ohci_dbg (ohci, "suspend->reset ?\n");
 170                         break;
 171                 case OHCI_USB_RESUME:
 172                         ohci_dbg (ohci, "suspend->resume ?\n");
 173                         break;
 174                 case OHCI_USB_OPER:
 175                         ohci_dbg (ohci, "suspend->operational ?\n");
 176                         break;
 177                 case OHCI_USB_SUSPEND:
 178                         ohci_dbg (ohci, "suspended\n");
 179                         break;
 180         }
 181
 182         /* In some rare situations, Apple's OHCI have happily trashed
 183          * memory during sleep. We disable its bus master bit during
 184          * suspend
 185          */
 186         pci_read_config_word (hcd->pdev, PCI_COMMAND, &cmd);
 187         cmd &= ~PCI_COMMAND_MASTER;
 188         pci_write_config_word (hcd->pdev, PCI_COMMAND, cmd);
 189 #ifdef CONFIG_PMAC_PBOOK
 190         {
 191                 struct device_node      *of_node;
 192
 193                 /* Disable USB PAD & cell clock */
 194                 of_node = pci_device_to_OF_node (hcd->pdev);
 195                 if (of_node)
 196                         pmac_call_feature(PMAC_FTR_USB_ENABLE, of_node, 0, 0);
 197         }
 198 #endif
 199         return 0;
 200 }
 201
 202
 203 static int ohci_pci_resume (struct usb_hcd *hcd)
 204 {
 205         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 206         int                     temp;
 207         int                     retval = 0;
 208         unsigned long           flags;
 209
 210 #ifdef CONFIG_PMAC_PBOOK
 211         {
 212                 struct device_node *of_node;
 213
 214                 /* Re-enable USB PAD & cell clock */
 215                 of_node = pci_device_to_OF_node (hcd->pdev);
 216                 if (of_node)
 217                         pmac_call_feature (PMAC_FTR_USB_ENABLE, of_node, 0, 1);
 218         }
 219 #endif
 220         /* did we suspend, or were we powered off? */
 221         ohci->hc_control = readl (&ohci->regs->control);
 222         temp = ohci->hc_control & OHCI_CTRL_HCFS;
 223
 224 #ifdef DEBUG
 225         /* the registers may look crazy here */
 226         ohci_dump_status (ohci, 0, 0);
 227 #endif
 228
 229         /* Re-enable bus mastering */
 230         pci_set_master (ohci->hcd.pdev);
 231
 232         switch (temp) {
 233
 234         case OHCI_USB_RESET:    // lost power
 235                 ohci_info (ohci, "USB restart\n");
 236                 retval = hc_restart (ohci);
 237                 break;
 238
 239         case OHCI_USB_SUSPEND:  // host wakeup
 240         case OHCI_USB_RESUME:   // remote wakeup
 241                 ohci_info (ohci, "USB continue from %s wakeup\n",
 242                          (temp == OHCI_USB_SUSPEND)
 243                                 ? "host" : "remote");
 244                 ohci->hc_control = OHCI_USB_RESUME;
 245                 writel (ohci->hc_control, &ohci->regs->control);
 246                 (void) readl (&ohci->regs->control);
 247                 mdelay (20); /* no schedule here ! */
 248                 /* Some controllers (lucent) need a longer delay here */
 249                 mdelay (15);
 250
 251                 temp = readl (&ohci->regs->control);
 252                 temp = ohci->hc_control & OHCI_CTRL_HCFS;
 253                 if (temp != OHCI_USB_RESUME) {
 254                         ohci_err (ohci, "controller won't resume\n");
 255                         ohci->disabled = 1;
 256                         retval = -EIO;
 257                         break;
 258                 }
 259
 260                 /* Some chips likes being resumed first */
 261                 writel (OHCI_USB_OPER, &ohci->regs->control);
 262                 (void) readl (&ohci->regs->control);
 263                 mdelay (3);
 264
 265                 /* Then re-enable operations */
 266                 spin_lock_irqsave (&ohci->lock, flags);
 267                 ohci->disabled = 0;
 268                 ohci->sleeping = 0;
 269                 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
 270                 if (!ohci->ed_rm_list) {
 271                         if (ohci->ed_controltail)
 272                                 ohci->hc_control |= OHCI_CTRL_CLE;
 273                         if (ohci->ed_bulktail)
 274                                 ohci->hc_control |= OHCI_CTRL_BLE;
 275                 }
 276                 hcd->state = USB_STATE_READY;
 277                 writel (ohci->hc_control, &ohci->regs->control);
 278
 279                 /* trigger a start-frame interrupt (why?) */
 280                 writel (OHCI_INTR_SF, &ohci->regs->intrstatus);
 281                 writel (OHCI_INTR_SF, &ohci->regs->intrenable);
 282
 283                 /* Check for a pending done list */
 284                 writel (OHCI_INTR_WDH, &ohci->regs->intrdisable);
 285                 (void) readl (&ohci->regs->intrdisable);
 286                 spin_unlock_irqrestore (&ohci->lock, flags);
 287
 288 #ifdef CONFIG_PMAC_PBOOK
 289                 if (_machine == _MACH_Pmac)
 290                         enable_irq (hcd->pdev->irq);
 291 #endif
 292                 if (ohci->hcca->done_head)
 293                         dl_done_list (ohci, dl_reverse_done_list (ohci), NULL);
 294                 writel (OHCI_INTR_WDH, &ohci->regs->intrenable);
 295
 296                 /* assume there are TDs on the bulk and control lists */
 297                 writel (OHCI_BLF | OHCI_CLF, &ohci->regs->cmdstatus);
 298
 299 // ohci_dump_status (ohci);
 300 ohci_dbg (ohci, "sleeping = %d, disabled = %d\n",
 301                 ohci->sleeping, ohci->disabled);
 302                 break;
 303
 304         default:
 305                 ohci_warn (ohci, "odd PCI resume\n");
 306         }
 307         return retval;
 308 }
 309
 310 #endif  /* CONFIG_PM */
 311
 312
 313 /*-------------------------------------------------------------------------*/
 314
 315 static const struct hc_driver ohci_pci_hc_driver = {
 316         .description =          hcd_name,
 317
 318         /*
 319          * generic hardware linkage
 320          */
 321         .irq =                  ohci_irq,
 322         .flags =                HCD_MEMORY | HCD_USB11,
 323
 324         /*
 325          * basic lifecycle operations
 326          */
 327         .start =                ohci_pci_start,
 328 #ifdef  CONFIG_PM
 329         .suspend =              ohci_pci_suspend,
 330         .resume =               ohci_pci_resume,
 331 #endif
 332         .stop =                 ohci_stop,
 333
 334         /*
 335          * memory lifecycle (except per-request)
 336          */
 337         .hcd_alloc =            ohci_hcd_alloc,
 338         .hcd_free =             ohci_hcd_free,
 339
 340         /*
 341          * managing i/o requests and associated device resources
 342          */
 343         .urb_enqueue =          ohci_urb_enqueue,
 344         .urb_dequeue =          ohci_urb_dequeue,
 345         .endpoint_disable =     ohci_endpoint_disable,
 346
 347         /*
 348          * scheduling support
 349          */
 350         .get_frame_number =     ohci_get_frame,
 351
 352         /*
 353          * root hub support
 354          */
 355         .hub_status_data =      ohci_hub_status_data,
 356         .hub_control =          ohci_hub_control,
 357 };
 358
 359 /*-------------------------------------------------------------------------*/
 360
 361 const struct pci_device_id __devinitdata pci_ids [] = { {
 362
 363         /* handle any USB OHCI controller */
 364         .class =        (PCI_CLASS_SERIAL_USB << 8) | 0x10,
 365         .class_mask =   ~0,
 366         .driver_data =  (unsigned long) &ohci_pci_hc_driver,
 367
 368         /* no matter who makes it */
 369         .vendor =       PCI_ANY_ID,
 370         .device =       PCI_ANY_ID,
 371         .subvendor =    PCI_ANY_ID,
 372         .subdevice =    PCI_ANY_ID,
 373
 374         }, { /* end: all zeroes */ }
 375 };
 376 MODULE_DEVICE_TABLE (pci, pci_ids);
 377
 378 /* pci driver glue; this is a "new style" PCI driver module */
 379 struct pci_driver ohci_pci_driver = {
 380         .name =         (char *) hcd_name,
 381         .id_table =     pci_ids,
 382
 383         .probe =        usb_hcd_pci_probe,
 384         .remove =       usb_hcd_pci_remove,
 385
 386 #ifdef  CONFIG_PM
 387         .suspend =      usb_hcd_pci_suspend,
 388         .resume =       usb_hcd_pci_resume,
 389 #endif
 390 };
 391
 392
 393 int ohci_hcd_pci_init (void)
 394 {
 395         printk (KERN_DEBUG "%s: " DRIVER_INFO " (PCI)\n", hcd_name);
 396         if (usb_disabled())
 397                 return -ENODEV;
 398
 399         // causes page fault in reactos
 400         //printk (KERN_DEBUG "%s: block sizes: ed %Zd td %Zd\n", hcd_name,
 401         //      sizeof (struct ed), sizeof (struct td));
 402         return pci_module_init (&ohci_pci_driver);
 403 }
 404 /*module_init (ohci_hcd_pci_init);*/
 405
 406 /*-------------------------------------------------------------------------*/
 407
 408 void ohci_hcd_pci_cleanup (void)
 409 {
 410         pci_unregister_driver (&ohci_pci_driver);
 411 }
 412 /*module_exit (ohci_hcd_pci_cleanup);*/