reactos/hal/hal/hal.c

   1 /* $Id$
   2  *
   3  * COPYRIGHT:        See COPYING in the top level directory
   4  * PROJECT:          ReactOS kernel
   5  * FILE:             hal/hal.c
   6  * PURPOSE:          Hardware Abstraction Layer DLL
   7  * PROGRAMMER:       Casper S. Hornstrup (chorns@users.sourceforge.net)
   8  * REVISION HISTORY:
   9  *    01-08-2001 CSH Created
  10  */
  11
  12 /* INCLUDES ******************************************************************/
  13
  14 #include <ddk/ntddk.h>
  15 #include <roscfg.h>
  16
  17 #define NDEBUG
  18 #include <internal/debug.h>
  19
  20 /* DATA **********************************************************************/
  21
  22 ULONG EXPORTED KdComPortInUse = 0;
  23
  24 /* FUNCTIONS *****************************************************************/
  25
  26 NTSTATUS
  27 STDCALL
  28 DriverEntry(
  29   PDRIVER_OBJECT DriverObject,
  30   PUNICODE_STRING RegistryPath)
  31 {
  32   UNIMPLEMENTED;
  33
  34   return STATUS_SUCCESS;
  35 }
  36
  37
  38 VOID
  39 FASTCALL
  40 ExAcquireFastMutex(
  41   PFAST_MUTEX FastMutex)
  42 {
  43   UNIMPLEMENTED;
  44 }
  45
  46
  47 VOID
  48 FASTCALL
  49 ExReleaseFastMutex(
  50   PFAST_MUTEX FastMutex)
  51 {
  52   UNIMPLEMENTED;
  53 }
  54
  55
  56 BOOLEAN FASTCALL
  57 ExTryToAcquireFastMutex(
  58   PFAST_MUTEX FastMutex)
  59 {
  60   UNIMPLEMENTED;
  61
  62   return TRUE;
  63 }
  64
  65
  66 VOID
  67 STDCALL
  68 HalAcquireDisplayOwnership(
  69   PHAL_RESET_DISPLAY_PARAMETERS ResetDisplayParameters)
  70 {
  71   UNIMPLEMENTED;
  72 }
  73
  74
  75 NTSTATUS
  76 STDCALL
  77 HalAdjustResourceList(
  78   PCM_RESOURCE_LIST Resources)
  79 {
  80   UNIMPLEMENTED;
  81
  82   return STATUS_SUCCESS;
  83 }
  84
  85
  86 BOOLEAN
  87 STDCALL
  88 HalAllProcessorsStarted(VOID)
  89 {
  90   UNIMPLEMENTED;
  91
  92   return TRUE;
  93 }
  94
  95
  96 NTSTATUS
  97 STDCALL
  98 HalAllocateAdapterChannel(
  99   PADAPTER_OBJECT AdapterObject,
 100   PWAIT_CONTEXT_BLOCK WaitContextBlock,
 101   ULONG NumberOfMapRegisters,
 102   PDRIVER_CONTROL ExecutionRoutine)
 103 {
 104   UNIMPLEMENTED;
 105
 106   return STATUS_SUCCESS;
 107 }
 108
 109
 110 PVOID
 111 STDCALL
 112 HalAllocateCommonBuffer(
 113   PADAPTER_OBJECT AdapterObject,
 114   ULONG Length,
 115   PPHYSICAL_ADDRESS LogicalAddress,
 116   BOOLEAN CacheEnabled)
 117 {
 118   UNIMPLEMENTED;
 119
 120   return NULL;
 121 }
 122
 123
 124 NTSTATUS
 125 STDCALL
 126 HalAssignSlotResources(
 127   PUNICODE_STRING RegistryPath,
 128   PUNICODE_STRING DriverClassName,
 129   PDRIVER_OBJECT DriverObject,
 130   PDEVICE_OBJECT DeviceObject,
 131   INTERFACE_TYPE BusType,
 132   ULONG BusNumber,
 133   ULONG SlotNumber,
 134   PCM_RESOURCE_LIST *AllocatedResources)
 135 {
 136   UNIMPLEMENTED;
 137
 138   return TRUE;
 139 }
 140
 141
 142 BOOLEAN
 143 STDCALL
 144 HalBeginSystemInterrupt (ULONG Vector,
 145                          KIRQL Irql,
 146                          PKIRQL OldIrql)
 147 {
 148   UNIMPLEMENTED;
 149
 150   return TRUE;
 151 }
 152
 153
 154 VOID
 155 STDCALL
 156 HalCalibratePerformanceCounter(
 157   ULONG Count)
 158 {
 159   UNIMPLEMENTED;
 160 }
 161
 162
 163 BOOLEAN
 164 STDCALL
 165 HalDisableSystemInterrupt(
 166   ULONG Vector,
 167   KIRQL Irql)
 168 {
 169   UNIMPLEMENTED;
 170
 171   return TRUE;
 172 }
 173
 174
 175 VOID
 176 STDCALL
 177 HalDisplayString(
 178   PCH String)
 179 {
 180   UNIMPLEMENTED;
 181 }
 182
 183
 184 BOOLEAN
 185 STDCALL
 186 HalEnableSystemInterrupt(
 187   ULONG Vector,
 188   KIRQL Irql,
 189   KINTERRUPT_MODE InterruptMode)
 190 {
 191   UNIMPLEMENTED;
 192
 193   return TRUE;
 194 }
 195
 196
 197 VOID
 198 STDCALL
 199 HalEndSystemInterrupt(
 200   KIRQL Irql,
 201   ULONG Unknown2)
 202 {
 203   UNIMPLEMENTED;
 204 }
 205
 206
 207 BOOLEAN
 208 STDCALL
 209 HalFlushCommonBuffer(
 210   ULONG Unknown1,
 211   ULONG Unknown2,
 212   ULONG Unknown3,
 213   ULONG Unknown4,
 214   ULONG Unknown5,
 215   ULONG Unknown6,
 216   ULONG Unknown7,
 217   ULONG Unknown8)
 218 {
 219   UNIMPLEMENTED;
 220
 221    return TRUE;
 222 }
 223
 224
 225 VOID
 226 STDCALL
 227 HalFreeCommonBuffer(
 228   PADAPTER_OBJECT AdapterObject,
 229   ULONG Length,
 230   PHYSICAL_ADDRESS LogicalAddress,
 231   PVOID VirtualAddress,
 232   BOOLEAN CacheEnabled)
 233 {
 234   UNIMPLEMENTED;
 235 }
 236
 237
 238 PADAPTER_OBJECT
 239 STDCALL
 240 HalGetAdapter(
 241   PDEVICE_DESCRIPTION DeviceDescription,
 242   PULONG NumberOfMapRegisters)
 243 {
 244   UNIMPLEMENTED;
 245
 246   return (PADAPTER_OBJECT)NULL;
 247 }
 248
 249
 250 ULONG
 251 STDCALL
 252 HalGetBusData(
 253   BUS_DATA_TYPE BusDataType,
 254   ULONG BusNumber,
 255   ULONG SlotNumber,
 256   PVOID Buffer,
 257   ULONG Length)
 258 {
 259   UNIMPLEMENTED;
 260
 261   return 0;
 262 }
 263
 264
 265 ULONG
 266 STDCALL
 267 HalGetBusDataByOffset(
 268   BUS_DATA_TYPE BusDataType,
 269   ULONG BusNumber,
 270   ULONG SlotNumber,
 271   PVOID Buffer,
 272   ULONG Offset,
 273   ULONG Length)
 274 {
 275   UNIMPLEMENTED;
 276
 277   return 0;
 278 }
 279
 280
 281 BOOLEAN
 282 STDCALL
 283 HalGetEnvironmentVariable(
 284   PCH Name,
 285   PCH Value,
 286   USHORT ValueLength)
 287 {
 288   UNIMPLEMENTED;
 289
 290   return FALSE;
 291 }
 292
 293
 294 ULONG
 295 STDCALL
 296 HalGetInterruptVector(
 297   INTERFACE_TYPE InterfaceType,
 298   ULONG BusNumber,
 299   ULONG BusInterruptLevel,
 300   ULONG BusInterruptVector,
 301   PKIRQL Irql,
 302   PKAFFINITY Affinity)
 303 {
 304   UNIMPLEMENTED;
 305
 306   return 0;
 307 }
 308
 309
 310 VOID
 311 STDCALL
 312 HalHandleNMI(
 313   ULONG Unused)
 314 {
 315   UNIMPLEMENTED;
 316 }
 317
 318
 319 BOOLEAN
 320 STDCALL
 321 HalInitSystem(
 322   ULONG BootPhase,
 323   PLOADER_PARAMETER_BLOCK LoaderBlock)
 324 {
 325   UNIMPLEMENTED;
 326
 327   return TRUE;
 328 }
 329
 330
 331 VOID
 332 STDCALL
 333 HalInitializeProcessor(
 334   ULONG ProcessorNumber,
 335   PVOID ProcessorStack)
 336 {
 337   UNIMPLEMENTED;
 338 }
 339
 340
 341 BOOLEAN
 342 STDCALL
 343 HalMakeBeep(
 344   ULONG Frequency)
 345 {
 346   UNIMPLEMENTED;
 347
 348   return TRUE;
 349 }
 350
 351
 352 VOID
 353 STDCALL
 354 HalProcessorIdle(VOID)
 355 {
 356   UNIMPLEMENTED;
 357 }
 358
 359
 360 BOOLEAN
 361 STDCALL
 362 HalQueryDisplayOwnership(VOID)
 363 {
 364   UNIMPLEMENTED;
 365
 366   return FALSE;
 367 }
 368
 369
 370 VOID
 371 STDCALL
 372 HalQueryDisplayParameters(
 373   OUT PULONG DispSizeX,
 374   OUT PULONG DispSizeY,
 375   OUT PULONG CursorPosX,
 376   OUT PULONG CursorPosY)
 377 {
 378   UNIMPLEMENTED;
 379 }
 380
 381
 382 VOID
 383 STDCALL
 384 HalQueryRealTimeClock(
 385   PTIME_FIELDS Time)
 386 {
 387   UNIMPLEMENTED;
 388 }
 389
 390
 391 ULONG
 392 STDCALL
 393 HalReadDmaCounter(
 394   PADAPTER_OBJECT AdapterObject)
 395 {
 396   UNIMPLEMENTED;
 397
 398   return 0;
 399 }
 400
 401
 402 VOID
 403 STDCALL
 404 HalReleaseDisplayOwnership(VOID)
 405 {
 406   UNIMPLEMENTED;
 407 }
 408
 409 VOID
 410 STDCALL
 411 HalReportResourceUsage(VOID)
 412 {
 413   UNIMPLEMENTED;
 414 }
 415
 416
 417 VOID
 418 STDCALL
 419 HalRequestIpi(
 420   ULONG Unknown)
 421 {
 422   UNIMPLEMENTED;
 423 }
 424
 425
 426 VOID
 427 FASTCALL
 428 HalRequestSoftwareInterrupt(
 429   KIRQL Request)
 430 {
 431   UNIMPLEMENTED;
 432 }
 433
 434
 435 VOID
 436 STDCALL
 437 HalReturnToFirmware(
 438   ULONG Action)
 439 {
 440   UNIMPLEMENTED;
 441 }
 442
 443
 444 ULONG
 445 STDCALL
 446 HalSetBusData(
 447   BUS_DATA_TYPE BusDataType,
 448   ULONG BusNumber,
 449   ULONG SlotNumber,
 450   PVOID Buffer,
 451   ULONG Length)
 452 {
 453   UNIMPLEMENTED;
 454
 455   return 0;
 456 }
 457
 458
 459 ULONG
 460 STDCALL
 461 HalSetBusDataByOffset(
 462   BUS_DATA_TYPE BusDataType,
 463   ULONG BusNumber,
 464   ULONG SlotNumber,
 465   PVOID Buffer,
 466   ULONG Offset,
 467   ULONG Length)
 468 {
 469   UNIMPLEMENTED;
 470
 471   return 0;
 472 }
 473
 474
 475 VOID
 476 STDCALL
 477 HalSetDisplayParameters(
 478   ULONG CursorPosX,
 479   ULONG CursorPosY)
 480 {
 481   UNIMPLEMENTED;
 482 }
 483
 484
 485 BOOLEAN
 486 STDCALL
 487 HalSetEnvironmentVariable(
 488   PCH Name,
 489   PCH Value)
 490 {
 491   UNIMPLEMENTED;
 492
 493   return TRUE;
 494 }
 495
 496
 497 VOID
 498 STDCALL
 499 HalSetRealTimeClock(
 500   PTIME_FIELDS Time)
 501 {
 502   UNIMPLEMENTED;
 503 }
 504
 505
 506 BOOLEAN
 507 STDCALL
 508 HalStartNextProcessor(
 509   ULONG Unknown1,
 510   ULONG Unknown2)
 511 {
 512   UNIMPLEMENTED;
 513
 514   return TRUE;
 515 }
 516
 517
 518 ULONG
 519 FASTCALL
 520 HalSystemVectorDispatchEntry(
 521   ULONG Unknown1,
 522   ULONG Unknown2,
 523   ULONG Unknown3)
 524 {
 525   UNIMPLEMENTED;
 526
 527   return 0;
 528 }
 529
 530
 531 BOOLEAN
 532 STDCALL
 533 HalTranslateBusAddress(
 534   INTERFACE_TYPE InterfaceType,
 535   ULONG BusNumber,
 536   PHYSICAL_ADDRESS BusAddress,
 537   PULONG AddressSpace,
 538   PPHYSICAL_ADDRESS TranslatedAddress)
 539 {
 540   UNIMPLEMENTED;
 541
 542   return TRUE;
 543 }
 544
 545
 546 VOID
 547 STDCALL
 548 IoAssignDriveLetters(
 549   PLOADER_PARAMETER_BLOCK LoaderBlock,
 550   PSTRING NtDeviceName,
 551   PUCHAR NtSystemPath,
 552   PSTRING NtSystemPathString)
 553 {
 554   UNIMPLEMENTED;
 555 }
 556
 557
 558 BOOLEAN
 559 STDCALL
 560 IoFlushAdapterBuffers(
 561   PADAPTER_OBJECT AdapterObject,
 562   PMDL Mdl,
 563   PVOID MapRegisterBase,
 564   PVOID CurrentVa,
 565   ULONG Length,
 566   BOOLEAN WriteToDevice)
 567 {
 568   UNIMPLEMENTED;
 569
 570   return TRUE;
 571 }
 572
 573
 574 VOID
 575 STDCALL
 576 IoFreeAdapterChannel(
 577   PADAPTER_OBJECT AdapterObject)
 578 {
 579   UNIMPLEMENTED;
 580 }
 581
 582
 583 VOID
 584 STDCALL
 585 IoFreeMapRegisters(
 586   PADAPTER_OBJECT AdapterObject,
 587   PVOID MapRegisterBase,
 588   ULONG NumberOfMapRegisters)
 589 {
 590   UNIMPLEMENTED;
 591 }
 592
 593
 594 PHYSICAL_ADDRESS
 595 STDCALL
 596 IoMapTransfer(
 597   PADAPTER_OBJECT AdapterObject,
 598   PMDL Mdl,
 599   PVOID MapRegisterBase,
 600   PVOID CurrentVa,
 601   PULONG Length,
 602   BOOLEAN WriteToDevice)
 603 {
 604   PHYSICAL_ADDRESS Address;
 605
 606   UNIMPLEMENTED;
 607
 608   Address.QuadPart = 0;
 609
 610   return Address;
 611 }
 612
 613
 614 BOOLEAN
 615 STDCALL
 616 KdPortGetByte(
 617   PUCHAR  ByteRecieved)
 618 {
 619   UNIMPLEMENTED;
 620
 621   return TRUE;
 622 }
 623
 624
 625 BOOLEAN
 626 STDCALL
 627 KdPortGetByteEx(
 628   PKD_PORT_INFORMATION PortInformation,
 629   PUCHAR  ByteRecieved)
 630 {
 631   UNIMPLEMENTED;
 632
 633   return TRUE;
 634 }
 635
 636
 637 BOOLEAN
 638 STDCALL
 639 KdPortInitialize(
 640   PKD_PORT_INFORMATION PortInformation,
 641   DWORD Unknown1,
 642   DWORD Unknown2)
 643 {
 644   UNIMPLEMENTED;
 645
 646   return TRUE;
 647 }
 648
 649
 650 BOOLEAN
 651 STDCALL
 652 KdPortInitializeEx(
 653   PKD_PORT_INFORMATION PortInformation,
 654   DWORD Unknown1,
 655   DWORD Unknown2)
 656 {
 657   UNIMPLEMENTED;
 658 }
 659
 660
 661 BOOLEAN
 662 STDCALL
 663 KdPortPollByte(
 664   PUCHAR  ByteRecieved)
 665 {
 666   UNIMPLEMENTED;
 667
 668   return TRUE;
 669 }
 670
 671
 672 BOOLEAN
 673 STDCALL
 674 KdPortPollByteEx(
 675   PKD_PORT_INFORMATION PortInformation,
 676   PUCHAR  ByteRecieved)
 677 {
 678   UNIMPLEMENTED;
 679
 680   return TRUE;
 681 }
 682
 683
 684 VOID
 685 STDCALL
 686 KdPortPutByte(
 687   UCHAR ByteToSend)
 688 {
 689   UNIMPLEMENTED;
 690 }
 691
 692
 693 VOID
 694 STDCALL
 695 KdPortPutByteEx(
 696   PKD_PORT_INFORMATION PortInformation,
 697   UCHAR ByteToSend)
 698 {
 699   UNIMPLEMENTED;
 700 }
 701
 702
 703 VOID
 704 STDCALL
 705 KdPortRestore(VOID)
 706 {
 707   UNIMPLEMENTED;
 708 }
 709
 710
 711 VOID
 712 STDCALL
 713 KdPortSave(VOID)
 714 {
 715   UNIMPLEMENTED;
 716 }
 717
 718
 719 BOOLEAN
 720 STDCALL
 721 KdPortDisableInterrupts()
 722 {
 723   UNIMPLEMENTED;
 724
 725   return FALSE;
 726 }
 727
 728
 729 BOOLEAN
 730 STDCALL
 731 KdPortEnableInterrupts()
 732 {
 733   UNIMPLEMENTED;
 734
 735   return FALSE;
 736 }
 737
 738
 739 VOID
 740 STDCALL
 741 KeAcquireSpinLock(
 742   PKSPIN_LOCK SpinLock,
 743   PKIRQL OldIrql)
 744 {
 745   UNIMPLEMENTED;
 746 }
 747
 748
 749 KIRQL
 750 FASTCALL
 751 KeAcquireSpinLockRaiseToSynch(
 752   PKSPIN_LOCK SpinLock)
 753 {
 754   UNIMPLEMENTED;
 755
 756   return 0;
 757 }
 758
 759
 760 VOID
 761 STDCALL
 762 KeFlushWriteBuffer(VOID)
 763 {
 764   UNIMPLEMENTED;
 765 }
 766
 767
 768 KIRQL
 769 STDCALL
 770 KeGetCurrentIrql(VOID)
 771 {
 772   UNIMPLEMENTED;
 773
 774   return (KIRQL)0;
 775 }
 776
 777
 778 VOID
 779 STDCALL
 780 KeLowerIrql(
 781   KIRQL NewIrql)
 782 {
 783   UNIMPLEMENTED;
 784 }
 785
 786
 787 LARGE_INTEGER
 788 STDCALL
 789 KeQueryPerformanceCounter(
 790   PLARGE_INTEGER PerformanceFreq)
 791 {
 792   LARGE_INTEGER Value;
 793
 794   UNIMPLEMENTED;
 795
 796   Value.QuadPart = 0;
 797
 798   return Value;
 799 }
 800
 801
 802 VOID
 803 STDCALL
 804 KeRaiseIrql(
 805   KIRQL NewIrql,
 806   PKIRQL OldIrql)
 807 {
 808   UNIMPLEMENTED;
 809 }
 810
 811
 812 KIRQL
 813 STDCALL
 814 KeRaiseIrqlToDpcLevel(VOID)
 815 {
 816   UNIMPLEMENTED;
 817
 818   return (KIRQL)0;
 819 }
 820
 821
 822 KIRQL
 823 STDCALL
 824 KeRaiseIrqlToSynchLevel(VOID)
 825 {
 826   UNIMPLEMENTED;
 827
 828   return (KIRQL)0;
 829 }
 830
 831
 832 VOID
 833 STDCALL
 834 KeReleaseSpinLock(
 835   PKSPIN_LOCK SpinLock,
 836   KIRQL NewIrql)
 837 {
 838   UNIMPLEMENTED;
 839 }
 840
 841
 842 VOID
 843 STDCALL
 844 KeStallExecutionProcessor(
 845   ULONG Microseconds)
 846 {
 847   UNIMPLEMENTED;
 848 }
 849
 850
 851 KIRQL
 852 FASTCALL
 853 KfAcquireSpinLock(
 854   PKSPIN_LOCK SpinLock)
 855 {
 856   UNIMPLEMENTED;
 857
 858   return (KIRQL)0;
 859 }
 860
 861
 862 VOID
 863 FASTCALL
 864 KfLowerIrql(
 865   KIRQL NewIrql)
 866 {
 867   UNIMPLEMENTED;
 868 }
 869
 870
 871 KIRQL
 872 FASTCALL
 873 KfRaiseIrql(
 874   KIRQL NewIrql)
 875 {
 876   UNIMPLEMENTED;
 877
 878   return (KIRQL)0;
 879 }
 880
 881
 882 VOID
 883 FASTCALL
 884 KfReleaseSpinLock(
 885   PKSPIN_LOCK SpinLock,
 886   KIRQL NewIrql)
 887 {
 888   UNIMPLEMENTED;
 889 }
 890
 891
 892 VOID
 893 STDCALL
 894 READ_PORT_BUFFER_UCHAR(
 895   PUCHAR Port,
 896   PUCHAR Buffer,
 897   ULONG Count)
 898 {
 899   UNIMPLEMENTED;
 900 }
 901
 902
 903 VOID
 904 STDCALL
 905 READ_PORT_BUFFER_ULONG(
 906   PULONG Port,
 907   PULONG Buffer,
 908   ULONG Count)
 909 {
 910   UNIMPLEMENTED;
 911 }
 912
 913
 914 VOID
 915 STDCALL
 916 READ_PORT_BUFFER_USHORT(
 917   PUSHORT Port,
 918   PUSHORT Buffer,
 919   ULONG Count)
 920 {
 921   UNIMPLEMENTED;
 922 }
 923
 924
 925 UCHAR
 926 STDCALL
 927 READ_PORT_UCHAR(
 928   PUCHAR Port)
 929 {
 930   UNIMPLEMENTED;
 931
 932   return 0;
 933 }
 934
 935
 936 ULONG
 937 STDCALL
 938 READ_PORT_ULONG(
 939   PULONG Port)
 940 {
 941   UNIMPLEMENTED;
 942
 943   return 0;
 944 }
 945
 946
 947 USHORT
 948 STDCALL
 949 READ_PORT_USHORT(
 950   PUSHORT Port)
 951 {
 952   UNIMPLEMENTED;
 953
 954   return 0;
 955 }
 956
 957
 958 VOID
 959 STDCALL
 960 WRITE_PORT_BUFFER_UCHAR(
 961   PUCHAR Port,
 962   PUCHAR Buffer,
 963   ULONG Count)
 964 {
 965   UNIMPLEMENTED;
 966 }
 967
 968
 969 VOID
 970 STDCALL
 971 WRITE_PORT_BUFFER_USHORT(
 972   PUSHORT Port,
 973   PUSHORT Buffer,
 974   ULONG Count)
 975 {
 976   UNIMPLEMENTED;
 977 }
 978
 979
 980 VOID
 981 STDCALL
 982 WRITE_PORT_BUFFER_ULONG(
 983   PULONG Port,
 984   PULONG Buffer,
 985   ULONG Count)
 986 {
 987   UNIMPLEMENTED;
 988 }
 989
 990
 991 VOID
 992 STDCALL
 993 WRITE_PORT_UCHAR(
 994   PUCHAR Port,
 995   UCHAR Value)
 996 {
 997   UNIMPLEMENTED;
 998 }
 999
1000 VOID
1001 STDCALL
1002 WRITE_PORT_ULONG(
1003   PULONG Port,
1004   ULONG Value)
1005 {
1006   UNIMPLEMENTED;
1007 }
1008
1009 VOID
1010 STDCALL
1011 WRITE_PORT_USHORT(
1012   PUSHORT Port,
1013   USHORT Value)
1014 {
1015   UNIMPLEMENTED;
1016 }
1017
1018 /* EOF */