[HAL]: Use Bus Handler support for HalFindBusAddressTranslation. Implement HalpContex...
[reactos.git] / reactos / hal / halx86 / generic / legacy / bussupp.c
1 /*
2 * PROJECT: ReactOS HAL
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: hal/halx86/generic/legacy/bussupp.c
5 * PURPOSE: HAL Legacy Bus Support Code
6 * PROGRAMMERS: ReactOS Portable Systems Group
7 */
8
9 /* INCLUDES *******************************************************************/
10
11 #include <hal.h>
12 #define NDEBUG
13 #include <debug.h>
14
15 /* GLOBALS ********************************************************************/
16
17 extern KSPIN_LOCK HalpPCIConfigLock;
18 ULONG HalpPciIrqMask;
19
20 /* PRIVATE FUNCTIONS **********************************************************/
21
22 PBUS_HANDLER
23 NTAPI
24 HalpAllocateBusHandler(IN INTERFACE_TYPE InterfaceType,
25 IN BUS_DATA_TYPE BusDataType,
26 IN ULONG BusNumber,
27 IN INTERFACE_TYPE ParentBusInterfaceType,
28 IN ULONG ParentBusNumber,
29 IN ULONG BusSpecificData)
30 {
31 PBUS_HANDLER Bus;
32
33 /* Register the bus handler */
34 HalRegisterBusHandler(InterfaceType,
35 BusDataType,
36 BusNumber,
37 ParentBusInterfaceType,
38 ParentBusNumber,
39 BusSpecificData,
40 NULL,
41 &Bus);
42 if (!Bus) return NULL;
43
44 /* Check for a valid interface */
45 if (InterfaceType != InterfaceTypeUndefined)
46 {
47 /* Allocate address ranges and zero them out */
48 Bus->BusAddresses = ExAllocatePoolWithTag(NonPagedPool,
49 sizeof(SUPPORTED_RANGES),
50 ' laH');
51 RtlZeroMemory(Bus->BusAddresses, sizeof(SUPPORTED_RANGES));
52
53 /* Build the data structure */
54 Bus->BusAddresses->Version = HAL_SUPPORTED_RANGE_VERSION;
55 Bus->BusAddresses->Dma.Limit = 7;
56 Bus->BusAddresses->Memory.Limit = 0xFFFFFFFF;
57 Bus->BusAddresses->IO.Limit = 0xFFFF;
58 Bus->BusAddresses->IO.SystemAddressSpace = 1;
59 Bus->BusAddresses->PrefetchMemory.Base = 1;
60 }
61
62 /* Return the bus address */
63 return Bus;
64 }
65
66 VOID
67 NTAPI
68 HalpRegisterInternalBusHandlers(VOID)
69 {
70 PBUS_HANDLER Bus;
71
72 /* Only do processor 1 */
73 if (KeGetCurrentPrcb()->Number) return;
74
75 /* Register root support */
76 HalpInitBusHandler();
77
78 /* Allocate the system bus */
79 Bus = HalpAllocateBusHandler(Internal,
80 ConfigurationSpaceUndefined,
81 0,
82 InterfaceTypeUndefined,
83 0,
84 0);
85 if (Bus)
86 {
87 /* Set it up */
88 Bus->GetInterruptVector = HalpGetSystemInterruptVector;
89 Bus->TranslateBusAddress = HalpTranslateSystemBusAddress;
90 }
91
92 /* Allocate the CMOS bus */
93 Bus = HalpAllocateBusHandler(InterfaceTypeUndefined,
94 Cmos,
95 0,
96 InterfaceTypeUndefined,
97 0,
98 0);
99 if (Bus)
100 {
101 /* Set it up */
102 Bus->GetBusData = HalpcGetCmosData;
103 Bus->SetBusData = HalpcSetCmosData;
104 }
105
106 /* Allocate the CMOS bus */
107 Bus = HalpAllocateBusHandler(InterfaceTypeUndefined,
108 Cmos,
109 1,
110 InterfaceTypeUndefined,
111 0,
112 0);
113 if (Bus)
114 {
115 /* Set it up */
116 Bus->GetBusData = HalpcGetCmosData;
117 Bus->SetBusData = HalpcSetCmosData;
118 }
119
120 /* Allocate ISA bus */
121 Bus = HalpAllocateBusHandler(Isa,
122 ConfigurationSpaceUndefined,
123 0,
124 Internal,
125 0,
126 0);
127 if (Bus)
128 {
129 /* Set it up */
130 Bus->GetBusData = HalpNoBusData;
131 Bus->BusAddresses->Memory.Limit = 0xFFFFFF;
132 Bus->TranslateBusAddress = HalpTranslateIsaBusAddress;
133 }
134
135 /* No support for EISA or MCA */
136 ASSERT(HalpBusType == MACHINE_TYPE_ISA);
137 }
138
139 #ifndef _MINIHAL_
140 NTSTATUS
141 NTAPI
142 HalpMarkChipsetDecode(BOOLEAN OverrideEnable)
143 {
144 NTSTATUS Status;
145 UNICODE_STRING KeyString;
146 ULONG Data = OverrideEnable;
147 HANDLE KeyHandle, Handle;
148
149 /* Open CCS key */
150 RtlInitUnicodeString(&KeyString,
151 L"\\REGISTRY\\MACHINE\\SYSTEM\\CURRENTCONTROLSET");
152 Status = HalpOpenRegistryKey(&Handle, 0, &KeyString, KEY_ALL_ACCESS, FALSE);
153 if (NT_SUCCESS(Status))
154 {
155 /* Open PNP Bios key */
156 RtlInitUnicodeString(&KeyString, L"Control\\Biosinfo\\PNPBios");
157 Status = HalpOpenRegistryKey(&KeyHandle,
158 Handle,
159 &KeyString,
160 KEY_ALL_ACCESS,
161 TRUE);
162
163 /* Close root key */
164 ZwClose(Handle);
165
166 /* Check if PNP BIOS key exists */
167 if (NT_SUCCESS(Status))
168 {
169 /* Set the override value */
170 RtlInitUnicodeString(&KeyString, L"FullDecodeChipsetOverride");
171 Status = ZwSetValueKey(KeyHandle,
172 &KeyString,
173 0,
174 REG_DWORD,
175 &Data,
176 sizeof(Data));
177
178 /* Close subkey */
179 ZwClose(KeyHandle);
180 }
181 }
182
183 /* Return status */
184 return Status;
185 }
186
187 PBUS_HANDLER
188 NTAPI
189 HalpAllocateAndInitPciBusHandler(IN ULONG PciType,
190 IN ULONG BusNo,
191 IN BOOLEAN TestAllocation)
192 {
193 PBUS_HANDLER Bus;
194 PPCIPBUSDATA BusData;
195
196 /* Allocate the bus handler */
197 Bus = HalpAllocateBusHandler(PCIBus,
198 PCIConfiguration,
199 BusNo,
200 Internal,
201 0,
202 sizeof(PCIPBUSDATA));
203
204 /* Set it up */
205 Bus->GetBusData = (PGETSETBUSDATA)HalpGetPCIData;
206 Bus->SetBusData = (PGETSETBUSDATA)HalpSetPCIData;
207 Bus->GetInterruptVector = (PGETINTERRUPTVECTOR)HalpGetPCIIntOnISABus;
208 Bus->AdjustResourceList = (PADJUSTRESOURCELIST)HalpAdjustPCIResourceList;
209 Bus->AssignSlotResources = (PASSIGNSLOTRESOURCES)HalpAssignPCISlotResources;
210 Bus->BusAddresses->Dma.Limit = 0;
211
212 /* Get our custom bus data */
213 BusData = (PPCIPBUSDATA)Bus->BusData;
214
215 /* Setup custom bus data */
216 BusData->CommonData.Tag = PCI_DATA_TAG;
217 BusData->CommonData.Version = PCI_DATA_VERSION;
218 BusData->CommonData.ReadConfig = (PciReadWriteConfig)HalpReadPCIConfig;
219 BusData->CommonData.WriteConfig = (PciReadWriteConfig)HalpWritePCIConfig;
220 BusData->CommonData.Pin2Line = (PciPin2Line)HalpPCIPin2ISALine;
221 BusData->CommonData.Line2Pin = (PciLine2Pin)HalpPCIISALine2Pin;
222 BusData->MaxDevice = PCI_MAX_DEVICES;
223 BusData->GetIrqRange = (PciIrqRange)HalpGetISAFixedPCIIrq;
224
225 /* Initialize the bitmap */
226 RtlInitializeBitMap(&BusData->DeviceConfigured, BusData->ConfiguredBits, 256);
227
228 /* Check the type of PCI bus */
229 switch (PciType)
230 {
231 /* Type 1 PCI Bus */
232 case 1:
233
234 /* Copy the Type 1 handler data */
235 RtlCopyMemory(&PCIConfigHandler,
236 &PCIConfigHandlerType1,
237 sizeof(PCIConfigHandler));
238
239 /* Set correct I/O Ports */
240 BusData->Config.Type1.Address = PCI_TYPE1_ADDRESS_PORT;
241 BusData->Config.Type1.Data = PCI_TYPE1_DATA_PORT;
242 break;
243
244 /* Type 2 PCI Bus */
245 case 2:
246
247 /* Copy the Type 1 handler data */
248 RtlCopyMemory(&PCIConfigHandler,
249 &PCIConfigHandlerType2,
250 sizeof (PCIConfigHandler));
251
252 /* Set correct I/O Ports */
253 BusData->Config.Type2.CSE = PCI_TYPE2_CSE_PORT;
254 BusData->Config.Type2.Forward = PCI_TYPE2_FORWARD_PORT;
255 BusData->Config.Type2.Base = PCI_TYPE2_ADDRESS_BASE;
256
257 /* Only 16 devices supported, not 32 */
258 BusData->MaxDevice = 16;
259 break;
260
261 default:
262
263 /* Invalid type */
264 DbgPrint("HAL: Unnkown PCI type\n");
265 }
266
267 /* Return the bus handler */
268 return Bus;
269 }
270
271 BOOLEAN
272 NTAPI
273 HalpIsValidPCIDevice(IN PBUS_HANDLER BusHandler,
274 IN PCI_SLOT_NUMBER Slot)
275 {
276 UCHAR DataBuffer[PCI_COMMON_HDR_LENGTH];
277 PPCI_COMMON_CONFIG PciHeader = (PVOID)DataBuffer;
278 ULONG i;
279 ULONG_PTR Address;
280
281 /* Read the PCI header */
282 HalpReadPCIConfig(BusHandler, Slot, PciHeader, 0, PCI_COMMON_HDR_LENGTH);
283
284 /* Make sure it's a valid device */
285 if ((PciHeader->VendorID == PCI_INVALID_VENDORID) ||
286 (PCI_CONFIGURATION_TYPE(PciHeader) != PCI_DEVICE_TYPE))
287 {
288 /* Bail out */
289 return FALSE;
290 }
291
292 /* Make sure interrupt numbers make sense */
293 if (((PciHeader->u.type0.InterruptPin) &&
294 (PciHeader->u.type0.InterruptPin > 4)) ||
295 (PciHeader->u.type0.InterruptLine & 0x70))
296 {
297 /* Bail out */
298 return FALSE;
299 }
300
301 /* Now scan PCI BARs */
302 for (i = 0; i < PCI_TYPE0_ADDRESSES; i++)
303 {
304 /* Check what kind of address it is */
305 Address = PciHeader->u.type0.BaseAddresses[i];
306 if (Address & PCI_ADDRESS_IO_SPACE)
307 {
308 /* Highest I/O port is 65535 */
309 if (Address > 0xFFFF) return FALSE;
310 }
311 else
312 {
313 /* MMIO should be higher than 0x80000 */
314 if ((Address > 0xF) && (Address < 0x80000)) return FALSE;
315 }
316
317 /* Is this a 64-bit address? */
318 if (!(Address & PCI_ADDRESS_IO_SPACE) &&
319 ((Address & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_64BIT))
320 {
321 /* Check the next-next entry, since this one 64-bits wide */
322 i++;
323 }
324 }
325
326 /* Header, interrupt and address data all make sense */
327 return TRUE;
328 }
329
330 static BOOLEAN WarningsGiven[5];
331
332 NTSTATUS
333 NTAPI
334 HalpGetChipHacks(IN USHORT VendorId,
335 IN USHORT DeviceId,
336 IN UCHAR RevisionId,
337 IN PULONG HackFlags)
338 {
339 UNICODE_STRING KeyName, ValueName;
340 NTSTATUS Status;
341 OBJECT_ATTRIBUTES ObjectAttributes;
342 HANDLE KeyHandle;
343 WCHAR Buffer[32];
344 KEY_VALUE_PARTIAL_INFORMATION PartialInfo;
345 ULONG ResultLength;
346
347 /* Setup the object attributes for the key */
348 RtlInitUnicodeString(&KeyName,
349 L"\\REGISTRY\\MACHINE\\SYSTEM\\CURRENTCONTROLSET\\"
350 L"Control\\HAL");
351 InitializeObjectAttributes(&ObjectAttributes,
352 &KeyName,
353 OBJ_CASE_INSENSITIVE,
354 NULL,
355 NULL);
356
357 /* Open the key */
358 Status = ZwOpenKey(&KeyHandle, KEY_READ, &ObjectAttributes);
359 if (!NT_SUCCESS(Status)) return Status;
360
361 /* Query value */
362 swprintf(Buffer, L"%04X%04X", VendorId, DeviceId);
363 RtlInitUnicodeString(&ValueName, Buffer);
364 Status = ZwQueryValueKey(KeyHandle,
365 &ValueName,
366 KeyValuePartialInformation,
367 &PartialInfo,
368 sizeof(PartialInfo),
369 &ResultLength);
370 if (NT_SUCCESS(Status))
371 {
372 /* Return the flags */
373 DbgPrint("\tFound HackFlags for your chipset\n");
374 *HackFlags = *(PULONG)PartialInfo.Data;
375 DbgPrint("\t\tHack Flags: %lx (Hack Revision: %lx-Your Revision: %lx)\n",
376 *HackFlags, HALP_REVISION_FROM_HACK_FLAGS(*HackFlags), RevisionId);
377
378 /* Does it apply to this revision? */
379 if ((RevisionId) && (RevisionId >= (HALP_REVISION_FROM_HACK_FLAGS(*HackFlags))))
380 {
381 /* Read the revision flags */
382 *HackFlags = HALP_REVISION_HACK_FLAGS(*HackFlags);
383 }
384
385 /* Throw out revision data */
386 *HackFlags = HALP_HACK_FLAGS(*HackFlags);
387 if (!*HackFlags) DbgPrint("\tNo HackFlags for your chipset's revision!\n");
388 }
389
390 /* Close the handle and return */
391 ZwClose(KeyHandle);
392 return Status;
393 }
394
395 BOOLEAN
396 NTAPI
397 HalpIsRecognizedCard(IN PPCI_REGISTRY_INFO_INTERNAL PciRegistryInfo,
398 IN PPCI_COMMON_CONFIG PciData,
399 IN ULONG Flags)
400 {
401 ULONG ElementCount, i;
402 PPCI_CARD_DESCRIPTOR CardDescriptor;
403
404 /* How many PCI Cards that we know about? */
405 ElementCount = PciRegistryInfo->ElementCount;
406 if (!ElementCount) return FALSE;
407
408 /* Loop all descriptors */
409 CardDescriptor = &PciRegistryInfo->CardList[0];
410 for (i = 0; i < ElementCount; i++, CardDescriptor++)
411 {
412 /* Check for flag match */
413 if (CardDescriptor->Flags != Flags) continue;
414
415 /* Check for VID-PID match */
416 if ((CardDescriptor->VendorID != PciData->VendorID) ||
417 (CardDescriptor->DeviceID != PciData->DeviceID))
418 {
419 /* Skip */
420 continue;
421 }
422
423 /* Check for revision match, if requested */
424 if ((CardDescriptor->Flags & HALP_CHECK_CARD_REVISION_ID) &&
425 (CardDescriptor->RevisionID != PciData->RevisionID))
426 {
427 /* Skip */
428 continue;
429 }
430
431 /* Check what kind of device this is */
432 switch (PCI_CONFIGURATION_TYPE(PciData))
433 {
434 /* CardBUS Bridge */
435 case PCI_CARDBUS_BRIDGE_TYPE:
436
437 /* This means the real device header is in the device-specific data */
438 PciData = (PPCI_COMMON_CONFIG)PciData->DeviceSpecific;
439
440 /* Normal PCI device */
441 case PCI_DEVICE_TYPE:
442
443 /* Check for subvendor match, if requested */
444 if ((CardDescriptor->Flags & HALP_CHECK_CARD_SUBVENDOR_ID) &&
445 (CardDescriptor->SubsystemVendorID != PciData->u.type0.SubVendorID))
446 {
447 /* Skip */
448 continue;
449 }
450
451 /* Check for subsystem match, if requested */
452 if ((CardDescriptor->Flags & HALP_CHECK_CARD_SUBSYSTEM_ID) &&
453 (CardDescriptor->SubsystemID != PciData->u.type0.SubSystemID))
454 {
455 /* Skip */
456 continue;
457 }
458
459 /* You made it! */
460 return TRUE;
461
462 /* PCI Bridge -- don't bother */
463 case PCI_BRIDGE_TYPE:
464 default:
465
466 /* Recognize it */
467 return TRUE;
468 }
469 }
470
471 /* This means the card isn't recognized */
472 return FALSE;
473 }
474
475 BOOLEAN
476 NTAPI
477 HalpIsIdeDevice(IN PPCI_COMMON_CONFIG PciData)
478 {
479 /* Simple test first */
480 if ((PciData->BaseClass == PCI_CLASS_MASS_STORAGE_CTLR) &&
481 (PciData->SubClass == PCI_SUBCLASS_MSC_IDE_CTLR))
482 {
483 /* The device is nice enough to admit it */
484 return TRUE;
485 }
486
487 /* Symphony 82C101 */
488 if (PciData->VendorID == 0x1C1C) return TRUE;
489
490 /* ALi MS4803 or M5219 */
491 if ((PciData->VendorID == 0x10B9) &&
492 ((PciData->DeviceID == 0x5215) || (PciData->DeviceID == 0x5219)))
493 {
494 return TRUE;
495 }
496
497 /* Appian Technology */
498 if ((PciData->VendorID == 0x1097) && (PciData->DeviceID == 0x38)) return TRUE;
499
500 /* Compaq Triflex Dual EIDE Controller */
501 if ((PciData->VendorID == 0xE11) && (PciData->DeviceID == 0xAE33)) return TRUE;
502
503 /* Micron PC Tech RZ1000 */
504 if ((PciData->VendorID == 0x1042) && (PciData->DeviceID == 0x1000)) return TRUE;
505
506 /* SiS 85C601 or 5513 [IDE] */
507 if ((PciData->VendorID == 0x1039) &&
508 ((PciData->DeviceID == 0x601) || (PciData->DeviceID == 0x5513)))
509 {
510 return TRUE;
511 }
512
513 /* Symphony Labs W83769F */
514 if ((PciData->VendorID == 0x10AD) &&
515 ((PciData->DeviceID == 0x1) || (PciData->DeviceID == 0x150)))
516 {
517 return TRUE;
518 }
519
520 /* UMC UM8673F */
521 if ((PciData->VendorID == 0x1060) && (PciData->DeviceID == 0x101)) return TRUE;
522
523 /* You've survived */
524 return FALSE;
525 }
526
527 BOOLEAN
528 NTAPI
529 HalpIsBridgeDevice(IN PPCI_COMMON_CONFIG PciData)
530 {
531 /* Either this is a PCI-to-PCI Bridge, or a CardBUS Bridge */
532 return (((PCI_CONFIGURATION_TYPE(PciData) == PCI_BRIDGE_TYPE) &&
533 (PciData->BaseClass == PCI_CLASS_BRIDGE_DEV) &&
534 (PciData->SubClass == PCI_SUBCLASS_BR_PCI_TO_PCI)) ||
535 ((PCI_CONFIGURATION_TYPE(PciData) == PCI_CARDBUS_BRIDGE_TYPE) &&
536 (PciData->BaseClass == PCI_CLASS_BRIDGE_DEV) &&
537 (PciData->SubClass == PCI_SUBCLASS_BR_CARDBUS)));
538 }
539
540 BOOLEAN
541 NTAPI
542 HalpGetPciBridgeConfig(IN ULONG PciType,
543 IN PUCHAR BusCount)
544 {
545 PCI_SLOT_NUMBER PciSlot;
546 ULONG i, j, k;
547 UCHAR DataBuffer[PCI_COMMON_HDR_LENGTH];
548 PPCI_COMMON_CONFIG PciData = (PPCI_COMMON_CONFIG)DataBuffer;
549 PBUS_HANDLER BusHandler;
550
551 /* Loop PCI buses */
552 PciSlot.u.bits.Reserved = 0;
553 for (i = 0; i < *BusCount; i++)
554 {
555 /* Get the bus handler */
556 BusHandler = HalHandlerForBus(PCIBus, i);
557
558 /* Loop every device */
559 for (j = 0; j < PCI_MAX_DEVICES; j++)
560 {
561 /* Loop every function */
562 PciSlot.u.bits.DeviceNumber = j;
563 for (k = 0; k < PCI_MAX_FUNCTION; k++)
564 {
565 /* Build the final slot structure */
566 PciSlot.u.bits.FunctionNumber = k;
567
568 /* Read the configuration information */
569 HalpReadPCIConfig(BusHandler,
570 PciSlot,
571 PciData,
572 0,
573 PCI_COMMON_HDR_LENGTH);
574
575 /* Skip if this is an invalid function */
576 if (PciData->VendorID == PCI_INVALID_VENDORID) continue;
577
578 /* Make sure that this is a PCI bridge or a cardbus bridge */
579 if (!HalpIsBridgeDevice(PciData)) continue;
580
581 /* Not supported */
582 if (!WarningsGiven[2]++) DPRINT1("Your machine has a PCI-to-PCI or CardBUS Bridge. PCI devices may fail!\n");
583 continue;
584 }
585 }
586 }
587
588 /* If we exited the loop, then there's no bridge to worry about */
589 return FALSE;
590 }
591
592 VOID
593 NTAPI
594 HalpFixupPciSupportedRanges(IN ULONG BusCount)
595 {
596 ULONG i;
597 PBUS_HANDLER Bus, ParentBus;
598
599 /* Loop all buses */
600 for (i = 0; i < BusCount; i++)
601 {
602 /* Get PCI bus handler */
603 Bus = HalHandlerForBus(PCIBus, i);
604
605 /* Loop all parent buses */
606 ParentBus = Bus->ParentHandler;
607 while (ParentBus)
608 {
609 /* Should merge addresses */
610 if (!WarningsGiven[0]++) DPRINT1("Found parent bus (indicating PCI Bridge). PCI devices may fail!\n");
611
612 /* Check the next parent */
613 ParentBus = ParentBus->ParentHandler;
614 }
615 }
616
617 /* Loop all buses again */
618 for (i = 0; i < BusCount; i++)
619 {
620 /* Get PCI bus handler */
621 Bus = HalHandlerForBus(PCIBus, i);
622
623 /* Check if this is a PCI 2.2 Bus with Subtractive Decode */
624 if (!((PPCIPBUSDATA)Bus->BusData)->Subtractive)
625 {
626 /* Loop all parent buses */
627 ParentBus = Bus->ParentHandler;
628 while (ParentBus)
629 {
630 /* But check only PCI parent buses specifically */
631 if (ParentBus->InterfaceType == PCIBus)
632 {
633 /* Should trim addresses */
634 if (!WarningsGiven[1]++) DPRINT1("Found parent PCI Bus (indicating PCI-to-PCI Bridge). PCI devices may fail!\n");
635 }
636
637 /* Check the next parent */
638 ParentBus = ParentBus->ParentHandler;
639 }
640 }
641 }
642
643 /* Loop buses one last time */
644 for (i = 0; i < BusCount; i++)
645 {
646 /* Get the PCI bus handler */
647 Bus = HalHandlerForBus(PCIBus, i);
648
649 /* Sort and combine (trim) bus address range information */
650 DPRINT("Warning: Bus addresses not being optimized!\n");
651 }
652 }
653
654 VOID
655 NTAPI
656 ShowSize(ULONG x)
657 {
658 if (!x) return;
659 DbgPrint(" [size=");
660 if (x < 1024)
661 {
662 DbgPrint("%d", (int) x);
663 }
664 else if (x < 1048576)
665 {
666 DbgPrint("%dK", (int)(x / 1024));
667 }
668 else if (x < 0x80000000)
669 {
670 DbgPrint("%dM", (int)(x / 1048576));
671 }
672 else
673 {
674 DbgPrint("%d", x);
675 }
676 DbgPrint("]\n");
677 }
678
679 VOID
680 NTAPI
681 HalpDebugPciBus(IN ULONG i,
682 IN ULONG j,
683 IN ULONG k,
684 IN PPCI_COMMON_CONFIG PciData)
685 {
686 extern CHAR ClassTable[3922];
687 extern CHAR VendorTable[642355];
688 PCHAR p, ClassName, SubClassName, VendorName, ProductName, SubVendorName;
689 ULONG Length;
690 CHAR LookupString[16] = "";
691 CHAR bSubClassName[32] = "";
692 CHAR bVendorName[32] = "";
693 CHAR bProductName[32] = "Unknown device";
694 CHAR bSubVendorName[32] = "Unknown";
695 ULONG Size, Mem, b;
696
697 /* Isolate the class name */
698 sprintf(LookupString, "C %02x", PciData->BaseClass);
699 ClassName = strstr(ClassTable, LookupString);
700 if (ClassName)
701 {
702 /* Isolate the subclass name */
703 ClassName += 6;
704 sprintf(LookupString, "\t%02x", PciData->SubClass);
705 SubClassName = strstr(ClassName, LookupString);
706 if (SubClassName)
707 {
708 /* Copy the subclass into our buffer */
709 SubClassName += 5;
710 p = strchr(SubClassName, '\r');
711 Length = p - SubClassName;
712 if (Length > sizeof(bSubClassName)) Length = sizeof(bSubClassName);
713 strncpy(bSubClassName, SubClassName, Length);
714 bSubClassName[Length] = '\0';
715 }
716 }
717
718 /* Isolate the vendor name */
719 sprintf(LookupString, "\n%04x ", PciData->VendorID);
720 VendorName = strstr(VendorTable, LookupString);
721 if (VendorName)
722 {
723 /* Copy the vendor name into our buffer */
724 VendorName += 7;
725 p = strchr(VendorName, '\r');
726 Length = p - VendorName;
727 if (Length > sizeof(bVendorName)) Length = sizeof(bVendorName);
728 strncpy(bVendorName, VendorName, Length);
729 bVendorName[Length ] = '\0';
730
731 /* Isolate the product name */
732 sprintf(LookupString, "\t%04x", PciData->DeviceID);
733 ProductName = strstr(VendorName, LookupString);
734 if (ProductName)
735 {
736 /* Copy the product name into our buffer */
737 ProductName += 7;
738 p = strchr(ProductName, '\r');
739 Length = p - ProductName;
740 if (Length > sizeof(bProductName)) Length = sizeof(bProductName);
741 strncpy(bProductName, ProductName, Length);
742 bProductName[Length] = '\0';
743
744 /* Isolate the subvendor and subsystem name */
745 sprintf(LookupString,
746 "\t\t%04x %04x ",
747 PciData->u.type0.SubVendorID,
748 PciData->u.type0.SubSystemID);
749 SubVendorName = strstr(ProductName, LookupString);
750 if (SubVendorName)
751 {
752 /* Copy the subvendor name into our buffer */
753 SubVendorName += 13;
754 p = strchr(SubVendorName, '\r');
755 Length = p - SubVendorName;
756 if (Length > sizeof(bSubVendorName)) Length = sizeof(bSubVendorName);
757 strncpy(bSubVendorName, SubVendorName, Length);
758 bSubVendorName[Length] = '\0';
759 }
760 }
761 }
762
763 /* Print out the data */
764 DbgPrint("%02x:%02x.%x %s [%02x%02x]: %s %s [%04x:%04x] (rev %02x)\n"
765 "\tSubsystem: %s [%04x:%04x]\n",
766 i,
767 j,
768 k,
769 bSubClassName,
770 PciData->BaseClass,
771 PciData->SubClass,
772 bVendorName,
773 bProductName,
774 PciData->VendorID,
775 PciData->DeviceID,
776 PciData->RevisionID,
777 bSubVendorName,
778 PciData->u.type0.SubVendorID,
779 PciData->u.type0.SubSystemID);
780
781 /* Print out and decode flags */
782 DbgPrint("\tFlags:");
783 if (PciData->Command & PCI_ENABLE_BUS_MASTER) DbgPrint(" bus master,");
784 if (PciData->Status & PCI_STATUS_66MHZ_CAPABLE) DbgPrint(" 66MHz,");
785 if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x200) DbgPrint(" medium devsel,");
786 if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x400) DbgPrint(" fast devsel,");
787 DbgPrint(" latency %d", PciData->LatencyTimer);
788 if (PciData->u.type0.InterruptLine) DbgPrint(", IRQ %02d", PciData->u.type0.InterruptLine);
789 DbgPrint("\n");
790
791 /* Scan addresses */
792 Size = 0;
793 for (b = 0; b < PCI_TYPE0_ADDRESSES; b++)
794 {
795 /* Check for a BAR */
796 Mem = PciData->u.type0.BaseAddresses[b];
797 if (Mem)
798 {
799 /* Decode the address type */
800 if (Mem & PCI_ADDRESS_IO_SPACE)
801 {
802 /* Decode the size */
803 Size = 1 << 2;
804 while (!(Mem & Size) && (Size)) Size <<= 1;
805
806 /* Print it out */
807 DbgPrint("\tI/O ports at %04lx", Mem & PCI_ADDRESS_IO_ADDRESS_MASK);
808 ShowSize(Size);
809 }
810 else
811 {
812 /* Decode the size */
813 Size = 1 << 8;
814 while (!(Mem & Size) && (Size)) Size <<= 1;
815
816 /* Print it out */
817 DbgPrint("\tMemory at %08lx (%d-bit, %sprefetchable)",
818 Mem & PCI_ADDRESS_MEMORY_ADDRESS_MASK,
819 (Mem & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_32BIT ? 32 : 64,
820 (Mem & PCI_ADDRESS_MEMORY_PREFETCHABLE) ? "" : "non-");
821 ShowSize(Size);
822 }
823 }
824 }
825 }
826 #endif
827
828 VOID
829 NTAPI
830 HalpInitializePciBus(VOID)
831 {
832 #ifndef _MINIHAL_
833 PPCI_REGISTRY_INFO_INTERNAL PciRegistryInfo;
834 UCHAR PciType;
835 PCI_SLOT_NUMBER PciSlot;
836 ULONG i, j, k;
837 UCHAR DataBuffer[PCI_COMMON_HDR_LENGTH];
838 PPCI_COMMON_CONFIG PciData = (PPCI_COMMON_CONFIG)DataBuffer;
839 PBUS_HANDLER BusHandler;
840 ULONG HackFlags;
841 BOOLEAN ExtendedAddressDecoding = FALSE;
842 NTSTATUS Status;
843
844 /* Query registry information */
845 PciRegistryInfo = HalpQueryPciRegistryInfo();
846 if (!PciRegistryInfo) return;
847
848 /* Initialize the PCI configuration lock */
849 KeInitializeSpinLock(&HalpPCIConfigLock);
850
851 /* Get the type and free the info structure */
852 PciType = PciRegistryInfo->HardwareMechanism & 0xF;
853
854 /* Check if this is a type 2 PCI bus with at least one bus */
855 if ((PciRegistryInfo->NoBuses) && (PciType == 2))
856 {
857 /* Setup the PCI slot */
858 PciSlot.u.bits.Reserved = 0;
859 PciSlot.u.bits.FunctionNumber = 0;
860
861 /* Loop all slots */
862 for (i = 0; i < 32; i++)
863 {
864 /* Try to setup a Type 2 PCI slot */
865 PciType = 2;
866 BusHandler = HalpAllocateAndInitPciBusHandler(2, 0, TRUE);
867 if (!BusHandler) break;
868
869 /* Now check if it's valid */
870 if (HalpIsValidPCIDevice(BusHandler, PciSlot)) break;
871
872 /* Heh, the BIOS lied... try Type 1 */
873 PciType = 1;
874 BusHandler = HalpAllocateAndInitPciBusHandler(1, 0, TRUE);
875 if (!BusHandler) break;
876
877 /* Now check if it's valid */
878 if (HalpIsValidPCIDevice(BusHandler, PciSlot)) break;
879
880 /* Keep trying */
881 PciType = 2;
882 }
883
884 /* Now allocate the correct kind of handler */
885 HalpAllocateAndInitPciBusHandler(PciType, 0, FALSE);
886 }
887
888 /* Okay, now loop all PCI bridges */
889 do
890 {
891 /* Loop all PCI buses */
892 for (i = 0; i < PciRegistryInfo->NoBuses; i++)
893 {
894 /* Check if we have a handler for it */
895 if (!HalHandlerForBus(PCIBus, i))
896 {
897 /* Allocate it */
898 HalpAllocateAndInitPciBusHandler(PciType, i, FALSE);
899 }
900 }
901 /* Go to the next bridge */
902 } while (HalpGetPciBridgeConfig(PciType, &PciRegistryInfo->NoBuses));
903
904 /* Now build correct address range informaiton */
905 HalpFixupPciSupportedRanges(PciRegistryInfo->NoBuses);
906
907 /* Loop every bus */
908 DbgPrint("\n====== PCI BUS HARDWARE DETECTION =======\n\n");
909 PciSlot.u.bits.Reserved = 0;
910 for (i = 0; i < PciRegistryInfo->NoBuses; i++)
911 {
912 /* Get the bus handler */
913 BusHandler = HalHandlerForBus(PCIBus, i);
914
915 /* Loop every device */
916 for (j = 0; j < 32; j++)
917 {
918 /* Loop every function */
919 PciSlot.u.bits.DeviceNumber = j;
920 for (k = 0; k < 8; k++)
921 {
922 /* Build the final slot structure */
923 PciSlot.u.bits.FunctionNumber = k;
924
925 /* Read the configuration information */
926 HalpReadPCIConfig(BusHandler,
927 PciSlot,
928 PciData,
929 0,
930 PCI_COMMON_HDR_LENGTH);
931
932 /* Skip if this is an invalid function */
933 if (PciData->VendorID == PCI_INVALID_VENDORID) continue;
934
935 /* Print out the entry */
936 HalpDebugPciBus(i, j, k, PciData);
937
938 /* Check if this is a Cardbus bridge */
939 if (PCI_CONFIGURATION_TYPE(PciData) == PCI_CARDBUS_BRIDGE_TYPE)
940 {
941 /* Not supported */
942 DbgPrint("\tDevice is a PCI Cardbus Bridge. It will not work!\n");
943 continue;
944 }
945
946 /* Check if this is a PCI device */
947 if (PCI_CONFIGURATION_TYPE(PciData) != PCI_BRIDGE_TYPE)
948 {
949 /* Check if it has an interrupt pin and line registered */
950 if ((PciData->u.type1.InterruptPin) &&
951 (PciData->u.type1.InterruptLine))
952 {
953 /* Check if this interrupt line is connected to the bus */
954 if (PciData->u.type1.InterruptLine < 16)
955 {
956 /* Is this an IDE device? */
957 if (!HalpIsIdeDevice(PciData))
958 {
959 /* We'll mask out this interrupt then */
960 DbgPrint("\tDevice is using IRQ %d! ISA Cards using that IRQ may fail!\n",
961 PciData->u.type1.InterruptLine);
962 HalpPciIrqMask |= (1 << PciData->u.type1.InterruptLine);
963 }
964 }
965 }
966 }
967
968 /* Check for broken Intel chips */
969 if (PciData->VendorID == 0x8086)
970 {
971 /* Check for broken 82830 PCI controller */
972 if ((PciData->DeviceID == 0x04A3) &&
973 (PciData->RevisionID < 0x11))
974 {
975 /* Skip */
976 DbgPrint("\tDevice is a broken Intel 82430 PCI Controller. It will not work!\n\n");
977 continue;
978 }
979
980 /* Check for broken 82378 PCI-to-ISA Bridge */
981 if ((PciData->DeviceID == 0x0484) &&
982 (PciData->RevisionID <= 3))
983 {
984 /* Skip */
985 DbgPrint("\tDevice is a broken Intel 82378 PCI-to-ISA Bridge. It will not work!\n\n");
986 continue;
987 }
988
989 /* Check for broken 82450 PCI Bridge */
990 if ((PciData->DeviceID == 0x84C4) &&
991 (PciData->RevisionID <= 4))
992 {
993 DbgPrint("\tDevice is a Intel Orion 82450 PCI Bridge. It will not work!\n\n");
994 continue;
995 }
996 }
997
998 /* Do we know this card? */
999 if (!ExtendedAddressDecoding)
1000 {
1001 /* Check for it */
1002 if (HalpIsRecognizedCard(PciRegistryInfo,
1003 PciData,
1004 HALP_CARD_FEATURE_FULL_DECODE))
1005 {
1006 /* We'll do chipset checks later */
1007 DbgPrint("\tDevice has Extended Address Decoding. It may fail to work on older BIOSes!\n");
1008 ExtendedAddressDecoding = TRUE;
1009 }
1010 }
1011
1012 /* Check if this is a USB controller */
1013 if ((PciData->BaseClass == PCI_CLASS_SERIAL_BUS_CTLR) &&
1014 (PciData->SubClass == PCI_SUBCLASS_SB_USB))
1015 {
1016 /* Check if this is an OHCI controller */
1017 if (PciData->ProgIf == 0x10)
1018 {
1019 DbgPrint("\tDevice is an OHCI (USB) PCI Expansion Card. Turn off Legacy USB in your BIOS!\n\n");
1020 continue;
1021 }
1022
1023 /* Check for Intel UHCI controller */
1024 if (PciData->VendorID == 0x8086)
1025 {
1026 DbgPrint("\tDevice is an Intel UHCI (USB) Controller. Turn off Legacy USB in your BIOS!\n\n");
1027 continue;
1028 }
1029
1030 /* Check for VIA UHCI controller */
1031 if (PciData->VendorID == 0x1106)
1032 {
1033 DbgPrint("\tDevice is a VIA UHCI (USB) Controller. Turn off Legacy USB in your BIOS!\n\n");
1034 continue;
1035 }
1036 }
1037
1038 /* Now check the registry for chipset hacks */
1039 Status = HalpGetChipHacks(PciData->VendorID,
1040 PciData->DeviceID,
1041 PciData->RevisionID,
1042 &HackFlags);
1043 if (NT_SUCCESS(Status))
1044 {
1045 /* Check for broken ACPI routing */
1046 if (HackFlags & HAL_PCI_CHIP_HACK_DISABLE_ACPI_IRQ_ROUTING)
1047 {
1048 DbgPrint("This chipset has broken ACPI IRQ Routing! Be aware!\n\n");
1049 continue;
1050 }
1051
1052 /* Check for broken ACPI timer */
1053 if (HackFlags & HAL_PCI_CHIP_HACK_BROKEN_ACPI_TIMER)
1054 {
1055 DbgPrint("This chipset has a broken ACPI timer! Be aware!\n\n");
1056 continue;
1057 }
1058
1059 /* Check for hibernate-disable */
1060 if (HackFlags & HAL_PCI_CHIP_HACK_DISABLE_HIBERNATE)
1061 {
1062 DbgPrint("This chipset has a broken PCI device which is incompatible with hibernation. Be aware!\n\n");
1063 continue;
1064 }
1065
1066 /* Check for USB controllers that generate SMIs */
1067 if (HackFlags & HAL_PCI_CHIP_HACK_USB_SMI_DISABLE)
1068 {
1069 DbgPrint("This chipset has a USB controller which generates SMIs. ReactOS will likely fail to boot!\n\n");
1070 continue;
1071 }
1072 }
1073
1074 /* Terminate the entry */
1075 DbgPrint("\n");
1076 }
1077 }
1078 }
1079
1080 /* Initialize NMI Crash Flag */
1081 HalpGetNMICrashFlag();
1082
1083 /* Free the registry data */
1084 ExFreePool(PciRegistryInfo);
1085
1086 /* Tell PnP if this hard supports correct decoding */
1087 HalpMarkChipsetDecode(ExtendedAddressDecoding);
1088 DbgPrint("====== PCI BUS DETECTION COMPLETE =======\n\n");
1089 #endif
1090 }
1091
1092 VOID
1093 NTAPI
1094 HalpInitBusHandlers(VOID)
1095 {
1096 /* Register the HAL Bus Handler support */
1097 HalpRegisterInternalBusHandlers();
1098 }
1099
1100 VOID
1101 NTAPI
1102 HalpRegisterKdSupportFunctions(VOID)
1103 {
1104 /* Register PCI Device Functions */
1105 KdSetupPciDeviceForDebugging = HalpSetupPciDeviceForDebugging;
1106 KdReleasePciDeviceforDebugging = HalpReleasePciDeviceForDebugging;
1107
1108 /* Register memory functions */
1109 #ifndef _MINIHAL_
1110 KdMapPhysicalMemory64 = HalpMapPhysicalMemory64;
1111 KdUnmapVirtualAddress = HalpUnmapVirtualAddress;
1112 #endif
1113
1114 /* Register ACPI stub */
1115 KdCheckPowerButton = HalpCheckPowerButton;
1116 }
1117
1118 NTSTATUS
1119 NTAPI
1120 HalpAssignSlotResources(IN PUNICODE_STRING RegistryPath,
1121 IN PUNICODE_STRING DriverClassName,
1122 IN PDRIVER_OBJECT DriverObject,
1123 IN PDEVICE_OBJECT DeviceObject,
1124 IN INTERFACE_TYPE BusType,
1125 IN ULONG BusNumber,
1126 IN ULONG SlotNumber,
1127 IN OUT PCM_RESOURCE_LIST *AllocatedResources)
1128 {
1129 PBUS_HANDLER Handler;
1130 NTSTATUS Status;
1131 PAGED_CODE();
1132 DPRINT1("Slot assignment for %d on bus %d\n", BusType, BusNumber);
1133
1134 /* Find the handler */
1135 Handler = HalReferenceHandlerForBus(BusType, BusNumber);
1136 if (!Handler) return STATUS_NOT_FOUND;
1137
1138 /* Do the assignment */
1139 Status = Handler->AssignSlotResources(Handler,
1140 Handler,
1141 RegistryPath,
1142 DriverClassName,
1143 DriverObject,
1144 DeviceObject,
1145 SlotNumber,
1146 AllocatedResources);
1147
1148 /* Dereference the handler and return */
1149 HalDereferenceBusHandler(Handler);
1150 return Status;
1151 }
1152
1153 BOOLEAN
1154 NTAPI
1155 HaliFindBusAddressTranslation(IN PHYSICAL_ADDRESS BusAddress,
1156 IN OUT PULONG AddressSpace,
1157 OUT PPHYSICAL_ADDRESS TranslatedAddress,
1158 IN OUT PULONG_PTR Context,
1159 IN BOOLEAN NextBus)
1160 {
1161 PHAL_BUS_HANDLER BusHandler;
1162 PBUS_HANDLER Handler;
1163 PLIST_ENTRY NextEntry;
1164 ULONG ContextValue;
1165
1166 /* Make sure we have a context */
1167 if (!Context) return FALSE;
1168 ASSERT((*Context) || (NextBus == TRUE));
1169
1170 /* Read the context */
1171 ContextValue = *Context;
1172
1173 /* Find the bus handler */
1174 Handler = HalpContextToBusHandler(ContextValue);
1175 if (!Handler) return FALSE;
1176
1177 /* Check if this is an ongoing lookup */
1178 if (NextBus)
1179 {
1180 /* Get the HAL bus handler */
1181 BusHandler = CONTAINING_RECORD(Handler, HAL_BUS_HANDLER, Handler);
1182 NextEntry = &BusHandler->AllHandlers;
1183
1184 /* Get the next one if we were already with one */
1185 if (ContextValue) NextEntry = NextEntry->Flink;
1186
1187 /* Start scanning */
1188 while (TRUE)
1189 {
1190 /* Check if this is the last one */
1191 if (NextEntry == &HalpAllBusHandlers)
1192 {
1193 /* Quit */
1194 *Context = 1;
1195 return FALSE;
1196 }
1197
1198 /* Call this translator */
1199 BusHandler = CONTAINING_RECORD(NextEntry, HAL_BUS_HANDLER, AllHandlers);
1200 if (HalTranslateBusAddress(BusHandler->Handler.InterfaceType,
1201 BusHandler->Handler.BusNumber,
1202 BusAddress,
1203 AddressSpace,
1204 TranslatedAddress)) break;
1205
1206 /* Try the next one */
1207 NextEntry = NextEntry->Flink;
1208 }
1209
1210 /* If we made it, we're done */
1211 *Context = (ULONG_PTR)Handler;
1212 return TRUE;
1213 }
1214
1215 /* Try the first one through */
1216 if (!HalTranslateBusAddress(Handler->InterfaceType,
1217 Handler->BusNumber,
1218 BusAddress,
1219 AddressSpace,
1220 TranslatedAddress)) return FALSE;
1221
1222 /* Remember for next time */
1223 *Context = (ULONG_PTR)Handler;
1224 return TRUE;
1225 }
1226
1227 BOOLEAN
1228 NTAPI
1229 HaliTranslateBusAddress(IN INTERFACE_TYPE InterfaceType,
1230 IN ULONG BusNumber,
1231 IN PHYSICAL_ADDRESS BusAddress,
1232 IN OUT PULONG AddressSpace,
1233 OUT PPHYSICAL_ADDRESS TranslatedAddress)
1234 {
1235 PBUS_HANDLER Handler;
1236 BOOLEAN Status;
1237
1238 /* Find the handler */
1239 Handler = HalReferenceHandlerForBus(InterfaceType, BusNumber);
1240 if (!(Handler) || !(Handler->TranslateBusAddress))
1241 {
1242 DPRINT1("No translator!\n");
1243 return FALSE;
1244 }
1245
1246 /* Do the assignment */
1247 Status = Handler->TranslateBusAddress(Handler,
1248 Handler,
1249 BusAddress,
1250 AddressSpace,
1251 TranslatedAddress);
1252
1253 /* Dereference the handler and return */
1254 HalDereferenceBusHandler(Handler);
1255 return Status;
1256 }
1257
1258 /* PUBLIC FUNCTIONS **********************************************************/
1259
1260 /*
1261 * @implemented
1262 */
1263 NTSTATUS
1264 NTAPI
1265 HalAdjustResourceList(IN PIO_RESOURCE_REQUIREMENTS_LIST *ResourceList)
1266 {
1267 PBUS_HANDLER Handler;
1268 ULONG Status;
1269 PAGED_CODE();
1270
1271 /* Find the handler */
1272 Handler = HalReferenceHandlerForBus((*ResourceList)->InterfaceType,
1273 (*ResourceList)->BusNumber);
1274 if (!Handler) return STATUS_SUCCESS;
1275
1276 /* Do the assignment */
1277 Status = Handler->AdjustResourceList(Handler,
1278 Handler,
1279 ResourceList);
1280
1281 /* Dereference the handler and return */
1282 HalDereferenceBusHandler(Handler);
1283 return Status;
1284 }
1285
1286 /*
1287 * @implemented
1288 */
1289 NTSTATUS
1290 NTAPI
1291 HalAssignSlotResources(IN PUNICODE_STRING RegistryPath,
1292 IN PUNICODE_STRING DriverClassName,
1293 IN PDRIVER_OBJECT DriverObject,
1294 IN PDEVICE_OBJECT DeviceObject,
1295 IN INTERFACE_TYPE BusType,
1296 IN ULONG BusNumber,
1297 IN ULONG SlotNumber,
1298 IN OUT PCM_RESOURCE_LIST *AllocatedResources)
1299 {
1300 PAGED_CODE();
1301
1302 /* Check the bus type */
1303 if (BusType != PCIBus)
1304 {
1305 /* Call our internal handler */
1306 return HalpAssignSlotResources(RegistryPath,
1307 DriverClassName,
1308 DriverObject,
1309 DeviceObject,
1310 BusType,
1311 BusNumber,
1312 SlotNumber,
1313 AllocatedResources);
1314 }
1315 else
1316 {
1317 /* Call the PCI registered function */
1318 return HalPciAssignSlotResources(RegistryPath,
1319 DriverClassName,
1320 DriverObject,
1321 DeviceObject,
1322 PCIBus,
1323 BusNumber,
1324 SlotNumber,
1325 AllocatedResources);
1326 }
1327 }
1328
1329 /*
1330 * @implemented
1331 */
1332 ULONG
1333 NTAPI
1334 HalGetBusData(IN BUS_DATA_TYPE BusDataType,
1335 IN ULONG BusNumber,
1336 IN ULONG SlotNumber,
1337 IN PVOID Buffer,
1338 IN ULONG Length)
1339 {
1340 /* Call the extended function */
1341 return HalGetBusDataByOffset(BusDataType,
1342 BusNumber,
1343 SlotNumber,
1344 Buffer,
1345 0,
1346 Length);
1347 }
1348
1349 /*
1350 * @implemented
1351 */
1352 ULONG
1353 NTAPI
1354 HalGetBusDataByOffset(IN BUS_DATA_TYPE BusDataType,
1355 IN ULONG BusNumber,
1356 IN ULONG SlotNumber,
1357 IN PVOID Buffer,
1358 IN ULONG Offset,
1359 IN ULONG Length)
1360 {
1361 PBUS_HANDLER Handler;
1362 ULONG Status;
1363
1364 /* Find the handler */
1365 Handler = HaliReferenceHandlerForConfigSpace(BusDataType, BusNumber);
1366 if (!Handler) return 0;
1367
1368 /* Do the assignment */
1369 Status = Handler->GetBusData(Handler,
1370 Handler,
1371 SlotNumber,
1372 Buffer,
1373 Offset,
1374 Length);
1375
1376 /* Dereference the handler and return */
1377 HalDereferenceBusHandler(Handler);
1378 return Status;
1379 }
1380
1381 /*
1382 * @implemented
1383 */
1384 ULONG
1385 NTAPI
1386 HalGetInterruptVector(IN INTERFACE_TYPE InterfaceType,
1387 IN ULONG BusNumber,
1388 IN ULONG BusInterruptLevel,
1389 IN ULONG BusInterruptVector,
1390 OUT PKIRQL Irql,
1391 OUT PKAFFINITY Affinity)
1392 {
1393 PBUS_HANDLER Handler;
1394 ULONG Vector;
1395 PAGED_CODE();
1396
1397 /* Defaults */
1398 *Irql = 0;
1399 *Affinity = 0;
1400
1401 /* Find the handler */
1402 Handler = HalReferenceHandlerForBus(InterfaceType, BusNumber);
1403 if (!Handler) return 0;
1404
1405 /* Do the assignment */
1406 Vector = Handler->GetInterruptVector(Handler,
1407 Handler,
1408 BusInterruptLevel,
1409 BusInterruptVector,
1410 Irql,
1411 Affinity);
1412 if ((Vector != IRQ2VECTOR(BusInterruptLevel)) ||
1413 (*Irql != VECTOR2IRQL(IRQ2VECTOR(BusInterruptLevel))))
1414 {
1415 DPRINT1("Returning IRQL %lx, Vector %lx for Level/Vector: %lx/%lx\n",
1416 *Irql, Vector, BusInterruptLevel, BusInterruptVector);
1417 DPRINT1("Old HAL would've returned IRQL %lx and Vector %lx\n",
1418 VECTOR2IRQL(IRQ2VECTOR(BusInterruptLevel)),
1419 IRQ2VECTOR(BusInterruptLevel));
1420 }
1421
1422 /* Dereference the handler and return */
1423 HalDereferenceBusHandler(Handler);
1424 return Vector;
1425 }
1426
1427 /*
1428 * @implemented
1429 */
1430 ULONG
1431 NTAPI
1432 HalSetBusData(IN BUS_DATA_TYPE BusDataType,
1433 IN ULONG BusNumber,
1434 IN ULONG SlotNumber,
1435 IN PVOID Buffer,
1436 IN ULONG Length)
1437 {
1438 /* Call the extended function */
1439 return HalSetBusDataByOffset(BusDataType,
1440 BusNumber,
1441 SlotNumber,
1442 Buffer,
1443 0,
1444 Length);
1445 }
1446
1447 /*
1448 * @implemented
1449 */
1450 ULONG
1451 NTAPI
1452 HalSetBusDataByOffset(IN BUS_DATA_TYPE BusDataType,
1453 IN ULONG BusNumber,
1454 IN ULONG SlotNumber,
1455 IN PVOID Buffer,
1456 IN ULONG Offset,
1457 IN ULONG Length)
1458 {
1459 PBUS_HANDLER Handler;
1460 ULONG Status;
1461
1462 /* Find the handler */
1463 Handler = HaliReferenceHandlerForConfigSpace(BusDataType, BusNumber);
1464 if (!Handler) return 0;
1465
1466 /* Do the assignment */
1467 Status = Handler->SetBusData(Handler,
1468 Handler,
1469 SlotNumber,
1470 Buffer,
1471 Offset,
1472 Length);
1473
1474 /* Dereference the handler and return */
1475 HalDereferenceBusHandler(Handler);
1476 return Status;
1477 }
1478
1479 /*
1480 * @implemented
1481 */
1482 BOOLEAN
1483 NTAPI
1484 HalTranslateBusAddress(IN INTERFACE_TYPE InterfaceType,
1485 IN ULONG BusNumber,
1486 IN PHYSICAL_ADDRESS BusAddress,
1487 IN OUT PULONG AddressSpace,
1488 OUT PPHYSICAL_ADDRESS TranslatedAddress)
1489 {
1490 /* Look as the bus type */
1491 if (InterfaceType == PCIBus)
1492 {
1493 /* Call the PCI registered function */
1494 return HalPciTranslateBusAddress(PCIBus,
1495 BusNumber,
1496 BusAddress,
1497 AddressSpace,
1498 TranslatedAddress);
1499 }
1500 else
1501 {
1502 /* Call the bus handler */
1503 return HaliTranslateBusAddress(InterfaceType,
1504 BusNumber,
1505 BusAddress,
1506 AddressSpace,
1507 TranslatedAddress);
1508 }
1509 }
1510
1511 /* EOF */