4f41d35980e4d0582bbb687d55cb1a4351e65609
[reactos.git] / reactos / hal / halx86 / generic / timer.c
1 /*
2 * ReactOS kernel
3 * Copyright (C) 2000 David Welch <welch@cwcom.net>
4 * Copyright (C) 1999 Gareth Owen <gaz@athene.co.uk>, Ramon von Handel
5 * Copyright (C) 1991, 1992 Linus Torvalds
6 *
7 * This software is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of the
10 * License, or (at your option) any later version.
11 *
12 * This software is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this software; see the file COPYING. If not, write
19 * to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge,
20 * MA 02139, USA.
21 *
22 */
23 /* $Id$
24 *
25 * PROJECT: ReactOS kernel
26 * FILE: ntoskrnl/hal/x86/udelay.c
27 * PURPOSE: Busy waiting
28 * PROGRAMMER: David Welch (david.welch@seh.ox.ac.uk)
29 * UPDATE HISTORY:
30 * 06/11/99 Created
31 */
32
33 /* INCLUDES ***************************************************************/
34
35 #include <ddk/ntddk.h>
36 #include <internal/ps.h>
37 #include <hal.h>
38
39 #define NDEBUG
40 #include <internal/debug.h>
41
42 /* GLOBALS ******************************************************************/
43
44 #define TMR_CTRL 0x43 /* I/O for control */
45 #define TMR_CNT0 0x40 /* I/O for counter 0 */
46 #define TMR_CNT1 0x41 /* I/O for counter 1 */
47 #define TMR_CNT2 0x42 /* I/O for counter 2 */
48
49 #define TMR_SC0 0 /* Select channel 0 */
50 #define TMR_SC1 0x40 /* Select channel 1 */
51 #define TMR_SC2 0x80 /* Select channel 2 */
52
53 #define TMR_LOW 0x10 /* RW low byte only */
54 #define TMR_HIGH 0x20 /* RW high byte only */
55 #define TMR_BOTH 0x30 /* RW both bytes */
56
57 #define TMR_MD0 0 /* Mode 0 */
58 #define TMR_MD1 0x2 /* Mode 1 */
59 #define TMR_MD2 0x4 /* Mode 2 */
60 #define TMR_MD3 0x6 /* Mode 3 */
61 #define TMR_MD4 0x8 /* Mode 4 */
62 #define TMR_MD5 0xA /* Mode 5 */
63
64 #define TMR_BCD 1 /* BCD mode */
65
66 #define TMR_LATCH 0 /* Latch command */
67
68 #define TMR_READ 0xF0 /* Read command */
69 #define TMR_CNT 0x20 /* CNT bit (Active low, subtract it) */
70 #define TMR_STAT 0x10 /* Status bit (Active low, subtract it) */
71 #define TMR_CH2 0x8 /* Channel 2 bit */
72 #define TMR_CH1 0x4 /* Channel 1 bit */
73 #define TMR_CH0 0x2 /* Channel 0 bit */
74
75 #define MILLISEC 10 /* Number of millisec between interrupts */
76 #define HZ (1000 / MILLISEC) /* Number of interrupts per second */
77 #define CLOCK_TICK_RATE 1193182 /* Clock frequency of the timer chip */
78 #define LATCH (CLOCK_TICK_RATE / HZ) /* Count to program into the timer chip */
79 #define PRECISION 8 /* Number of bits to calibrate for delay loop */
80
81 static BOOLEAN UdelayCalibrated = FALSE;
82
83 /* FUNCTIONS **************************************************************/
84
85 /*
86 * NOTE: This function MUST NOT be optimized by the compiler!
87 * If it is, it obviously will not delay AT ALL, and the system
88 * will appear completely frozen at boot since
89 * HalpCalibrateStallExecution will never return.
90 * There are three options to stop optimization:
91 * 1. Use a volatile automatic variable. Making it delay quite a bit
92 * due to memory accesses, and keeping the code portable. However,
93 * as this involves memory access it depends on both the CPU cache,
94 * e.g. if the stack used is already in a cache line or not, and
95 * whether or not we're MP. If MP, another CPU could (probably would)
96 * also access RAM at the same time - making the delay imprecise.
97 * 2. Use compiler-specific #pragma's to disable optimization.
98 * 3. Use inline assembly, making it equally unportable as #2.
99 * For supported compilers we use inline assembler. For the others,
100 * portable plain C.
101 */
102 VOID STDCALL __attribute__((noinline))
103 __KeStallExecutionProcessor(ULONG Loops)
104 {
105 if (!Loops)
106 {
107 return;
108 }
109 #if defined(__GNUC__)
110 __asm__ __volatile__ (
111 "mov %0, %%eax\n"
112 "ROSL1: dec %%eax\n"
113 "jnz ROSL1" : : "d" (Loops));
114
115 #elif defined(_MSC_VER)
116 __asm mov eax, Loops
117 ROSL1:
118 __asm dec eax
119 __asm jnz ROSL1
120 #else
121 volatile unsigned int target = Loops;
122 unsigned int i;
123 for (i=0; i<target;i++);
124 #endif
125 }
126
127 VOID STDCALL KeStallExecutionProcessor(ULONG Microseconds)
128 {
129 PKPCR Pcr = KeGetCurrentKPCR();
130
131 if (Pcr->PrcbData.FeatureBits & X86_FEATURE_TSC)
132 {
133 LARGE_INTEGER EndCount, CurrentCount;
134 Ki386RdTSC(EndCount);
135 EndCount.QuadPart += Microseconds * (ULONGLONG)Pcr->PrcbData.MHz;
136 do
137 {
138 Ki386RdTSC(CurrentCount);
139 }
140 while (CurrentCount.QuadPart < EndCount.QuadPart);
141 }
142 else
143 {
144 __KeStallExecutionProcessor((Pcr->StallScaleFactor*Microseconds)/1000);
145 }
146 }
147
148 static ULONG Read8254Timer(VOID)
149 {
150 ULONG Count;
151 ULONG flags;
152
153 /* save flags and disable interrupts */
154 Ki386SaveFlags(flags);
155 Ki386DisableInterrupts();
156
157 WRITE_PORT_UCHAR((PUCHAR) TMR_CTRL, TMR_SC0 | TMR_LATCH);
158 Count = READ_PORT_UCHAR((PUCHAR) TMR_CNT0);
159 Count |= READ_PORT_UCHAR((PUCHAR) TMR_CNT0) << 8;
160
161 /* restore flags */
162 Ki386RestoreFlags(flags);
163
164 return Count;
165 }
166
167
168 VOID WaitFor8254Wraparound(VOID)
169 {
170 ULONG CurCount, PrevCount = ~0;
171 LONG Delta;
172
173 CurCount = Read8254Timer();
174
175 do
176 {
177 PrevCount = CurCount;
178 CurCount = Read8254Timer();
179 Delta = CurCount - PrevCount;
180
181 /*
182 * This limit for delta seems arbitrary, but it isn't, it's
183 * slightly above the level of error a buggy Mercury/Neptune
184 * chipset timer can cause.
185 */
186
187 }
188 while (Delta < 300);
189 }
190
191 VOID HalpCalibrateStallExecution(VOID)
192 {
193 ULONG i;
194 ULONG calib_bit;
195 ULONG CurCount;
196 PKPCR Pcr;
197 LARGE_INTEGER StartCount, EndCount;
198
199 if (UdelayCalibrated)
200 {
201 return;
202 }
203
204 UdelayCalibrated = TRUE;
205 Pcr = KeGetCurrentKPCR();
206
207 /* Initialise timer interrupt with MILLISEC ms interval */
208 WRITE_PORT_UCHAR((PUCHAR) TMR_CTRL, TMR_SC0 | TMR_BOTH | TMR_MD2); /* binary, mode 2, LSB/MSB, ch 0 */
209 WRITE_PORT_UCHAR((PUCHAR) TMR_CNT0, LATCH & 0xff); /* LSB */
210 WRITE_PORT_UCHAR((PUCHAR) TMR_CNT0, LATCH >> 8); /* MSB */
211
212 if (Pcr->PrcbData.FeatureBits & X86_FEATURE_TSC)
213 {
214
215 WaitFor8254Wraparound();
216 Ki386RdTSC(StartCount);
217
218 WaitFor8254Wraparound();
219 Ki386RdTSC(EndCount);
220
221 Pcr->PrcbData.MHz = (ULONG)(EndCount.QuadPart - StartCount.QuadPart) / 10000;
222 DPRINT("%dMHz\n", Pcr->PrcbData.MHz);
223 return;
224
225 }
226
227 DbgPrint("Calibrating delay loop... [");
228
229 /* Stage 1: Coarse calibration */
230
231 WaitFor8254Wraparound();
232
233 Pcr->StallScaleFactor = 1;
234
235 do
236 {
237 Pcr->StallScaleFactor <<= 1; /* Next delay count to try */
238
239 WaitFor8254Wraparound();
240
241 __KeStallExecutionProcessor(Pcr->StallScaleFactor); /* Do the delay */
242
243 CurCount = Read8254Timer();
244 }
245 while (CurCount > LATCH / 2);
246
247 Pcr->StallScaleFactor >>= 1; /* Get bottom value for delay */
248
249 /* Stage 2: Fine calibration */
250 DbgPrint("delay_count: %d", Pcr->StallScaleFactor);
251
252 calib_bit = Pcr->StallScaleFactor; /* Which bit are we going to test */
253
254 for (i = 0; i < PRECISION; i++)
255 {
256 calib_bit >>= 1; /* Next bit to calibrate */
257 if (!calib_bit)
258 {
259 break; /* If we have done all bits, stop */
260 }
261
262 Pcr->StallScaleFactor |= calib_bit; /* Set the bit in delay_count */
263
264 WaitFor8254Wraparound();
265
266 __KeStallExecutionProcessor(Pcr->StallScaleFactor); /* Do the delay */
267
268 CurCount = Read8254Timer();
269 if (CurCount <= LATCH / 2) /* If a tick has passed, turn the */
270 { /* calibrated bit back off */
271 Pcr->StallScaleFactor &= ~calib_bit;
272 }
273 }
274
275 /* We're finished: Do the finishing touches */
276
277 Pcr->StallScaleFactor /= (MILLISEC / 2); /* Calculate delay_count for 1ms */
278
279 DbgPrint("]\n");
280 DbgPrint("delay_count: %d\n", Pcr->StallScaleFactor);
281 DbgPrint("CPU speed: %d\n", Pcr->StallScaleFactor / 250);
282 #if 0
283 DbgPrint("About to start delay loop test\n");
284 DbgPrint("Waiting for five minutes...");
285 for (i = 0; i < (5*60*1000*20); i++)
286 {
287 KeStallExecutionProcessor(50);
288 }
289 DbgPrint("finished\n");
290 for(;;);
291 #endif
292 }
293
294
295 VOID STDCALL
296 HalCalibratePerformanceCounter(ULONG Count)
297 {
298 ULONG flags;
299
300 /* save flags and disable interrupts */
301 Ki386SaveFlags(flags);
302 Ki386DisableInterrupts();
303
304 __KeStallExecutionProcessor(Count);
305
306 /* restore flags */
307 Ki386RestoreFlags(flags);
308 }
309
310
311 LARGE_INTEGER STDCALL
312 KeQueryPerformanceCounter(PLARGE_INTEGER PerformanceFreq)
313 /*
314 * FUNCTION: Queries the finest grained running count available in the system
315 * ARGUMENTS:
316 * PerformanceFreq (OUT) = The routine stores the number of
317 * performance counter ticks per second here
318 * RETURNS: The number of performance counter ticks since boot
319 */
320 {
321 PKPCR Pcr;
322 LARGE_INTEGER Value;
323 ULONG Flags;
324
325 Ki386SaveFlags(Flags);
326 Ki386DisableInterrupts();
327
328 Pcr = KeGetCurrentKPCR();
329
330 if (Pcr->PrcbData.FeatureBits & X86_FEATURE_TSC)
331 {
332 Ki386RestoreFlags(Flags);
333 if (NULL != PerformanceFreq)
334 {
335 PerformanceFreq->QuadPart = Pcr->PrcbData.MHz * (ULONGLONG)1000000;
336 }
337 Ki386RdTSC(Value);
338 }
339 else
340 {
341 LARGE_INTEGER TicksOld;
342 LARGE_INTEGER TicksNew;
343 ULONG CountsLeft;
344
345 Ki386RestoreFlags(Flags);
346
347 if (NULL != PerformanceFreq)
348 {
349 PerformanceFreq->QuadPart = CLOCK_TICK_RATE;
350 }
351
352 do
353 {
354 KeQueryTickCount(&TicksOld);
355 CountsLeft = Read8254Timer();
356 Value.QuadPart = TicksOld.QuadPart * LATCH + (LATCH - CountsLeft);
357 KeQueryTickCount(&TicksNew);
358 }
359 while (TicksOld.QuadPart != TicksNew.QuadPart);
360 }
361 return Value;
362 }
363
364 /* EOF */