5 #ifndef __INTERNAL_HAL_HAL_H
6 #define __INTERNAL_HAL_HAL_H
8 #define HAL_APC_REQUEST 0
9 #define HAL_DPC_REQUEST 1
11 /* CMOS Registers and Ports */
12 #define CMOS_CONTROL_PORT (PUCHAR)0x70
13 #define CMOS_DATA_PORT (PUCHAR)0x71
14 #define RTC_REGISTER_A 0x0A
15 #define RTC_REGISTER_B 0x0B
16 #define RTC_REG_A_UIP 0x80
17 #define RTC_REGISTER_CENTURY 0x32
19 /* Timer Registers and Ports */
20 #define TIMER_CONTROL_PORT 0x43
21 #define TIMER_DATA_PORT0 0x40
23 #define TIMER_BOTH 0x30
27 #define IDT_REGISTERED 0x01
28 #define IDT_LATCHED 0x02
29 #define IDT_INTERNAL 0x11
30 #define IDT_DEVICE 0x21
32 /* Conversion functions */
33 #define BCD_INT(bcd) \
34 (((bcd & 0xF0) >> 4) * 10 + (bcd & 0x0F))
35 #define INT_BCD(int) \
36 (UCHAR)(((int / 10) << 4) + (int % 10))
39 // Mm PTE/PDE to Hal PTE/PDE
41 #define HalAddressToPde(x) (PHARDWARE_PTE)MiAddressToPde(x)
42 #define HalAddressToPte(x) (PHARDWARE_PTE)MiAddressToPte(x)
44 typedef struct _IDTUsageFlags
52 UCHAR BusReleativeVector
;
55 typedef struct _HalAddressUsage
57 struct _HalAddressUsage
*Next
;
58 CM_RESOURCE_TYPE Type
;
65 } ADDRESS_USAGE
, *PADDRESS_USAGE
;
68 PADAPTER_OBJECT NTAPI
HalpAllocateAdapterEx(ULONG NumberOfMapRegisters
,BOOLEAN IsMaster
, BOOLEAN Dma32BitAddresses
);
73 HalpRegisterVector(IN UCHAR Flags
,
75 IN ULONG SystemVector
,
80 HalpEnableInterruptHandler(IN UCHAR Flags
,
82 IN ULONG SystemVector
,
85 IN KINTERRUPT_MODE Mode
);
88 VOID NTAPI
HalpInitPICs(VOID
);
91 VOID NTAPI
HalpInitializeClock(VOID
);
95 HalpCalibrateStallExecution(VOID
);
98 VOID
HalpInitPciBus (VOID
);
101 VOID
HalpInitDma (VOID
);
103 /* Non-generic initialization */
104 VOID
HalpInitPhase0 (PLOADER_PARAMETER_BLOCK LoaderBlock
);
105 VOID
HalpInitPhase1(VOID
);
106 VOID NTAPI
HalpClockInterrupt(VOID
);
107 VOID NTAPI
HalpProfileInterrupt(VOID
);
114 HalpCheckPowerButton(
120 HalpRegisterKdSupportFunctions(
126 HalpSetupPciDeviceForDebugging(
127 IN PVOID LoaderBlock
,
128 IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice
133 HalpReleasePciDeviceForDebugging(
134 IN OUT PDEBUG_DEVICE_DESCRIPTOR PciDevice
142 HalpMapPhysicalMemory64(
143 IN PHYSICAL_ADDRESS PhysicalAddress
,
149 HalpUnmapVirtualAddress(
150 IN PVOID VirtualAddress
,
157 HaliQuerySystemInformation(
158 IN HAL_QUERY_INFORMATION_CLASS InformationClass
,
161 OUT PULONG ReturnedLength
166 HaliSetSystemInformation(
167 IN HAL_SET_INFORMATION_CLASS InformationClass
,
177 HalpBiosDisplayReset(
200 // Processor Halt Routine
209 // CMOS initialization
218 // Spinlock for protecting CMOS access
222 HalpAcquireSystemHardwareSpinLock(
228 HalpReleaseCmosSpinLock(
233 #define KfLowerIrql KeLowerIrql
235 /* On UP builds, spinlocks don't exist at IRQL >= DISPATCH */
236 #define KiAcquireSpinLock(SpinLock)
237 #define KiReleaseSpinLock(SpinLock)
238 #define KfAcquireSpinLock(SpinLock) KfRaiseIrql(DISPATCH_LEVEL);
239 #define KfReleaseSpinLock(SpinLock, OldIrql) KeLowerIrql(OldIrql);
240 #endif // !CONFIG_SMP
243 extern PVOID HalpRealModeStart
;
244 extern PVOID HalpRealModeEnd
;
246 extern ADDRESS_USAGE HalpDefaultIoSpace
;
248 extern KSPIN_LOCK HalpSystemHardwareLock
;
250 extern PADDRESS_USAGE HalpAddressUsageList
;
252 #endif /* __INTERNAL_HAL_HAL_H */