Copy wininet to branch
[reactos.git] / reactos / hal / halx86 / include / mps.h
1 #ifndef __INCLUDE_HAL_MPS
2 #define __INCLUDE_HAL_MPS
3
4 /*
5 * FIXME: This does not work if we have more than 24 IRQs (ie. more than one
6 * I/O APIC)
7 */
8 #define IRQL2VECTOR(irql) (IRQ2VECTOR(PROFILE_LEVEL - (irql)))
9
10 #define IRQL2TPR(irql) ((irql) >= IPI_LEVEL ? IPI_VECTOR : ((irql) >= PROFILE_LEVEL ? LOCAL_TIMER_VECTOR : ((irql) > DISPATCH_LEVEL ? IRQL2VECTOR(irql) : 0)))
11
12
13 #if 0
14 /* This values are defined in halirql.h */
15 #define FIRST_DEVICE_VECTOR 0x30
16 #define FIRST_SYSTEM_VECTOR 0xEF
17 #endif
18
19 #define NUMBER_DEVICE_VECTORS (FIRST_SYSTEM_VECTOR - FIRST_DEVICE_VECTOR)
20
21
22 /* MP Floating Pointer Structure */
23 #define MPF_SIGNATURE (('_' << 24) | ('P' << 16) | ('M' << 8) | '_')
24
25 typedef struct __attribute__((packed)) _MP_FLOATING_POINTER
26 {
27 ULONG Signature; /* _MP_ */
28 ULONG Address; /* Physical Address Pointer (0 means no configuration table exist) */
29 UCHAR Length; /* Structure length in 16-byte paragraphs */
30 UCHAR Specification; /* Specification revision */
31 UCHAR Checksum; /* Checksum */
32 UCHAR Feature1; /* MP System Configuration Type */
33 UCHAR Feature2; /* Bit 7 set for IMCR|PIC */
34 UCHAR Feature3; /* Unused (0) */
35 UCHAR Feature4; /* Unused (0) */
36 UCHAR Feature5; /* Unused (0) */
37 } __attribute__((packed)) MP_FLOATING_POINTER, *PMP_FLOATING_POINTER;
38
39 #define FEATURE2_IMCRP 0x80
40
41 /* MP Configuration Table Header */
42 #define MPC_SIGNATURE (('P' << 24) | ('M' << 16) | ('C' << 8) | 'P')
43
44 typedef struct __attribute__((packed)) _MP_CONFIGURATION_TABLE
45 {
46 ULONG Signature; /* PCMP */
47 USHORT Length; /* Size of configuration table */
48 CHAR Specification; /* Specification Revision */
49 CHAR Checksum; /* Checksum */
50 CHAR Oem[8]; /* OEM ID */
51 CHAR ProductId[12]; /* Product ID */
52 ULONG OemTable; /* 0 if not present */
53 USHORT OemTableSize; /* 0 if not present */
54 USHORT EntryCount; /* Number of entries */
55 ULONG LocalAPICAddress; /* Local APIC address */
56 USHORT ExtTableLength; /* Extended Table Length */
57 UCHAR ExtTableChecksum; /* Extended Table Checksum */
58 UCHAR Reserved; /* Reserved */
59 } __attribute__((packed)) MP_CONFIGURATION_TABLE, *PMP_CONFIGURATION_TABLE;
60
61 /* MP Configuration Table Entries */
62 #define MPCTE_PROCESSOR 0 /* One entry per processor */
63 #define MPCTE_BUS 1 /* One entry per bus */
64 #define MPCTE_IOAPIC 2 /* One entry per I/O APIC */
65 #define MPCTE_INTSRC 3 /* One entry per bus interrupt source */
66 #define MPCTE_LINTSRC 4 /* One entry per system interrupt source */
67
68
69 typedef struct __attribute__((packed)) _MP_CONFIGURATION_PROCESSOR
70 {
71 UCHAR Type; /* 0 */
72 UCHAR ApicId; /* Local APIC ID for the processor */
73 UCHAR ApicVersion; /* Local APIC version */
74 UCHAR CpuFlags; /* CPU flags */
75 ULONG CpuSignature; /* CPU signature */
76 ULONG FeatureFlags; /* CPUID feature value */
77 ULONG Reserved[2]; /* Reserved (0) */
78 } __attribute__((packed)) MP_CONFIGURATION_PROCESSOR,
79 *PMP_CONFIGURATION_PROCESSOR;
80
81
82
83 typedef struct __attribute__((packed)) _MP_CONFIGURATION_BUS
84 {
85 UCHAR Type; /* 1 */
86 UCHAR BusId; /* Bus ID */
87 UCHAR BusType[6]; /* Bus type */
88 } __attribute__((packed)) MP_CONFIGURATION_BUS, *PMP_CONFIGURATION_BUS;
89
90 #define MAX_BUS 32
91
92 #define MP_BUS_ISA 1
93 #define MP_BUS_EISA 2
94 #define MP_BUS_PCI 3
95 #define MP_BUS_MCA 4
96
97 #define BUSTYPE_EISA "EISA"
98 #define BUSTYPE_ISA "ISA"
99 #define BUSTYPE_INTERN "INTERN" /* Internal BUS */
100 #define BUSTYPE_MCA "MCA"
101 #define BUSTYPE_VL "VL" /* Local bus */
102 #define BUSTYPE_PCI "PCI"
103 #define BUSTYPE_PCMCIA "PCMCIA"
104 #define BUSTYPE_CBUS "CBUS"
105 #define BUSTYPE_CBUSII "CBUSII"
106 #define BUSTYPE_FUTURE "FUTURE"
107 #define BUSTYPE_MBI "MBI"
108 #define BUSTYPE_MBII "MBII"
109 #define BUSTYPE_MPI "MPI"
110 #define BUSTYPE_MPSA "MPSA"
111 #define BUSTYPE_NUBUS "NUBUS"
112 #define BUSTYPE_TC "TC"
113 #define BUSTYPE_VME "VME"
114 #define BUSTYPE_XPRESS "XPRESS"
115
116
117 typedef struct __attribute__((packed)) _MP_CONFIGURATION_IOAPIC
118 {
119 UCHAR Type; /* 2 */
120 UCHAR ApicId; /* I/O APIC ID */
121 UCHAR ApicVersion; /* I/O APIC version */
122 UCHAR ApicFlags; /* I/O APIC flags */
123 ULONG ApicAddress; /* I/O APIC base address */
124 } __attribute__((packed)) MP_CONFIGURATION_IOAPIC, *PMP_CONFIGURATION_IOAPIC;
125
126 #define MAX_IOAPIC 2
127
128 #define MP_IOAPIC_USABLE 0x01
129
130
131 typedef struct __attribute__((packed)) _MP_CONFIGURATION_INTSRC
132 {
133 UCHAR Type; /* 3 */
134 UCHAR IrqType; /* Interrupt type */
135 USHORT IrqFlag; /* Interrupt flags */
136 UCHAR SrcBusId; /* Source bus ID */
137 UCHAR SrcBusIrq; /* Source bus interrupt */
138 UCHAR DstApicId; /* Destination APIC ID */
139 UCHAR DstApicInt; /* Destination interrupt */
140 } __attribute__((packed)) MP_CONFIGURATION_INTSRC, *PMP_CONFIGURATION_INTSRC;
141
142 #define MAX_IRQ_SOURCE 128
143
144 #define INT_VECTORED 0
145 #define INT_NMI 1
146 #define INT_SMI 2
147 #define INT_EXTINT 3
148
149 #define IRQDIR_DEFAULT 0
150 #define IRQDIR_HIGH 1
151 #define IRQDIR_LOW 3
152
153
154 typedef struct __attribute__((packed)) _MP_CONFIGURATION_INTLOCAL
155 {
156 UCHAR Type; /* 4 */
157 UCHAR IrqType; /* Interrupt type */
158 USHORT IrqFlag; /* Interrupt flags */
159 UCHAR SrcBusId; /* Source bus ID */
160 UCHAR SrcBusIrq; /* Source bus interrupt */
161 UCHAR DstApicId; /* Destination local APIC ID */
162 UCHAR DstApicLInt; /* Destination local APIC interrupt */
163 } MP_CONFIGURATION_INTLOCAL, *PMP_CONFIGURATION_INTLOCAL;
164
165 #define MP_APIC_ALL 0xFF
166
167 #define CPU_FLAG_ENABLED 1 /* Processor is available */
168 #define CPU_FLAG_BSP 2 /* Processor is the bootstrap processor */
169
170 #define CPU_STEPPING_MASK 0x0F
171 #define CPU_MODEL_MASK 0xF0
172 #define CPU_FAMILY_MASK 0xF00
173
174 #define PIC_IRQS 16
175
176 /* Prototypes */
177
178 VOID HalpInitMPS(VOID);
179
180
181 #endif /* __INCLUDE_HAL_MPS */
182
183 /* EOF */