- Video Miniport driver not use ntddk.h, but miniport.h. But, Reactos miniport.h...
[reactos.git] / reactos / include / ddk / miniport.h
1 /*
2 * miniport.h
3 *
4 * Type definitions for miniport drivers
5 *
6 * This file is part of the w32api package.
7 *
8 * Contributors:
9 * Created by Casper S. Hornstrup <chorns@users.sourceforge.net>
10 *
11 * THIS SOFTWARE IS NOT COPYRIGHTED
12 *
13 * This source code is offered for use in the public domain. You may
14 * use, modify or distribute it freely.
15 *
16 * This code is distributed in the hope that it will be useful but
17 * WITHOUT ANY WARRANTY. ALL WARRANTIES, EXPRESS OR IMPLIED ARE HEREBY
18 * DISCLAIMED. This includes but is not limited to warranties of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
20 *
21 */
22
23 #ifndef _MINIPORT_
24 #define _MINIPORT_
25
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29
30 #define EMULATOR_READ_ACCESS 0x01
31 #define EMULATOR_WRITE_ACCESS 0x02
32
33 typedef enum _EMULATOR_PORT_ACCESS_TYPE {
34 Uchar,
35 Ushort,
36 Ulong
37 } EMULATOR_PORT_ACCESS_TYPE, *PEMULATOR_PORT_ACCESS_TYPE;
38
39
40 typedef struct _EMULATOR_ACCESS_ENTRY {
41 ULONG BasePort;
42 ULONG NumConsecutivePorts;
43 EMULATOR_PORT_ACCESS_TYPE AccessType;
44 UCHAR AccessMode;
45 UCHAR StringSupport;
46 PVOID Routine;
47 } EMULATOR_ACCESS_ENTRY, *PEMULATOR_ACCESS_ENTRY;
48
49 #ifndef VIDEO_ACCESS_RANGE_DEFINED /* also in video.h */
50 #define VIDEO_ACCESS_RANGE_DEFINED
51 typedef struct _VIDEO_ACCESS_RANGE {
52 PHYSICAL_ADDRESS RangeStart;
53 ULONG RangeLength;
54 UCHAR RangeInIoSpace;
55 UCHAR RangeVisible;
56 UCHAR RangeShareable;
57 UCHAR RangePassive;
58 } VIDEO_ACCESS_RANGE, *PVIDEO_ACCESS_RANGE;
59 #endif
60
61 typedef VOID
62 (DDKAPI *PBANKED_SECTION_ROUTINE)(
63 IN ULONG ReadBank,
64 IN ULONG WriteBank,
65 IN PVOID Context);
66
67 #ifndef __BROKEN__
68
69 typedef enum _INTERFACE_TYPE {
70 InterfaceTypeUndefined = -1,
71 Internal,
72 Isa,
73 Eisa,
74 MicroChannel,
75 TurboChannel,
76 PCIBus,
77 VMEBus,
78 NuBus,
79 PCMCIABus,
80 CBus,
81 MPIBus,
82 MPSABus,
83 ProcessorInternal,
84 InternalPowerBus,
85 PNPISABus,
86 PNPBus,
87 Vmcs,
88 MaximumInterfaceType
89 }INTERFACE_TYPE, *PINTERFACE_TYPE;
90
91 typedef enum _KINTERRUPT_MODE {
92 LevelSensitive,
93 Latched
94 } KINTERRUPT_MODE;
95
96 typedef VOID (*PINTERFACE_REFERENCE)(PVOID Context);
97 typedef VOID (*PINTERFACE_DEREFERENCE)(PVOID Context);
98
99 typedef enum _BUS_DATA_TYPE {
100 ConfigurationSpaceUndefined = -1,
101 Cmos,
102 EisaConfiguration,
103 Pos,
104 CbusConfiguration,
105 PCIConfiguration,
106 VMEConfiguration,
107 NuBusConfiguration,
108 PCMCIAConfiguration,
109 MPIConfiguration,
110 MPSAConfiguration,
111 PNPISAConfiguration,
112 SgiInternalConfiguration,
113 MaximumBusDataType
114 } BUS_DATA_TYPE, *PBUS_DATA_TYPE;
115
116 typedef enum _DMA_WIDTH {
117 Width8Bits,
118 Width16Bits,
119 Width32Bits,
120 MaximumDmaWidth
121 }DMA_WIDTH, *PDMA_WIDTH;
122
123 typedef enum _DMA_SPEED {
124 Compatible,
125 TypeA,
126 TypeB,
127 TypeC,
128 TypeF,
129 MaximumDmaSpeed
130 }DMA_SPEED, *PDMA_SPEED;
131
132 typedef struct _INTERFACE {
133 USHORT Size;
134 USHORT Version;
135 PVOID Context;
136 PINTERFACE_REFERENCE InterfaceReference;
137 PINTERFACE_DEREFERENCE InterfaceDereference;
138 } INTERFACE, *PINTERFACE;
139
140 typedef enum _IRQ_DEVICE_POLICY {
141 IrqPolicyMachineDefault = 0,
142 IrqPolicyAllCloseProcessors,
143 IrqPolicyOneCloseProcessor,
144 IrqPolicyAllProcessorsInMachine,
145 IrqPolicySpecifiedProcessors,
146 IrqPolicySpreadMessagesAcrossAllProcessors
147 } IRQ_DEVICE_POLICY, *PIRQ_DEVICE_POLICY;
148
149 typedef enum _IRQ_PRIORITY {
150 IrqPriorityUndefined = 0,
151 IrqPriorityLow,
152 IrqPriorityNormal,
153 IrqPriorityHigh
154 } IRQ_PRIORITY, *PIRQ_PRIORITY;
155
156 typedef struct _IO_RESOURCE_DESCRIPTOR {
157 UCHAR Option;
158 UCHAR Type; // use CM_RESOURCE_TYPE
159 UCHAR ShareDisposition; // use CM_SHARE_DISPOSITION
160 UCHAR Spare1;
161 USHORT Flags; // use CM resource flag defines
162 USHORT Spare2; // align
163
164 union {
165 struct {
166 ULONG Length;
167 ULONG Alignment;
168 PHYSICAL_ADDRESS MinimumAddress;
169 PHYSICAL_ADDRESS MaximumAddress;
170 } Port;
171
172 struct {
173 ULONG Length;
174 ULONG Alignment;
175 PHYSICAL_ADDRESS MinimumAddress;
176 PHYSICAL_ADDRESS MaximumAddress;
177 } Memory;
178
179 struct {
180 ULONG MinimumVector;
181 ULONG MaximumVector;
182 IRQ_DEVICE_POLICY AffinityPolicy;
183 IRQ_PRIORITY PriorityPolicy;
184 KAFFINITY TargetedProcessors;
185 } Interrupt;
186
187 struct {
188 ULONG MinimumChannel;
189 ULONG MaximumChannel;
190 } Dma;
191
192 struct {
193 ULONG Length;
194 ULONG Alignment;
195 PHYSICAL_ADDRESS MinimumAddress;
196 PHYSICAL_ADDRESS MaximumAddress;
197 } Generic;
198
199 struct {
200 ULONG Data[3];
201 } DevicePrivate;
202
203 //
204 // Bus Number information.
205 //
206
207 struct {
208 ULONG Length;
209 ULONG MinBusNumber;
210 ULONG MaxBusNumber;
211 ULONG Reserved;
212 } BusNumber;
213
214 struct {
215 ULONG Priority; // use LCPRI_Xxx values in cfg.h
216 ULONG Reserved1;
217 ULONG Reserved2;
218 } ConfigData;
219
220 //
221 // The following structures provide descriptions
222 // for memory resource requirement greater than MAXULONG
223 //
224
225 struct {
226 ULONG Length40;
227 ULONG Alignment40;
228 PHYSICAL_ADDRESS MinimumAddress;
229 PHYSICAL_ADDRESS MaximumAddress;
230 } Memory40;
231
232 struct {
233 ULONG Length48;
234 ULONG Alignment48;
235 PHYSICAL_ADDRESS MinimumAddress;
236 PHYSICAL_ADDRESS MaximumAddress;
237 } Memory48;
238
239 struct {
240 ULONG Length64;
241 ULONG Alignment64;
242 PHYSICAL_ADDRESS MinimumAddress;
243 PHYSICAL_ADDRESS MaximumAddress;
244 } Memory64;
245
246
247 } u;
248
249 } IO_RESOURCE_DESCRIPTOR, *PIO_RESOURCE_DESCRIPTOR;
250
251 #include <guiddef.h>
252 #endif
253
254 #ifdef __cplusplus
255 }
256 #endif
257
258 #endif /* __MINIPORT_H */