Merge from amd64-branch:
[reactos.git] / reactos / include / ddk / ntddser.h
1 /*
2 * ntddser.h
3 *
4 * Serial port driver interface
5 *
6 * This file is part of the w32api package.
7 *
8 * Contributors:
9 * Created by Casper S. Hornstrup <chorns@users.sourceforge.net>
10 *
11 * THIS SOFTWARE IS NOT COPYRIGHTED
12 *
13 * This source code is offered for use in the public domain. You may
14 * use, modify or distribute it freely.
15 *
16 * This code is distributed in the hope that it will be useful but
17 * WITHOUT ANY WARRANTY. ALL WARRANTIES, EXPRESS OR IMPLIED ARE HEREBY
18 * DISCLAIMED. This includes but is not limited to warranties of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
20 *
21 */
22
23 #ifndef __NTDDSER_H
24 #define __NTDDSER_H
25
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29
30 /* GUIDs */
31
32 DEFINE_GUID(GUID_DEVINTERFACE_COMPORT,
33 0x86e0d1e0L, 0x8089, 0x11d0, 0x9c, 0xe4, 0x08, 0x00, 0x3e, 0x30, 0x1f, 0x73);
34
35 DEFINE_GUID(GUID_DEVINTERFACE_SERENUM_BUS_ENUMERATOR,
36 0x4D36E978L, 0xE325, 0x11CE, 0xBF, 0xC1, 0x08, 0x00, 0x2B, 0xE1, 0x03, 0x18);
37
38 #define IOCTL_SERIAL_CLEAR_STATS \
39 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 36, METHOD_BUFFERED, FILE_ANY_ACCESS)
40 #define IOCTL_SERIAL_CLR_DTR \
41 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 10, METHOD_BUFFERED, FILE_ANY_ACCESS)
42 #define IOCTL_SERIAL_CLR_RTS \
43 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 13, METHOD_BUFFERED, FILE_ANY_ACCESS)
44 #define IOCTL_SERIAL_CONFIG_SIZE \
45 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 32, METHOD_BUFFERED, FILE_ANY_ACCESS)
46 #define IOCTL_SERIAL_GET_BAUD_RATE \
47 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 20, METHOD_BUFFERED, FILE_ANY_ACCESS)
48 #define IOCTL_SERIAL_GET_CHARS \
49 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 22, METHOD_BUFFERED, FILE_ANY_ACCESS)
50 #define IOCTL_SERIAL_GET_COMMSTATUS \
51 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 27, METHOD_BUFFERED, FILE_ANY_ACCESS)
52 #define IOCTL_SERIAL_GET_DTRRTS \
53 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 30, METHOD_BUFFERED, FILE_ANY_ACCESS)
54 #define IOCTL_SERIAL_GET_HANDFLOW \
55 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 24, METHOD_BUFFERED, FILE_ANY_ACCESS)
56 #define IOCTL_SERIAL_GET_LINE_CONTROL \
57 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 21, METHOD_BUFFERED, FILE_ANY_ACCESS)
58 #define IOCTL_SERIAL_GET_MODEM_CONTROL \
59 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 37, METHOD_BUFFERED, FILE_ANY_ACCESS)
60 #define IOCTL_SERIAL_GET_MODEMSTATUS \
61 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 26, METHOD_BUFFERED, FILE_ANY_ACCESS)
62 #define IOCTL_SERIAL_GET_PROPERTIES \
63 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 29, METHOD_BUFFERED, FILE_ANY_ACCESS)
64 #define IOCTL_SERIAL_GET_STATS \
65 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 35, METHOD_BUFFERED, FILE_ANY_ACCESS)
66 #define IOCTL_SERIAL_GET_TIMEOUTS \
67 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 8, METHOD_BUFFERED, FILE_ANY_ACCESS)
68 #define IOCTL_SERIAL_GET_WAIT_MASK \
69 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 16, METHOD_BUFFERED, FILE_ANY_ACCESS)
70 #define IOCTL_SERIAL_IMMEDIATE_CHAR \
71 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 6, METHOD_BUFFERED, FILE_ANY_ACCESS)
72 #define IOCTL_SERIAL_LSRMST_INSERT \
73 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 31, METHOD_BUFFERED, FILE_ANY_ACCESS)
74 #define IOCTL_SERIAL_PURGE \
75 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 19, METHOD_BUFFERED, FILE_ANY_ACCESS)
76 #define IOCTL_SERIAL_RESET_DEVICE \
77 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 11, METHOD_BUFFERED, FILE_ANY_ACCESS)
78 #define IOCTL_SERIAL_SET_BAUD_RATE \
79 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 1, METHOD_BUFFERED, FILE_ANY_ACCESS)
80 #define IOCTL_SERIAL_SET_BREAK_ON \
81 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 4, METHOD_BUFFERED, FILE_ANY_ACCESS)
82 #define IOCTL_SERIAL_SET_BREAK_OFF \
83 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 5, METHOD_BUFFERED, FILE_ANY_ACCESS)
84 #define IOCTL_SERIAL_SET_CHARS \
85 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 23, METHOD_BUFFERED, FILE_ANY_ACCESS)
86 #define IOCTL_SERIAL_SET_DTR \
87 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 9, METHOD_BUFFERED, FILE_ANY_ACCESS)
88 #define IOCTL_SERIAL_SET_FIFO_CONTROL \
89 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 39, METHOD_BUFFERED, FILE_ANY_ACCESS)
90 #define IOCTL_SERIAL_SET_HANDFLOW \
91 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 25, METHOD_BUFFERED, FILE_ANY_ACCESS)
92 #define IOCTL_SERIAL_SET_LINE_CONTROL \
93 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 3, METHOD_BUFFERED, FILE_ANY_ACCESS)
94 #define IOCTL_SERIAL_SET_MODEM_CONTROL \
95 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 38, METHOD_BUFFERED, FILE_ANY_ACCESS)
96 #define IOCTL_SERIAL_SET_QUEUE_SIZE \
97 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 2, METHOD_BUFFERED, FILE_ANY_ACCESS)
98 #define IOCTL_SERIAL_SET_RTS \
99 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 12, METHOD_BUFFERED, FILE_ANY_ACCESS)
100 #define IOCTL_SERIAL_SET_TIMEOUTS \
101 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 7, METHOD_BUFFERED, FILE_ANY_ACCESS)
102 #define IOCTL_SERIAL_SET_WAIT_MASK \
103 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 17, METHOD_BUFFERED, FILE_ANY_ACCESS)
104 #define IOCTL_SERIAL_SET_XOFF \
105 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 14, METHOD_BUFFERED, FILE_ANY_ACCESS)
106 #define IOCTL_SERIAL_SET_XON \
107 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 15, METHOD_BUFFERED, FILE_ANY_ACCESS)
108 #define IOCTL_SERIAL_WAIT_ON_MASK \
109 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 18, METHOD_BUFFERED, FILE_ANY_ACCESS)
110 #define IOCTL_SERIAL_XOFF_COUNTER \
111 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 28, METHOD_BUFFERED, FILE_ANY_ACCESS)
112
113 #define IOCTL_SERIAL_INTERNAL_BASIC_SETTINGS \
114 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 3, METHOD_BUFFERED, FILE_ANY_ACCESS)
115 #define IOCTL_SERIAL_INTERNAL_CANCEL_WAIT_WAKE \
116 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 2, METHOD_BUFFERED, FILE_ANY_ACCESS)
117 #define IOCTL_SERIAL_INTERNAL_DO_WAIT_WAKE \
118 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 1, METHOD_BUFFERED, FILE_ANY_ACCESS)
119 #define IOCTL_SERIAL_INTERNAL_RESTORE_SETTINGS \
120 CTL_CODE (FILE_DEVICE_SERIAL_PORT, 4, METHOD_BUFFERED, FILE_ANY_ACCESS)
121
122 #define IOCTL_SERENUM_PORT_DESC \
123 CTL_CODE (FILE_DEVICE_SERENUM, 130, METHOD_BUFFERED, FILE_ANY_ACCESS)
124 #define IOCTL_SERENUM_GET_PORT_NAME \
125 CTL_CODE (FILE_DEVICE_SERENUM, 131, METHOD_BUFFERED, FILE_ANY_ACCESS)
126
127 #define IOCTL_INTERNAL_SERENUM_REMOVE_SELF \
128 CTL_CODE (FILE_DEVICE_SERENUM, 129, METHOD_NEITHER, FILE_ANY_ACCESS)
129
130
131 typedef struct _SERIAL_BAUD_RATE {
132 ULONG BaudRate;
133 } SERIAL_BAUD_RATE, *PSERIAL_BAUD_RATE;
134
135 /* SERIAL_BAUD_RATE.BaudRate constants */
136 #define SERIAL_BAUD_075 0x00000001
137 #define SERIAL_BAUD_110 0x00000002
138 #define SERIAL_BAUD_134_5 0x00000004
139 #define SERIAL_BAUD_150 0x00000008
140 #define SERIAL_BAUD_300 0x00000010
141 #define SERIAL_BAUD_600 0x00000020
142 #define SERIAL_BAUD_1200 0x00000040
143 #define SERIAL_BAUD_1800 0x00000080
144 #define SERIAL_BAUD_2400 0x00000100
145 #define SERIAL_BAUD_4800 0x00000200
146 #define SERIAL_BAUD_7200 0x00000400
147 #define SERIAL_BAUD_9600 0x00000800
148 #define SERIAL_BAUD_14400 0x00001000
149 #define SERIAL_BAUD_19200 0x00002000
150 #define SERIAL_BAUD_38400 0x00004000
151 #define SERIAL_BAUD_56K 0x00008000
152 #define SERIAL_BAUD_128K 0x00010000
153 #define SERIAL_BAUD_115200 0x00020000
154 #define SERIAL_BAUD_57600 0x00040000
155 #define SERIAL_BAUD_USER 0x10000000
156
157 typedef struct _SERIAL_CHARS {
158 UCHAR EofChar;
159 UCHAR ErrorChar;
160 UCHAR BreakChar;
161 UCHAR EventChar;
162 UCHAR XonChar;
163 UCHAR XoffChar;
164 } SERIAL_CHARS, *PSERIAL_CHARS;
165
166 typedef struct _SERIAL_STATUS {
167 ULONG Errors;
168 ULONG HoldReasons;
169 ULONG AmountInInQueue;
170 ULONG AmountInOutQueue;
171 BOOLEAN EofReceived;
172 BOOLEAN WaitForImmediate;
173 } SERIAL_STATUS, *PSERIAL_STATUS;
174
175 typedef struct _SERIAL_HANDFLOW {
176 ULONG ControlHandShake;
177 ULONG FlowReplace;
178 LONG XonLimit;
179 LONG XoffLimit;
180 } SERIAL_HANDFLOW, *PSERIAL_HANDFLOW;
181
182 #define SERIAL_DTR_MASK 0x00000003
183 #define SERIAL_DTR_CONTROL 0x00000001
184 #define SERIAL_DTR_HANDSHAKE 0x00000002
185 #define SERIAL_CTS_HANDSHAKE 0x00000008
186 #define SERIAL_DSR_HANDSHAKE 0x00000010
187 #define SERIAL_DCD_HANDSHAKE 0x00000020
188 #define SERIAL_OUT_HANDSHAKEMASK 0x00000038
189 #define SERIAL_DSR_SENSITIVITY 0x00000040
190 #define SERIAL_ERROR_ABORT 0x80000000
191 #define SERIAL_CONTROL_INVALID 0x7fffff84
192 #define SERIAL_AUTO_TRANSMIT 0x00000001
193 #define SERIAL_AUTO_RECEIVE 0x00000002
194 #define SERIAL_ERROR_CHAR 0x00000004
195 #define SERIAL_NULL_STRIPPING 0x00000008
196 #define SERIAL_BREAK_CHAR 0x00000010
197 #define SERIAL_RTS_MASK 0x000000c0
198 #define SERIAL_RTS_CONTROL 0x00000040
199 #define SERIAL_RTS_HANDSHAKE 0x00000080
200 #define SERIAL_TRANSMIT_TOGGLE 0x000000c0
201 #define SERIAL_XOFF_CONTINUE 0x80000000
202 #define SERIAL_FLOW_INVALID 0x7fffff20
203
204 typedef struct _SERIAL_LINE_CONTROL {
205 UCHAR StopBits;
206 UCHAR Parity;
207 UCHAR WordLength;
208 } SERIAL_LINE_CONTROL, *PSERIAL_LINE_CONTROL;
209
210 /* SERIAL_LINE_CONTROL.StopBits constants */
211 #define STOP_BIT_1 0x00
212 #define STOP_BITS_1_5 0x01
213 #define STOP_BITS_2 0x02
214
215 /* SERIAL_LINE_CONTROL.Parity constants */
216 #define NO_PARITY 0x00
217 #define ODD_PARITY 0x01
218 #define EVEN_PARITY 0x02
219 #define MARK_PARITY 0x03
220 #define SPACE_PARITY 0x04
221
222 /* IOCTL_SERIAL_(GET_MODEM_CONTROL, SET_MODEM_CONTROL) flags */
223 #define SERIAL_IOC_MCR_DTR 0x00000001
224 #define SERIAL_IOC_MCR_RTS 0x00000002
225 #define SERIAL_IOC_MCR_OUT1 0x00000004
226 #define SERIAL_IOC_MCR_OUT2 0x00000008
227 #define SERIAL_IOC_MCR_LOOP 0x00000010
228
229 typedef struct _SERIAL_COMMPROP {
230 USHORT PacketLength;
231 USHORT PacketVersion;
232 ULONG ServiceMask;
233 ULONG Reserved1;
234 ULONG MaxTxQueue;
235 ULONG MaxRxQueue;
236 ULONG MaxBaud;
237 ULONG ProvSubType;
238 ULONG ProvCapabilities;
239 ULONG SettableParams;
240 ULONG SettableBaud;
241 USHORT SettableData;
242 USHORT SettableStopParity;
243 ULONG CurrentTxQueue;
244 ULONG CurrentRxQueue;
245 ULONG ProvSpec1;
246 ULONG ProvSpec2;
247 WCHAR ProvChar[1];
248 } SERIAL_COMMPROP, *PSERIAL_COMMPROP;
249
250 /* SERIAL_COMMPROP.SettableParams flags */
251 #define SERIAL_SP_PARITY 0x0001
252 #define SERIAL_SP_BAUD 0x0002
253 #define SERIAL_SP_DATABITS 0x0004
254 #define SERIAL_SP_STOPBITS 0x0008
255 #define SERIAL_SP_HANDSHAKING 0x0010
256 #define SERIAL_SP_PARITY_CHECK 0x0020
257 #define SERIAL_SP_CARRIER_DETECT 0x0040
258
259 /* SERIAL_COMMPROP.ProvCapabilities flags */
260 #define SERIAL_PCF_DTRDSR 0x00000001
261 #define SERIAL_PCF_RTSCTS 0x00000002
262 #define SERIAL_PCF_CD 0x00000004
263 #define SERIAL_PCF_PARITY_CHECK 0x00000008
264 #define SERIAL_PCF_XONXOFF 0x00000010
265 #define SERIAL_PCF_SETXCHAR 0x00000020
266 #define SERIAL_PCF_TOTALTIMEOUTS 0x00000040
267 #define SERIAL_PCF_INTTIMEOUTS 0x00000080
268 #define SERIAL_PCF_SPECIALCHARS 0x00000100
269 #define SERIAL_PCF_16BITMODE 0x00000200
270
271 /* SERIAL_COMMPROP.SettableData flags */
272 #define SERIAL_DATABITS_5 0x0001
273 #define SERIAL_DATABITS_6 0x0002
274 #define SERIAL_DATABITS_7 0x0004
275 #define SERIAL_DATABITS_8 0x0008
276 #define SERIAL_DATABITS_16 0x0010
277 #define SERIAL_DATABITS_16X 0x0020
278
279 /* SERIAL_COMMPROP.SettableStopParity flags */
280 #define SERIAL_STOPBITS_10 0x0001
281 #define SERIAL_STOPBITS_15 0x0002
282 #define SERIAL_STOPBITS_20 0x0004
283 #define SERIAL_PARITY_NONE 0x0100
284 #define SERIAL_PARITY_ODD 0x0200
285 #define SERIAL_PARITY_EVEN 0x0400
286 #define SERIAL_PARITY_MARK 0x0800
287 #define SERIAL_PARITY_SPACE 0x1000
288
289 typedef struct _SERIALPERF_STATS {
290 ULONG ReceivedCount;
291 ULONG TransmittedCount;
292 ULONG FrameErrorCount;
293 ULONG SerialOverrunErrorCount;
294 ULONG BufferOverrunErrorCount;
295 ULONG ParityErrorCount;
296 } SERIALPERF_STATS, *PSERIALPERF_STATS;
297
298 typedef struct _SERIAL_TIMEOUTS {
299 ULONG ReadIntervalTimeout;
300 ULONG ReadTotalTimeoutMultiplier;
301 ULONG ReadTotalTimeoutConstant;
302 ULONG WriteTotalTimeoutMultiplier;
303 ULONG WriteTotalTimeoutConstant;
304 } SERIAL_TIMEOUTS, *PSERIAL_TIMEOUTS;
305
306 /* IOCTL_SERIAL_(GET_WAIT_MASK, SET_WAIT_MASK, WAIT_ON_MASK) flags */
307 #define SERIAL_EV_RXCHAR 0x0001
308 #define SERIAL_EV_RXFLAG 0x0002
309 #define SERIAL_EV_TXEMPTY 0x0004
310 #define SERIAL_EV_CTS 0x0008
311 #define SERIAL_EV_DSR 0x0010
312 #define SERIAL_EV_RLSD 0x0020
313 #define SERIAL_EV_BREAK 0x0040
314 #define SERIAL_EV_ERR 0x0080
315 #define SERIAL_EV_RING 0x0100
316 #define SERIAL_EV_PERR 0x0200
317 #define SERIAL_EV_RX80FULL 0x0400
318 #define SERIAL_EV_EVENT1 0x0800
319 #define SERIAL_EV_EVENT2 0x1000
320
321 /* IOCTL_SERIAL_LSRMST_INSERT constants */
322 #define SERIAL_LSRMST_LSR_DATA 0x01
323 #define SERIAL_LSRMST_LSR_NODATA 0x02
324 #define SERIAL_LSRMST_MST 0x03
325 #define SERIAL_LSRMST_ESCAPE 0x00
326
327 /* IOCTL_SERIAL_PURGE constants */
328 #define SERIAL_PURGE_TXABORT 0x00000001
329 #define SERIAL_PURGE_RXABORT 0x00000002
330 #define SERIAL_PURGE_TXCLEAR 0x00000004
331 #define SERIAL_PURGE_RXCLEAR 0x00000008
332
333 /* IOCTL_SERIAL_SET_FIFO_CONTROL constants */
334 #define SERIAL_IOC_FCR_FIFO_ENABLE 0x00000001
335 #define SERIAL_IOC_FCR_RCVR_RESET 0x00000002
336 #define SERIAL_IOC_FCR_XMIT_RESET 0x00000004
337 #define SERIAL_IOC_FCR_DMA_MODE 0x00000008
338 #define SERIAL_IOC_FCR_RES1 0x00000010
339 #define SERIAL_IOC_FCR_RES2 0x00000020
340 #define SERIAL_IOC_FCR_RCVR_TRIGGER_LSB 0x00000040
341 #define SERIAL_IOC_FCR_RCVR_TRIGGER_MSB 0x00000080
342
343 typedef struct _SERIAL_QUEUE_SIZE {
344 ULONG InSize;
345 ULONG OutSize;
346 } SERIAL_QUEUE_SIZE, *PSERIAL_QUEUE_SIZE;
347
348 typedef struct _SERIAL_XOFF_COUNTER {
349 ULONG Timeout;
350 LONG Counter;
351 UCHAR XoffChar;
352 } SERIAL_XOFF_COUNTER, *PSERIAL_XOFF_COUNTER;
353
354 typedef struct _SERIAL_BASIC_SETTINGS {
355 SERIAL_TIMEOUTS Timeouts;
356 SERIAL_HANDFLOW HandFlow;
357 ULONG RxFifo;
358 ULONG TxFifo;
359 } SERIAL_BASIC_SETTINGS, *PSERIAL_BASIC_SETTINGS;
360
361 typedef struct _SERENUM_PORT_DESC {
362 ULONG Size;
363 PVOID PortHandle;
364 PHYSICAL_ADDRESS PortAddress;
365 USHORT Reserved[1];
366 } SERENUM_PORT_DESC, *PSERENUM_PORT_DESC;
367
368 typedef UCHAR NTAPI
369 (*PSERENUM_READPORT)(
370 PVOID SerPortAddress);
371
372 typedef VOID NTAPI
373 (*PSERENUM_WRITEPORT)(
374 PVOID SerPortAddress,
375 UCHAR Value);
376
377 typedef enum _SERENUM_PORTION {
378 SerenumFirstHalf,
379 SerenumSecondHalf,
380 SerenumWhole
381 } SERENUM_PORTION;
382
383 typedef struct _SERENUM_PORT_PARAMETERS {
384 ULONG Size;
385 PSERENUM_READPORT ReadAccessor;
386 PSERENUM_WRITEPORT WriteAccessor;
387 PVOID SerPortAddress;
388 PVOID HardwareHandle;
389 SERENUM_PORTION Portion;
390 USHORT NumberAxis;
391 USHORT Reserved[3];
392 } SERENUM_PORT_PARAMETERS, *PSERENUM_PORT_PARAMETERS;
393
394 #define SERIAL_ERROR_BREAK 0x00000001
395 #define SERIAL_ERROR_FRAMING 0x00000002
396 #define SERIAL_ERROR_OVERRUN 0x00000004
397 #define SERIAL_ERROR_QUEUEOVERRUN 0x00000008
398 #define SERIAL_ERROR_PARITY 0x00000010
399
400 #define SERIAL_SP_UNSPECIFIED 0x00000000
401 #define SERIAL_SP_RS232 0x00000001
402 #define SERIAL_SP_PARALLEL 0x00000002
403 #define SERIAL_SP_RS422 0x00000003
404 #define SERIAL_SP_RS423 0x00000004
405 #define SERIAL_SP_RS449 0x00000005
406 #define SERIAL_SP_MODEM 0X00000006
407 #define SERIAL_SP_FAX 0x00000021
408 #define SERIAL_SP_SCANNER 0x00000022
409 #define SERIAL_SP_BRIDGE 0x00000100
410 #define SERIAL_SP_LAT 0x00000101
411 #define SERIAL_SP_TELNET 0x00000102
412 #define SERIAL_SP_X25 0x00000103
413 #define SERIAL_SP_SERIALCOMM 0x00000001
414
415 #define SERIAL_TX_WAITING_FOR_CTS 0x00000001
416 #define SERIAL_TX_WAITING_FOR_DSR 0x00000002
417 #define SERIAL_TX_WAITING_FOR_DCD 0x00000004
418 #define SERIAL_TX_WAITING_FOR_XON 0x00000008
419 #define SERIAL_TX_WAITING_XOFF_SENT 0x00000010
420 #define SERIAL_TX_WAITING_ON_BREAK 0x00000020
421 #define SERIAL_RX_WAITING_FOR_DSR 0x00000040
422
423 #define SERIAL_DTR_STATE 0x00000001
424 #define SERIAL_RTS_STATE 0x00000002
425 #define SERIAL_CTS_STATE 0x00000010
426 #define SERIAL_DSR_STATE 0x00000020
427 #define SERIAL_RI_STATE 0x00000040
428 #define SERIAL_DCD_STATE 0x00000080
429
430 typedef struct _SERIALCONFIG {
431 ULONG Size;
432 USHORT Version;
433 ULONG SubType;
434 ULONG ProvOffset;
435 ULONG ProviderSize;
436 WCHAR ProviderData[1];
437 } SERIALCONFIG,*PSERIALCONFIG;
438
439 #ifdef __cplusplus
440 }
441 #endif
442
443 #endif /* __NTDDSER_H */