reactos/include/ndk/amd64/ketypes.h

   1 /*++ NDK Version: 0098
   2
   3 Copyright (c) Alex Ionescu.  All rights reserved.
   4
   5 Header Name:
   6
   7     ketypes.h (AMD64)
   8
   9 Abstract:
  10
  11     amd64 Type definitions for the Kernel services.
  12
  13 Author:
  14
  15     Alex Ionescu (alexi@tinykrnl.org) - Updated - 27-Feb-2006
  16     Timo Kreuzer (timo.kreuzer@reactos.org) - Updated - 14-Aug-2008
  17
  18 --*/
  19
  20 #ifndef _AMD64_KETYPES_H
  21 #define _AMD64_KETYPES_H
  22
  23 //
  24 // Dependencies
  25 //
  26
  27 //
  28 // KPCR Access for non-IA64 builds
  29 //
  30 //#define K0IPCR                  ((ULONG_PTR)(KIP0PCRADDRESS))
  31 //#define PCR                     ((volatile KPCR * const)K0IPCR)
  32 #define PCR ((volatile KPCR * const)__readgsqword(FIELD_OFFSET(KPCR, Self)))
  33 //#if defined(CONFIG_SMP) || defined(NT_BUILD)
  34 //#undef  KeGetPcr
  35 //#define KeGetPcr()              ((volatile KPCR * const)__readfsdword(0x1C))
  36 //#endif
  37
  38 //
  39 // CPU Vendors
  40 //
  41 typedef enum
  42 {
  43     CPU_UNKNOWN,
  44     CPU_AMD,
  45     CPU_INTEL,
  46     CPU_VIA
  47 } CPU_VENDORS;
  48
  49 //
  50 // Machine Types
  51 //
  52 #define MACHINE_TYPE_ISA        0x0000
  53 #define MACHINE_TYPE_EISA       0x0001
  54 #define MACHINE_TYPE_MCA        0x0002
  55
  56 //
  57 // X86 80386 Segment Types
  58 //
  59 #define I386_TASK_GATE          0x5
  60 #define I386_TSS                0x9
  61 #define I386_ACTIVE_TSS         0xB
  62 #define I386_CALL_GATE          0xC
  63 #define I386_INTERRUPT_GATE     0xE
  64 #define I386_TRAP_GATE          0xF
  65
  66 //
  67 // Selector Names
  68 //
  69 #define RPL_MASK                0x0003
  70 #define MODE_MASK               0x0001
  71 #define KGDT64_NULL             0x0000
  72 #define KGDT64_R0_CODE          0x0010
  73 #define KGDT64_R0_DATA          0x0018
  74 #define KGDT64_R3_CMCODE        0x0020
  75 #define KGDT64_R3_DATA          0x0028
  76 #define KGDT64_R3_CODE          0x0030
  77 #define KGDT64_SYS_TSS          0x0040
  78 #define KGDT64_R3_CMTEB         0x0050
  79 #define KGDT64_R0_LDT           0x0060
  80
  81 //
  82 // CR4
  83 //
  84 #define CR4_VME                 0x1
  85 #define CR4_PVI                 0x2
  86 #define CR4_TSD                 0x4
  87 #define CR4_DE                  0x8
  88 #define CR4_PSE                 0x10
  89 #define CR4_PAE                 0x20
  90 #define CR4_MCE                 0x40
  91 #define CR4_PGE                 0x80
  92 #define CR4_FXSR                0x200
  93 #define CR4_XMMEXCPT            0x400
  94 #define CR4_CHANNELS            0x800
  95 #define CR4_XSAVE               0x40000
  96
  97 //
  98 // DR7
  99 //
 100 #define DR7_LEGAL               0xFFFF0355
 101 #define DR7_ACTIVE              0x00000355
 102 #define DR7_TRACE_BRANCH        0x00000200
 103 #define DR7_LAST_BRANCH         0x00000100
 104
 105 //
 106 // Debug flags
 107 //
 108 #define DEBUG_ACTIVE_DR7                        0x0001
 109 #define DEBUG_ACTIVE_INSTRUMENTED               0x0002
 110 #define DEBUG_ACTIVE_DBG_INSTRUMENTED           0x0003
 111 #define DEBUG_ACTIVE_MINIMAL_THREAD             0x0004
 112 #define DEBUG_ACTIVE_PRIMARY_THREAD             0x0080
 113 #define DEBUG_ACTIVE_PRIMARY_THREAD_BIT         0x0007
 114 #define DEBUG_ACTIVE_PRIMARY_THREAD_LOCK_BIT    0x001F
 115 #define DEBUG_ACTIVE_SCHEDULED_THREAD           0x0040
 116 #define DEBUG_ACTIVE_SCHEDULED_THREAD_BIT       0x0006
 117 #define DEBUG_ACTIVE_SCHEDULED_THREAD_LOCK_BIT  0x001E
 118 #define DEBUG_ACTIVE_SCHEDULED_THREAD_LOCK      0x40000000
 119
 120 //
 121 // EFlags
 122 //
 123 #define EFLAGS_CF               0x01L
 124 #define EFLAGS_ZF               0x40L
 125 #define EFLAGS_TF               0x100L
 126 #define EFLAGS_INTERRUPT_MASK   0x200L
 127 #define EFLAGS_DF               0x400L
 128 #define EFLAGS_NESTED_TASK      0x4000L
 129 #define EFLAGS_V86_MASK         0x20000
 130 #define EFLAGS_ALIGN_CHECK      0x40000
 131 #define EFLAGS_VIF              0x80000
 132 #define EFLAGS_VIP              0x100000
 133 #define EFLAGS_USER_SANITIZE    0x3F4DD7
 134 #define EFLAG_SIGN              0x8000
 135 #define EFLAG_ZERO              0x4000
 136 #define EFLAGS_TF_MASK          0x0100
 137 #define EFLAGS_TF_SHIFT         0x0008
 138 #define EFLAGS_ID_MASK          0x200000
 139 #define EFLAGS_IF_MASK          0x0200
 140 #define EFLAGS_IF_SHIFT         0x0009
 141
 142 //
 143 // MXCSR Floating Control/Status Bit Masks
 144 //
 145 #define XSW_INVALID_OPERATION   0x0001
 146 #define XSW_DENORMAL            0x0002
 147 #define XSW_ZERO_DIVIDE         0x0004
 148 #define XSW_OVERFLOW            0x0008
 149 #define XSW_UNDERFLOW           0x0010
 150 #define XSW_PRECISION           0x0020
 151 #define XCW_INVALID_OPERATION   0x0080
 152 #define XCW_DENORMAL            0x0100
 153 #define XCW_ZERO_DIVIDE         0x0200
 154 #define XCW_OVERFLOW            0x0400
 155 #define XCW_UNDERFLOW           0x0800
 156 #define XCW_PRECISION           0x1000
 157 #define XCW_ROUND_CONTROL       0x6000
 158 #define XCW_FLUSH_ZERO          0x8000
 159 #define XSW_ERROR_MASK          0x003F
 160 #define XSW_ERROR_SHIFT         7
 161
 162 //
 163 // Legacy floating status word bit masks.
 164 //
 165 #define FSW_INVALID_OPERATION   0x0001
 166 #define FSW_DENORMAL            0x0002
 167 #define FSW_ZERO_DIVIDE         0x0004
 168 #define FSW_OVERFLOW            0x0008
 169 #define FSW_UNDERFLOW           0x0010
 170 #define FSW_PRECISION           0x0020
 171 #define FSW_STACK_FAULT         0x0040
 172 #define FSW_ERROR_SUMMARY       0x0080
 173 #define FSW_CONDITION_CODE_0    0x0100
 174 #define FSW_CONDITION_CODE_1    0x0200
 175 #define FSW_CONDITION_CODE_2    0x0400
 176 #define FSW_CONDITION_CODE_3    0x4000
 177 #define FSW_ERROR_MASK          0x003F
 178
 179 //
 180 // Machine Specific Registers
 181 //
 182 #define MSR_EFER                0xC0000080
 183 #define MSR_STAR                0xC0000081
 184 #define MSR_LSTAR               0xC0000082
 185 #define MSR_CSTAR               0xC0000083
 186 #define MSR_SYSCALL_MASK        0xC0000084
 187 #define MSR_FS_BASE             0xC0000100
 188 #define MSR_GS_BASE             0xC0000101
 189 #define MSR_GS_SWAP             0xC0000102
 190 #define MSR_MCG_STATUS          0x017A
 191 #define MSR_AMD_ACCESS          0x9C5A203A
 192 #define MSR_IA32_MISC_ENABLE    0x01A0
 193 #define MSR_LAST_BRANCH_FROM    0x01DB
 194 #define MSR_LAST_BRANCH_TO      0x01DC
 195 #define MSR_LAST_EXCEPTION_FROM 0x01DD
 196 #define MSR_LAST_EXCEPTION_TO   0x01DE
 197
 198 //
 199 // Caching values for the PAT MSR
 200 //
 201 #define PAT_UC                  0ULL
 202 #define PAT_WC                  1ULL
 203 #define PAT_WT                  4ULL
 204 #define PAT_WP                  5ULL
 205 #define PAT_WB                  6ULL
 206 #define PAT_UCM                 7ULL
 207
 208 //
 209 // Flags in MSR_EFER
 210 //
 211 #define MSR_SCE                 0x0001
 212 #define MSR_LME                 0x0100
 213 #define MSR_LMA                 0x0400
 214 #define MSR_NXE                 0x0800
 215 #define MSR_PAT                 0x0277
 216 #define MSR_DEBUG_CTL           0x01D9
 217
 218 //
 219 //  Flags in MSR_IA32_MISC_ENABLE
 220 //
 221 #define MSR_XD_ENABLE_MASK      0xFFFFFFFB
 222
 223 //
 224 //  Flags in MSR_DEBUG_CTL
 225 //
 226 #define MSR_DEBUG_CTL_LBR equ   0x0001
 227 #define MSR_DEBUG_CTL_BTF equ   0x0002
 228
 229 //
 230 // IPI Types
 231 //
 232 #define IPI_APC                 1
 233 #define IPI_DPC                 2
 234 #define IPI_FREEZE              4
 235 #define IPI_PACKET_READY        8
 236 #define IPI_SYNCH_REQUEST       16
 237
 238 //
 239 // PRCB Flags
 240 //
 241 #define PRCB_MAJOR_VERSION      1
 242 #define PRCB_BUILD_DEBUG        1
 243 #define PRCB_BUILD_UNIPROCESSOR 2
 244
 245 //
 246 // Exception active flags
 247 //
 248 #define KEXCEPTION_ACTIVE_INTERRUPT_FRAME 0x0000
 249 #define KEXCEPTION_ACTIVE_EXCEPTION_FRAME 0x0001
 250 #define KEXCEPTION_ACTIVE_SERVICE_FRAME   0x0002
 251
 252 //
 253 // HAL Variables
 254 //
 255 #define INITIAL_STALL_COUNT     100
 256 #define HYPERSPACE_BASE         0xfffff70000000000ULL
 257 #define MM_HAL_VA_START         0xFFFFFFFFFFC00000ULL /* This is Vista+ */
 258 #define MM_HAL_VA_END           0xFFFFFFFFFFFFFFFFULL
 259 #define APIC_BASE               0xFFFFFFFFFFFE0000ULL
 260
 261 //
 262 // IOPM Definitions
 263 //
 264 #define IO_ACCESS_MAP_NONE      0
 265 #define IOPM_OFFSET             FIELD_OFFSET(KTSS, IoMaps[0].IoMap)
 266 #define KiComputeIopmOffset(MapNumber)              \
 267     (MapNumber == IO_ACCESS_MAP_NONE) ?             \
 268         (USHORT)(sizeof(KTSS)) :                    \
 269         (USHORT)(FIELD_OFFSET(KTSS, IoMaps[MapNumber-1].IoMap))
 270
 271 //
 272 // Static Kernel-Mode Address start (use MM_KSEG0_BASE for actual)
 273 //
 274 #define KSEG0_BASE 0xfffff80000000000ULL
 275
 276 //
 277 // Synchronization-level IRQL
 278 //
 279 #define SYNCH_LEVEL 12
 280
 281 #define NMI_STACK_SIZE 0x2000
 282 #define ISR_STACK_SIZE 0x6000
 283
 284 //
 285 // Number of pool lookaside lists per pool in the PRCB
 286 //
 287 #define NUMBER_POOL_LOOKASIDE_LISTS 32
 288
 289 //
 290 // Structure for CPUID
 291 //
 292 typedef union _CPU_INFO
 293 {
 294     UINT32 AsUINT32[4];
 295     struct
 296     {
 297         ULONG Eax;
 298         ULONG Ebx;
 299         ULONG Ecx;
 300         ULONG Edx;
 301     };
 302 } CPU_INFO, *PCPU_INFO;
 303
 304 //
 305 // Trap Frame Definition
 306 //
 307 typedef struct _KTRAP_FRAME
 308 {
 309     UINT64 P1Home;
 310     UINT64 P2Home;
 311     UINT64 P3Home;
 312     UINT64 P4Home;
 313     UINT64 P5;
 314     CHAR PreviousMode;
 315     UCHAR PreviousIrql;
 316     UCHAR FaultIndicator;
 317     UCHAR ExceptionActive;
 318     ULONG MxCsr;
 319     UINT64 Rax;
 320     UINT64 Rcx;
 321     UINT64 Rdx;
 322     UINT64 R8;
 323     UINT64 R9;
 324     UINT64 R10;
 325     UINT64 R11;
 326     union
 327     {
 328         UINT64 GsBase;
 329         UINT64 GsSwap;
 330     };
 331     M128A Xmm0;
 332     M128A Xmm1;
 333     M128A Xmm2;
 334     M128A Xmm3;
 335     M128A Xmm4;
 336     M128A Xmm5;
 337     union
 338     {
 339         UINT64 FaultAddress;
 340         UINT64 ContextRecord;
 341         UINT64 TimeStampCKCL;
 342     };
 343     UINT64 Dr0;
 344     UINT64 Dr1;
 345     UINT64 Dr2;
 346     UINT64 Dr3;
 347     UINT64 Dr6;
 348     UINT64 Dr7;
 349     union
 350     {
 351         struct
 352         {
 353             UINT64 DebugControl;
 354             UINT64 LastBranchToRip;
 355             UINT64 LastBranchFromRip;
 356             UINT64 LastExceptionToRip;
 357             UINT64 LastExceptionFromRip;
 358         };
 359         struct
 360         {
 361             UINT64 LastBranchControl;
 362             ULONG LastBranchMSR;
 363         };
 364     };
 365     USHORT SegDs;
 366     USHORT SegEs;
 367     USHORT SegFs;
 368     USHORT SegGs;
 369     UINT64 TrapFrame;
 370     UINT64 Rbx;
 371     UINT64 Rdi;
 372     UINT64 Rsi;
 373     UINT64 Rbp;
 374     union
 375     {
 376         UINT64 ErrorCode;
 377         UINT64 ExceptionFrame;
 378         UINT64 TimeStampKlog;
 379     };
 380     UINT64 Rip;
 381     USHORT SegCs;
 382     UCHAR Fill0;
 383     UCHAR Logging;
 384     USHORT Fill1[2];
 385     ULONG EFlags;
 386     ULONG Fill2;
 387     UINT64 Rsp;
 388     USHORT SegSs;
 389     USHORT Fill3;
 390     LONG CodePatchCycle;
 391 } KTRAP_FRAME, *PKTRAP_FRAME;
 392
 393 //
 394 // Dummy LDT_ENTRY
 395 //
 396 #ifndef _LDT_ENTRY_DEFINED
 397 #define _LDT_ENTRY_DEFINED
 398 typedef ULONG LDT_ENTRY;
 399 #endif
 400
 401 //
 402 // GDT Entry Definition
 403 //
 404 typedef union _KGDTENTRY64
 405 {
 406     struct
 407     {
 408         USHORT LimitLow;
 409         USHORT BaseLow;
 410         union
 411         {
 412             struct
 413             {
 414                 UCHAR BaseMiddle;
 415                 UCHAR Flags1;
 416                 UCHAR Flags2;
 417                 UCHAR BaseHigh;
 418             } Bytes;
 419             struct
 420             {
 421                 ULONG BaseMiddle:8;
 422                 ULONG Type:5;
 423                 ULONG Dpl:2;
 424                 ULONG Present:1;
 425                 ULONG LimitHigh:4;
 426                 ULONG System:1;
 427                 ULONG LongMode:1;
 428                 ULONG DefaultBig:1;
 429                 ULONG Granularity:1;
 430                 ULONG BaseHigh:8;
 431             } Bits;
 432         };
 433         ULONG BaseUpper;
 434         ULONG MustBeZero;
 435     };
 436     UINT64 Alignment;
 437 } KGDTENTRY64, *PKGDTENTRY64;
 438 #define KGDTENTRY KGDTENTRY64
 439 #define PKGDTENTRY PKGDTENTRY64
 440
 441 //
 442 // IDT Entry Access Definition
 443 //
 444 typedef struct _KIDT_ACCESS
 445 {
 446     union
 447     {
 448         struct
 449         {
 450             UCHAR Reserved;
 451             UCHAR SegmentType:4;
 452             UCHAR SystemSegmentFlag:1;
 453             UCHAR Dpl:2;
 454             UCHAR Present:1;
 455         };
 456         USHORT Value;
 457     };
 458 } KIDT_ACCESS, *PKIDT_ACCESS;
 459
 460 //
 461 // IDT Entry Definition
 462 //
 463 typedef union _KIDTENTRY64
 464 {
 465     struct
 466     {
 467         USHORT OffsetLow;
 468         USHORT Selector;
 469         USHORT IstIndex:3;
 470         USHORT Reserved0:5;
 471         USHORT Type:5;
 472         USHORT Dpl:2;
 473         USHORT Present:1;
 474         USHORT OffsetMiddle;
 475         ULONG OffsetHigh;
 476         ULONG Reserved1;
 477     };
 478     UINT64 Alignment;
 479 } KIDTENTRY64, *PKIDTENTRY64;
 480 #define KIDTENTRY KIDTENTRY64
 481 #define PKIDTENTRY PKIDTENTRY64
 482
 483 typedef struct _KDESCRIPTOR
 484 {
 485     USHORT Pad[3];
 486     USHORT Limit;
 487     PVOID Base;
 488 } KDESCRIPTOR, *PKDESCRIPTOR;
 489
 490 #ifndef NTOS_MODE_USER
 491
 492 //
 493 // Special Registers Structure (outside of CONTEXT)
 494 //
 495 typedef struct _KSPECIAL_REGISTERS
 496 {
 497     ULONG64 Cr0;
 498     ULONG64 Cr2;
 499     ULONG64 Cr3;
 500     ULONG64 Cr4;
 501     ULONG64 KernelDr0;
 502     ULONG64 KernelDr1;
 503     ULONG64 KernelDr2;
 504     ULONG64 KernelDr3;
 505     ULONG64 KernelDr6;
 506     ULONG64 KernelDr7;
 507     KDESCRIPTOR Gdtr;
 508     KDESCRIPTOR Idtr;
 509     USHORT Tr;
 510     USHORT Ldtr;
 511     ULONG MxCsr;
 512     ULONG64 DebugControl;
 513     ULONG64 LastBranchToRip;
 514     ULONG64 LastBranchFromRip;
 515     ULONG64 LastExceptionToRip;
 516     ULONG64 LastExceptionFromRip;
 517     ULONG64 Cr8;
 518     ULONG64 MsrGsBase;
 519     ULONG64 MsrGsSwap;
 520     ULONG64 MsrStar;
 521     ULONG64 MsrLStar;
 522     ULONG64 MsrCStar;
 523     ULONG64 MsrSyscallMask;
 524 } KSPECIAL_REGISTERS, *PKSPECIAL_REGISTERS;
 525
 526 //
 527 // Processor State Data
 528 //
 529 typedef struct _KPROCESSOR_STATE
 530 {
 531     KSPECIAL_REGISTERS SpecialRegisters;
 532     CONTEXT ContextFrame;
 533 } KPROCESSOR_STATE, *PKPROCESSOR_STATE;
 534
 535 #if (NTDDI_VERSION < NTDDI_LONGHORN)
 536 #define GENERAL_LOOKASIDE_POOL PP_LOOKASIDE_LIST
 537 #endif
 538
 539 typedef struct _KREQUEST_PACKET
 540 {
 541     PVOID CurrentPacket[3];
 542     PVOID WorkerRoutine;
 543 } KREQUEST_PACKET, *PKREQUEST_PACKET;
 544
 545 typedef struct _REQUEST_MAILBOX
 546 {
 547     INT64 RequestSummary;
 548     KREQUEST_PACKET RequestPacket;
 549     PVOID Virtual[7];
 550 } REQUEST_MAILBOX, *PREQUEST_MAILBOX;
 551
 552 //
 553 // Processor Region Control Block
 554 //
 555 #pragma pack(push,4)
 556 typedef struct _KPRCB
 557 {
 558     ULONG MxCsr;
 559 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 560     USHORT Number;
 561 #else
 562     UCHAR Number;
 563     UCHAR NestingLevel;
 564 #endif
 565     UCHAR InterruptRequest;
 566     UCHAR IdleHalt;
 567     struct _KTHREAD *CurrentThread;
 568     struct _KTHREAD *NextThread;
 569     struct _KTHREAD *IdleThread;
 570 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 571     UCHAR NestingLevel;
 572     UCHAR Group;
 573     UCHAR PrcbPad00[6];
 574 #else
 575     UINT64 UserRsp;
 576 #endif
 577     UINT64 RspBase;
 578     UINT64 PrcbLock;
 579     UINT64 SetMember;
 580     KPROCESSOR_STATE ProcessorState;
 581     CHAR CpuType;
 582     CHAR CpuID;
 583 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 584     union
 585     {
 586         USHORT CpuStep;
 587         struct
 588         {
 589             UCHAR CpuStepping;
 590             UCHAR CpuModel;
 591         };
 592     };
 593 #else
 594     USHORT CpuStep;
 595 #endif
 596     ULONG MHz;
 597     UINT64 HalReserved[8];
 598     USHORT MinorVersion;
 599     USHORT MajorVersion;
 600     UCHAR BuildType;
 601     UCHAR CpuVendor;
 602 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 603     UCHAR CoresPerPhysicalProcessor;
 604     UCHAR LogicalProcessorsPerCore;
 605 #else
 606     UCHAR InitialApicId;
 607     UCHAR LogicalProcessorsPerPhysicalProcessor;
 608 #endif
 609     ULONG ApicMask;
 610 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 611     ULONG CFlushSize;
 612 #else
 613     UCHAR CFlushSize;
 614     UCHAR PrcbPad0x[3];
 615 #endif
 616     PVOID AcpiReserved;
 617 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 618     ULONG InitialApicId;
 619     ULONG Stride;
 620     UINT64 PrcbPad01[3];
 621 #else
 622     UINT64 PrcbPad00[4];
 623 #endif
 624     KSPIN_LOCK_QUEUE LockQueue[LockQueueMaximumLock]; // 2003: 33, vista:49
 625     PP_LOOKASIDE_LIST PPLookasideList[16];
 626     GENERAL_LOOKASIDE_POOL PPNPagedLookasideList[NUMBER_POOL_LOOKASIDE_LISTS];
 627     GENERAL_LOOKASIDE_POOL PPPagedLookasideList[NUMBER_POOL_LOOKASIDE_LISTS];
 628     UINT64 PacketBarrier;
 629     SINGLE_LIST_ENTRY DeferredReadyListHead;
 630     LONG MmPageFaultCount;
 631     LONG MmCopyOnWriteCount;
 632     LONG MmTransitionCount;
 633 #if (NTDDI_VERSION < NTDDI_LONGHORN)
 634     LONG MmCacheTransitionCount;
 635 #endif
 636     LONG MmDemandZeroCount;
 637     LONG MmPageReadCount;
 638     LONG MmPageReadIoCount;
 639 #if (NTDDI_VERSION < NTDDI_LONGHORN)
 640     LONG MmCacheReadCount;
 641     LONG MmCacheIoCount;
 642 #endif
 643     LONG MmDirtyPagesWriteCount;
 644     LONG MmDirtyWriteIoCount;
 645     LONG MmMappedPagesWriteCount;
 646     LONG MmMappedWriteIoCount;
 647 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 648     ULONG KeSystemCalls;
 649     ULONG KeContextSwitches;
 650     ULONG CcFastReadNoWait;
 651     ULONG CcFastReadWait;
 652     ULONG CcFastReadNotPossible;
 653     ULONG CcCopyReadNoWait;
 654     ULONG CcCopyReadWait;
 655     ULONG CcCopyReadNoWaitMiss;
 656     LONG LookasideIrpFloat;
 657 #else
 658     LONG LookasideIrpFloat;
 659     ULONG KeSystemCalls;
 660 #endif
 661     LONG IoReadOperationCount;
 662     LONG IoWriteOperationCount;
 663     LONG IoOtherOperationCount;
 664     LARGE_INTEGER IoReadTransferCount;
 665     LARGE_INTEGER IoWriteTransferCount;
 666     LARGE_INTEGER IoOtherTransferCount;
 667 #if (NTDDI_VERSION < NTDDI_LONGHORN)
 668     ULONG KeContextSwitches;
 669     UCHAR PrcbPad2[12];
 670 #endif
 671     UINT64 TargetSet;
 672     ULONG IpiFrozen;
 673     UCHAR PrcbPad3[116];
 674     REQUEST_MAILBOX RequestMailbox[64];
 675     UINT64 SenderSummary;
 676     UCHAR PrcbPad4[120];
 677     KDPC_DATA DpcData[2];
 678     PVOID DpcStack;
 679 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 680     PVOID SparePtr0;
 681 #else
 682     PVOID SavedRsp;
 683 #endif
 684     LONG MaximumDpcQueueDepth;
 685     ULONG DpcRequestRate;
 686     ULONG MinimumDpcRate;
 687     UCHAR DpcInterruptRequested;
 688     UCHAR DpcThreadRequested;
 689     UCHAR DpcRoutineActive;
 690     UCHAR DpcThreadActive;
 691     UINT64 TimerHand;
 692     UINT64 TimerRequest;
 693     LONG TickOffset;
 694     LONG MasterOffset;
 695     ULONG DpcLastCount;
 696     UCHAR ThreadDpcEnable;
 697     UCHAR QuantumEnd;
 698     UCHAR PrcbPad50;
 699     UCHAR IdleSchedule;
 700     LONG DpcSetEventRequest;
 701 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 702     ULONG KeExceptionDispatchCount;
 703 #else
 704     LONG PrcbPad40;
 705     PVOID DpcThread;
 706 #endif
 707     KEVENT DpcEvent;
 708 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 709     PVOID PrcbPad51;
 710 #endif
 711     KDPC CallDpc;
 712 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 713     LONG ClockKeepAlive;
 714     UCHAR ClockCheckSlot;
 715     UCHAR ClockPollCycle;
 716     UCHAR PrcbPad6[2];
 717     LONG DpcWatchdogPeriod;
 718     LONG DpcWatchdogCount;
 719     UINT64 PrcbPad70[2];
 720 #else
 721     UINT64 PrcbPad7[4];
 722 #endif
 723     LIST_ENTRY WaitListHead;
 724 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 725     UINT64 WaitLock;
 726 #endif
 727     ULONG ReadySummary;
 728     ULONG QueueIndex;
 729 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 730     UINT64 PrcbPad71[12];
 731 #endif
 732     LIST_ENTRY DispatcherReadyListHead[32];
 733     ULONG InterruptCount;
 734     ULONG KernelTime;
 735     ULONG UserTime;
 736     ULONG DpcTime;
 737     ULONG InterruptTime;
 738     ULONG AdjustDpcThreshold;
 739     UCHAR SkipTick;
 740     UCHAR DebuggerSavedIRQL;
 741     UCHAR PollSlot;
 742 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 743     UCHAR PrcbPad80[5];
 744     ULONG DpcTimeCount;
 745     ULONG DpcTimeLimit;
 746     ULONG PeriodicCount;
 747     ULONG PeriodicBias;
 748     UINT64 PrcbPad81[2];
 749 #else
 750     UCHAR PrcbPad8[13];
 751 #endif
 752     struct _KNODE *ParentNode;
 753     UINT64 MultiThreadProcessorSet;
 754     struct _KPRCB *MultiThreadSetMaster;
 755 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 756     UINT64 StartCycles;
 757     LONG MmSpinLockOrdering;
 758     ULONG PageColor;
 759     ULONG NodeColor;
 760     ULONG NodeShiftedColor;
 761     ULONG SecondaryColorMask;
 762 #endif
 763     LONG Sleeping;
 764 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 765     UINT64 CycleTime;
 766     ULONG CcFastMdlReadNoWait;
 767     ULONG CcFastMdlReadWait;
 768     ULONG CcFastMdlReadNotPossible;
 769     ULONG CcMapDataNoWait;
 770     ULONG CcMapDataWait;
 771     ULONG CcPinMappedDataCount;
 772     ULONG CcPinReadNoWait;
 773     ULONG CcPinReadWait;
 774     ULONG CcMdlReadNoWait;
 775     ULONG CcMdlReadWait;
 776     ULONG CcLazyWriteHotSpots;
 777     ULONG CcLazyWriteIos;
 778     ULONG CcLazyWritePages;
 779     ULONG CcDataFlushes;
 780     ULONG CcDataPages;
 781     ULONG CcLostDelayedWrites;
 782     ULONG CcFastReadResourceMiss;
 783     ULONG CcCopyReadWaitMiss;
 784     ULONG CcFastMdlReadResourceMiss;
 785     ULONG CcMapDataNoWaitMiss;
 786     ULONG CcMapDataWaitMiss;
 787     ULONG CcPinReadNoWaitMiss;
 788     ULONG CcPinReadWaitMiss;
 789     ULONG CcMdlReadNoWaitMiss;
 790     ULONG CcMdlReadWaitMiss;
 791     ULONG CcReadAheadIos;
 792     LONG MmCacheTransitionCount;
 793     LONG MmCacheReadCount;
 794     LONG MmCacheIoCount;
 795     ULONG PrcbPad91[3];
 796     PROCESSOR_POWER_STATE PowerState;
 797     ULONG KeAlignmentFixupCount;
 798     UCHAR VendorString[13];
 799     UCHAR PrcbPad10[3];
 800     ULONG FeatureBits;
 801     LARGE_INTEGER UpdateSignature;
 802     KDPC DpcWatchdogDpc;
 803     KTIMER DpcWatchdogTimer;
 804     CACHE_DESCRIPTOR Cache[5];
 805     ULONG CacheCount;
 806     ULONG CachedCommit;
 807     ULONG CachedResidentAvailable;
 808     PVOID HyperPte;
 809     PVOID WheaInfo;
 810     PVOID EtwSupport;
 811     SLIST_HEADER InterruptObjectPool;
 812     SLIST_HEADER HypercallPageList;
 813     PVOID HypercallPageVirtual;
 814     PVOID VirtualApicAssist;
 815     UINT64* StatisticsPage;
 816     PVOID RateControl;
 817     UINT64 CacheProcessorMask[5];
 818     UINT64 PackageProcessorSet;
 819     UINT64 CoreProcessorSet;
 820 #else
 821     ULONG PrcbPad90[1];
 822     ULONG DebugDpcTime;
 823     ULONG PageColor;
 824     ULONG NodeColor;
 825     ULONG NodeShiftedColor;
 826     ULONG SecondaryColorMask;
 827     UCHAR PrcbPad9[12];
 828     ULONG CcFastReadNoWait;
 829     ULONG CcFastReadWait;
 830     ULONG CcFastReadNotPossible;
 831     ULONG CcCopyReadNoWait;
 832     ULONG CcCopyReadWait;
 833     ULONG CcCopyReadNoWaitMiss;
 834     ULONG KeAlignmentFixupCount;
 835     ULONG KeDcacheFlushCount;
 836     ULONG KeExceptionDispatchCount;
 837     ULONG KeFirstLevelTbFills;
 838     ULONG KeFloatingEmulationCount;
 839     ULONG KeIcacheFlushCount;
 840     ULONG KeSecondLevelTbFills;
 841     UCHAR VendorString[13];
 842     UCHAR PrcbPad10[2];
 843     ULONG FeatureBits;
 844     LARGE_INTEGER UpdateSignature;
 845     PROCESSOR_POWER_STATE PowerState;
 846     CACHE_DESCRIPTOR Cache[5];
 847     ULONG CacheCount;
 848 #endif
 849 } KPRCB, *PKPRCB;
 850
 851 //
 852 // Processor Control Region
 853 //
 854 typedef struct _KIPCR
 855 {
 856     union
 857     {
 858         NT_TIB NtTib;
 859         struct
 860         {
 861             union _KGDTENTRY64 *GdtBase;
 862             struct _KTSS64 *TssBase;
 863             ULONG64 UserRsp;
 864             struct _KPCR *Self;
 865             struct _KPRCB *CurrentPrcb;
 866             PKSPIN_LOCK_QUEUE LockArray;
 867             PVOID Used_Self;
 868         };
 869     };
 870     union _KIDTENTRY64 *IdtBase;
 871     ULONG64 Unused[2];
 872     KIRQL Irql;
 873     UCHAR SecondLevelCacheAssociativity;
 874     UCHAR ObsoleteNumber;
 875     UCHAR Fill0;
 876     ULONG Unused0[3];
 877     USHORT MajorVersion;
 878     USHORT MinorVersion;
 879     ULONG StallScaleFactor;
 880     PVOID Unused1[3];
 881     ULONG KernelReserved[15];
 882     ULONG SecondLevelCacheSize;
 883     ULONG HalReserved[16];
 884     ULONG Unused2;
 885     ULONG Fill1;
 886     PVOID KdVersionBlock; // 0x108
 887     PVOID Unused3;
 888     ULONG PcrAlign1[24];
 889     ULONG Fill2[2]; // 0x178
 890     KPRCB Prcb; // 0x180
 891
 892     // hack:
 893     ULONG ContextSwitches;
 894
 895 } KIPCR, *PKIPCR;
 896 #pragma pack(pop)
 897
 898 //
 899 // TSS Definition
 900 //
 901 typedef struct _KiIoAccessMap
 902 {
 903     UCHAR DirectionMap[32];
 904     UCHAR IoMap[8196];
 905 } KIIO_ACCESS_MAP;
 906
 907
 908 #pragma pack(push,4)
 909 typedef struct _KTSS64
 910 {
 911  /* 000 */  ULONG Reserved0;
 912  /* 004 */  UINT64 Rsp0;
 913  /* 00c */  UINT64 Rsp1;
 914  /* 014 */  UINT64 Rsp2;
 915  /* 01c */  UINT64 Ist[8];
 916  /* 05c */  UINT64 Reserved1;
 917  /* 064 */  USHORT Reserved2;
 918  /* 066 */  USHORT IoMapBase;
 919 } KTSS64, *PKTSS64;
 920 #pragma pack(pop)
 921 #define KTSS KTSS64
 922 #define PKTSS PKTSS64
 923
 924 //
 925 // KEXCEPTION_FRAME
 926 //
 927 typedef struct _KEXCEPTION_FRAME
 928 {
 929     ULONG64 P1Home;
 930     ULONG64 P2Home;
 931     ULONG64 P3Home;
 932     ULONG64 P4Home;
 933     ULONG64 P5;
 934     ULONG64 Spare1;
 935     M128A Xmm6;
 936     M128A Xmm7;
 937     M128A Xmm8;
 938     M128A Xmm9;
 939     M128A Xmm10;
 940     M128A Xmm11;
 941     M128A Xmm12;
 942     M128A Xmm13;
 943     M128A Xmm14;
 944     M128A Xmm15;
 945     ULONG64 TrapFrame;
 946     //ULONG64 CallbackStack;
 947     ULONG64 OutputBuffer;
 948     ULONG64 OutputLength;
 949     ULONG64 Spare2;
 950     ULONG64 MxCsr;
 951     ULONG64 Rbp;
 952     ULONG64 Rbx;
 953     ULONG64 Rdi;
 954     ULONG64 Rsi;
 955     ULONG64 R12;
 956     ULONG64 R13;
 957     ULONG64 R14;
 958     ULONG64 R15;
 959     ULONG64 Return;
 960 } KEXCEPTION_FRAME, *PKEXCEPTION_FRAME;
 961
 962 typedef struct _MACHINE_FRAME
 963 {
 964     ULONG64 Rip;
 965     USHORT SegCs;
 966     USHORT Fill1[3];
 967     ULONG EFlags;
 968     ULONG Fill2;
 969     ULONG64 Rsp;
 970     USHORT SegSs;
 971     USHORT Fill3[3];
 972 } MACHINE_FRAME, *PMACHINE_FRAME;
 973
 974 //
 975 // Defines the Callback Stack Layout for User Mode Callbacks
 976 //
 977 typedef KEXCEPTION_FRAME KCALLOUT_FRAME, PKCALLOUT_FRAME;
 978
 979 //
 980 // User side callout frame
 981 //
 982 typedef struct _UCALLOUT_FRAME
 983 {
 984     ULONG64 P1Home;
 985     ULONG64 P2Home;
 986     ULONG64 P3Home;
 987     ULONG64 P4Home;
 988     PVOID Buffer;
 989     ULONG Length;
 990     ULONG ApiNumber;
 991     MACHINE_FRAME MachineFrame;
 992 } UCALLOUT_FRAME, *PUCALLOUT_FRAME; // size = 0x0058
 993
 994 typedef struct _DISPATCHER_CONTEXT
 995 {
 996     ULONG64 ControlPc;
 997     PVOID ImageBase;
 998     PVOID FunctionEntry;
 999     PVOID EstablisherFrame;
1000     ULONG64 TargetIp;
1001     PVOID ContextRecord;
1002     PVOID LanguageHandler;
1003     PVOID HandlerData;
1004     PVOID HistoryTable;
1005     ULONG ScopeIndex;
1006 } DISPATCHER_CONTEXT, *PDISPATCHER_CONTEXT;
1007
1008 typedef struct _KSTART_FRAME
1009 {
1010     ULONG64 P1Home;
1011     ULONG64 P2Home;
1012     ULONG64 P3Home;
1013     ULONG64 P4Home;
1014     ULONG64 Reserved;
1015     ULONG64 Return;
1016 } KSTART_FRAME, *PKSTART_FRAME;
1017
1018 typedef struct _KSWITCH_FRAME
1019 {
1020     ULONG64 P1Home;
1021     ULONG64 P2Home;
1022     ULONG64 P3Home;
1023     ULONG64 P4Home;
1024     ULONG64 P5Home;
1025     KIRQL ApcBypass;
1026     UCHAR Fill1[7];
1027     ULONG64 Rbp;
1028     ULONG64 Return;
1029 } KSWITCH_FRAME, *PKSWITCH_FRAME;
1030
1031 #define PROCESSOR_START_FLAG_FORCE_ENABLE_NX 0x0001
1032 typedef struct _KPROCESSOR_START_BLOCK
1033 {
1034     ULONG CompletionFlag; // 0x0004
1035     ULONG Flags; // 0x0008
1036     ULONG Gdt32; // 0x000C
1037     ULONG Idt32; // 0x0012
1038     PVOID Gdt; // 0x0018
1039     // ???
1040     ULONG64 TiledMemoryMap; // 0x0058
1041     UCHAR PmTarget[6]; // 0x0060
1042     UCHAR LmIdentityTarget[6]; // 0x0066
1043     ULONG64 LmTarget; // 0x0070
1044     struct _KPROCESSOR_START_BLOCK *SelfMap; // 0x0078
1045     ULONG64 MsrPat; // 0x0080
1046     ULONG64 MsrEFER; // 0x0088
1047     KPROCESSOR_STATE ProcessorState; // 0x0090
1048 } KPROCESSOR_START_BLOCK, *PKPROCESSOR_START_BLOCK; // size 00640
1049
1050 //
1051 // Inline function to get current KPRCB
1052 //
1053 FORCEINLINE
1054 struct _KPRCB *
1055 KeGetCurrentPrcb(VOID)
1056 {
1057     return (struct _KPRCB *)__readgsqword(FIELD_OFFSET(KIPCR, CurrentPrcb));
1058 }
1059
1060 #endif
1061 #endif