8775eff5a5c633182c292f17d3cdadd62559fc32
[reactos.git] / reactos / include / reactos / armddk.h
1 #ifndef _ARMDDK_
2 #define _ARMDDK_
3
4 //
5 // IRQLs
6 //
7 #define PASSIVE_LEVEL 0
8 #define LOW_LEVEL 0
9 #define APC_LEVEL 1
10 #define DISPATCH_LEVEL 2
11 #define IPI_LEVEL 7
12 #define POWER_LEVEL 7
13 #define PROFILE_LEVEL 8
14 #define HIGH_LEVEL 8
15 #define SYNCH_LEVEL (IPI_LEVEL - 1)
16
17 //
18 // FIXME: mmtypes.h?
19 //
20 #define KIPCR 0xFFFFF000
21 #define USPCR 0x7FFF0000
22 #define PCR ((volatile KPCR * const)USPCR)
23 #define USERPCR ((volatile KPCR * const)KIPCR)
24
25 //
26 // Just read it from the PCR
27 //
28 #define KeGetCurrentProcessorNumber() ((ULONG)(PCR->Number))
29
30 //
31 // Stub
32 //
33 typedef struct _KFLOATING_SAVE
34 {
35 ULONG Reserved;
36 } KFLOATING_SAVE, *PKFLOATING_SAVE;
37
38 //
39 // Processor Control Region
40 // On ARM, it's actually readable from user-mode, much like KUSER_SHARED_DATA
41 //
42 #ifdef _WINNT_H
43 #define PKINTERRUPT_ROUTINE PVOID // Hack!
44 #endif
45 typedef struct _KPCR
46 {
47 ULONG MinorVersion;
48 ULONG MajorVersion;
49 PKINTERRUPT_ROUTINE InterruptRoutine[64];
50 PVOID XcodeDispatch;
51 ULONG FirstLevelDcacheSize;
52 ULONG FirstLevelDcacheFillSize;
53 ULONG FirstLevelIcacheSize;
54 ULONG FirstLevelIcacheFillSize;
55 ULONG SecondLevelDcacheSize;
56 ULONG SecondLevelDcacheFillSize;
57 ULONG SecondLevelIcacheSize;
58 ULONG SecondLevelIcacheFillSize;
59 struct _KPRCB *Prcb;
60 struct _TEB *Teb;
61 PVOID TlsArray;
62 ULONG DcacheFillSize;
63 ULONG IcacheAlignment;
64 ULONG IcacheFillSize;
65 ULONG ProcessorId;
66 ULONG ProfileInterval;
67 ULONG ProfileCount;
68 ULONG StallExecutionCount;
69 ULONG StallScaleFactor;
70 CCHAR Number;
71 PVOID DataBusError;
72 PVOID InstructionBusError;
73 ULONG CachePolicy;
74 UCHAR IrqlMask[64];
75 UCHAR IrqlTable[64];
76 UCHAR CurrentIrql;
77 KAFFINITY SetMember;
78 struct _KTHREAD *CurrentThread;
79 KAFFINITY NotMember;
80 ULONG SystemReserved[6];
81 ULONG DcacheAlignment;
82 ULONG HalReserved[64];
83 BOOLEAN FirstLevelActive;
84 BOOLEAN DpcRoutineActive;
85 ULONG CurrentPid;
86 BOOLEAN OnInterruptStack;
87 PVOID SavedInitialStack;
88 PVOID SavedStackLimit;
89 PVOID SystemServiceDispatchStart;
90 PVOID SystemServiceDispatchEnd;
91 PVOID InterruptStack;
92 PVOID PanicStack;
93 PVOID BadVaddr;
94 PVOID InitialStack;
95 PVOID StackLimit;
96 ULONG QuantumEnd;
97 } KPCR, *PKPCR;
98
99 //
100 // Get the current TEB
101 //
102 FORCEINLINE
103 struct _TEB* NtCurrentTeb(VOID)
104 {
105 return (struct _TEB*)USERPCR->Teb;
106 }
107
108 //
109 // IRQL Support on ARM is similar to MIPS/ALPHA
110 //
111 KIRQL
112 KeSwapIrql(
113 IN KIRQL NewIrql
114 );
115
116 KIRQL
117 KeRaiseIrqlToSynchLevel(
118 VOID
119 );
120
121 KIRQL
122 KeRaiseIrqlToDpcLevel(
123 VOID
124 );
125
126 #define KeLowerIrql(NewIrql) KeSwapIrql(NewIrql)
127 #define KeRaiseIrql(NewIrql, OldIrql) *(OldIrql) = KeSwapIrql(NewIrql)
128
129 #endif