Reintegrate header branch
[reactos.git] / reactos / include / xdk / iotypes.h
1 /******************************************************************************
2 * I/O Manager Types *
3 ******************************************************************************/
4
5 $if (_WDMDDK_)
6 #define WDM_MAJORVERSION 0x06
7 #define WDM_MINORVERSION 0x00
8
9 #if defined(_WIN64)
10
11 #ifndef USE_DMA_MACROS
12 #define USE_DMA_MACROS
13 #endif
14
15 #ifndef NO_LEGACY_DRIVERS
16 #define NO_LEGACY_DRIVERS
17 #endif
18
19 #endif /* defined(_WIN64) */
20
21 #define STATUS_CONTINUE_COMPLETION STATUS_SUCCESS
22
23 #define CONNECT_FULLY_SPECIFIED 0x1
24 #define CONNECT_LINE_BASED 0x2
25 #define CONNECT_MESSAGE_BASED 0x3
26 #define CONNECT_FULLY_SPECIFIED_GROUP 0x4
27 #define CONNECT_CURRENT_VERSION 0x4
28
29 #define POOL_COLD_ALLOCATION 256
30 #define POOL_QUOTA_FAIL_INSTEAD_OF_RAISE 8
31 #define POOL_RAISE_IF_ALLOCATION_FAILURE 16
32
33 #define IO_TYPE_ADAPTER 1
34 #define IO_TYPE_CONTROLLER 2
35 #define IO_TYPE_DEVICE 3
36 #define IO_TYPE_DRIVER 4
37 #define IO_TYPE_FILE 5
38 #define IO_TYPE_IRP 6
39 #define IO_TYPE_MASTER_ADAPTER 7
40 #define IO_TYPE_OPEN_PACKET 8
41 #define IO_TYPE_TIMER 9
42 #define IO_TYPE_VPB 10
43 #define IO_TYPE_ERROR_LOG 11
44 #define IO_TYPE_ERROR_MESSAGE 12
45 #define IO_TYPE_DEVICE_OBJECT_EXTENSION 13
46
47 #define IO_TYPE_CSQ_IRP_CONTEXT 1
48 #define IO_TYPE_CSQ 2
49 #define IO_TYPE_CSQ_EX 3
50
51 /* IO_RESOURCE_DESCRIPTOR.Option */
52 #define IO_RESOURCE_PREFERRED 0x01
53 #define IO_RESOURCE_DEFAULT 0x02
54 #define IO_RESOURCE_ALTERNATIVE 0x08
55
56 #define FILE_DEVICE_BEEP 0x00000001
57 #define FILE_DEVICE_CD_ROM 0x00000002
58 #define FILE_DEVICE_CD_ROM_FILE_SYSTEM 0x00000003
59 #define FILE_DEVICE_CONTROLLER 0x00000004
60 #define FILE_DEVICE_DATALINK 0x00000005
61 #define FILE_DEVICE_DFS 0x00000006
62 #define FILE_DEVICE_DISK 0x00000007
63 #define FILE_DEVICE_DISK_FILE_SYSTEM 0x00000008
64 #define FILE_DEVICE_FILE_SYSTEM 0x00000009
65 #define FILE_DEVICE_INPORT_PORT 0x0000000a
66 #define FILE_DEVICE_KEYBOARD 0x0000000b
67 #define FILE_DEVICE_MAILSLOT 0x0000000c
68 #define FILE_DEVICE_MIDI_IN 0x0000000d
69 #define FILE_DEVICE_MIDI_OUT 0x0000000e
70 #define FILE_DEVICE_MOUSE 0x0000000f
71 #define FILE_DEVICE_MULTI_UNC_PROVIDER 0x00000010
72 #define FILE_DEVICE_NAMED_PIPE 0x00000011
73 #define FILE_DEVICE_NETWORK 0x00000012
74 #define FILE_DEVICE_NETWORK_BROWSER 0x00000013
75 #define FILE_DEVICE_NETWORK_FILE_SYSTEM 0x00000014
76 #define FILE_DEVICE_NULL 0x00000015
77 #define FILE_DEVICE_PARALLEL_PORT 0x00000016
78 #define FILE_DEVICE_PHYSICAL_NETCARD 0x00000017
79 #define FILE_DEVICE_PRINTER 0x00000018
80 #define FILE_DEVICE_SCANNER 0x00000019
81 #define FILE_DEVICE_SERIAL_MOUSE_PORT 0x0000001a
82 #define FILE_DEVICE_SERIAL_PORT 0x0000001b
83 #define FILE_DEVICE_SCREEN 0x0000001c
84 #define FILE_DEVICE_SOUND 0x0000001d
85 #define FILE_DEVICE_STREAMS 0x0000001e
86 #define FILE_DEVICE_TAPE 0x0000001f
87 #define FILE_DEVICE_TAPE_FILE_SYSTEM 0x00000020
88 #define FILE_DEVICE_TRANSPORT 0x00000021
89 #define FILE_DEVICE_UNKNOWN 0x00000022
90 #define FILE_DEVICE_VIDEO 0x00000023
91 #define FILE_DEVICE_VIRTUAL_DISK 0x00000024
92 #define FILE_DEVICE_WAVE_IN 0x00000025
93 #define FILE_DEVICE_WAVE_OUT 0x00000026
94 #define FILE_DEVICE_8042_PORT 0x00000027
95 #define FILE_DEVICE_NETWORK_REDIRECTOR 0x00000028
96 #define FILE_DEVICE_BATTERY 0x00000029
97 #define FILE_DEVICE_BUS_EXTENDER 0x0000002a
98 #define FILE_DEVICE_MODEM 0x0000002b
99 #define FILE_DEVICE_VDM 0x0000002c
100 #define FILE_DEVICE_MASS_STORAGE 0x0000002d
101 #define FILE_DEVICE_SMB 0x0000002e
102 #define FILE_DEVICE_KS 0x0000002f
103 #define FILE_DEVICE_CHANGER 0x00000030
104 #define FILE_DEVICE_SMARTCARD 0x00000031
105 #define FILE_DEVICE_ACPI 0x00000032
106 #define FILE_DEVICE_DVD 0x00000033
107 #define FILE_DEVICE_FULLSCREEN_VIDEO 0x00000034
108 #define FILE_DEVICE_DFS_FILE_SYSTEM 0x00000035
109 #define FILE_DEVICE_DFS_VOLUME 0x00000036
110 #define FILE_DEVICE_SERENUM 0x00000037
111 #define FILE_DEVICE_TERMSRV 0x00000038
112 #define FILE_DEVICE_KSEC 0x00000039
113 #define FILE_DEVICE_FIPS 0x0000003A
114 #define FILE_DEVICE_INFINIBAND 0x0000003B
115 #define FILE_DEVICE_VMBUS 0x0000003E
116 #define FILE_DEVICE_CRYPT_PROVIDER 0x0000003F
117 #define FILE_DEVICE_WPD 0x00000040
118 #define FILE_DEVICE_BLUETOOTH 0x00000041
119 #define FILE_DEVICE_MT_COMPOSITE 0x00000042
120 #define FILE_DEVICE_MT_TRANSPORT 0x00000043
121 #define FILE_DEVICE_BIOMETRIC 0x00000044
122 #define FILE_DEVICE_PMI 0x00000045
123
124 #if defined(NT_PROCESSOR_GROUPS)
125
126 typedef USHORT IRQ_DEVICE_POLICY, *PIRQ_DEVICE_POLICY;
127
128 typedef enum _IRQ_DEVICE_POLICY_USHORT {
129 IrqPolicyMachineDefault = 0,
130 IrqPolicyAllCloseProcessors = 1,
131 IrqPolicyOneCloseProcessor = 2,
132 IrqPolicyAllProcessorsInMachine = 3,
133 IrqPolicyAllProcessorsInGroup = 3,
134 IrqPolicySpecifiedProcessors = 4,
135 IrqPolicySpreadMessagesAcrossAllProcessors = 5};
136
137 #else /* defined(NT_PROCESSOR_GROUPS) */
138
139 typedef enum _IRQ_DEVICE_POLICY {
140 IrqPolicyMachineDefault = 0,
141 IrqPolicyAllCloseProcessors,
142 IrqPolicyOneCloseProcessor,
143 IrqPolicyAllProcessorsInMachine,
144 IrqPolicySpecifiedProcessors,
145 IrqPolicySpreadMessagesAcrossAllProcessors
146 } IRQ_DEVICE_POLICY, *PIRQ_DEVICE_POLICY;
147
148 #endif
149
150 typedef enum _IRQ_PRIORITY {
151 IrqPriorityUndefined = 0,
152 IrqPriorityLow,
153 IrqPriorityNormal,
154 IrqPriorityHigh
155 } IRQ_PRIORITY, *PIRQ_PRIORITY;
156
157 typedef enum _IRQ_GROUP_POLICY {
158 GroupAffinityAllGroupZero = 0,
159 GroupAffinityDontCare
160 } IRQ_GROUP_POLICY, *PIRQ_GROUP_POLICY;
161
162 #define MAXIMUM_VOLUME_LABEL_LENGTH (32 * sizeof(WCHAR))
163
164 typedef struct _OBJECT_HANDLE_INFORMATION {
165 ULONG HandleAttributes;
166 ACCESS_MASK GrantedAccess;
167 } OBJECT_HANDLE_INFORMATION, *POBJECT_HANDLE_INFORMATION;
168
169 typedef struct _CLIENT_ID {
170 HANDLE UniqueProcess;
171 HANDLE UniqueThread;
172 } CLIENT_ID, *PCLIENT_ID;
173
174 typedef struct _VPB {
175 CSHORT Type;
176 CSHORT Size;
177 USHORT Flags;
178 USHORT VolumeLabelLength;
179 struct _DEVICE_OBJECT *DeviceObject;
180 struct _DEVICE_OBJECT *RealDevice;
181 ULONG SerialNumber;
182 ULONG ReferenceCount;
183 WCHAR VolumeLabel[MAXIMUM_VOLUME_LABEL_LENGTH / sizeof(WCHAR)];
184 } VPB, *PVPB;
185
186 typedef enum _IO_ALLOCATION_ACTION {
187 KeepObject = 1,
188 DeallocateObject,
189 DeallocateObjectKeepRegisters
190 } IO_ALLOCATION_ACTION, *PIO_ALLOCATION_ACTION;
191
192 typedef IO_ALLOCATION_ACTION
193 (NTAPI DRIVER_CONTROL)(
194 IN struct _DEVICE_OBJECT *DeviceObject,
195 IN struct _IRP *Irp,
196 IN PVOID MapRegisterBase,
197 IN PVOID Context);
198 typedef DRIVER_CONTROL *PDRIVER_CONTROL;
199
200 typedef struct _WAIT_CONTEXT_BLOCK {
201 KDEVICE_QUEUE_ENTRY WaitQueueEntry;
202 PDRIVER_CONTROL DeviceRoutine;
203 PVOID DeviceContext;
204 ULONG NumberOfMapRegisters;
205 PVOID DeviceObject;
206 PVOID CurrentIrp;
207 PKDPC BufferChainingDpc;
208 } WAIT_CONTEXT_BLOCK, *PWAIT_CONTEXT_BLOCK;
209
210 $endif
211 /* DEVICE_OBJECT.Flags */
212 $if (_NTDDK_)
213 #define DO_DEVICE_HAS_NAME 0x00000040
214 #define DO_SYSTEM_BOOT_PARTITION 0x00000100
215 #define DO_LONG_TERM_REQUESTS 0x00000200
216 #define DO_NEVER_LAST_DEVICE 0x00000400
217 #define DO_LOW_PRIORITY_FILESYSTEM 0x00010000
218 #define DO_SUPPORTS_TRANSACTIONS 0x00040000
219 #define DO_FORCE_NEITHER_IO 0x00080000
220 #define DO_VOLUME_DEVICE_OBJECT 0x00100000
221 #define DO_SYSTEM_SYSTEM_PARTITION 0x00200000
222 #define DO_SYSTEM_CRITICAL_PARTITION 0x00400000
223 #define DO_DISALLOW_EXECUTE 0x00800000
224 $endif
225 $if (_WDMDDK_)
226 #define DO_VERIFY_VOLUME 0x00000002
227 #define DO_BUFFERED_IO 0x00000004
228 #define DO_EXCLUSIVE 0x00000008
229 #define DO_DIRECT_IO 0x00000010
230 #define DO_MAP_IO_BUFFER 0x00000020
231 #define DO_DEVICE_INITIALIZING 0x00000080
232 #define DO_SHUTDOWN_REGISTERED 0x00000800
233 #define DO_BUS_ENUMERATED_DEVICE 0x00001000
234 #define DO_POWER_PAGABLE 0x00002000
235 #define DO_POWER_INRUSH 0x00004000
236
237 /* DEVICE_OBJECT.Characteristics */
238 #define FILE_REMOVABLE_MEDIA 0x00000001
239 #define FILE_READ_ONLY_DEVICE 0x00000002
240 #define FILE_FLOPPY_DISKETTE 0x00000004
241 #define FILE_WRITE_ONCE_MEDIA 0x00000008
242 #define FILE_REMOTE_DEVICE 0x00000010
243 #define FILE_DEVICE_IS_MOUNTED 0x00000020
244 #define FILE_VIRTUAL_VOLUME 0x00000040
245 #define FILE_AUTOGENERATED_DEVICE_NAME 0x00000080
246 #define FILE_DEVICE_SECURE_OPEN 0x00000100
247 #define FILE_CHARACTERISTIC_PNP_DEVICE 0x00000800
248 #define FILE_CHARACTERISTIC_TS_DEVICE 0x00001000
249 #define FILE_CHARACTERISTIC_WEBDAV_DEVICE 0x00002000
250
251 /* DEVICE_OBJECT.AlignmentRequirement */
252 #define FILE_BYTE_ALIGNMENT 0x00000000
253 #define FILE_WORD_ALIGNMENT 0x00000001
254 #define FILE_LONG_ALIGNMENT 0x00000003
255 #define FILE_QUAD_ALIGNMENT 0x00000007
256 #define FILE_OCTA_ALIGNMENT 0x0000000f
257 #define FILE_32_BYTE_ALIGNMENT 0x0000001f
258 #define FILE_64_BYTE_ALIGNMENT 0x0000003f
259 #define FILE_128_BYTE_ALIGNMENT 0x0000007f
260 #define FILE_256_BYTE_ALIGNMENT 0x000000ff
261 #define FILE_512_BYTE_ALIGNMENT 0x000001ff
262
263 /* DEVICE_OBJECT.DeviceType */
264 #define DEVICE_TYPE ULONG
265
266 typedef struct _DEVICE_OBJECT {
267 CSHORT Type;
268 USHORT Size;
269 LONG ReferenceCount;
270 struct _DRIVER_OBJECT *DriverObject;
271 struct _DEVICE_OBJECT *NextDevice;
272 struct _DEVICE_OBJECT *AttachedDevice;
273 struct _IRP *CurrentIrp;
274 PIO_TIMER Timer;
275 ULONG Flags;
276 ULONG Characteristics;
277 volatile PVPB Vpb;
278 PVOID DeviceExtension;
279 DEVICE_TYPE DeviceType;
280 CCHAR StackSize;
281 union {
282 LIST_ENTRY ListEntry;
283 WAIT_CONTEXT_BLOCK Wcb;
284 } Queue;
285 ULONG AlignmentRequirement;
286 KDEVICE_QUEUE DeviceQueue;
287 KDPC Dpc;
288 ULONG ActiveThreadCount;
289 PSECURITY_DESCRIPTOR SecurityDescriptor;
290 KEVENT DeviceLock;
291 USHORT SectorSize;
292 USHORT Spare1;
293 struct _DEVOBJ_EXTENSION *DeviceObjectExtension;
294 PVOID Reserved;
295 } DEVICE_OBJECT, *PDEVICE_OBJECT;
296
297 typedef enum _IO_SESSION_STATE {
298 IoSessionStateCreated = 1,
299 IoSessionStateInitialized,
300 IoSessionStateConnected,
301 IoSessionStateDisconnected,
302 IoSessionStateDisconnectedLoggedOn,
303 IoSessionStateLoggedOn,
304 IoSessionStateLoggedOff,
305 IoSessionStateTerminated,
306 IoSessionStateMax
307 } IO_SESSION_STATE, *PIO_SESSION_STATE;
308
309 typedef enum _IO_COMPLETION_ROUTINE_RESULT {
310 ContinueCompletion = STATUS_CONTINUE_COMPLETION,
311 StopCompletion = STATUS_MORE_PROCESSING_REQUIRED
312 } IO_COMPLETION_ROUTINE_RESULT, *PIO_COMPLETION_ROUTINE_RESULT;
313
314 typedef struct _IO_INTERRUPT_MESSAGE_INFO_ENTRY {
315 PHYSICAL_ADDRESS MessageAddress;
316 KAFFINITY TargetProcessorSet;
317 PKINTERRUPT InterruptObject;
318 ULONG MessageData;
319 ULONG Vector;
320 KIRQL Irql;
321 KINTERRUPT_MODE Mode;
322 KINTERRUPT_POLARITY Polarity;
323 } IO_INTERRUPT_MESSAGE_INFO_ENTRY, *PIO_INTERRUPT_MESSAGE_INFO_ENTRY;
324
325 typedef struct _IO_INTERRUPT_MESSAGE_INFO {
326 KIRQL UnifiedIrql;
327 ULONG MessageCount;
328 IO_INTERRUPT_MESSAGE_INFO_ENTRY MessageInfo[1];
329 } IO_INTERRUPT_MESSAGE_INFO, *PIO_INTERRUPT_MESSAGE_INFO;
330
331 typedef struct _IO_CONNECT_INTERRUPT_FULLY_SPECIFIED_PARAMETERS {
332 IN PDEVICE_OBJECT PhysicalDeviceObject;
333 OUT PKINTERRUPT *InterruptObject;
334 IN PKSERVICE_ROUTINE ServiceRoutine;
335 IN PVOID ServiceContext;
336 IN PKSPIN_LOCK SpinLock OPTIONAL;
337 IN KIRQL SynchronizeIrql;
338 IN BOOLEAN FloatingSave;
339 IN BOOLEAN ShareVector;
340 IN ULONG Vector;
341 IN KIRQL Irql;
342 IN KINTERRUPT_MODE InterruptMode;
343 IN KAFFINITY ProcessorEnableMask;
344 IN USHORT Group;
345 } IO_CONNECT_INTERRUPT_FULLY_SPECIFIED_PARAMETERS, *PIO_CONNECT_INTERRUPT_FULLY_SPECIFIED_PARAMETERS;
346
347 typedef struct _IO_CONNECT_INTERRUPT_LINE_BASED_PARAMETERS {
348 IN PDEVICE_OBJECT PhysicalDeviceObject;
349 OUT PKINTERRUPT *InterruptObject;
350 IN PKSERVICE_ROUTINE ServiceRoutine;
351 IN PVOID ServiceContext;
352 IN PKSPIN_LOCK SpinLock OPTIONAL;
353 IN KIRQL SynchronizeIrql OPTIONAL;
354 IN BOOLEAN FloatingSave;
355 } IO_CONNECT_INTERRUPT_LINE_BASED_PARAMETERS, *PIO_CONNECT_INTERRUPT_LINE_BASED_PARAMETERS;
356
357 typedef struct _IO_CONNECT_INTERRUPT_MESSAGE_BASED_PARAMETERS {
358 IN PDEVICE_OBJECT PhysicalDeviceObject;
359 union {
360 OUT PVOID *Generic;
361 OUT PIO_INTERRUPT_MESSAGE_INFO *InterruptMessageTable;
362 OUT PKINTERRUPT *InterruptObject;
363 } ConnectionContext;
364 IN PKMESSAGE_SERVICE_ROUTINE MessageServiceRoutine;
365 IN PVOID ServiceContext;
366 IN PKSPIN_LOCK SpinLock OPTIONAL;
367 IN KIRQL SynchronizeIrql OPTIONAL;
368 IN BOOLEAN FloatingSave;
369 IN PKSERVICE_ROUTINE FallBackServiceRoutine OPTIONAL;
370 } IO_CONNECT_INTERRUPT_MESSAGE_BASED_PARAMETERS, *PIO_CONNECT_INTERRUPT_MESSAGE_BASED_PARAMETERS;
371
372 typedef struct _IO_CONNECT_INTERRUPT_PARAMETERS {
373 IN OUT ULONG Version;
374 union {
375 IO_CONNECT_INTERRUPT_FULLY_SPECIFIED_PARAMETERS FullySpecified;
376 IO_CONNECT_INTERRUPT_LINE_BASED_PARAMETERS LineBased;
377 IO_CONNECT_INTERRUPT_MESSAGE_BASED_PARAMETERS MessageBased;
378 };
379 } IO_CONNECT_INTERRUPT_PARAMETERS, *PIO_CONNECT_INTERRUPT_PARAMETERS;
380
381 typedef struct _IO_DISCONNECT_INTERRUPT_PARAMETERS {
382 IN ULONG Version;
383 union {
384 IN PVOID Generic;
385 IN PKINTERRUPT InterruptObject;
386 IN PIO_INTERRUPT_MESSAGE_INFO InterruptMessageTable;
387 } ConnectionContext;
388 } IO_DISCONNECT_INTERRUPT_PARAMETERS, *PIO_DISCONNECT_INTERRUPT_PARAMETERS;
389
390 typedef enum _IO_ACCESS_TYPE {
391 ReadAccess,
392 WriteAccess,
393 ModifyAccess
394 } IO_ACCESS_TYPE;
395
396 typedef enum _IO_ACCESS_MODE {
397 SequentialAccess,
398 RandomAccess
399 } IO_ACCESS_MODE;
400
401 typedef enum _IO_CONTAINER_NOTIFICATION_CLASS {
402 IoSessionStateNotification,
403 IoMaxContainerNotificationClass
404 } IO_CONTAINER_NOTIFICATION_CLASS;
405
406 typedef struct _IO_SESSION_STATE_NOTIFICATION {
407 ULONG Size;
408 ULONG Flags;
409 PVOID IoObject;
410 ULONG EventMask;
411 PVOID Context;
412 } IO_SESSION_STATE_NOTIFICATION, *PIO_SESSION_STATE_NOTIFICATION;
413
414 typedef enum _IO_CONTAINER_INFORMATION_CLASS {
415 IoSessionStateInformation,
416 IoMaxContainerInformationClass
417 } IO_CONTAINER_INFORMATION_CLASS;
418
419 typedef struct _IO_SESSION_STATE_INFORMATION {
420 ULONG SessionId;
421 IO_SESSION_STATE SessionState;
422 BOOLEAN LocalSession;
423 } IO_SESSION_STATE_INFORMATION, *PIO_SESSION_STATE_INFORMATION;
424
425 #if (NTDDI_VERSION >= NTDDI_WIN7)
426
427 typedef NTSTATUS
428 (NTAPI *PIO_CONTAINER_NOTIFICATION_FUNCTION)(
429 VOID);
430
431 typedef NTSTATUS
432 (NTAPI IO_SESSION_NOTIFICATION_FUNCTION)(
433 IN PVOID SessionObject,
434 IN PVOID IoObject,
435 IN ULONG Event,
436 IN PVOID Context,
437 IN PVOID NotificationPayload,
438 IN ULONG PayloadLength);
439
440 typedef IO_SESSION_NOTIFICATION_FUNCTION *PIO_SESSION_NOTIFICATION_FUNCTION;
441
442 #endif
443
444 typedef struct _IO_REMOVE_LOCK_TRACKING_BLOCK * PIO_REMOVE_LOCK_TRACKING_BLOCK;
445
446 typedef struct _IO_REMOVE_LOCK_COMMON_BLOCK {
447 BOOLEAN Removed;
448 BOOLEAN Reserved[3];
449 volatile LONG IoCount;
450 KEVENT RemoveEvent;
451 } IO_REMOVE_LOCK_COMMON_BLOCK;
452
453 typedef struct _IO_REMOVE_LOCK_DBG_BLOCK {
454 LONG Signature;
455 LONG HighWatermark;
456 LONGLONG MaxLockedTicks;
457 LONG AllocateTag;
458 LIST_ENTRY LockList;
459 KSPIN_LOCK Spin;
460 volatile LONG LowMemoryCount;
461 ULONG Reserved1[4];
462 PVOID Reserved2;
463 PIO_REMOVE_LOCK_TRACKING_BLOCK Blocks;
464 } IO_REMOVE_LOCK_DBG_BLOCK;
465
466 typedef struct _IO_REMOVE_LOCK {
467 IO_REMOVE_LOCK_COMMON_BLOCK Common;
468 #if DBG
469 IO_REMOVE_LOCK_DBG_BLOCK Dbg;
470 #endif
471 } IO_REMOVE_LOCK, *PIO_REMOVE_LOCK;
472
473 typedef struct _IO_WORKITEM *PIO_WORKITEM;
474
475 typedef VOID
476 (NTAPI IO_WORKITEM_ROUTINE)(
477 IN PDEVICE_OBJECT DeviceObject,
478 IN PVOID Context);
479 typedef IO_WORKITEM_ROUTINE *PIO_WORKITEM_ROUTINE;
480
481 typedef VOID
482 (NTAPI IO_WORKITEM_ROUTINE_EX)(
483 IN PVOID IoObject,
484 IN PVOID Context OPTIONAL,
485 IN PIO_WORKITEM IoWorkItem);
486 typedef IO_WORKITEM_ROUTINE_EX *PIO_WORKITEM_ROUTINE_EX;
487
488 typedef struct _SHARE_ACCESS {
489 ULONG OpenCount;
490 ULONG Readers;
491 ULONG Writers;
492 ULONG Deleters;
493 ULONG SharedRead;
494 ULONG SharedWrite;
495 ULONG SharedDelete;
496 } SHARE_ACCESS, *PSHARE_ACCESS;
497
498 /* While MS WDK uses inheritance in C++, we cannot do this with gcc, as
499 inheritance, even from a struct renders the type non-POD. So we use
500 this hack */
501 #define PCI_COMMON_HEADER_LAYOUT \
502 USHORT VendorID; \
503 USHORT DeviceID; \
504 USHORT Command; \
505 USHORT Status; \
506 UCHAR RevisionID; \
507 UCHAR ProgIf; \
508 UCHAR SubClass; \
509 UCHAR BaseClass; \
510 UCHAR CacheLineSize; \
511 UCHAR LatencyTimer; \
512 UCHAR HeaderType; \
513 UCHAR BIST; \
514 union { \
515 struct _PCI_HEADER_TYPE_0 { \
516 ULONG BaseAddresses[PCI_TYPE0_ADDRESSES]; \
517 ULONG CIS; \
518 USHORT SubVendorID; \
519 USHORT SubSystemID; \
520 ULONG ROMBaseAddress; \
521 UCHAR CapabilitiesPtr; \
522 UCHAR Reserved1[3]; \
523 ULONG Reserved2; \
524 UCHAR InterruptLine; \
525 UCHAR InterruptPin; \
526 UCHAR MinimumGrant; \
527 UCHAR MaximumLatency; \
528 } type0; \
529 struct _PCI_HEADER_TYPE_1 { \
530 ULONG BaseAddresses[PCI_TYPE1_ADDRESSES]; \
531 UCHAR PrimaryBus; \
532 UCHAR SecondaryBus; \
533 UCHAR SubordinateBus; \
534 UCHAR SecondaryLatency; \
535 UCHAR IOBase; \
536 UCHAR IOLimit; \
537 USHORT SecondaryStatus; \
538 USHORT MemoryBase; \
539 USHORT MemoryLimit; \
540 USHORT PrefetchBase; \
541 USHORT PrefetchLimit; \
542 ULONG PrefetchBaseUpper32; \
543 ULONG PrefetchLimitUpper32; \
544 USHORT IOBaseUpper16; \
545 USHORT IOLimitUpper16; \
546 UCHAR CapabilitiesPtr; \
547 UCHAR Reserved1[3]; \
548 ULONG ROMBaseAddress; \
549 UCHAR InterruptLine; \
550 UCHAR InterruptPin; \
551 USHORT BridgeControl; \
552 } type1; \
553 struct _PCI_HEADER_TYPE_2 { \
554 ULONG SocketRegistersBaseAddress; \
555 UCHAR CapabilitiesPtr; \
556 UCHAR Reserved; \
557 USHORT SecondaryStatus; \
558 UCHAR PrimaryBus; \
559 UCHAR SecondaryBus; \
560 UCHAR SubordinateBus; \
561 UCHAR SecondaryLatency; \
562 struct { \
563 ULONG Base; \
564 ULONG Limit; \
565 } Range[PCI_TYPE2_ADDRESSES-1]; \
566 UCHAR InterruptLine; \
567 UCHAR InterruptPin; \
568 USHORT BridgeControl; \
569 } type2; \
570 } u;
571
572 typedef enum _CREATE_FILE_TYPE {
573 CreateFileTypeNone,
574 CreateFileTypeNamedPipe,
575 CreateFileTypeMailslot
576 } CREATE_FILE_TYPE;
577
578 #define IO_FORCE_ACCESS_CHECK 0x001
579 #define IO_NO_PARAMETER_CHECKING 0x100
580
581 #define IO_REPARSE 0x0
582 #define IO_REMOUNT 0x1
583
584 typedef struct _IO_STATUS_BLOCK {
585 _ANONYMOUS_UNION union {
586 NTSTATUS Status;
587 PVOID Pointer;
588 } DUMMYUNIONNAME;
589 ULONG_PTR Information;
590 } IO_STATUS_BLOCK, *PIO_STATUS_BLOCK;
591
592 #if defined(_WIN64)
593 typedef struct _IO_STATUS_BLOCK32 {
594 NTSTATUS Status;
595 ULONG Information;
596 } IO_STATUS_BLOCK32, *PIO_STATUS_BLOCK32;
597 #endif
598
599 typedef VOID
600 (NTAPI *PIO_APC_ROUTINE)(
601 IN PVOID ApcContext,
602 IN PIO_STATUS_BLOCK IoStatusBlock,
603 IN ULONG Reserved);
604
605 #define PIO_APC_ROUTINE_DEFINED
606
607 typedef enum _IO_SESSION_EVENT {
608 IoSessionEventIgnore = 0,
609 IoSessionEventCreated,
610 IoSessionEventTerminated,
611 IoSessionEventConnected,
612 IoSessionEventDisconnected,
613 IoSessionEventLogon,
614 IoSessionEventLogoff,
615 IoSessionEventMax
616 } IO_SESSION_EVENT, *PIO_SESSION_EVENT;
617
618 #define IO_SESSION_STATE_ALL_EVENTS 0xffffffff
619 #define IO_SESSION_STATE_CREATION_EVENT 0x00000001
620 #define IO_SESSION_STATE_TERMINATION_EVENT 0x00000002
621 #define IO_SESSION_STATE_CONNECT_EVENT 0x00000004
622 #define IO_SESSION_STATE_DISCONNECT_EVENT 0x00000008
623 #define IO_SESSION_STATE_LOGON_EVENT 0x00000010
624 #define IO_SESSION_STATE_LOGOFF_EVENT 0x00000020
625
626 #define IO_SESSION_STATE_VALID_EVENT_MASK 0x0000003f
627
628 #define IO_SESSION_MAX_PAYLOAD_SIZE 256L
629
630 typedef struct _IO_SESSION_CONNECT_INFO {
631 ULONG SessionId;
632 BOOLEAN LocalSession;
633 } IO_SESSION_CONNECT_INFO, *PIO_SESSION_CONNECT_INFO;
634
635 #define EVENT_INCREMENT 1
636 #define IO_NO_INCREMENT 0
637 #define IO_CD_ROM_INCREMENT 1
638 #define IO_DISK_INCREMENT 1
639 #define IO_KEYBOARD_INCREMENT 6
640 #define IO_MAILSLOT_INCREMENT 2
641 #define IO_MOUSE_INCREMENT 6
642 #define IO_NAMED_PIPE_INCREMENT 2
643 #define IO_NETWORK_INCREMENT 2
644 #define IO_PARALLEL_INCREMENT 1
645 #define IO_SERIAL_INCREMENT 2
646 #define IO_SOUND_INCREMENT 8
647 #define IO_VIDEO_INCREMENT 1
648 #define SEMAPHORE_INCREMENT 1
649
650 #define MM_MAXIMUM_DISK_IO_SIZE (0x10000)
651
652 typedef struct _BOOTDISK_INFORMATION {
653 LONGLONG BootPartitionOffset;
654 LONGLONG SystemPartitionOffset;
655 ULONG BootDeviceSignature;
656 ULONG SystemDeviceSignature;
657 } BOOTDISK_INFORMATION, *PBOOTDISK_INFORMATION;
658
659 typedef struct _BOOTDISK_INFORMATION_EX {
660 LONGLONG BootPartitionOffset;
661 LONGLONG SystemPartitionOffset;
662 ULONG BootDeviceSignature;
663 ULONG SystemDeviceSignature;
664 GUID BootDeviceGuid;
665 GUID SystemDeviceGuid;
666 BOOLEAN BootDeviceIsGpt;
667 BOOLEAN SystemDeviceIsGpt;
668 } BOOTDISK_INFORMATION_EX, *PBOOTDISK_INFORMATION_EX;
669
670 #if (NTDDI_VERSION >= NTDDI_WIN7)
671
672 typedef struct _LOADER_PARTITION_INFORMATION_EX {
673 ULONG PartitionStyle;
674 ULONG PartitionNumber;
675 union {
676 ULONG Signature;
677 GUID DeviceId;
678 };
679 ULONG Flags;
680 } LOADER_PARTITION_INFORMATION_EX, *PLOADER_PARTITION_INFORMATION_EX;
681
682 typedef struct _BOOTDISK_INFORMATION_LITE {
683 ULONG NumberEntries;
684 LOADER_PARTITION_INFORMATION_EX Entries[1];
685 } BOOTDISK_INFORMATION_LITE, *PBOOTDISK_INFORMATION_LITE;
686
687 #else
688
689 #if (NTDDI_VERSION >= NTDDI_VISTA)
690 typedef struct _BOOTDISK_INFORMATION_LITE {
691 ULONG BootDeviceSignature;
692 ULONG SystemDeviceSignature;
693 GUID BootDeviceGuid;
694 GUID SystemDeviceGuid;
695 BOOLEAN BootDeviceIsGpt;
696 BOOLEAN SystemDeviceIsGpt;
697 } BOOTDISK_INFORMATION_LITE, *PBOOTDISK_INFORMATION_LITE;
698 #endif /* (NTDDI_VERSION >= NTDDI_VISTA) */
699
700 #endif /* (NTDDI_VERSION >= NTDDI_WIN7) */
701
702 #include <pshpack1.h>
703
704 typedef struct _EISA_MEMORY_TYPE {
705 UCHAR ReadWrite:1;
706 UCHAR Cached:1;
707 UCHAR Reserved0:1;
708 UCHAR Type:2;
709 UCHAR Shared:1;
710 UCHAR Reserved1:1;
711 UCHAR MoreEntries:1;
712 } EISA_MEMORY_TYPE, *PEISA_MEMORY_TYPE;
713
714 typedef struct _EISA_MEMORY_CONFIGURATION {
715 EISA_MEMORY_TYPE ConfigurationByte;
716 UCHAR DataSize;
717 USHORT AddressLowWord;
718 UCHAR AddressHighByte;
719 USHORT MemorySize;
720 } EISA_MEMORY_CONFIGURATION, *PEISA_MEMORY_CONFIGURATION;
721
722 typedef struct _EISA_IRQ_DESCRIPTOR {
723 UCHAR Interrupt:4;
724 UCHAR Reserved:1;
725 UCHAR LevelTriggered:1;
726 UCHAR Shared:1;
727 UCHAR MoreEntries:1;
728 } EISA_IRQ_DESCRIPTOR, *PEISA_IRQ_DESCRIPTOR;
729
730 typedef struct _EISA_IRQ_CONFIGURATION {
731 EISA_IRQ_DESCRIPTOR ConfigurationByte;
732 UCHAR Reserved;
733 } EISA_IRQ_CONFIGURATION, *PEISA_IRQ_CONFIGURATION;
734
735 typedef struct _DMA_CONFIGURATION_BYTE0 {
736 UCHAR Channel:3;
737 UCHAR Reserved:3;
738 UCHAR Shared:1;
739 UCHAR MoreEntries:1;
740 } DMA_CONFIGURATION_BYTE0;
741
742 typedef struct _DMA_CONFIGURATION_BYTE1 {
743 UCHAR Reserved0:2;
744 UCHAR TransferSize:2;
745 UCHAR Timing:2;
746 UCHAR Reserved1:2;
747 } DMA_CONFIGURATION_BYTE1;
748
749 typedef struct _EISA_DMA_CONFIGURATION {
750 DMA_CONFIGURATION_BYTE0 ConfigurationByte0;
751 DMA_CONFIGURATION_BYTE1 ConfigurationByte1;
752 } EISA_DMA_CONFIGURATION, *PEISA_DMA_CONFIGURATION;
753
754 typedef struct _EISA_PORT_DESCRIPTOR {
755 UCHAR NumberPorts:5;
756 UCHAR Reserved:1;
757 UCHAR Shared:1;
758 UCHAR MoreEntries:1;
759 } EISA_PORT_DESCRIPTOR, *PEISA_PORT_DESCRIPTOR;
760
761 typedef struct _EISA_PORT_CONFIGURATION {
762 EISA_PORT_DESCRIPTOR Configuration;
763 USHORT PortAddress;
764 } EISA_PORT_CONFIGURATION, *PEISA_PORT_CONFIGURATION;
765
766 typedef struct _CM_EISA_SLOT_INFORMATION {
767 UCHAR ReturnCode;
768 UCHAR ReturnFlags;
769 UCHAR MajorRevision;
770 UCHAR MinorRevision;
771 USHORT Checksum;
772 UCHAR NumberFunctions;
773 UCHAR FunctionInformation;
774 ULONG CompressedId;
775 } CM_EISA_SLOT_INFORMATION, *PCM_EISA_SLOT_INFORMATION;
776
777 typedef struct _CM_EISA_FUNCTION_INFORMATION {
778 ULONG CompressedId;
779 UCHAR IdSlotFlags1;
780 UCHAR IdSlotFlags2;
781 UCHAR MinorRevision;
782 UCHAR MajorRevision;
783 UCHAR Selections[26];
784 UCHAR FunctionFlags;
785 UCHAR TypeString[80];
786 EISA_MEMORY_CONFIGURATION EisaMemory[9];
787 EISA_IRQ_CONFIGURATION EisaIrq[7];
788 EISA_DMA_CONFIGURATION EisaDma[4];
789 EISA_PORT_CONFIGURATION EisaPort[20];
790 UCHAR InitializationData[60];
791 } CM_EISA_FUNCTION_INFORMATION, *PCM_EISA_FUNCTION_INFORMATION;
792
793 #include <poppack.h>
794
795 /* CM_EISA_FUNCTION_INFORMATION.FunctionFlags */
796
797 #define EISA_FUNCTION_ENABLED 0x80
798 #define EISA_FREE_FORM_DATA 0x40
799 #define EISA_HAS_PORT_INIT_ENTRY 0x20
800 #define EISA_HAS_PORT_RANGE 0x10
801 #define EISA_HAS_DMA_ENTRY 0x08
802 #define EISA_HAS_IRQ_ENTRY 0x04
803 #define EISA_HAS_MEMORY_ENTRY 0x02
804 #define EISA_HAS_TYPE_ENTRY 0x01
805 #define EISA_HAS_INFORMATION \
806 (EISA_HAS_PORT_RANGE + EISA_HAS_DMA_ENTRY + EISA_HAS_IRQ_ENTRY \
807 + EISA_HAS_MEMORY_ENTRY + EISA_HAS_TYPE_ENTRY)
808
809 #define EISA_MORE_ENTRIES 0x80
810 #define EISA_SYSTEM_MEMORY 0x00
811 #define EISA_MEMORY_TYPE_RAM 0x01
812
813 /* CM_EISA_SLOT_INFORMATION.ReturnCode */
814
815 #define EISA_INVALID_SLOT 0x80
816 #define EISA_INVALID_FUNCTION 0x81
817 #define EISA_INVALID_CONFIGURATION 0x82
818 #define EISA_EMPTY_SLOT 0x83
819 #define EISA_INVALID_BIOS_CALL 0x86
820
821 /*
822 ** Plug and Play structures
823 */
824
825 typedef VOID
826 (NTAPI *PINTERFACE_REFERENCE)(
827 PVOID Context);
828
829 typedef VOID
830 (NTAPI *PINTERFACE_DEREFERENCE)(
831 PVOID Context);
832
833 typedef BOOLEAN
834 (NTAPI TRANSLATE_BUS_ADDRESS)(
835 IN PVOID Context,
836 IN PHYSICAL_ADDRESS BusAddress,
837 IN ULONG Length,
838 IN OUT PULONG AddressSpace,
839 OUT PPHYSICAL_ADDRESS TranslatedAddress);
840 typedef TRANSLATE_BUS_ADDRESS *PTRANSLATE_BUS_ADDRESS;
841
842 typedef struct _DMA_ADAPTER*
843 (NTAPI GET_DMA_ADAPTER)(
844 IN PVOID Context,
845 IN struct _DEVICE_DESCRIPTION *DeviceDescriptor,
846 OUT PULONG NumberOfMapRegisters);
847 typedef GET_DMA_ADAPTER *PGET_DMA_ADAPTER;
848
849 typedef ULONG
850 (NTAPI GET_SET_DEVICE_DATA)(
851 IN PVOID Context,
852 IN ULONG DataType,
853 IN PVOID Buffer,
854 IN ULONG Offset,
855 IN ULONG Length);
856 typedef GET_SET_DEVICE_DATA *PGET_SET_DEVICE_DATA;
857
858 typedef enum _DEVICE_INSTALL_STATE {
859 InstallStateInstalled,
860 InstallStateNeedsReinstall,
861 InstallStateFailedInstall,
862 InstallStateFinishInstall
863 } DEVICE_INSTALL_STATE, *PDEVICE_INSTALL_STATE;
864
865 typedef struct _LEGACY_BUS_INFORMATION {
866 GUID BusTypeGuid;
867 INTERFACE_TYPE LegacyBusType;
868 ULONG BusNumber;
869 } LEGACY_BUS_INFORMATION, *PLEGACY_BUS_INFORMATION;
870
871 typedef enum _DEVICE_REMOVAL_POLICY {
872 RemovalPolicyExpectNoRemoval = 1,
873 RemovalPolicyExpectOrderlyRemoval = 2,
874 RemovalPolicyExpectSurpriseRemoval = 3
875 } DEVICE_REMOVAL_POLICY, *PDEVICE_REMOVAL_POLICY;
876
877 typedef VOID
878 (NTAPI*PREENUMERATE_SELF)(
879 IN PVOID Context);
880
881 typedef struct _REENUMERATE_SELF_INTERFACE_STANDARD {
882 USHORT Size;
883 USHORT Version;
884 PVOID Context;
885 PINTERFACE_REFERENCE InterfaceReference;
886 PINTERFACE_DEREFERENCE InterfaceDereference;
887 PREENUMERATE_SELF SurpriseRemoveAndReenumerateSelf;
888 } REENUMERATE_SELF_INTERFACE_STANDARD, *PREENUMERATE_SELF_INTERFACE_STANDARD;
889
890 typedef VOID
891 (NTAPI *PIO_DEVICE_EJECT_CALLBACK)(
892 IN NTSTATUS Status,
893 IN OUT PVOID Context OPTIONAL);
894
895 #define PCI_DEVICE_PRESENT_INTERFACE_VERSION 1
896
897 /* PCI_DEVICE_PRESENCE_PARAMETERS.Flags */
898 #define PCI_USE_SUBSYSTEM_IDS 0x00000001
899 #define PCI_USE_REVISION 0x00000002
900 #define PCI_USE_VENDEV_IDS 0x00000004
901 #define PCI_USE_CLASS_SUBCLASS 0x00000008
902 #define PCI_USE_PROGIF 0x00000010
903 #define PCI_USE_LOCAL_BUS 0x00000020
904 #define PCI_USE_LOCAL_DEVICE 0x00000040
905
906 typedef struct _PCI_DEVICE_PRESENCE_PARAMETERS {
907 ULONG Size;
908 ULONG Flags;
909 USHORT VendorID;
910 USHORT DeviceID;
911 UCHAR RevisionID;
912 USHORT SubVendorID;
913 USHORT SubSystemID;
914 UCHAR BaseClass;
915 UCHAR SubClass;
916 UCHAR ProgIf;
917 } PCI_DEVICE_PRESENCE_PARAMETERS, *PPCI_DEVICE_PRESENCE_PARAMETERS;
918
919 typedef BOOLEAN
920 (NTAPI PCI_IS_DEVICE_PRESENT)(
921 IN USHORT VendorID,
922 IN USHORT DeviceID,
923 IN UCHAR RevisionID,
924 IN USHORT SubVendorID,
925 IN USHORT SubSystemID,
926 IN ULONG Flags);
927 typedef PCI_IS_DEVICE_PRESENT *PPCI_IS_DEVICE_PRESENT;
928
929 typedef BOOLEAN
930 (NTAPI PCI_IS_DEVICE_PRESENT_EX)(
931 IN PVOID Context,
932 IN PPCI_DEVICE_PRESENCE_PARAMETERS Parameters);
933 typedef PCI_IS_DEVICE_PRESENT_EX *PPCI_IS_DEVICE_PRESENT_EX;
934
935 typedef struct _BUS_INTERFACE_STANDARD {
936 USHORT Size;
937 USHORT Version;
938 PVOID Context;
939 PINTERFACE_REFERENCE InterfaceReference;
940 PINTERFACE_DEREFERENCE InterfaceDereference;
941 PTRANSLATE_BUS_ADDRESS TranslateBusAddress;
942 PGET_DMA_ADAPTER GetDmaAdapter;
943 PGET_SET_DEVICE_DATA SetBusData;
944 PGET_SET_DEVICE_DATA GetBusData;
945 } BUS_INTERFACE_STANDARD, *PBUS_INTERFACE_STANDARD;
946
947 typedef struct _PCI_DEVICE_PRESENT_INTERFACE {
948 USHORT Size;
949 USHORT Version;
950 PVOID Context;
951 PINTERFACE_REFERENCE InterfaceReference;
952 PINTERFACE_DEREFERENCE InterfaceDereference;
953 PPCI_IS_DEVICE_PRESENT IsDevicePresent;
954 PPCI_IS_DEVICE_PRESENT_EX IsDevicePresentEx;
955 } PCI_DEVICE_PRESENT_INTERFACE, *PPCI_DEVICE_PRESENT_INTERFACE;
956
957 typedef struct _DEVICE_CAPABILITIES {
958 USHORT Size;
959 USHORT Version;
960 ULONG DeviceD1:1;
961 ULONG DeviceD2:1;
962 ULONG LockSupported:1;
963 ULONG EjectSupported:1;
964 ULONG Removable:1;
965 ULONG DockDevice:1;
966 ULONG UniqueID:1;
967 ULONG SilentInstall:1;
968 ULONG RawDeviceOK:1;
969 ULONG SurpriseRemovalOK:1;
970 ULONG WakeFromD0:1;
971 ULONG WakeFromD1:1;
972 ULONG WakeFromD2:1;
973 ULONG WakeFromD3:1;
974 ULONG HardwareDisabled:1;
975 ULONG NonDynamic:1;
976 ULONG WarmEjectSupported:1;
977 ULONG NoDisplayInUI:1;
978 ULONG Reserved:14;
979 ULONG Address;
980 ULONG UINumber;
981 DEVICE_POWER_STATE DeviceState[PowerSystemMaximum];
982 SYSTEM_POWER_STATE SystemWake;
983 DEVICE_POWER_STATE DeviceWake;
984 ULONG D1Latency;
985 ULONG D2Latency;
986 ULONG D3Latency;
987 } DEVICE_CAPABILITIES, *PDEVICE_CAPABILITIES;
988
989 typedef struct _DEVICE_INTERFACE_CHANGE_NOTIFICATION {
990 USHORT Version;
991 USHORT Size;
992 GUID Event;
993 GUID InterfaceClassGuid;
994 PUNICODE_STRING SymbolicLinkName;
995 } DEVICE_INTERFACE_CHANGE_NOTIFICATION, *PDEVICE_INTERFACE_CHANGE_NOTIFICATION;
996
997 typedef struct _HWPROFILE_CHANGE_NOTIFICATION {
998 USHORT Version;
999 USHORT Size;
1000 GUID Event;
1001 } HWPROFILE_CHANGE_NOTIFICATION, *PHWPROFILE_CHANGE_NOTIFICATION;
1002
1003 #undef INTERFACE
1004
1005 typedef struct _INTERFACE {
1006 USHORT Size;
1007 USHORT Version;
1008 PVOID Context;
1009 PINTERFACE_REFERENCE InterfaceReference;
1010 PINTERFACE_DEREFERENCE InterfaceDereference;
1011 } INTERFACE, *PINTERFACE;
1012
1013 typedef struct _PLUGPLAY_NOTIFICATION_HEADER {
1014 USHORT Version;
1015 USHORT Size;
1016 GUID Event;
1017 } PLUGPLAY_NOTIFICATION_HEADER, *PPLUGPLAY_NOTIFICATION_HEADER;
1018
1019 typedef ULONG PNP_DEVICE_STATE, *PPNP_DEVICE_STATE;
1020
1021 /* PNP_DEVICE_STATE */
1022
1023 #define PNP_DEVICE_DISABLED 0x00000001
1024 #define PNP_DEVICE_DONT_DISPLAY_IN_UI 0x00000002
1025 #define PNP_DEVICE_FAILED 0x00000004
1026 #define PNP_DEVICE_REMOVED 0x00000008
1027 #define PNP_DEVICE_RESOURCE_REQUIREMENTS_CHANGED 0x00000010
1028 #define PNP_DEVICE_NOT_DISABLEABLE 0x00000020
1029
1030 typedef struct _TARGET_DEVICE_CUSTOM_NOTIFICATION {
1031 USHORT Version;
1032 USHORT Size;
1033 GUID Event;
1034 struct _FILE_OBJECT *FileObject;
1035 LONG NameBufferOffset;
1036 UCHAR CustomDataBuffer[1];
1037 } TARGET_DEVICE_CUSTOM_NOTIFICATION, *PTARGET_DEVICE_CUSTOM_NOTIFICATION;
1038
1039 typedef struct _TARGET_DEVICE_REMOVAL_NOTIFICATION {
1040 USHORT Version;
1041 USHORT Size;
1042 GUID Event;
1043 struct _FILE_OBJECT *FileObject;
1044 } TARGET_DEVICE_REMOVAL_NOTIFICATION, *PTARGET_DEVICE_REMOVAL_NOTIFICATION;
1045
1046 #if (NTDDI_VERSION >= NTDDI_VISTA)
1047 #include <devpropdef.h>
1048 #define PLUGPLAY_PROPERTY_PERSISTENT 0x00000001
1049 #endif
1050
1051 #define PNP_REPLACE_NO_MAP MAXLONGLONG
1052
1053 typedef NTSTATUS
1054 (NTAPI *PREPLACE_MAP_MEMORY)(
1055 IN PHYSICAL_ADDRESS TargetPhysicalAddress,
1056 IN PHYSICAL_ADDRESS SparePhysicalAddress,
1057 IN OUT PLARGE_INTEGER NumberOfBytes,
1058 OUT PVOID *TargetAddress,
1059 OUT PVOID *SpareAddress);
1060
1061 typedef struct _PNP_REPLACE_MEMORY_LIST {
1062 ULONG AllocatedCount;
1063 ULONG Count;
1064 ULONGLONG TotalLength;
1065 struct {
1066 PHYSICAL_ADDRESS Address;
1067 ULONGLONG Length;
1068 } Ranges[ANYSIZE_ARRAY];
1069 } PNP_REPLACE_MEMORY_LIST, *PPNP_REPLACE_MEMORY_LIST;
1070
1071 typedef struct _PNP_REPLACE_PROCESSOR_LIST {
1072 PKAFFINITY Affinity;
1073 ULONG GroupCount;
1074 ULONG AllocatedCount;
1075 ULONG Count;
1076 ULONG ApicIds[ANYSIZE_ARRAY];
1077 } PNP_REPLACE_PROCESSOR_LIST, *PPNP_REPLACE_PROCESSOR_LIST;
1078
1079 typedef struct _PNP_REPLACE_PROCESSOR_LIST_V1 {
1080 KAFFINITY AffinityMask;
1081 ULONG AllocatedCount;
1082 ULONG Count;
1083 ULONG ApicIds[ANYSIZE_ARRAY];
1084 } PNP_REPLACE_PROCESSOR_LIST_V1, *PPNP_REPLACE_PROCESSOR_LIST_V1;
1085
1086 #define PNP_REPLACE_PARAMETERS_VERSION 2
1087
1088 typedef struct _PNP_REPLACE_PARAMETERS {
1089 ULONG Size;
1090 ULONG Version;
1091 ULONG64 Target;
1092 ULONG64 Spare;
1093 PPNP_REPLACE_PROCESSOR_LIST TargetProcessors;
1094 PPNP_REPLACE_PROCESSOR_LIST SpareProcessors;
1095 PPNP_REPLACE_MEMORY_LIST TargetMemory;
1096 PPNP_REPLACE_MEMORY_LIST SpareMemory;
1097 PREPLACE_MAP_MEMORY MapMemory;
1098 } PNP_REPLACE_PARAMETERS, *PPNP_REPLACE_PARAMETERS;
1099
1100 typedef VOID
1101 (NTAPI *PREPLACE_UNLOAD)(
1102 VOID);
1103
1104 typedef NTSTATUS
1105 (NTAPI *PREPLACE_BEGIN)(
1106 IN PPNP_REPLACE_PARAMETERS Parameters,
1107 OUT PVOID *Context);
1108
1109 typedef NTSTATUS
1110 (NTAPI *PREPLACE_END)(
1111 IN PVOID Context);
1112
1113 typedef NTSTATUS
1114 (NTAPI *PREPLACE_MIRROR_PHYSICAL_MEMORY)(
1115 IN PVOID Context,
1116 IN PHYSICAL_ADDRESS PhysicalAddress,
1117 IN LARGE_INTEGER ByteCount);
1118
1119 typedef NTSTATUS
1120 (NTAPI *PREPLACE_SET_PROCESSOR_ID)(
1121 IN PVOID Context,
1122 IN ULONG ApicId,
1123 IN BOOLEAN Target);
1124
1125 typedef NTSTATUS
1126 (NTAPI *PREPLACE_SWAP)(
1127 IN PVOID Context);
1128
1129 typedef NTSTATUS
1130 (NTAPI *PREPLACE_INITIATE_HARDWARE_MIRROR)(
1131 IN PVOID Context);
1132
1133 typedef NTSTATUS
1134 (NTAPI *PREPLACE_MIRROR_PLATFORM_MEMORY)(
1135 IN PVOID Context);
1136
1137 typedef NTSTATUS
1138 (NTAPI *PREPLACE_GET_MEMORY_DESTINATION)(
1139 IN PVOID Context,
1140 IN PHYSICAL_ADDRESS SourceAddress,
1141 OUT PPHYSICAL_ADDRESS DestinationAddress);
1142
1143 typedef NTSTATUS
1144 (NTAPI *PREPLACE_ENABLE_DISABLE_HARDWARE_QUIESCE)(
1145 IN PVOID Context,
1146 IN BOOLEAN Enable);
1147
1148 #define PNP_REPLACE_DRIVER_INTERFACE_VERSION 1
1149 #define PNP_REPLACE_DRIVER_INTERFACE_MINIMUM_SIZE \
1150 FIELD_OFFSET(PNP_REPLACE_DRIVER_INTERFACE, InitiateHardwareMirror)
1151
1152 #define PNP_REPLACE_MEMORY_SUPPORTED 0x0001
1153 #define PNP_REPLACE_PROCESSOR_SUPPORTED 0x0002
1154 #define PNP_REPLACE_HARDWARE_MEMORY_MIRRORING 0x0004
1155 #define PNP_REPLACE_HARDWARE_PAGE_COPY 0x0008
1156 #define PNP_REPLACE_HARDWARE_QUIESCE 0x0010
1157
1158 typedef struct _PNP_REPLACE_DRIVER_INTERFACE {
1159 ULONG Size;
1160 ULONG Version;
1161 ULONG Flags;
1162 PREPLACE_UNLOAD Unload;
1163 PREPLACE_BEGIN BeginReplace;
1164 PREPLACE_END EndReplace;
1165 PREPLACE_MIRROR_PHYSICAL_MEMORY MirrorPhysicalMemory;
1166 PREPLACE_SET_PROCESSOR_ID SetProcessorId;
1167 PREPLACE_SWAP Swap;
1168 PREPLACE_INITIATE_HARDWARE_MIRROR InitiateHardwareMirror;
1169 PREPLACE_MIRROR_PLATFORM_MEMORY MirrorPlatformMemory;
1170 PREPLACE_GET_MEMORY_DESTINATION GetMemoryDestination;
1171 PREPLACE_ENABLE_DISABLE_HARDWARE_QUIESCE EnableDisableHardwareQuiesce;
1172 } PNP_REPLACE_DRIVER_INTERFACE, *PPNP_REPLACE_DRIVER_INTERFACE;
1173
1174 typedef NTSTATUS
1175 (NTAPI *PREPLACE_DRIVER_INIT)(
1176 IN OUT PPNP_REPLACE_DRIVER_INTERFACE Interface,
1177 IN PVOID Unused);
1178
1179 typedef enum _DEVICE_USAGE_NOTIFICATION_TYPE {
1180 DeviceUsageTypeUndefined,
1181 DeviceUsageTypePaging,
1182 DeviceUsageTypeHibernation,
1183 DeviceUsageTypeDumpFile
1184 } DEVICE_USAGE_NOTIFICATION_TYPE;
1185
1186 typedef struct _POWER_SEQUENCE {
1187 ULONG SequenceD1;
1188 ULONG SequenceD2;
1189 ULONG SequenceD3;
1190 } POWER_SEQUENCE, *PPOWER_SEQUENCE;
1191
1192 typedef enum {
1193 DevicePropertyDeviceDescription = 0x0,
1194 DevicePropertyHardwareID = 0x1,
1195 DevicePropertyCompatibleIDs = 0x2,
1196 DevicePropertyBootConfiguration = 0x3,
1197 DevicePropertyBootConfigurationTranslated = 0x4,
1198 DevicePropertyClassName = 0x5,
1199 DevicePropertyClassGuid = 0x6,
1200 DevicePropertyDriverKeyName = 0x7,
1201 DevicePropertyManufacturer = 0x8,
1202 DevicePropertyFriendlyName = 0x9,
1203 DevicePropertyLocationInformation = 0xa,
1204 DevicePropertyPhysicalDeviceObjectName = 0xb,
1205 DevicePropertyBusTypeGuid = 0xc,
1206 DevicePropertyLegacyBusType = 0xd,
1207 DevicePropertyBusNumber = 0xe,
1208 DevicePropertyEnumeratorName = 0xf,
1209 DevicePropertyAddress = 0x10,
1210 DevicePropertyUINumber = 0x11,
1211 DevicePropertyInstallState = 0x12,
1212 DevicePropertyRemovalPolicy = 0x13,
1213 DevicePropertyResourceRequirements = 0x14,
1214 DevicePropertyAllocatedResources = 0x15,
1215 DevicePropertyContainerID = 0x16
1216 } DEVICE_REGISTRY_PROPERTY;
1217
1218 typedef enum _IO_NOTIFICATION_EVENT_CATEGORY {
1219 EventCategoryReserved,
1220 EventCategoryHardwareProfileChange,
1221 EventCategoryDeviceInterfaceChange,
1222 EventCategoryTargetDeviceChange
1223 } IO_NOTIFICATION_EVENT_CATEGORY;
1224
1225 typedef enum _IO_PRIORITY_HINT {
1226 IoPriorityVeryLow = 0,
1227 IoPriorityLow,
1228 IoPriorityNormal,
1229 IoPriorityHigh,
1230 IoPriorityCritical,
1231 MaxIoPriorityTypes
1232 } IO_PRIORITY_HINT;
1233
1234 #define PNPNOTIFY_DEVICE_INTERFACE_INCLUDE_EXISTING_INTERFACES 0x00000001
1235
1236 typedef NTSTATUS
1237 (NTAPI DRIVER_NOTIFICATION_CALLBACK_ROUTINE)(
1238 IN PVOID NotificationStructure,
1239 IN PVOID Context);
1240 typedef DRIVER_NOTIFICATION_CALLBACK_ROUTINE *PDRIVER_NOTIFICATION_CALLBACK_ROUTINE;
1241
1242 typedef VOID
1243 (NTAPI DEVICE_CHANGE_COMPLETE_CALLBACK)(
1244 IN PVOID Context);
1245 typedef DEVICE_CHANGE_COMPLETE_CALLBACK *PDEVICE_CHANGE_COMPLETE_CALLBACK;
1246
1247 typedef enum _FILE_INFORMATION_CLASS {
1248 FileDirectoryInformation = 1,
1249 FileFullDirectoryInformation,
1250 FileBothDirectoryInformation,
1251 FileBasicInformation,
1252 FileStandardInformation,
1253 FileInternalInformation,
1254 FileEaInformation,
1255 FileAccessInformation,
1256 FileNameInformation,
1257 FileRenameInformation,
1258 FileLinkInformation,
1259 FileNamesInformation,
1260 FileDispositionInformation,
1261 FilePositionInformation,
1262 FileFullEaInformation,
1263 FileModeInformation,
1264 FileAlignmentInformation,
1265 FileAllInformation,
1266 FileAllocationInformation,
1267 FileEndOfFileInformation,
1268 FileAlternateNameInformation,
1269 FileStreamInformation,
1270 FilePipeInformation,
1271 FilePipeLocalInformation,
1272 FilePipeRemoteInformation,
1273 FileMailslotQueryInformation,
1274 FileMailslotSetInformation,
1275 FileCompressionInformation,
1276 FileObjectIdInformation,
1277 FileCompletionInformation,
1278 FileMoveClusterInformation,
1279 FileQuotaInformation,
1280 FileReparsePointInformation,
1281 FileNetworkOpenInformation,
1282 FileAttributeTagInformation,
1283 FileTrackingInformation,
1284 FileIdBothDirectoryInformation,
1285 FileIdFullDirectoryInformation,
1286 FileValidDataLengthInformation,
1287 FileShortNameInformation,
1288 FileIoCompletionNotificationInformation,
1289 FileIoStatusBlockRangeInformation,
1290 FileIoPriorityHintInformation,
1291 FileSfioReserveInformation,
1292 FileSfioVolumeInformation,
1293 FileHardLinkInformation,
1294 FileProcessIdsUsingFileInformation,
1295 FileNormalizedNameInformation,
1296 FileNetworkPhysicalNameInformation,
1297 FileIdGlobalTxDirectoryInformation,
1298 FileIsRemoteDeviceInformation,
1299 FileAttributeCacheInformation,
1300 FileNumaNodeInformation,
1301 FileStandardLinkInformation,
1302 FileRemoteProtocolInformation,
1303 FileMaximumInformation
1304 } FILE_INFORMATION_CLASS, *PFILE_INFORMATION_CLASS;
1305
1306 typedef struct _FILE_POSITION_INFORMATION {
1307 LARGE_INTEGER CurrentByteOffset;
1308 } FILE_POSITION_INFORMATION, *PFILE_POSITION_INFORMATION;
1309
1310 typedef struct _FILE_BASIC_INFORMATION {
1311 LARGE_INTEGER CreationTime;
1312 LARGE_INTEGER LastAccessTime;
1313 LARGE_INTEGER LastWriteTime;
1314 LARGE_INTEGER ChangeTime;
1315 ULONG FileAttributes;
1316 } FILE_BASIC_INFORMATION, *PFILE_BASIC_INFORMATION;
1317
1318 typedef struct _FILE_IO_PRIORITY_HINT_INFORMATION {
1319 IO_PRIORITY_HINT PriorityHint;
1320 } FILE_IO_PRIORITY_HINT_INFORMATION, *PFILE_IO_PRIORITY_HINT_INFORMATION;
1321
1322 typedef struct _FILE_IO_COMPLETION_NOTIFICATION_INFORMATION {
1323 ULONG Flags;
1324 } FILE_IO_COMPLETION_NOTIFICATION_INFORMATION, *PFILE_IO_COMPLETION_NOTIFICATION_INFORMATION;
1325
1326 typedef struct _FILE_IOSTATUSBLOCK_RANGE_INFORMATION {
1327 PUCHAR IoStatusBlockRange;
1328 ULONG Length;
1329 } FILE_IOSTATUSBLOCK_RANGE_INFORMATION, *PFILE_IOSTATUSBLOCK_RANGE_INFORMATION;
1330
1331 typedef struct _FILE_IS_REMOTE_DEVICE_INFORMATION {
1332 BOOLEAN IsRemote;
1333 } FILE_IS_REMOTE_DEVICE_INFORMATION, *PFILE_IS_REMOTE_DEVICE_INFORMATION;
1334
1335 typedef struct _FILE_NUMA_NODE_INFORMATION {
1336 USHORT NodeNumber;
1337 } FILE_NUMA_NODE_INFORMATION, *PFILE_NUMA_NODE_INFORMATION;
1338
1339 typedef struct _FILE_PROCESS_IDS_USING_FILE_INFORMATION {
1340 ULONG NumberOfProcessIdsInList;
1341 ULONG_PTR ProcessIdList[1];
1342 } FILE_PROCESS_IDS_USING_FILE_INFORMATION, *PFILE_PROCESS_IDS_USING_FILE_INFORMATION;
1343
1344 typedef struct _FILE_STANDARD_INFORMATION {
1345 LARGE_INTEGER AllocationSize;
1346 LARGE_INTEGER EndOfFile;
1347 ULONG NumberOfLinks;
1348 BOOLEAN DeletePending;
1349 BOOLEAN Directory;
1350 } FILE_STANDARD_INFORMATION, *PFILE_STANDARD_INFORMATION;
1351
1352 typedef struct _FILE_NETWORK_OPEN_INFORMATION {
1353 LARGE_INTEGER CreationTime;
1354 LARGE_INTEGER LastAccessTime;
1355 LARGE_INTEGER LastWriteTime;
1356 LARGE_INTEGER ChangeTime;
1357 LARGE_INTEGER AllocationSize;
1358 LARGE_INTEGER EndOfFile;
1359 ULONG FileAttributes;
1360 } FILE_NETWORK_OPEN_INFORMATION, *PFILE_NETWORK_OPEN_INFORMATION;
1361
1362 typedef enum _FSINFOCLASS {
1363 FileFsVolumeInformation = 1,
1364 FileFsLabelInformation,
1365 FileFsSizeInformation,
1366 FileFsDeviceInformation,
1367 FileFsAttributeInformation,
1368 FileFsControlInformation,
1369 FileFsFullSizeInformation,
1370 FileFsObjectIdInformation,
1371 FileFsDriverPathInformation,
1372 FileFsVolumeFlagsInformation,
1373 FileFsMaximumInformation
1374 } FS_INFORMATION_CLASS, *PFS_INFORMATION_CLASS;
1375
1376 typedef struct _FILE_FS_DEVICE_INFORMATION {
1377 DEVICE_TYPE DeviceType;
1378 ULONG Characteristics;
1379 } FILE_FS_DEVICE_INFORMATION, *PFILE_FS_DEVICE_INFORMATION;
1380
1381 typedef struct _FILE_FULL_EA_INFORMATION {
1382 ULONG NextEntryOffset;
1383 UCHAR Flags;
1384 UCHAR EaNameLength;
1385 USHORT EaValueLength;
1386 CHAR EaName[1];
1387 } FILE_FULL_EA_INFORMATION, *PFILE_FULL_EA_INFORMATION;
1388
1389 typedef struct _FILE_SFIO_RESERVE_INFORMATION {
1390 ULONG RequestsPerPeriod;
1391 ULONG Period;
1392 BOOLEAN RetryFailures;
1393 BOOLEAN Discardable;
1394 ULONG RequestSize;
1395 ULONG NumOutstandingRequests;
1396 } FILE_SFIO_RESERVE_INFORMATION, *PFILE_SFIO_RESERVE_INFORMATION;
1397
1398 typedef struct _FILE_SFIO_VOLUME_INFORMATION {
1399 ULONG MaximumRequestsPerPeriod;
1400 ULONG MinimumPeriod;
1401 ULONG MinimumTransferSize;
1402 } FILE_SFIO_VOLUME_INFORMATION, *PFILE_SFIO_VOLUME_INFORMATION;
1403
1404 #define FILE_SKIP_COMPLETION_PORT_ON_SUCCESS 0x1
1405 #define FILE_SKIP_SET_EVENT_ON_HANDLE 0x2
1406 #define FILE_SKIP_SET_USER_EVENT_ON_FAST_IO 0x4
1407
1408 #define FM_LOCK_BIT (0x1)
1409 #define FM_LOCK_BIT_V (0x0)
1410 #define FM_LOCK_WAITER_WOKEN (0x2)
1411 #define FM_LOCK_WAITER_INC (0x4)
1412
1413 typedef BOOLEAN
1414 (NTAPI FAST_IO_CHECK_IF_POSSIBLE)(
1415 IN struct _FILE_OBJECT *FileObject,
1416 IN PLARGE_INTEGER FileOffset,
1417 IN ULONG Length,
1418 IN BOOLEAN Wait,
1419 IN ULONG LockKey,
1420 IN BOOLEAN CheckForReadOperation,
1421 OUT PIO_STATUS_BLOCK IoStatus,
1422 IN struct _DEVICE_OBJECT *DeviceObject);
1423 typedef FAST_IO_CHECK_IF_POSSIBLE *PFAST_IO_CHECK_IF_POSSIBLE;
1424
1425 typedef BOOLEAN
1426 (NTAPI FAST_IO_READ)(
1427 IN struct _FILE_OBJECT *FileObject,
1428 IN PLARGE_INTEGER FileOffset,
1429 IN ULONG Length,
1430 IN BOOLEAN Wait,
1431 IN ULONG LockKey,
1432 OUT PVOID Buffer,
1433 OUT PIO_STATUS_BLOCK IoStatus,
1434 IN struct _DEVICE_OBJECT *DeviceObject);
1435 typedef FAST_IO_READ *PFAST_IO_READ;
1436
1437 typedef BOOLEAN
1438 (NTAPI FAST_IO_WRITE)(
1439 IN struct _FILE_OBJECT *FileObject,
1440 IN PLARGE_INTEGER FileOffset,
1441 IN ULONG Length,
1442 IN BOOLEAN Wait,
1443 IN ULONG LockKey,
1444 IN PVOID Buffer,
1445 OUT PIO_STATUS_BLOCK IoStatus,
1446 IN struct _DEVICE_OBJECT *DeviceObject);
1447 typedef FAST_IO_WRITE *PFAST_IO_WRITE;
1448
1449 typedef BOOLEAN
1450 (NTAPI FAST_IO_QUERY_BASIC_INFO)(
1451 IN struct _FILE_OBJECT *FileObject,
1452 IN BOOLEAN Wait,
1453 OUT PFILE_BASIC_INFORMATION Buffer,
1454 OUT PIO_STATUS_BLOCK IoStatus,
1455 IN struct _DEVICE_OBJECT *DeviceObject);
1456 typedef FAST_IO_QUERY_BASIC_INFO *PFAST_IO_QUERY_BASIC_INFO;
1457
1458 typedef BOOLEAN
1459 (NTAPI FAST_IO_QUERY_STANDARD_INFO)(
1460 IN struct _FILE_OBJECT *FileObject,
1461 IN BOOLEAN Wait,
1462 OUT PFILE_STANDARD_INFORMATION Buffer,
1463 OUT PIO_STATUS_BLOCK IoStatus,
1464 IN struct _DEVICE_OBJECT *DeviceObject);
1465 typedef FAST_IO_QUERY_STANDARD_INFO *PFAST_IO_QUERY_STANDARD_INFO;
1466
1467 typedef BOOLEAN
1468 (NTAPI FAST_IO_LOCK)(
1469 IN struct _FILE_OBJECT *FileObject,
1470 IN PLARGE_INTEGER FileOffset,
1471 IN PLARGE_INTEGER Length,
1472 PEPROCESS ProcessId,
1473 ULONG Key,
1474 BOOLEAN FailImmediately,
1475 BOOLEAN ExclusiveLock,
1476 OUT PIO_STATUS_BLOCK IoStatus,
1477 IN struct _DEVICE_OBJECT *DeviceObject);
1478 typedef FAST_IO_LOCK *PFAST_IO_LOCK;
1479
1480 typedef BOOLEAN
1481 (NTAPI FAST_IO_UNLOCK_SINGLE)(
1482 IN struct _FILE_OBJECT *FileObject,
1483 IN PLARGE_INTEGER FileOffset,
1484 IN PLARGE_INTEGER Length,
1485 PEPROCESS ProcessId,
1486 ULONG Key,
1487 OUT PIO_STATUS_BLOCK IoStatus,
1488 IN struct _DEVICE_OBJECT *DeviceObject);
1489 typedef FAST_IO_UNLOCK_SINGLE *PFAST_IO_UNLOCK_SINGLE;
1490
1491 typedef BOOLEAN
1492 (NTAPI FAST_IO_UNLOCK_ALL)(
1493 IN struct _FILE_OBJECT *FileObject,
1494 PEPROCESS ProcessId,
1495 OUT PIO_STATUS_BLOCK IoStatus,
1496 IN struct _DEVICE_OBJECT *DeviceObject);
1497 typedef FAST_IO_UNLOCK_ALL *PFAST_IO_UNLOCK_ALL;
1498
1499 typedef BOOLEAN
1500 (NTAPI FAST_IO_UNLOCK_ALL_BY_KEY)(
1501 IN struct _FILE_OBJECT *FileObject,
1502 PVOID ProcessId,
1503 ULONG Key,
1504 OUT PIO_STATUS_BLOCK IoStatus,
1505 IN struct _DEVICE_OBJECT *DeviceObject);
1506 typedef FAST_IO_UNLOCK_ALL_BY_KEY *PFAST_IO_UNLOCK_ALL_BY_KEY;
1507
1508 typedef BOOLEAN
1509 (NTAPI FAST_IO_DEVICE_CONTROL)(
1510 IN struct _FILE_OBJECT *FileObject,
1511 IN BOOLEAN Wait,
1512 IN PVOID InputBuffer OPTIONAL,
1513 IN ULONG InputBufferLength,
1514 OUT PVOID OutputBuffer OPTIONAL,
1515 IN ULONG OutputBufferLength,
1516 IN ULONG IoControlCode,
1517 OUT PIO_STATUS_BLOCK IoStatus,
1518 IN struct _DEVICE_OBJECT *DeviceObject);
1519 typedef FAST_IO_DEVICE_CONTROL *PFAST_IO_DEVICE_CONTROL;
1520
1521 typedef VOID
1522 (NTAPI FAST_IO_ACQUIRE_FILE)(
1523 IN struct _FILE_OBJECT *FileObject);
1524 typedef FAST_IO_ACQUIRE_FILE *PFAST_IO_ACQUIRE_FILE;
1525
1526 typedef VOID
1527 (NTAPI FAST_IO_RELEASE_FILE)(
1528 IN struct _FILE_OBJECT *FileObject);
1529 typedef FAST_IO_RELEASE_FILE *PFAST_IO_RELEASE_FILE;
1530
1531 typedef VOID
1532 (NTAPI FAST_IO_DETACH_DEVICE)(
1533 IN struct _DEVICE_OBJECT *SourceDevice,
1534 IN struct _DEVICE_OBJECT *TargetDevice);
1535 typedef FAST_IO_DETACH_DEVICE *PFAST_IO_DETACH_DEVICE;
1536
1537 typedef BOOLEAN
1538 (NTAPI FAST_IO_QUERY_NETWORK_OPEN_INFO)(
1539 IN struct _FILE_OBJECT *FileObject,
1540 IN BOOLEAN Wait,
1541 OUT struct _FILE_NETWORK_OPEN_INFORMATION *Buffer,
1542 OUT struct _IO_STATUS_BLOCK *IoStatus,
1543 IN struct _DEVICE_OBJECT *DeviceObject);
1544 typedef FAST_IO_QUERY_NETWORK_OPEN_INFO *PFAST_IO_QUERY_NETWORK_OPEN_INFO;
1545
1546 typedef NTSTATUS
1547 (NTAPI FAST_IO_ACQUIRE_FOR_MOD_WRITE)(
1548 IN struct _FILE_OBJECT *FileObject,
1549 IN PLARGE_INTEGER EndingOffset,
1550 OUT struct _ERESOURCE **ResourceToRelease,
1551 IN struct _DEVICE_OBJECT *DeviceObject);
1552 typedef FAST_IO_ACQUIRE_FOR_MOD_WRITE *PFAST_IO_ACQUIRE_FOR_MOD_WRITE;
1553
1554 typedef BOOLEAN
1555 (NTAPI FAST_IO_MDL_READ)(
1556 IN struct _FILE_OBJECT *FileObject,
1557 IN PLARGE_INTEGER FileOffset,
1558 IN ULONG Length,
1559 IN ULONG LockKey,
1560 OUT PMDL *MdlChain,
1561 OUT PIO_STATUS_BLOCK IoStatus,
1562 IN struct _DEVICE_OBJECT *DeviceObject);
1563 typedef FAST_IO_MDL_READ *PFAST_IO_MDL_READ;
1564
1565 typedef BOOLEAN
1566 (NTAPI FAST_IO_MDL_READ_COMPLETE)(
1567 IN struct _FILE_OBJECT *FileObject,
1568 IN PMDL MdlChain,
1569 IN struct _DEVICE_OBJECT *DeviceObject);
1570 typedef FAST_IO_MDL_READ_COMPLETE *PFAST_IO_MDL_READ_COMPLETE;
1571
1572 typedef BOOLEAN
1573 (NTAPI FAST_IO_PREPARE_MDL_WRITE)(
1574 IN struct _FILE_OBJECT *FileObject,
1575 IN PLARGE_INTEGER FileOffset,
1576 IN ULONG Length,
1577 IN ULONG LockKey,
1578 OUT PMDL *MdlChain,
1579 OUT PIO_STATUS_BLOCK IoStatus,
1580 IN struct _DEVICE_OBJECT *DeviceObject);
1581 typedef FAST_IO_PREPARE_MDL_WRITE *PFAST_IO_PREPARE_MDL_WRITE;
1582
1583 typedef BOOLEAN
1584 (NTAPI FAST_IO_MDL_WRITE_COMPLETE)(
1585 IN struct _FILE_OBJECT *FileObject,
1586 IN PLARGE_INTEGER FileOffset,
1587 IN PMDL MdlChain,
1588 IN struct _DEVICE_OBJECT *DeviceObject);
1589 typedef FAST_IO_MDL_WRITE_COMPLETE *PFAST_IO_MDL_WRITE_COMPLETE;
1590
1591 typedef BOOLEAN
1592 (NTAPI FAST_IO_READ_COMPRESSED)(
1593 IN struct _FILE_OBJECT *FileObject,
1594 IN PLARGE_INTEGER FileOffset,
1595 IN ULONG Length,
1596 IN ULONG LockKey,
1597 OUT PVOID Buffer,
1598 OUT PMDL *MdlChain,
1599 OUT PIO_STATUS_BLOCK IoStatus,
1600 OUT struct _COMPRESSED_DATA_INFO *CompressedDataInfo,
1601 IN ULONG CompressedDataInfoLength,
1602 IN struct _DEVICE_OBJECT *DeviceObject);
1603 typedef FAST_IO_READ_COMPRESSED *PFAST_IO_READ_COMPRESSED;
1604
1605 typedef BOOLEAN
1606 (NTAPI FAST_IO_WRITE_COMPRESSED)(
1607 IN struct _FILE_OBJECT *FileObject,
1608 IN PLARGE_INTEGER FileOffset,
1609 IN ULONG Length,
1610 IN ULONG LockKey,
1611 IN PVOID Buffer,
1612 OUT PMDL *MdlChain,
1613 OUT PIO_STATUS_BLOCK IoStatus,
1614 IN struct _COMPRESSED_DATA_INFO *CompressedDataInfo,
1615 IN ULONG CompressedDataInfoLength,
1616 IN struct _DEVICE_OBJECT *DeviceObject);
1617 typedef FAST_IO_WRITE_COMPRESSED *PFAST_IO_WRITE_COMPRESSED;
1618
1619 typedef BOOLEAN
1620 (NTAPI FAST_IO_MDL_READ_COMPLETE_COMPRESSED)(
1621 IN struct _FILE_OBJECT *FileObject,
1622 IN PMDL MdlChain,
1623 IN struct _DEVICE_OBJECT *DeviceObject);
1624 typedef FAST_IO_MDL_READ_COMPLETE_COMPRESSED *PFAST_IO_MDL_READ_COMPLETE_COMPRESSED;
1625
1626 typedef BOOLEAN
1627 (NTAPI FAST_IO_MDL_WRITE_COMPLETE_COMPRESSED)(
1628 IN struct _FILE_OBJECT *FileObject,
1629 IN PLARGE_INTEGER FileOffset,
1630 IN PMDL MdlChain,
1631 IN struct _DEVICE_OBJECT *DeviceObject);
1632 typedef FAST_IO_MDL_WRITE_COMPLETE_COMPRESSED *PFAST_IO_MDL_WRITE_COMPLETE_COMPRESSED;
1633
1634 typedef BOOLEAN
1635 (NTAPI FAST_IO_QUERY_OPEN)(
1636 IN struct _IRP *Irp,
1637 OUT PFILE_NETWORK_OPEN_INFORMATION NetworkInformation,
1638 IN struct _DEVICE_OBJECT *DeviceObject);
1639 typedef FAST_IO_QUERY_OPEN *PFAST_IO_QUERY_OPEN;
1640
1641 typedef NTSTATUS
1642 (NTAPI FAST_IO_RELEASE_FOR_MOD_WRITE)(
1643 IN struct _FILE_OBJECT *FileObject,
1644 IN struct _ERESOURCE *ResourceToRelease,
1645 IN struct _DEVICE_OBJECT *DeviceObject);
1646 typedef FAST_IO_RELEASE_FOR_MOD_WRITE *PFAST_IO_RELEASE_FOR_MOD_WRITE;
1647
1648 typedef NTSTATUS
1649 (NTAPI FAST_IO_ACQUIRE_FOR_CCFLUSH)(
1650 IN struct _FILE_OBJECT *FileObject,
1651 IN struct _DEVICE_OBJECT *DeviceObject);
1652 typedef FAST_IO_ACQUIRE_FOR_CCFLUSH *PFAST_IO_ACQUIRE_FOR_CCFLUSH;
1653
1654 typedef NTSTATUS
1655 (NTAPI FAST_IO_RELEASE_FOR_CCFLUSH)(
1656 IN struct _FILE_OBJECT *FileObject,
1657 IN struct _DEVICE_OBJECT *DeviceObject);
1658 typedef FAST_IO_RELEASE_FOR_CCFLUSH *PFAST_IO_RELEASE_FOR_CCFLUSH;
1659
1660 typedef struct _FAST_IO_DISPATCH {
1661 ULONG SizeOfFastIoDispatch;
1662 PFAST_IO_CHECK_IF_POSSIBLE FastIoCheckIfPossible;
1663 PFAST_IO_READ FastIoRead;
1664 PFAST_IO_WRITE FastIoWrite;
1665 PFAST_IO_QUERY_BASIC_INFO FastIoQueryBasicInfo;
1666 PFAST_IO_QUERY_STANDARD_INFO FastIoQueryStandardInfo;
1667 PFAST_IO_LOCK FastIoLock;
1668 PFAST_IO_UNLOCK_SINGLE FastIoUnlockSingle;
1669 PFAST_IO_UNLOCK_ALL FastIoUnlockAll;
1670 PFAST_IO_UNLOCK_ALL_BY_KEY FastIoUnlockAllByKey;
1671 PFAST_IO_DEVICE_CONTROL FastIoDeviceControl;
1672 PFAST_IO_ACQUIRE_FILE AcquireFileForNtCreateSection;
1673 PFAST_IO_RELEASE_FILE ReleaseFileForNtCreateSection;
1674 PFAST_IO_DETACH_DEVICE FastIoDetachDevice;
1675 PFAST_IO_QUERY_NETWORK_OPEN_INFO FastIoQueryNetworkOpenInfo;
1676 PFAST_IO_ACQUIRE_FOR_MOD_WRITE AcquireForModWrite;
1677 PFAST_IO_MDL_READ MdlRead;
1678 PFAST_IO_MDL_READ_COMPLETE MdlReadComplete;
1679 PFAST_IO_PREPARE_MDL_WRITE PrepareMdlWrite;
1680 PFAST_IO_MDL_WRITE_COMPLETE MdlWriteComplete;
1681 PFAST_IO_READ_COMPRESSED FastIoReadCompressed;
1682 PFAST_IO_WRITE_COMPRESSED FastIoWriteCompressed;
1683 PFAST_IO_MDL_READ_COMPLETE_COMPRESSED MdlReadCompleteCompressed;
1684 PFAST_IO_MDL_WRITE_COMPLETE_COMPRESSED MdlWriteCompleteCompressed;
1685 PFAST_IO_QUERY_OPEN FastIoQueryOpen;
1686 PFAST_IO_RELEASE_FOR_MOD_WRITE ReleaseForModWrite;
1687 PFAST_IO_ACQUIRE_FOR_CCFLUSH AcquireForCcFlush;
1688 PFAST_IO_RELEASE_FOR_CCFLUSH ReleaseForCcFlush;
1689 } FAST_IO_DISPATCH, *PFAST_IO_DISPATCH;
1690
1691 typedef struct _SECTION_OBJECT_POINTERS {
1692 PVOID DataSectionObject;
1693 PVOID SharedCacheMap;
1694 PVOID ImageSectionObject;
1695 } SECTION_OBJECT_POINTERS, *PSECTION_OBJECT_POINTERS;
1696
1697 typedef struct _IO_COMPLETION_CONTEXT {
1698 PVOID Port;
1699 PVOID Key;
1700 } IO_COMPLETION_CONTEXT, *PIO_COMPLETION_CONTEXT;
1701
1702 /* FILE_OBJECT.Flags */
1703 #define FO_FILE_OPEN 0x00000001
1704 #define FO_SYNCHRONOUS_IO 0x00000002
1705 #define FO_ALERTABLE_IO 0x00000004
1706 #define FO_NO_INTERMEDIATE_BUFFERING 0x00000008
1707 #define FO_WRITE_THROUGH 0x00000010
1708 #define FO_SEQUENTIAL_ONLY 0x00000020
1709 #define FO_CACHE_SUPPORTED 0x00000040
1710 #define FO_NAMED_PIPE 0x00000080
1711 #define FO_STREAM_FILE 0x00000100
1712 #define FO_MAILSLOT 0x00000200
1713 #define FO_GENERATE_AUDIT_ON_CLOSE 0x00000400
1714 #define FO_QUEUE_IRP_TO_THREAD 0x00000400
1715 #define FO_DIRECT_DEVICE_OPEN 0x00000800
1716 #define FO_FILE_MODIFIED 0x00001000
1717 #define FO_FILE_SIZE_CHANGED 0x00002000
1718 #define FO_CLEANUP_COMPLETE 0x00004000
1719 #define FO_TEMPORARY_FILE 0x00008000
1720 #define FO_DELETE_ON_CLOSE 0x00010000
1721 #define FO_OPENED_CASE_SENSITIVE 0x00020000
1722 #define FO_HANDLE_CREATED 0x00040000
1723 #define FO_FILE_FAST_IO_READ 0x00080000
1724 #define FO_RANDOM_ACCESS 0x00100000
1725 #define FO_FILE_OPEN_CANCELLED 0x00200000
1726 #define FO_VOLUME_OPEN 0x00400000
1727 #define FO_REMOTE_ORIGIN 0x01000000
1728 #define FO_DISALLOW_EXCLUSIVE 0x02000000
1729 #define FO_SKIP_COMPLETION_PORT 0x02000000
1730 #define FO_SKIP_SET_EVENT 0x04000000
1731 #define FO_SKIP_SET_FAST_IO 0x08000000
1732 #define FO_FLAGS_VALID_ONLY_DURING_CREATE FO_DISALLOW_EXCLUSIVE
1733
1734 /* VPB.Flags */
1735 #define VPB_MOUNTED 0x0001
1736 #define VPB_LOCKED 0x0002
1737 #define VPB_PERSISTENT 0x0004
1738 #define VPB_REMOVE_PENDING 0x0008
1739 #define VPB_RAW_MOUNT 0x0010
1740 #define VPB_DIRECT_WRITES_ALLOWED 0x0020
1741
1742 /* IRP.Flags */
1743
1744 #define SL_FORCE_ACCESS_CHECK 0x01
1745 #define SL_OPEN_PAGING_FILE 0x02
1746 #define SL_OPEN_TARGET_DIRECTORY 0x04
1747 #define SL_STOP_ON_SYMLINK 0x08
1748 #define SL_CASE_SENSITIVE 0x80
1749
1750 #define SL_KEY_SPECIFIED 0x01
1751 #define SL_OVERRIDE_VERIFY_VOLUME 0x02
1752 #define SL_WRITE_THROUGH 0x04
1753 #define SL_FT_SEQUENTIAL_WRITE 0x08
1754 #define SL_FORCE_DIRECT_WRITE 0x10
1755 #define SL_REALTIME_STREAM 0x20
1756
1757 #define SL_READ_ACCESS_GRANTED 0x01
1758 #define SL_WRITE_ACCESS_GRANTED 0x04
1759
1760 #define SL_FAIL_IMMEDIATELY 0x01
1761 #define SL_EXCLUSIVE_LOCK 0x02
1762
1763 #define SL_RESTART_SCAN 0x01
1764 #define SL_RETURN_SINGLE_ENTRY 0x02
1765 #define SL_INDEX_SPECIFIED 0x04
1766
1767 #define SL_WATCH_TREE 0x01
1768
1769 #define SL_ALLOW_RAW_MOUNT 0x01
1770
1771 #define CTL_CODE(DeviceType, Function, Method, Access) \
1772 (((DeviceType) << 16) | ((Access) << 14) | ((Function) << 2) | (Method))
1773
1774 #define DEVICE_TYPE_FROM_CTL_CODE(ctl) (((ULONG) (ctl & 0xffff0000)) >> 16)
1775
1776 #define METHOD_FROM_CTL_CODE(ctrlCode) ((ULONG)(ctrlCode & 3))
1777
1778 #define IRP_NOCACHE 0x00000001
1779 #define IRP_PAGING_IO 0x00000002
1780 #define IRP_MOUNT_COMPLETION 0x00000002
1781 #define IRP_SYNCHRONOUS_API 0x00000004
1782 #define IRP_ASSOCIATED_IRP 0x00000008
1783 #define IRP_BUFFERED_IO 0x00000010
1784 #define IRP_DEALLOCATE_BUFFER 0x00000020
1785 #define IRP_INPUT_OPERATION 0x00000040
1786 #define IRP_SYNCHRONOUS_PAGING_IO 0x00000040
1787 #define IRP_CREATE_OPERATION 0x00000080
1788 #define IRP_READ_OPERATION 0x00000100
1789 #define IRP_WRITE_OPERATION 0x00000200
1790 #define IRP_CLOSE_OPERATION 0x00000400
1791 #define IRP_DEFER_IO_COMPLETION 0x00000800
1792 #define IRP_OB_QUERY_NAME 0x00001000
1793 #define IRP_HOLD_DEVICE_QUEUE 0x00002000
1794
1795 #define IRP_QUOTA_CHARGED 0x01
1796 #define IRP_ALLOCATED_MUST_SUCCEED 0x02
1797 #define IRP_ALLOCATED_FIXED_SIZE 0x04
1798 #define IRP_LOOKASIDE_ALLOCATION 0x08
1799
1800 /*
1801 ** IRP function codes
1802 */
1803
1804 #define IRP_MJ_CREATE 0x00
1805 #define IRP_MJ_CREATE_NAMED_PIPE 0x01
1806 #define IRP_MJ_CLOSE 0x02
1807 #define IRP_MJ_READ 0x03
1808 #define IRP_MJ_WRITE 0x04
1809 #define IRP_MJ_QUERY_INFORMATION 0x05
1810 #define IRP_MJ_SET_INFORMATION 0x06
1811 #define IRP_MJ_QUERY_EA 0x07
1812 #define IRP_MJ_SET_EA 0x08
1813 #define IRP_MJ_FLUSH_BUFFERS 0x09
1814 #define IRP_MJ_QUERY_VOLUME_INFORMATION 0x0a
1815 #define IRP_MJ_SET_VOLUME_INFORMATION 0x0b
1816 #define IRP_MJ_DIRECTORY_CONTROL 0x0c
1817 #define IRP_MJ_FILE_SYSTEM_CONTROL 0x0d
1818 #define IRP_MJ_DEVICE_CONTROL 0x0e
1819 #define IRP_MJ_INTERNAL_DEVICE_CONTROL 0x0f
1820 #define IRP_MJ_SCSI 0x0f
1821 #define IRP_MJ_SHUTDOWN 0x10
1822 #define IRP_MJ_LOCK_CONTROL 0x11
1823 #define IRP_MJ_CLEANUP 0x12
1824 #define IRP_MJ_CREATE_MAILSLOT 0x13
1825 #define IRP_MJ_QUERY_SECURITY 0x14
1826 #define IRP_MJ_SET_SECURITY 0x15
1827 #define IRP_MJ_POWER 0x16
1828 #define IRP_MJ_SYSTEM_CONTROL 0x17
1829 #define IRP_MJ_DEVICE_CHANGE 0x18
1830 #define IRP_MJ_QUERY_QUOTA 0x19
1831 #define IRP_MJ_SET_QUOTA 0x1a
1832 #define IRP_MJ_PNP 0x1b
1833 #define IRP_MJ_PNP_POWER 0x1b
1834 #define IRP_MJ_MAXIMUM_FUNCTION 0x1b
1835
1836 #define IRP_MN_SCSI_CLASS 0x01
1837
1838 #define IRP_MN_START_DEVICE 0x00
1839 #define IRP_MN_QUERY_REMOVE_DEVICE 0x01
1840 #define IRP_MN_REMOVE_DEVICE 0x02
1841 #define IRP_MN_CANCEL_REMOVE_DEVICE 0x03
1842 #define IRP_MN_STOP_DEVICE 0x04
1843 #define IRP_MN_QUERY_STOP_DEVICE 0x05
1844 #define IRP_MN_CANCEL_STOP_DEVICE 0x06
1845
1846 #define IRP_MN_QUERY_DEVICE_RELATIONS 0x07
1847 #define IRP_MN_QUERY_INTERFACE 0x08
1848 #define IRP_MN_QUERY_CAPABILITIES 0x09
1849 #define IRP_MN_QUERY_RESOURCES 0x0A
1850 #define IRP_MN_QUERY_RESOURCE_REQUIREMENTS 0x0B
1851 #define IRP_MN_QUERY_DEVICE_TEXT 0x0C
1852 #define IRP_MN_FILTER_RESOURCE_REQUIREMENTS 0x0D
1853
1854 #define IRP_MN_READ_CONFIG 0x0F
1855 #define IRP_MN_WRITE_CONFIG 0x10
1856 #define IRP_MN_EJECT 0x11
1857 #define IRP_MN_SET_LOCK 0x12
1858 #define IRP_MN_QUERY_ID 0x13
1859 #define IRP_MN_QUERY_PNP_DEVICE_STATE 0x14
1860 #define IRP_MN_QUERY_BUS_INFORMATION 0x15
1861 #define IRP_MN_DEVICE_USAGE_NOTIFICATION 0x16
1862 #define IRP_MN_SURPRISE_REMOVAL 0x17
1863 #if (NTDDI_VERSION >= NTDDI_WIN7)
1864 #define IRP_MN_DEVICE_ENUMERATED 0x19
1865 #endif
1866
1867 #define IRP_MN_WAIT_WAKE 0x00
1868 #define IRP_MN_POWER_SEQUENCE 0x01
1869 #define IRP_MN_SET_POWER 0x02
1870 #define IRP_MN_QUERY_POWER 0x03
1871
1872 #define IRP_MN_QUERY_ALL_DATA 0x00
1873 #define IRP_MN_QUERY_SINGLE_INSTANCE 0x01
1874 #define IRP_MN_CHANGE_SINGLE_INSTANCE 0x02
1875 #define IRP_MN_CHANGE_SINGLE_ITEM 0x03
1876 #define IRP_MN_ENABLE_EVENTS 0x04
1877 #define IRP_MN_DISABLE_EVENTS 0x05
1878 #define IRP_MN_ENABLE_COLLECTION 0x06
1879 #define IRP_MN_DISABLE_COLLECTION 0x07
1880 #define IRP_MN_REGINFO 0x08
1881 #define IRP_MN_EXECUTE_METHOD 0x09
1882
1883 #define IRP_MN_REGINFO_EX 0x0b
1884
1885 typedef struct _FILE_OBJECT {
1886 CSHORT Type;
1887 CSHORT Size;
1888 PDEVICE_OBJECT DeviceObject;
1889 PVPB Vpb;
1890 PVOID FsContext;
1891 PVOID FsContext2;
1892 PSECTION_OBJECT_POINTERS SectionObjectPointer;
1893 PVOID PrivateCacheMap;
1894 NTSTATUS FinalStatus;
1895 struct _FILE_OBJECT *RelatedFileObject;
1896 BOOLEAN LockOperation;
1897 BOOLEAN DeletePending;
1898 BOOLEAN ReadAccess;
1899 BOOLEAN WriteAccess;
1900 BOOLEAN DeleteAccess;
1901 BOOLEAN SharedRead;
1902 BOOLEAN SharedWrite;
1903 BOOLEAN SharedDelete;
1904 ULONG Flags;
1905 UNICODE_STRING FileName;
1906 LARGE_INTEGER CurrentByteOffset;
1907 volatile ULONG Waiters;
1908 volatile ULONG Busy;
1909 PVOID LastLock;
1910 KEVENT Lock;
1911 KEVENT Event;
1912 volatile PIO_COMPLETION_CONTEXT CompletionContext;
1913 KSPIN_LOCK IrpListLock;
1914 LIST_ENTRY IrpList;
1915 volatile PVOID FileObjectExtension;
1916 } FILE_OBJECT, *PFILE_OBJECT;
1917
1918 typedef struct _IO_ERROR_LOG_PACKET {
1919 UCHAR MajorFunctionCode;
1920 UCHAR RetryCount;
1921 USHORT DumpDataSize;
1922 USHORT NumberOfStrings;
1923 USHORT StringOffset;
1924 USHORT EventCategory;
1925 NTSTATUS ErrorCode;
1926 ULONG UniqueErrorValue;
1927 NTSTATUS FinalStatus;
1928 ULONG SequenceNumber;
1929 ULONG IoControlCode;
1930 LARGE_INTEGER DeviceOffset;
1931 ULONG DumpData[1];
1932 } IO_ERROR_LOG_PACKET, *PIO_ERROR_LOG_PACKET;
1933
1934 typedef struct _IO_ERROR_LOG_MESSAGE {
1935 USHORT Type;
1936 USHORT Size;
1937 USHORT DriverNameLength;
1938 LARGE_INTEGER TimeStamp;
1939 ULONG DriverNameOffset;
1940 IO_ERROR_LOG_PACKET EntryData;
1941 } IO_ERROR_LOG_MESSAGE, *PIO_ERROR_LOG_MESSAGE;
1942
1943 #define ERROR_LOG_LIMIT_SIZE 240
1944 #define IO_ERROR_LOG_MESSAGE_HEADER_LENGTH (sizeof(IO_ERROR_LOG_MESSAGE) - \
1945 sizeof(IO_ERROR_LOG_PACKET) + \
1946 (sizeof(WCHAR) * 40))
1947 #define ERROR_LOG_MESSAGE_LIMIT_SIZE \
1948 (ERROR_LOG_LIMIT_SIZE + IO_ERROR_LOG_MESSAGE_HEADER_LENGTH)
1949 #define IO_ERROR_LOG_MESSAGE_LENGTH \
1950 ((PORT_MAXIMUM_MESSAGE_LENGTH > ERROR_LOG_MESSAGE_LIMIT_SIZE) ? \
1951 ERROR_LOG_MESSAGE_LIMIT_SIZE : \
1952 PORT_MAXIMUM_MESSAGE_LENGTH)
1953 #define ERROR_LOG_MAXIMUM_SIZE (IO_ERROR_LOG_MESSAGE_LENGTH - \
1954 IO_ERROR_LOG_MESSAGE_HEADER_LENGTH)
1955
1956 #ifdef _WIN64
1957 #define PORT_MAXIMUM_MESSAGE_LENGTH 512
1958 #else
1959 #define PORT_MAXIMUM_MESSAGE_LENGTH 256
1960 #endif
1961
1962 typedef enum _DMA_WIDTH {
1963 Width8Bits,
1964 Width16Bits,
1965 Width32Bits,
1966 MaximumDmaWidth
1967 } DMA_WIDTH, *PDMA_WIDTH;
1968
1969 typedef enum _DMA_SPEED {
1970 Compatible,
1971 TypeA,
1972 TypeB,
1973 TypeC,
1974 TypeF,
1975 MaximumDmaSpeed
1976 } DMA_SPEED, *PDMA_SPEED;
1977
1978 /* DEVICE_DESCRIPTION.Version */
1979
1980 #define DEVICE_DESCRIPTION_VERSION 0x0000
1981 #define DEVICE_DESCRIPTION_VERSION1 0x0001
1982 #define DEVICE_DESCRIPTION_VERSION2 0x0002
1983
1984 typedef struct _DEVICE_DESCRIPTION {
1985 ULONG Version;
1986 BOOLEAN Master;
1987 BOOLEAN ScatterGather;
1988 BOOLEAN DemandMode;
1989 BOOLEAN AutoInitialize;
1990 BOOLEAN Dma32BitAddresses;
1991 BOOLEAN IgnoreCount;
1992 BOOLEAN Reserved1;
1993 BOOLEAN Dma64BitAddresses;
1994 ULONG BusNumber;
1995 ULONG DmaChannel;
1996 INTERFACE_TYPE InterfaceType;
1997 DMA_WIDTH DmaWidth;
1998 DMA_SPEED DmaSpeed;
1999 ULONG MaximumLength;
2000 ULONG DmaPort;
2001 } DEVICE_DESCRIPTION, *PDEVICE_DESCRIPTION;
2002
2003 typedef enum _DEVICE_RELATION_TYPE {
2004 BusRelations,
2005 EjectionRelations,
2006 PowerRelations,
2007 RemovalRelations,
2008 TargetDeviceRelation,
2009 SingleBusRelations,
2010 TransportRelations
2011 } DEVICE_RELATION_TYPE, *PDEVICE_RELATION_TYPE;
2012
2013 typedef struct _DEVICE_RELATIONS {
2014 ULONG Count;
2015 PDEVICE_OBJECT Objects[1];
2016 } DEVICE_RELATIONS, *PDEVICE_RELATIONS;
2017
2018 typedef struct _DEVOBJ_EXTENSION {
2019 CSHORT Type;
2020 USHORT Size;
2021 PDEVICE_OBJECT DeviceObject;
2022 } DEVOBJ_EXTENSION, *PDEVOBJ_EXTENSION;
2023
2024 typedef struct _SCATTER_GATHER_ELEMENT {
2025 PHYSICAL_ADDRESS Address;
2026 ULONG Length;
2027 ULONG_PTR Reserved;
2028 } SCATTER_GATHER_ELEMENT, *PSCATTER_GATHER_ELEMENT;
2029
2030 #if defined(_MSC_EXTENSIONS)
2031
2032 #if _MSC_VER >= 1200
2033 #pragma warning(push)
2034 #endif
2035 #pragma warning(disable:4200)
2036 typedef struct _SCATTER_GATHER_LIST {
2037 ULONG NumberOfElements;
2038 ULONG_PTR Reserved;
2039 SCATTER_GATHER_ELEMENT Elements[1];
2040 } SCATTER_GATHER_LIST, *PSCATTER_GATHER_LIST;
2041
2042 #if _MSC_VER >= 1200
2043 #pragma warning(pop)
2044 #else
2045 #pragma warning(default:4200)
2046 #endif
2047
2048 #else
2049
2050 struct _SCATTER_GATHER_LIST;
2051 typedef struct _SCATTER_GATHER_LIST SCATTER_GATHER_LIST, *PSCATTER_GATHER_LIST;
2052
2053 #endif
2054
2055 typedef NTSTATUS
2056 (NTAPI DRIVER_ADD_DEVICE)(
2057 IN struct _DRIVER_OBJECT *DriverObject,
2058 IN struct _DEVICE_OBJECT *PhysicalDeviceObject);
2059 typedef DRIVER_ADD_DEVICE *PDRIVER_ADD_DEVICE;
2060
2061 typedef struct _DRIVER_EXTENSION {
2062 struct _DRIVER_OBJECT *DriverObject;
2063 PDRIVER_ADD_DEVICE AddDevice;
2064 ULONG Count;
2065 UNICODE_STRING ServiceKeyName;
2066 } DRIVER_EXTENSION, *PDRIVER_EXTENSION;
2067
2068 #define DRVO_UNLOAD_INVOKED 0x00000001
2069 #define DRVO_LEGACY_DRIVER 0x00000002
2070 #define DRVO_BUILTIN_DRIVER 0x00000004
2071
2072 typedef NTSTATUS
2073 (NTAPI DRIVER_INITIALIZE)(
2074 IN struct _DRIVER_OBJECT *DriverObject,
2075 IN PUNICODE_STRING RegistryPath);
2076 typedef DRIVER_INITIALIZE *PDRIVER_INITIALIZE;
2077
2078 typedef VOID
2079 (NTAPI DRIVER_STARTIO)(
2080 IN struct _DEVICE_OBJECT *DeviceObject,
2081 IN struct _IRP *Irp);
2082 typedef DRIVER_STARTIO *PDRIVER_STARTIO;
2083
2084 typedef VOID
2085 (NTAPI DRIVER_UNLOAD)(
2086 IN struct _DRIVER_OBJECT *DriverObject);
2087 typedef DRIVER_UNLOAD *PDRIVER_UNLOAD;
2088
2089 typedef NTSTATUS
2090 (NTAPI DRIVER_DISPATCH)(
2091 IN struct _DEVICE_OBJECT *DeviceObject,
2092 IN struct _IRP *Irp);
2093 typedef DRIVER_DISPATCH *PDRIVER_DISPATCH;
2094
2095 typedef struct _DRIVER_OBJECT {
2096 CSHORT Type;
2097 CSHORT Size;
2098 PDEVICE_OBJECT DeviceObject;
2099 ULONG Flags;
2100 PVOID DriverStart;
2101 ULONG DriverSize;
2102 PVOID DriverSection;
2103 PDRIVER_EXTENSION DriverExtension;
2104 UNICODE_STRING DriverName;
2105 PUNICODE_STRING HardwareDatabase;
2106 struct _FAST_IO_DISPATCH *FastIoDispatch;
2107 PDRIVER_INITIALIZE DriverInit;
2108 PDRIVER_STARTIO DriverStartIo;
2109 PDRIVER_UNLOAD DriverUnload;
2110 PDRIVER_DISPATCH MajorFunction[IRP_MJ_MAXIMUM_FUNCTION + 1];
2111 } DRIVER_OBJECT, *PDRIVER_OBJECT;
2112
2113 typedef struct _DMA_ADAPTER {
2114 USHORT Version;
2115 USHORT Size;
2116 struct _DMA_OPERATIONS* DmaOperations;
2117 } DMA_ADAPTER, *PDMA_ADAPTER;
2118
2119 typedef VOID
2120 (NTAPI *PPUT_DMA_ADAPTER)(
2121 IN PDMA_ADAPTER DmaAdapter);
2122
2123 typedef PVOID
2124 (NTAPI *PALLOCATE_COMMON_BUFFER)(
2125 IN PDMA_ADAPTER DmaAdapter,
2126 IN ULONG Length,
2127 OUT PPHYSICAL_ADDRESS LogicalAddress,
2128 IN BOOLEAN CacheEnabled);
2129
2130 typedef VOID
2131 (NTAPI *PFREE_COMMON_BUFFER)(
2132 IN PDMA_ADAPTER DmaAdapter,
2133 IN ULONG Length,
2134 IN PHYSICAL_ADDRESS LogicalAddress,
2135 IN PVOID VirtualAddress,
2136 IN BOOLEAN CacheEnabled);
2137
2138 typedef NTSTATUS
2139 (NTAPI *PALLOCATE_ADAPTER_CHANNEL)(
2140 IN PDMA_ADAPTER DmaAdapter,
2141 IN PDEVICE_OBJECT DeviceObject,
2142 IN ULONG NumberOfMapRegisters,
2143 IN PDRIVER_CONTROL ExecutionRoutine,
2144 IN PVOID Context);
2145
2146 typedef BOOLEAN
2147 (NTAPI *PFLUSH_ADAPTER_BUFFERS)(
2148 IN PDMA_ADAPTER DmaAdapter,
2149 IN PMDL Mdl,
2150 IN PVOID MapRegisterBase,
2151 IN PVOID CurrentVa,
2152 IN ULONG Length,
2153 IN BOOLEAN WriteToDevice);
2154
2155 typedef VOID
2156 (NTAPI *PFREE_ADAPTER_CHANNEL)(
2157 IN PDMA_ADAPTER DmaAdapter);
2158
2159 typedef VOID
2160 (NTAPI *PFREE_MAP_REGISTERS)(
2161 IN PDMA_ADAPTER DmaAdapter,
2162 PVOID MapRegisterBase,
2163 ULONG NumberOfMapRegisters);
2164
2165 typedef PHYSICAL_ADDRESS
2166 (NTAPI *PMAP_TRANSFER)(
2167 IN PDMA_ADAPTER DmaAdapter,
2168 IN PMDL Mdl,
2169 IN PVOID MapRegisterBase,
2170 IN PVOID CurrentVa,
2171 IN OUT PULONG Length,
2172 IN BOOLEAN WriteToDevice);
2173
2174 typedef ULONG
2175 (NTAPI *PGET_DMA_ALIGNMENT)(
2176 IN PDMA_ADAPTER DmaAdapter);
2177
2178 typedef ULONG
2179 (NTAPI *PREAD_DMA_COUNTER)(
2180 IN PDMA_ADAPTER DmaAdapter);
2181
2182 typedef VOID
2183 (NTAPI DRIVER_LIST_CONTROL)(
2184 IN struct _DEVICE_OBJECT *DeviceObject,
2185 IN struct _IRP *Irp,
2186 IN struct _SCATTER_GATHER_LIST *ScatterGather,
2187 IN PVOID Context);
2188 typedef DRIVER_LIST_CONTROL *PDRIVER_LIST_CONTROL;
2189
2190 typedef NTSTATUS
2191 (NTAPI *PGET_SCATTER_GATHER_LIST)(
2192 IN PDMA_ADAPTER DmaAdapter,
2193 IN PDEVICE_OBJECT DeviceObject,
2194 IN PMDL Mdl,
2195 IN PVOID CurrentVa,
2196 IN ULONG Length,
2197 IN PDRIVER_LIST_CONTROL ExecutionRoutine,
2198 IN PVOID Context,
2199 IN BOOLEAN WriteToDevice);
2200
2201 typedef VOID
2202 (NTAPI *PPUT_SCATTER_GATHER_LIST)(
2203 IN PDMA_ADAPTER DmaAdapter,
2204 IN PSCATTER_GATHER_LIST ScatterGather,
2205 IN BOOLEAN WriteToDevice);
2206
2207 typedef NTSTATUS
2208 (NTAPI *PCALCULATE_SCATTER_GATHER_LIST_SIZE)(
2209 IN PDMA_ADAPTER DmaAdapter,
2210 IN PMDL Mdl OPTIONAL,
2211 IN PVOID CurrentVa,
2212 IN ULONG Length,
2213 OUT PULONG ScatterGatherListSize,
2214 OUT PULONG pNumberOfMapRegisters OPTIONAL);
2215
2216 typedef NTSTATUS
2217 (NTAPI *PBUILD_SCATTER_GATHER_LIST)(
2218 IN PDMA_ADAPTER DmaAdapter,
2219 IN PDEVICE_OBJECT DeviceObject,
2220 IN PMDL Mdl,
2221 IN PVOID CurrentVa,
2222 IN ULONG Length,
2223 IN PDRIVER_LIST_CONTROL ExecutionRoutine,
2224 IN PVOID Context,
2225 IN BOOLEAN WriteToDevice,
2226 IN PVOID ScatterGatherBuffer,
2227 IN ULONG ScatterGatherLength);
2228
2229 typedef NTSTATUS
2230 (NTAPI *PBUILD_MDL_FROM_SCATTER_GATHER_LIST)(
2231 IN PDMA_ADAPTER DmaAdapter,
2232 IN PSCATTER_GATHER_LIST ScatterGather,
2233 IN PMDL OriginalMdl,
2234 OUT PMDL *TargetMdl);
2235
2236 typedef struct _DMA_OPERATIONS {
2237 ULONG Size;
2238 PPUT_DMA_ADAPTER PutDmaAdapter;
2239 PALLOCATE_COMMON_BUFFER AllocateCommonBuffer;
2240 PFREE_COMMON_BUFFER FreeCommonBuffer;
2241 PALLOCATE_ADAPTER_CHANNEL AllocateAdapterChannel;
2242 PFLUSH_ADAPTER_BUFFERS FlushAdapterBuffers;
2243 PFREE_ADAPTER_CHANNEL FreeAdapterChannel;
2244 PFREE_MAP_REGISTERS FreeMapRegisters;
2245 PMAP_TRANSFER MapTransfer;
2246 PGET_DMA_ALIGNMENT GetDmaAlignment;
2247 PREAD_DMA_COUNTER ReadDmaCounter;
2248 PGET_SCATTER_GATHER_LIST GetScatterGatherList;
2249 PPUT_SCATTER_GATHER_LIST PutScatterGatherList;
2250 PCALCULATE_SCATTER_GATHER_LIST_SIZE CalculateScatterGatherList;
2251 PBUILD_SCATTER_GATHER_LIST BuildScatterGatherList;
2252 PBUILD_MDL_FROM_SCATTER_GATHER_LIST BuildMdlFromScatterGatherList;
2253 } DMA_OPERATIONS, *PDMA_OPERATIONS;
2254
2255 typedef struct _IO_RESOURCE_DESCRIPTOR {
2256 UCHAR Option;
2257 UCHAR Type;
2258 UCHAR ShareDisposition;
2259 UCHAR Spare1;
2260 USHORT Flags;
2261 USHORT Spare2;
2262 union {
2263 struct {
2264 ULONG Length;
2265 ULONG Alignment;
2266 PHYSICAL_ADDRESS MinimumAddress;
2267 PHYSICAL_ADDRESS MaximumAddress;
2268 } Port;
2269 struct {
2270 ULONG Length;
2271 ULONG Alignment;
2272 PHYSICAL_ADDRESS MinimumAddress;
2273 PHYSICAL_ADDRESS MaximumAddress;
2274 } Memory;
2275 struct {
2276 ULONG MinimumVector;
2277 ULONG MaximumVector;
2278 } Interrupt;
2279 struct {
2280 ULONG MinimumChannel;
2281 ULONG MaximumChannel;
2282 } Dma;
2283 struct {
2284 ULONG Length;
2285 ULONG Alignment;
2286 PHYSICAL_ADDRESS MinimumAddress;
2287 PHYSICAL_ADDRESS MaximumAddress;
2288 } Generic;
2289 struct {
2290 ULONG Data[3];
2291 } DevicePrivate;
2292 struct {
2293 ULONG Length;
2294 ULONG MinBusNumber;
2295 ULONG MaxBusNumber;
2296 ULONG Reserved;
2297 } BusNumber;
2298 struct {
2299 ULONG Priority;
2300 ULONG Reserved1;
2301 ULONG Reserved2;
2302 } ConfigData;
2303 } u;
2304 } IO_RESOURCE_DESCRIPTOR, *PIO_RESOURCE_DESCRIPTOR;
2305
2306 typedef struct _IO_RESOURCE_LIST {
2307 USHORT Version;
2308 USHORT Revision;
2309 ULONG Count;
2310 IO_RESOURCE_DESCRIPTOR Descriptors[1];
2311 } IO_RESOURCE_LIST, *PIO_RESOURCE_LIST;
2312
2313 typedef struct _IO_RESOURCE_REQUIREMENTS_LIST {
2314 ULONG ListSize;
2315 INTERFACE_TYPE InterfaceType;
2316 ULONG BusNumber;
2317 ULONG SlotNumber;
2318 ULONG Reserved[3];
2319 ULONG AlternativeLists;
2320 IO_RESOURCE_LIST List[1];
2321 } IO_RESOURCE_REQUIREMENTS_LIST, *PIO_RESOURCE_REQUIREMENTS_LIST;
2322
2323 typedef VOID
2324 (NTAPI DRIVER_CANCEL)(
2325 IN struct _DEVICE_OBJECT *DeviceObject,
2326 IN struct _IRP *Irp);
2327 typedef DRIVER_CANCEL *PDRIVER_CANCEL;
2328
2329 typedef struct _IRP {
2330 CSHORT Type;
2331 USHORT Size;
2332 struct _MDL *MdlAddress;
2333 ULONG Flags;
2334 union {
2335 struct _IRP *MasterIrp;
2336 volatile LONG IrpCount;
2337 PVOID SystemBuffer;
2338 } AssociatedIrp;
2339 LIST_ENTRY ThreadListEntry;
2340 IO_STATUS_BLOCK IoStatus;
2341 KPROCESSOR_MODE RequestorMode;
2342 BOOLEAN PendingReturned;
2343 CHAR StackCount;
2344 CHAR CurrentLocation;
2345 BOOLEAN Cancel;
2346 KIRQL CancelIrql;
2347 CCHAR ApcEnvironment;
2348 UCHAR AllocationFlags;
2349 PIO_STATUS_BLOCK UserIosb;
2350 PKEVENT UserEvent;
2351 union {
2352 struct {
2353 _ANONYMOUS_UNION union {
2354 PIO_APC_ROUTINE UserApcRoutine;
2355 PVOID IssuingProcess;
2356 } DUMMYUNIONNAME;
2357 PVOID UserApcContext;
2358 } AsynchronousParameters;
2359 LARGE_INTEGER AllocationSize;
2360 } Overlay;
2361 volatile PDRIVER_CANCEL CancelRoutine;
2362 PVOID UserBuffer;
2363 union {
2364 struct {
2365 _ANONYMOUS_UNION union {
2366 KDEVICE_QUEUE_ENTRY DeviceQueueEntry;
2367 _ANONYMOUS_STRUCT struct {
2368 PVOID DriverContext[4];
2369 } DUMMYSTRUCTNAME;
2370 } DUMMYUNIONNAME;
2371 PETHREAD Thread;
2372 PCHAR AuxiliaryBuffer;
2373 _ANONYMOUS_STRUCT struct {
2374 LIST_ENTRY ListEntry;
2375 _ANONYMOUS_UNION union {
2376 struct _IO_STACK_LOCATION *CurrentStackLocation;
2377 ULONG PacketType;
2378 } DUMMYUNIONNAME;
2379 } DUMMYSTRUCTNAME;
2380 struct _FILE_OBJECT *OriginalFileObject;
2381 } Overlay;
2382 KAPC Apc;
2383 PVOID CompletionKey;
2384 } Tail;
2385 } IRP, *PIRP;
2386
2387 typedef enum _IO_PAGING_PRIORITY {
2388 IoPagingPriorityInvalid,
2389 IoPagingPriorityNormal,
2390 IoPagingPriorityHigh,
2391 IoPagingPriorityReserved1,
2392 IoPagingPriorityReserved2
2393 } IO_PAGING_PRIORITY;
2394
2395 typedef NTSTATUS
2396 (NTAPI IO_COMPLETION_ROUTINE)(
2397 IN struct _DEVICE_OBJECT *DeviceObject,
2398 IN struct _IRP *Irp,
2399 IN PVOID Context);
2400 typedef IO_COMPLETION_ROUTINE *PIO_COMPLETION_ROUTINE;
2401
2402 typedef VOID
2403 (NTAPI IO_DPC_ROUTINE)(
2404 IN struct _KDPC *Dpc,
2405 IN struct _DEVICE_OBJECT *DeviceObject,
2406 IN struct _IRP *Irp,
2407 IN PVOID Context);
2408 typedef IO_DPC_ROUTINE *PIO_DPC_ROUTINE;
2409
2410 typedef NTSTATUS
2411 (NTAPI *PMM_DLL_INITIALIZE)(
2412 IN PUNICODE_STRING RegistryPath);
2413
2414 typedef NTSTATUS
2415 (NTAPI *PMM_DLL_UNLOAD)(
2416 VOID);
2417
2418 typedef VOID
2419 (NTAPI IO_TIMER_ROUTINE)(
2420 IN struct _DEVICE_OBJECT *DeviceObject,
2421 IN PVOID Context);
2422 typedef IO_TIMER_ROUTINE *PIO_TIMER_ROUTINE;
2423
2424 typedef struct _IO_SECURITY_CONTEXT {
2425 PSECURITY_QUALITY_OF_SERVICE SecurityQos;
2426 PACCESS_STATE AccessState;
2427 ACCESS_MASK DesiredAccess;
2428 ULONG FullCreateOptions;
2429 } IO_SECURITY_CONTEXT, *PIO_SECURITY_CONTEXT;
2430
2431 struct _IO_CSQ;
2432
2433 typedef struct _IO_CSQ_IRP_CONTEXT {
2434 ULONG Type;
2435 struct _IRP *Irp;
2436 struct _IO_CSQ *Csq;
2437 } IO_CSQ_IRP_CONTEXT, *PIO_CSQ_IRP_CONTEXT;
2438
2439 typedef VOID
2440 (NTAPI *PIO_CSQ_INSERT_IRP)(
2441 IN struct _IO_CSQ *Csq,
2442 IN PIRP Irp);
2443
2444 typedef NTSTATUS
2445 (NTAPI IO_CSQ_INSERT_IRP_EX)(
2446 IN struct _IO_CSQ *Csq,
2447 IN PIRP Irp,
2448 IN PVOID InsertContext);
2449 typedef IO_CSQ_INSERT_IRP_EX *PIO_CSQ_INSERT_IRP_EX;
2450
2451 typedef VOID
2452 (NTAPI *PIO_CSQ_REMOVE_IRP)(
2453 IN struct _IO_CSQ *Csq,
2454 IN PIRP Irp);
2455
2456 typedef PIRP
2457 (NTAPI *PIO_CSQ_PEEK_NEXT_IRP)(
2458 IN struct _IO_CSQ *Csq,
2459 IN PIRP Irp,
2460 IN PVOID PeekContext);
2461
2462 typedef VOID
2463 (NTAPI *PIO_CSQ_ACQUIRE_LOCK)(
2464 IN struct _IO_CSQ *Csq,
2465 OUT PKIRQL Irql);
2466
2467 typedef VOID
2468 (NTAPI *PIO_CSQ_RELEASE_LOCK)(
2469 IN struct _IO_CSQ *Csq,
2470 IN KIRQL Irql);
2471
2472 typedef VOID
2473 (NTAPI *PIO_CSQ_COMPLETE_CANCELED_IRP)(
2474 IN struct _IO_CSQ *Csq,
2475 IN PIRP Irp);
2476
2477 typedef struct _IO_CSQ {
2478 ULONG Type;
2479 PIO_CSQ_INSERT_IRP CsqInsertIrp;
2480 PIO_CSQ_REMOVE_IRP CsqRemoveIrp;
2481 PIO_CSQ_PEEK_NEXT_IRP CsqPeekNextIrp;
2482 PIO_CSQ_ACQUIRE_LOCK CsqAcquireLock;
2483 PIO_CSQ_RELEASE_LOCK CsqReleaseLock;
2484 PIO_CSQ_COMPLETE_CANCELED_IRP CsqCompleteCanceledIrp;
2485 PVOID ReservePointer;
2486 } IO_CSQ, *PIO_CSQ;
2487
2488 typedef enum _BUS_QUERY_ID_TYPE {
2489 BusQueryDeviceID,
2490 BusQueryHardwareIDs,
2491 BusQueryCompatibleIDs,
2492 BusQueryInstanceID,
2493 BusQueryDeviceSerialNumber
2494 } BUS_QUERY_ID_TYPE, *PBUS_QUERY_ID_TYPE;
2495
2496 typedef enum _DEVICE_TEXT_TYPE {
2497 DeviceTextDescription,
2498 DeviceTextLocationInformation
2499 } DEVICE_TEXT_TYPE, *PDEVICE_TEXT_TYPE;
2500
2501 typedef BOOLEAN
2502 (NTAPI *PGPE_SERVICE_ROUTINE)(
2503 PVOID,
2504 PVOID);
2505
2506 typedef NTSTATUS
2507 (NTAPI *PGPE_CONNECT_VECTOR)(
2508 PDEVICE_OBJECT,
2509 ULONG,
2510 KINTERRUPT_MODE,
2511 BOOLEAN,
2512 PGPE_SERVICE_ROUTINE,
2513 PVOID,
2514 PVOID);
2515
2516 typedef NTSTATUS
2517 (NTAPI *PGPE_DISCONNECT_VECTOR)(
2518 PVOID);
2519
2520 typedef NTSTATUS
2521 (NTAPI *PGPE_ENABLE_EVENT)(
2522 PDEVICE_OBJECT,
2523 PVOID);
2524
2525 typedef NTSTATUS
2526 (NTAPI *PGPE_DISABLE_EVENT)(
2527 PDEVICE_OBJECT,
2528 PVOID);
2529
2530 typedef NTSTATUS
2531 (NTAPI *PGPE_CLEAR_STATUS)(
2532 PDEVICE_OBJECT,
2533 PVOID);
2534
2535 typedef VOID
2536 (NTAPI *PDEVICE_NOTIFY_CALLBACK)(
2537 PVOID,
2538 ULONG);
2539
2540 typedef NTSTATUS
2541 (NTAPI *PREGISTER_FOR_DEVICE_NOTIFICATIONS)(
2542 PDEVICE_OBJECT,
2543 PDEVICE_NOTIFY_CALLBACK,
2544 PVOID);
2545
2546 typedef VOID
2547 (NTAPI *PUNREGISTER_FOR_DEVICE_NOTIFICATIONS)(
2548 PDEVICE_OBJECT,
2549 PDEVICE_NOTIFY_CALLBACK);
2550
2551 typedef struct _ACPI_INTERFACE_STANDARD {
2552 USHORT Size;
2553 USHORT Version;
2554 PVOID Context;
2555 PINTERFACE_REFERENCE InterfaceReference;
2556 PINTERFACE_DEREFERENCE InterfaceDereference;
2557 PGPE_CONNECT_VECTOR GpeConnectVector;
2558 PGPE_DISCONNECT_VECTOR GpeDisconnectVector;
2559 PGPE_ENABLE_EVENT GpeEnableEvent;
2560 PGPE_DISABLE_EVENT GpeDisableEvent;
2561 PGPE_CLEAR_STATUS GpeClearStatus;
2562 PREGISTER_FOR_DEVICE_NOTIFICATIONS RegisterForDeviceNotifications;
2563 PUNREGISTER_FOR_DEVICE_NOTIFICATIONS UnregisterForDeviceNotifications;
2564 } ACPI_INTERFACE_STANDARD, *PACPI_INTERFACE_STANDARD;
2565
2566 typedef BOOLEAN
2567 (NTAPI *PGPE_SERVICE_ROUTINE2)(
2568 PVOID ObjectContext,
2569 PVOID ServiceContext);
2570
2571 typedef NTSTATUS
2572 (NTAPI *PGPE_CONNECT_VECTOR2)(
2573 PVOID Context,
2574 ULONG GpeNumber,
2575 KINTERRUPT_MODE Mode,
2576 BOOLEAN Shareable,
2577 PGPE_SERVICE_ROUTINE ServiceRoutine,
2578 PVOID ServiceContext,
2579 PVOID *ObjectContext);
2580
2581 typedef NTSTATUS
2582 (NTAPI *PGPE_DISCONNECT_VECTOR2)(
2583 PVOID Context,
2584 PVOID ObjectContext);
2585
2586 typedef NTSTATUS
2587 (NTAPI *PGPE_ENABLE_EVENT2)(
2588 PVOID Context,
2589 PVOID ObjectContext);
2590
2591 typedef NTSTATUS
2592 (NTAPI *PGPE_DISABLE_EVENT2)(
2593 PVOID Context,
2594 PVOID ObjectContext);
2595
2596 typedef NTSTATUS
2597 (NTAPI *PGPE_CLEAR_STATUS2)(
2598 PVOID Context,
2599 PVOID ObjectContext);
2600
2601 typedef VOID
2602 (NTAPI *PDEVICE_NOTIFY_CALLBACK2)(
2603 PVOID NotificationContext,
2604 ULONG NotifyCode);
2605
2606 typedef NTSTATUS
2607 (NTAPI *PREGISTER_FOR_DEVICE_NOTIFICATIONS2)(
2608 PVOID Context,
2609 PDEVICE_NOTIFY_CALLBACK2 NotificationHandler,
2610 PVOID NotificationContext);
2611
2612 typedef VOID
2613 (NTAPI *PUNREGISTER_FOR_DEVICE_NOTIFICATIONS2)(
2614 PVOID Context);
2615
2616 typedef struct _ACPI_INTERFACE_STANDARD2 {
2617 USHORT Size;
2618 USHORT Version;
2619 PVOID Context;
2620 PINTERFACE_REFERENCE InterfaceReference;
2621 PINTERFACE_DEREFERENCE InterfaceDereference;
2622 PGPE_CONNECT_VECTOR2 GpeConnectVector;
2623 PGPE_DISCONNECT_VECTOR2 GpeDisconnectVector;
2624 PGPE_ENABLE_EVENT2 GpeEnableEvent;
2625 PGPE_DISABLE_EVENT2 GpeDisableEvent;
2626 PGPE_CLEAR_STATUS2 GpeClearStatus;
2627 PREGISTER_FOR_DEVICE_NOTIFICATIONS2 RegisterForDeviceNotifications;
2628 PUNREGISTER_FOR_DEVICE_NOTIFICATIONS2 UnregisterForDeviceNotifications;
2629 } ACPI_INTERFACE_STANDARD2, *PACPI_INTERFACE_STANDARD2;
2630
2631 #if !defined(_AMD64_) && !defined(_IA64_)
2632 #include <pshpack4.h>
2633 #endif
2634 typedef struct _IO_STACK_LOCATION {
2635 UCHAR MajorFunction;
2636 UCHAR MinorFunction;
2637 UCHAR Flags;
2638 UCHAR Control;
2639 union {
2640 struct {
2641 PIO_SECURITY_CONTEXT SecurityContext;
2642 ULONG Options;
2643 USHORT POINTER_ALIGNMENT FileAttributes;
2644 USHORT ShareAccess;
2645 ULONG POINTER_ALIGNMENT EaLength;
2646 } Create;
2647 struct {
2648 ULONG Length;
2649 ULONG POINTER_ALIGNMENT Key;
2650 LARGE_INTEGER ByteOffset;
2651 } Read;
2652 struct {
2653 ULONG Length;
2654 ULONG POINTER_ALIGNMENT Key;
2655 LARGE_INTEGER ByteOffset;
2656 } Write;
2657 struct {
2658 ULONG Length;
2659 PUNICODE_STRING FileName;
2660 FILE_INFORMATION_CLASS FileInformationClass;
2661 ULONG FileIndex;
2662 } QueryDirectory;
2663 struct {
2664 ULONG Length;
2665 ULONG CompletionFilter;
2666 } NotifyDirectory;
2667 struct {
2668 ULONG Length;
2669 FILE_INFORMATION_CLASS POINTER_ALIGNMENT FileInformationClass;
2670 } QueryFile;
2671 struct {
2672 ULONG Length;
2673 FILE_INFORMATION_CLASS POINTER_ALIGNMENT FileInformationClass;
2674 PFILE_OBJECT FileObject;
2675 _ANONYMOUS_UNION union {
2676 _ANONYMOUS_STRUCT struct {
2677 BOOLEAN ReplaceIfExists;
2678 BOOLEAN AdvanceOnly;
2679 } DUMMYSTRUCTNAME;
2680 ULONG ClusterCount;
2681 HANDLE DeleteHandle;
2682 } DUMMYUNIONNAME;
2683 } SetFile;
2684 struct {
2685 ULONG Length;
2686 PVOID EaList;
2687 ULONG EaListLength;
2688 ULONG EaIndex;
2689 } QueryEa;
2690 struct {
2691 ULONG Length;
2692 } SetEa;
2693 struct {
2694 ULONG Length;
2695 FS_INFORMATION_CLASS POINTER_ALIGNMENT FsInformationClass;
2696 } QueryVolume;
2697 struct {
2698 ULONG Length;
2699 FS_INFORMATION_CLASS FsInformationClass;
2700 } SetVolume;
2701 struct {
2702 ULONG OutputBufferLength;
2703 ULONG InputBufferLength;
2704 ULONG FsControlCode;
2705 PVOID Type3InputBuffer;
2706 } FileSystemControl;
2707 struct {
2708 PLARGE_INTEGER Length;
2709 ULONG Key;
2710 LARGE_INTEGER ByteOffset;
2711 } LockControl;
2712 struct {
2713 ULONG OutputBufferLength;
2714 ULONG POINTER_ALIGNMENT InputBufferLength;
2715 ULONG POINTER_ALIGNMENT IoControlCode;
2716 PVOID Type3InputBuffer;
2717 } DeviceIoControl;
2718 struct {
2719 SECURITY_INFORMATION SecurityInformation;
2720 ULONG POINTER_ALIGNMENT Length;
2721 } QuerySecurity;
2722 struct {
2723 SECURITY_INFORMATION SecurityInformation;
2724 PSECURITY_DESCRIPTOR SecurityDescriptor;
2725 } SetSecurity;
2726 struct {
2727 PVPB Vpb;
2728 PDEVICE_OBJECT DeviceObject;
2729 } MountVolume;
2730 struct {
2731 PVPB Vpb;
2732 PDEVICE_OBJECT DeviceObject;
2733 } VerifyVolume;
2734 struct {
2735 struct _SCSI_REQUEST_BLOCK *Srb;
2736 } Scsi;
2737 struct {
2738 ULONG Length;
2739 PSID StartSid;
2740 struct _FILE_GET_QUOTA_INFORMATION *SidList;
2741 ULONG SidListLength;
2742 } QueryQuota;
2743 struct {
2744 ULONG Length;
2745 } SetQuota;
2746 struct {
2747 DEVICE_RELATION_TYPE Type;
2748 } QueryDeviceRelations;
2749 struct {
2750 CONST GUID *InterfaceType;
2751 USHORT Size;
2752 USHORT Version;
2753 PINTERFACE Interface;
2754 PVOID InterfaceSpecificData;
2755 } QueryInterface;
2756 struct {
2757 PDEVICE_CAPABILITIES Capabilities;
2758 } DeviceCapabilities;
2759 struct {
2760 PIO_RESOURCE_REQUIREMENTS_LIST IoResourceRequirementList;
2761 } FilterResourceRequirements;
2762 struct {
2763 ULONG WhichSpace;
2764 PVOID Buffer;
2765 ULONG Offset;
2766 ULONG POINTER_ALIGNMENT Length;
2767 } ReadWriteConfig;
2768 struct {
2769 BOOLEAN Lock;
2770 } SetLock;
2771 struct {
2772 BUS_QUERY_ID_TYPE IdType;
2773 } QueryId;
2774 struct {
2775 DEVICE_TEXT_TYPE DeviceTextType;
2776 LCID POINTER_ALIGNMENT LocaleId;
2777 } QueryDeviceText;
2778 struct {
2779 BOOLEAN InPath;
2780 BOOLEAN Reserved[3];
2781 DEVICE_USAGE_NOTIFICATION_TYPE POINTER_ALIGNMENT Type;
2782 } UsageNotification;
2783 struct {
2784 SYSTEM_POWER_STATE PowerState;
2785 } WaitWake;
2786 struct {
2787 PPOWER_SEQUENCE PowerSequence;
2788 } PowerSequence;
2789 struct {
2790 ULONG SystemContext;
2791 POWER_STATE_TYPE POINTER_ALIGNMENT Type;
2792 POWER_STATE POINTER_ALIGNMENT State;
2793 POWER_ACTION POINTER_ALIGNMENT ShutdownType;
2794 } Power;
2795 struct {
2796 PCM_RESOURCE_LIST AllocatedResources;
2797 PCM_RESOURCE_LIST AllocatedResourcesTranslated;
2798 } StartDevice;
2799 struct {
2800 ULONG_PTR ProviderId;
2801 PVOID DataPath;
2802 ULONG BufferSize;
2803 PVOID Buffer;
2804 } WMI;
2805 struct {
2806 PVOID Argument1;
2807 PVOID Argument2;
2808 PVOID Argument3;
2809 PVOID Argument4;
2810 } Others;
2811 } Parameters;
2812 PDEVICE_OBJECT DeviceObject;
2813 PFILE_OBJECT FileObject;
2814 PIO_COMPLETION_ROUTINE CompletionRoutine;
2815 PVOID Context;
2816 } IO_STACK_LOCATION, *PIO_STACK_LOCATION;
2817 #if !defined(_AMD64_) && !defined(_IA64_)
2818 #include <poppack.h>
2819 #endif
2820
2821 /* IO_STACK_LOCATION.Control */
2822
2823 #define SL_PENDING_RETURNED 0x01
2824 #define SL_ERROR_RETURNED 0x02
2825 #define SL_INVOKE_ON_CANCEL 0x20
2826 #define SL_INVOKE_ON_SUCCESS 0x40
2827 #define SL_INVOKE_ON_ERROR 0x80
2828
2829 #define METHOD_BUFFERED 0
2830 #define METHOD_IN_DIRECT 1
2831 #define METHOD_OUT_DIRECT 2
2832 #define METHOD_NEITHER 3
2833
2834 #define METHOD_DIRECT_TO_HARDWARE METHOD_IN_DIRECT
2835 #define METHOD_DIRECT_FROM_HARDWARE METHOD_OUT_DIRECT
2836
2837 #define FILE_SUPERSEDED 0x00000000
2838 #define FILE_OPENED 0x00000001
2839 #define FILE_CREATED 0x00000002
2840 #define FILE_OVERWRITTEN 0x00000003
2841 #define FILE_EXISTS 0x00000004
2842 #define FILE_DOES_NOT_EXIST 0x00000005
2843
2844 #define FILE_USE_FILE_POINTER_POSITION 0xfffffffe
2845 #define FILE_WRITE_TO_END_OF_FILE 0xffffffff
2846
2847 /* also in winnt.h */
2848 #define FILE_LIST_DIRECTORY 0x00000001
2849 #define FILE_READ_DATA 0x00000001
2850 #define FILE_ADD_FILE 0x00000002
2851 #define FILE_WRITE_DATA 0x00000002
2852 #define FILE_ADD_SUBDIRECTORY 0x00000004
2853 #define FILE_APPEND_DATA 0x00000004
2854 #define FILE_CREATE_PIPE_INSTANCE 0x00000004
2855 #define FILE_READ_EA 0x00000008
2856 #define FILE_WRITE_EA 0x00000010
2857 #define FILE_EXECUTE 0x00000020
2858 #define FILE_TRAVERSE 0x00000020
2859 #define FILE_DELETE_CHILD 0x00000040
2860 #define FILE_READ_ATTRIBUTES 0x00000080
2861 #define FILE_WRITE_ATTRIBUTES 0x00000100
2862
2863 #define FILE_SHARE_READ 0x00000001
2864 #define FILE_SHARE_WRITE 0x00000002
2865 #define FILE_SHARE_DELETE 0x00000004
2866 #define FILE_SHARE_VALID_FLAGS 0x00000007
2867
2868 #define FILE_ATTRIBUTE_READONLY 0x00000001
2869 #define FILE_ATTRIBUTE_HIDDEN 0x00000002
2870 #define FILE_ATTRIBUTE_SYSTEM 0x00000004
2871 #define FILE_ATTRIBUTE_DIRECTORY 0x00000010
2872 #define FILE_ATTRIBUTE_ARCHIVE 0x00000020
2873 #define FILE_ATTRIBUTE_DEVICE 0x00000040
2874 #define FILE_ATTRIBUTE_NORMAL 0x00000080
2875 #define FILE_ATTRIBUTE_TEMPORARY 0x00000100
2876 #define FILE_ATTRIBUTE_SPARSE_FILE 0x00000200
2877 #define FILE_ATTRIBUTE_REPARSE_POINT 0x00000400
2878 #define FILE_ATTRIBUTE_COMPRESSED 0x00000800
2879 #define FILE_ATTRIBUTE_OFFLINE 0x00001000
2880 #define FILE_ATTRIBUTE_NOT_CONTENT_INDEXED 0x00002000
2881 #define FILE_ATTRIBUTE_ENCRYPTED 0x00004000
2882 #define FILE_ATTRIBUTE_VIRTUAL 0x00010000
2883
2884 #define FILE_ATTRIBUTE_VALID_FLAGS 0x00007fb7
2885 #define FILE_ATTRIBUTE_VALID_SET_FLAGS 0x000031a7
2886
2887 #define FILE_VALID_OPTION_FLAGS 0x00ffffff
2888 #define FILE_VALID_PIPE_OPTION_FLAGS 0x00000032
2889 #define FILE_VALID_MAILSLOT_OPTION_FLAGS 0x00000032
2890 #define FILE_VALID_SET_FLAGS 0x00000036
2891
2892 #define FILE_SUPERSEDE 0x00000000
2893 #define FILE_OPEN 0x00000001
2894 #define FILE_CREATE 0x00000002
2895 #define FILE_OPEN_IF 0x00000003
2896 #define FILE_OVERWRITE 0x00000004
2897 #define FILE_OVERWRITE_IF 0x00000005
2898 #define FILE_MAXIMUM_DISPOSITION 0x00000005
2899
2900 #define FILE_DIRECTORY_FILE 0x00000001
2901 #define FILE_WRITE_THROUGH 0x00000002
2902 #define FILE_SEQUENTIAL_ONLY 0x00000004
2903 #define FILE_NO_INTERMEDIATE_BUFFERING 0x00000008
2904 #define FILE_SYNCHRONOUS_IO_ALERT 0x00000010
2905 #define FILE_SYNCHRONOUS_IO_NONALERT 0x00000020
2906 #define FILE_NON_DIRECTORY_FILE 0x00000040
2907 #define FILE_CREATE_TREE_CONNECTION 0x00000080
2908 #define FILE_COMPLETE_IF_OPLOCKED 0x00000100
2909 #define FILE_NO_EA_KNOWLEDGE 0x00000200
2910 #define FILE_OPEN_REMOTE_INSTANCE 0x00000400
2911 #define FILE_RANDOM_ACCESS 0x00000800
2912 #define FILE_DELETE_ON_CLOSE 0x00001000
2913 #define FILE_OPEN_BY_FILE_ID 0x00002000
2914 #define FILE_OPEN_FOR_BACKUP_INTENT 0x00004000
2915 #define FILE_NO_COMPRESSION 0x00008000
2916 #if (NTDDI_VERSION >= NTDDI_WIN7)
2917 #define FILE_OPEN_REQUIRING_OPLOCK 0x00010000
2918 #define FILE_DISALLOW_EXCLUSIVE 0x00020000
2919 #endif /* (NTDDI_VERSION >= NTDDI_WIN7) */
2920 #define FILE_RESERVE_OPFILTER 0x00100000
2921 #define FILE_OPEN_REPARSE_POINT 0x00200000
2922 #define FILE_OPEN_NO_RECALL 0x00400000
2923 #define FILE_OPEN_FOR_FREE_SPACE_QUERY 0x00800000
2924
2925 #define FILE_ANY_ACCESS 0x00000000
2926 #define FILE_SPECIAL_ACCESS FILE_ANY_ACCESS
2927 #define FILE_READ_ACCESS 0x00000001
2928 #define FILE_WRITE_ACCESS 0x00000002
2929
2930 #define FILE_ALL_ACCESS \
2931 (STANDARD_RIGHTS_REQUIRED | \
2932 SYNCHRONIZE | \
2933 0x1FF)
2934
2935 #define FILE_GENERIC_EXECUTE \
2936 (STANDARD_RIGHTS_EXECUTE | \
2937 FILE_READ_ATTRIBUTES | \
2938 FILE_EXECUTE | \
2939 SYNCHRONIZE)
2940
2941 #define FILE_GENERIC_READ \
2942 (STANDARD_RIGHTS_READ | \
2943 FILE_READ_DATA | \
2944 FILE_READ_ATTRIBUTES | \
2945 FILE_READ_EA | \
2946 SYNCHRONIZE)
2947
2948 #define FILE_GENERIC_WRITE \
2949 (STANDARD_RIGHTS_WRITE | \
2950 FILE_WRITE_DATA | \
2951 FILE_WRITE_ATTRIBUTES | \
2952 FILE_WRITE_EA | \
2953 FILE_APPEND_DATA | \
2954 SYNCHRONIZE)
2955
2956 /* end winnt.h */
2957
2958 #define WMIREG_ACTION_REGISTER 1
2959 #define WMIREG_ACTION_DEREGISTER 2
2960 #define WMIREG_ACTION_REREGISTER 3
2961 #define WMIREG_ACTION_UPDATE_GUIDS 4
2962 #define WMIREG_ACTION_BLOCK_IRPS 5
2963
2964 #define WMIREGISTER 0
2965 #define WMIUPDATE 1
2966
2967 typedef VOID
2968 (NTAPI FWMI_NOTIFICATION_CALLBACK)(
2969 PVOID Wnode,
2970 PVOID Context);
2971 typedef FWMI_NOTIFICATION_CALLBACK *WMI_NOTIFICATION_CALLBACK;
2972
2973 #ifndef _PCI_X_
2974 #define _PCI_X_
2975
2976 typedef struct _PCI_SLOT_NUMBER {
2977 union {
2978 struct {
2979 ULONG DeviceNumber:5;
2980 ULONG FunctionNumber:3;
2981 ULONG Reserved:24;
2982 } bits;
2983 ULONG AsULONG;
2984 } u;
2985 } PCI_SLOT_NUMBER, *PPCI_SLOT_NUMBER;
2986
2987 #define PCI_TYPE0_ADDRESSES 6
2988 #define PCI_TYPE1_ADDRESSES 2
2989 #define PCI_TYPE2_ADDRESSES 5
2990
2991 typedef struct _PCI_COMMON_HEADER {
2992 PCI_COMMON_HEADER_LAYOUT
2993 } PCI_COMMON_HEADER, *PPCI_COMMON_HEADER;
2994
2995 #ifdef __cplusplus
2996 typedef struct _PCI_COMMON_CONFIG {
2997 PCI_COMMON_HEADER_LAYOUT
2998 UCHAR DeviceSpecific[192];
2999 } PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;
3000 #else
3001 typedef struct _PCI_COMMON_CONFIG {
3002 PCI_COMMON_HEADER DUMMYSTRUCTNAME;
3003 UCHAR DeviceSpecific[192];
3004 } PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;
3005 #endif
3006
3007 #define PCI_COMMON_HDR_LENGTH (FIELD_OFFSET(PCI_COMMON_CONFIG, DeviceSpecific))
3008
3009 #define PCI_EXTENDED_CONFIG_LENGTH 0x1000
3010
3011 #define PCI_MAX_DEVICES 32
3012 #define PCI_MAX_FUNCTION 8
3013 #define PCI_MAX_BRIDGE_NUMBER 0xFF
3014 #define PCI_INVALID_VENDORID 0xFFFF
3015
3016 /* PCI_COMMON_CONFIG.HeaderType */
3017 #define PCI_MULTIFUNCTION 0x80
3018 #define PCI_DEVICE_TYPE 0x00
3019 #define PCI_BRIDGE_TYPE 0x01
3020 #define PCI_CARDBUS_BRIDGE_TYPE 0x02
3021
3022 #define PCI_CONFIGURATION_TYPE(PciData) \
3023 (((PPCI_COMMON_CONFIG) (PciData))->HeaderType & ~PCI_MULTIFUNCTION)
3024
3025 #define PCI_MULTIFUNCTION_DEVICE(PciData) \
3026 ((((PPCI_COMMON_CONFIG) (PciData))->HeaderType & PCI_MULTIFUNCTION) != 0)
3027
3028 /* PCI_COMMON_CONFIG.Command */
3029 #define PCI_ENABLE_IO_SPACE 0x0001
3030 #define PCI_ENABLE_MEMORY_SPACE 0x0002
3031 #define PCI_ENABLE_BUS_MASTER 0x0004
3032 #define PCI_ENABLE_SPECIAL_CYCLES 0x0008
3033 #define PCI_ENABLE_WRITE_AND_INVALIDATE 0x0010
3034 #define PCI_ENABLE_VGA_COMPATIBLE_PALETTE 0x0020
3035 #define PCI_ENABLE_PARITY 0x0040
3036 #define PCI_ENABLE_WAIT_CYCLE 0x0080
3037 #define PCI_ENABLE_SERR 0x0100
3038 #define PCI_ENABLE_FAST_BACK_TO_BACK 0x0200
3039 #define PCI_DISABLE_LEVEL_INTERRUPT 0x0400
3040
3041 /* PCI_COMMON_CONFIG.Status */
3042 #define PCI_STATUS_INTERRUPT_PENDING 0x0008
3043 #define PCI_STATUS_CAPABILITIES_LIST 0x0010
3044 #define PCI_STATUS_66MHZ_CAPABLE 0x0020
3045 #define PCI_STATUS_UDF_SUPPORTED 0x0040
3046 #define PCI_STATUS_FAST_BACK_TO_BACK 0x0080
3047 #define PCI_STATUS_DATA_PARITY_DETECTED 0x0100
3048 #define PCI_STATUS_DEVSEL 0x0600
3049 #define PCI_STATUS_SIGNALED_TARGET_ABORT 0x0800
3050 #define PCI_STATUS_RECEIVED_TARGET_ABORT 0x1000
3051 #define PCI_STATUS_RECEIVED_MASTER_ABORT 0x2000
3052 #define PCI_STATUS_SIGNALED_SYSTEM_ERROR 0x4000
3053 #define PCI_STATUS_DETECTED_PARITY_ERROR 0x8000
3054
3055 /* IO_STACK_LOCATION.Parameters.ReadWriteControl.WhichSpace */
3056
3057 #define PCI_WHICHSPACE_CONFIG 0x0
3058 #define PCI_WHICHSPACE_ROM 0x52696350 /* 'PciR' */
3059
3060 #define PCI_CAPABILITY_ID_POWER_MANAGEMENT 0x01
3061 #define PCI_CAPABILITY_ID_AGP 0x02
3062 #define PCI_CAPABILITY_ID_VPD 0x03
3063 #define PCI_CAPABILITY_ID_SLOT_ID 0x04
3064 #define PCI_CAPABILITY_ID_MSI 0x05
3065 #define PCI_CAPABILITY_ID_CPCI_HOTSWAP 0x06
3066 #define PCI_CAPABILITY_ID_PCIX 0x07
3067 #define PCI_CAPABILITY_ID_HYPERTRANSPORT 0x08
3068 #define PCI_CAPABILITY_ID_VENDOR_SPECIFIC 0x09
3069 #define PCI_CAPABILITY_ID_DEBUG_PORT 0x0A
3070 #define PCI_CAPABILITY_ID_CPCI_RES_CTRL 0x0B
3071 #define PCI_CAPABILITY_ID_SHPC 0x0C
3072 #define PCI_CAPABILITY_ID_P2P_SSID 0x0D
3073 #define PCI_CAPABILITY_ID_AGP_TARGET 0x0E
3074 #define PCI_CAPABILITY_ID_SECURE 0x0F
3075 #define PCI_CAPABILITY_ID_PCI_EXPRESS 0x10
3076 #define PCI_CAPABILITY_ID_MSIX 0x11
3077
3078 typedef struct _PCI_CAPABILITIES_HEADER {
3079 UCHAR CapabilityID;
3080 UCHAR Next;
3081 } PCI_CAPABILITIES_HEADER, *PPCI_CAPABILITIES_HEADER;
3082
3083 typedef struct _PCI_PMC {
3084 UCHAR Version:3;
3085 UCHAR PMEClock:1;
3086 UCHAR Rsvd1:1;
3087 UCHAR DeviceSpecificInitialization:1;
3088 UCHAR Rsvd2:2;
3089 struct _PM_SUPPORT {
3090 UCHAR Rsvd2:1;
3091 UCHAR D1:1;
3092 UCHAR D2:1;
3093 UCHAR PMED0:1;
3094 UCHAR PMED1:1;
3095 UCHAR PMED2:1;
3096 UCHAR PMED3Hot:1;
3097 UCHAR PMED3Cold:1;
3098 } Support;
3099 } PCI_PMC, *PPCI_PMC;
3100
3101 typedef struct _PCI_PMCSR {
3102 USHORT PowerState:2;
3103 USHORT Rsvd1:6;
3104 USHORT PMEEnable:1;
3105 USHORT DataSelect:4;
3106 USHORT DataScale:2;
3107 USHORT PMEStatus:1;
3108 } PCI_PMCSR, *PPCI_PMCSR;
3109
3110 typedef struct _PCI_PMCSR_BSE {
3111 UCHAR Rsvd1:6;
3112 UCHAR D3HotSupportsStopClock:1;
3113 UCHAR BusPowerClockControlEnabled:1;
3114 } PCI_PMCSR_BSE, *PPCI_PMCSR_BSE;
3115
3116 typedef struct _PCI_PM_CAPABILITY {
3117 PCI_CAPABILITIES_HEADER Header;
3118 union {
3119 PCI_PMC Capabilities;
3120 USHORT AsUSHORT;
3121 } PMC;
3122 union {
3123 PCI_PMCSR ControlStatus;
3124 USHORT AsUSHORT;
3125 } PMCSR;
3126 union {
3127 PCI_PMCSR_BSE BridgeSupport;
3128 UCHAR AsUCHAR;
3129 } PMCSR_BSE;
3130 UCHAR Data;
3131 } PCI_PM_CAPABILITY, *PPCI_PM_CAPABILITY;
3132
3133 typedef struct {
3134 PCI_CAPABILITIES_HEADER Header;
3135 union {
3136 struct {
3137 USHORT DataParityErrorRecoveryEnable:1;
3138 USHORT EnableRelaxedOrdering:1;
3139 USHORT MaxMemoryReadByteCount:2;
3140 USHORT MaxOutstandingSplitTransactions:3;
3141 USHORT Reserved:9;
3142 } bits;
3143 USHORT AsUSHORT;
3144 } Command;
3145 union {
3146 struct {
3147 ULONG FunctionNumber:3;
3148 ULONG DeviceNumber:5;
3149 ULONG BusNumber:8;
3150 ULONG Device64Bit:1;
3151 ULONG Capable133MHz:1;
3152 ULONG SplitCompletionDiscarded:1;
3153 ULONG UnexpectedSplitCompletion:1;
3154 ULONG DeviceComplexity:1;
3155 ULONG DesignedMaxMemoryReadByteCount:2;
3156 ULONG DesignedMaxOutstandingSplitTransactions:3;
3157 ULONG DesignedMaxCumulativeReadSize:3;
3158 ULONG ReceivedSplitCompletionErrorMessage:1;
3159 ULONG CapablePCIX266:1;
3160 ULONG CapablePCIX533:1;
3161 } bits;
3162 ULONG AsULONG;
3163 } Status;
3164 } PCI_X_CAPABILITY, *PPCI_X_CAPABILITY;
3165
3166 #define PCI_EXPRESS_ADVANCED_ERROR_REPORTING_CAP_ID 0x0001
3167 #define PCI_EXPRESS_VIRTUAL_CHANNEL_CAP_ID 0x0002
3168 #define PCI_EXPRESS_DEVICE_SERIAL_NUMBER_CAP_ID 0x0003
3169 #define PCI_EXPRESS_POWER_BUDGETING_CAP_ID 0x0004
3170 #define PCI_EXPRESS_RC_LINK_DECLARATION_CAP_ID 0x0005
3171 #define PCI_EXPRESS_RC_INTERNAL_LINK_CONTROL_CAP_ID 0x0006
3172 #define PCI_EXPRESS_RC_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION_CAP_ID 0x0007
3173 #define PCI_EXPRESS_MFVC_CAP_ID 0x0008
3174 #define PCI_EXPRESS_VC_AND_MFVC_CAP_ID 0x0009
3175 #define PCI_EXPRESS_RCRB_HEADER_CAP_ID 0x000A
3176 #define PCI_EXPRESS_SINGLE_ROOT_IO_VIRTUALIZATION_CAP_ID 0x0010
3177
3178 typedef struct _PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER {
3179 USHORT CapabilityID;
3180 USHORT Version:4;
3181 USHORT Next:12;
3182 } PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER, *PPCI_EXPRESS_ENHANCED_CAPABILITY_HEADER;
3183
3184 typedef struct _PCI_EXPRESS_SERIAL_NUMBER_CAPABILITY {
3185 PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER Header;
3186 ULONG LowSerialNumber;
3187 ULONG HighSerialNumber;
3188 } PCI_EXPRESS_SERIAL_NUMBER_CAPABILITY, *PPCI_EXPRESS_SERIAL_NUMBER_CAPABILITY;
3189
3190 typedef union _PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS {
3191 struct {
3192 ULONG Undefined:1;
3193 ULONG Reserved1:3;
3194 ULONG DataLinkProtocolError:1;
3195 ULONG SurpriseDownError:1;
3196 ULONG Reserved2:6;
3197 ULONG PoisonedTLP:1;
3198 ULONG FlowControlProtocolError:1;
3199 ULONG CompletionTimeout:1;
3200 ULONG CompleterAbort:1;
3201 ULONG UnexpectedCompletion:1;
3202 ULONG ReceiverOverflow:1;
3203 ULONG MalformedTLP:1;
3204 ULONG ECRCError:1;
3205 ULONG UnsupportedRequestError:1;
3206 ULONG Reserved3:11;
3207 } DUMMYSTRUCTNAME;
3208 ULONG AsULONG;
3209 } PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS, *PPCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS;
3210
3211 typedef union _PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK {
3212 struct {
3213 ULONG Undefined:1;
3214 ULONG Reserved1:3;
3215 ULONG DataLinkProtocolError:1;
3216 ULONG SurpriseDownError:1;
3217 ULONG Reserved2:6;
3218 ULONG PoisonedTLP:1;
3219 ULONG FlowControlProtocolError:1;
3220 ULONG CompletionTimeout:1;
3221 ULONG CompleterAbort:1;
3222 ULONG UnexpectedCompletion:1;
3223 ULONG ReceiverOverflow:1;
3224 ULONG MalformedTLP:1;
3225 ULONG ECRCError:1;
3226 ULONG UnsupportedRequestError:1;
3227 ULONG Reserved3:11;
3228 } DUMMYSTRUCTNAME;
3229 ULONG AsULONG;
3230 } PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK, *PPCI_EXPRESS_UNCORRECTABLE_ERROR_MASK;
3231
3232 typedef union _PCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY {
3233 struct {
3234 ULONG Undefined:1;
3235 ULONG Reserved1:3;
3236 ULONG DataLinkProtocolError:1;
3237 ULONG SurpriseDownError:1;
3238 ULONG Reserved2:6;
3239 ULONG PoisonedTLP:1;
3240 ULONG FlowControlProtocolError:1;
3241 ULONG CompletionTimeout:1;
3242 ULONG CompleterAbort:1;
3243 ULONG UnexpectedCompletion:1;
3244 ULONG ReceiverOverflow:1;
3245 ULONG MalformedTLP:1;
3246 ULONG ECRCError:1;
3247 ULONG UnsupportedRequestError:1;
3248 ULONG Reserved3:11;
3249 } DUMMYSTRUCTNAME;
3250 ULONG AsULONG;
3251 } PCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY, *PPCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY;
3252
3253 typedef union _PCI_EXPRESS_CORRECTABLE_ERROR_STATUS {
3254 struct {
3255 ULONG ReceiverError:1;
3256 ULONG Reserved1:5;
3257 ULONG BadTLP:1;
3258 ULONG BadDLLP:1;
3259 ULONG ReplayNumRollover:1;
3260 ULONG Reserved2:3;
3261 ULONG ReplayTimerTimeout:1;
3262 ULONG AdvisoryNonFatalError:1;
3263 ULONG Reserved3:18;
3264 } DUMMYSTRUCTNAME;
3265 ULONG AsULONG;
3266 } PCI_EXPRESS_CORRECTABLE_ERROR_STATUS, *PPCI_CORRECTABLE_ERROR_STATUS;
3267
3268 typedef union _PCI_EXPRESS_CORRECTABLE_ERROR_MASK {
3269 struct {
3270 ULONG ReceiverError:1;
3271 ULONG Reserved1:5;
3272 ULONG BadTLP:1;
3273 ULONG BadDLLP:1;
3274 ULONG ReplayNumRollover:1;
3275 ULONG Reserved2:3;
3276 ULONG ReplayTimerTimeout:1;
3277 ULONG AdvisoryNonFatalError:1;
3278 ULONG Reserved3:18;
3279 } DUMMYSTRUCTNAME;
3280 ULONG AsULONG;
3281 } PCI_EXPRESS_CORRECTABLE_ERROR_MASK, *PPCI_CORRECTABLE_ERROR_MASK;
3282
3283 typedef union _PCI_EXPRESS_AER_CAPABILITIES {
3284 struct {
3285 ULONG FirstErrorPointer:5;
3286 ULONG ECRCGenerationCapable:1;
3287 ULONG ECRCGenerationEnable:1;
3288 ULONG ECRCCheckCapable:1;
3289 ULONG ECRCCheckEnable:1;
3290 ULONG Reserved:23;
3291 } DUMMYSTRUCTNAME;
3292 ULONG AsULONG;
3293 } PCI_EXPRESS_AER_CAPABILITIES, *PPCI_EXPRESS_AER_CAPABILITIES;
3294
3295 typedef union _PCI_EXPRESS_ROOT_ERROR_COMMAND {
3296 struct {
3297 ULONG CorrectableErrorReportingEnable:1;
3298 ULONG NonFatalErrorReportingEnable:1;
3299 ULONG FatalErrorReportingEnable:1;
3300 ULONG Reserved:29;
3301 } DUMMYSTRUCTNAME;
3302 ULONG AsULONG;
3303 } PCI_EXPRESS_ROOT_ERROR_COMMAND, *PPCI_EXPRESS_ROOT_ERROR_COMMAND;
3304
3305 typedef union _PCI_EXPRESS_ROOT_ERROR_STATUS {
3306 struct {
3307 ULONG CorrectableErrorReceived:1;
3308 ULONG MultipleCorrectableErrorsReceived:1;
3309 ULONG UncorrectableErrorReceived:1;
3310 ULONG MultipleUncorrectableErrorsReceived:1;
3311 ULONG FirstUncorrectableFatal:1;
3312 ULONG NonFatalErrorMessagesReceived:1;
3313 ULONG FatalErrorMessagesReceived:1;
3314 ULONG Reserved:20;
3315 ULONG AdvancedErrorInterruptMessageNumber:5;
3316 } DUMMYSTRUCTNAME;
3317 ULONG AsULONG;
3318 } PCI_EXPRESS_ROOT_ERROR_STATUS, *PPCI_EXPRESS_ROOT_ERROR_STATUS;
3319
3320 typedef union _PCI_EXPRESS_ERROR_SOURCE_ID {
3321 struct {
3322 USHORT CorrectableSourceIdFun:3;
3323 USHORT CorrectableSourceIdDev:5;
3324 USHORT CorrectableSourceIdBus:8;
3325 USHORT UncorrectableSourceIdFun:3;
3326 USHORT UncorrectableSourceIdDev:5;
3327 USHORT UncorrectableSourceIdBus:8;
3328 } DUMMYSTRUCTNAME;
3329 ULONG AsULONG;
3330 } PCI_EXPRESS_ERROR_SOURCE_ID, *PPCI_EXPRESS_ERROR_SOURCE_ID;
3331
3332 typedef union _PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_STATUS {
3333 struct {
3334 ULONG TargetAbortOnSplitCompletion:1;
3335 ULONG MasterAbortOnSplitCompletion:1;
3336 ULONG ReceivedTargetAbort:1;
3337 ULONG ReceivedMasterAbort:1;
3338 ULONG RsvdZ:1;
3339 ULONG UnexpectedSplitCompletionError:1;
3340 ULONG UncorrectableSplitCompletion:1;
3341 ULONG UncorrectableDataError:1;
3342 ULONG UncorrectableAttributeError:1;
3343 ULONG UncorrectableAddressError:1;
3344 ULONG DelayedTransactionDiscardTimerExpired:1;
3345 ULONG PERRAsserted:1;
3346 ULONG SERRAsserted:1;
3347 ULONG InternalBridgeError:1;
3348 ULONG Reserved:18;
3349 } DUMMYSTRUCTNAME;
3350 ULONG AsULONG;
3351 } PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_STATUS, *PPCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_STATUS;
3352
3353 typedef union _PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_MASK {
3354 struct {
3355 ULONG TargetAbortOnSplitCompletion:1;
3356 ULONG MasterAbortOnSplitCompletion:1;
3357 ULONG ReceivedTargetAbort:1;
3358 ULONG ReceivedMasterAbort:1;
3359 ULONG RsvdZ:1;
3360 ULONG UnexpectedSplitCompletionError:1;
3361 ULONG UncorrectableSplitCompletion:1;
3362 ULONG UncorrectableDataError:1;
3363 ULONG UncorrectableAttributeError:1;
3364 ULONG UncorrectableAddressError:1;
3365 ULONG DelayedTransactionDiscardTimerExpired:1;
3366 ULONG PERRAsserted:1;
3367 ULONG SERRAsserted:1;
3368 ULONG InternalBridgeError:1;
3369 ULONG Reserved:18;
3370 } DUMMYSTRUCTNAME;
3371 ULONG AsULONG;
3372 } PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_MASK, *PPCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_MASK;
3373
3374 typedef union _PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_SEVERITY {
3375 struct {
3376 ULONG TargetAbortOnSplitCompletion:1;
3377 ULONG MasterAbortOnSplitCompletion:1;
3378 ULONG ReceivedTargetAbort:1;
3379 ULONG ReceivedMasterAbort:1;
3380 ULONG RsvdZ:1;
3381 ULONG UnexpectedSplitCompletionError:1;
3382 ULONG UncorrectableSplitCompletion:1;
3383 ULONG UncorrectableDataError:1;
3384 ULONG UncorrectableAttributeError:1;
3385 ULONG UncorrectableAddressError:1;
3386 ULONG DelayedTransactionDiscardTimerExpired:1;
3387 ULONG PERRAsserted:1;
3388 ULONG SERRAsserted:1;
3389 ULONG InternalBridgeError:1;
3390 ULONG Reserved:18;
3391 } DUMMYSTRUCTNAME;
3392 ULONG AsULONG;
3393 } PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_SEVERITY, *PPCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_SEVERITY;
3394
3395 typedef union _PCI_EXPRESS_SEC_AER_CAPABILITIES {
3396 struct {
3397 ULONG SecondaryUncorrectableFirstErrorPtr:5;
3398 ULONG Reserved:27;
3399 } DUMMYSTRUCTNAME;
3400 ULONG AsULONG;
3401 } PCI_EXPRESS_SEC_AER_CAPABILITIES, *PPCI_EXPRESS_SEC_AER_CAPABILITIES;
3402
3403 #define ROOT_CMD_ENABLE_CORRECTABLE_ERROR_REPORTING 0x00000001
3404 #define ROOT_CMD_ENABLE_NONFATAL_ERROR_REPORTING 0x00000002
3405 #define ROOT_CMD_ENABLE_FATAL_ERROR_REPORTING 0x00000004
3406
3407 #define ROOT_CMD_ERROR_REPORTING_ENABLE_MASK \
3408 (ROOT_CMD_ENABLE_FATAL_ERROR_REPORTING | \
3409 ROOT_CMD_ENABLE_NONFATAL_ERROR_REPORTING | \
3410 ROOT_CMD_ENABLE_CORRECTABLE_ERROR_REPORTING)
3411
3412 typedef struct _PCI_EXPRESS_AER_CAPABILITY {
3413 PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER Header;
3414 PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS UncorrectableErrorStatus;
3415 PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK UncorrectableErrorMask;
3416 PCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY UncorrectableErrorSeverity;
3417 PCI_EXPRESS_CORRECTABLE_ERROR_STATUS CorrectableErrorStatus;
3418 PCI_EXPRESS_CORRECTABLE_ERROR_MASK CorrectableErrorMask;
3419 PCI_EXPRESS_AER_CAPABILITIES CapabilitiesAndControl;
3420 ULONG HeaderLog[4];
3421 PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_STATUS SecUncorrectableErrorStatus;
3422 PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_MASK SecUncorrectableErrorMask;
3423 PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_SEVERITY SecUncorrectableErrorSeverity;
3424 PCI_EXPRESS_SEC_AER_CAPABILITIES SecCapabilitiesAndControl;
3425 ULONG SecHeaderLog[4];
3426 } PCI_EXPRESS_AER_CAPABILITY, *PPCI_EXPRESS_AER_CAPABILITY;
3427
3428 typedef struct _PCI_EXPRESS_ROOTPORT_AER_CAPABILITY {
3429 PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER Header;
3430 PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS UncorrectableErrorStatus;
3431 PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK UncorrectableErrorMask;
3432 PCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY UncorrectableErrorSeverity;
3433 PCI_EXPRESS_CORRECTABLE_ERROR_STATUS CorrectableErrorStatus;
3434 PCI_EXPRESS_CORRECTABLE_ERROR_MASK CorrectableErrorMask;
3435 PCI_EXPRESS_AER_CAPABILITIES CapabilitiesAndControl;
3436 ULONG HeaderLog[4];
3437 PCI_EXPRESS_ROOT_ERROR_COMMAND RootErrorCommand;
3438 PCI_EXPRESS_ROOT_ERROR_STATUS RootErrorStatus;
3439 PCI_EXPRESS_ERROR_SOURCE_ID ErrorSourceId;
3440 } PCI_EXPRESS_ROOTPORT_AER_CAPABILITY, *PPCI_EXPRESS_ROOTPORT_AER_CAPABILITY;
3441
3442 typedef struct _PCI_EXPRESS_BRIDGE_AER_CAPABILITY {
3443 PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER Header;
3444 PCI_EXPRESS_UNCORRECTABLE_ERROR_STATUS UncorrectableErrorStatus;
3445 PCI_EXPRESS_UNCORRECTABLE_ERROR_MASK UncorrectableErrorMask;
3446 PCI_EXPRESS_UNCORRECTABLE_ERROR_SEVERITY UncorrectableErrorSeverity;
3447 PCI_EXPRESS_CORRECTABLE_ERROR_STATUS CorrectableErrorStatus;
3448 PCI_EXPRESS_CORRECTABLE_ERROR_MASK CorrectableErrorMask;
3449 PCI_EXPRESS_AER_CAPABILITIES CapabilitiesAndControl;
3450 ULONG HeaderLog[4];
3451 PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_STATUS SecUncorrectableErrorStatus;
3452 PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_MASK SecUncorrectableErrorMask;
3453 PCI_EXPRESS_SEC_UNCORRECTABLE_ERROR_SEVERITY SecUncorrectableErrorSeverity;
3454 PCI_EXPRESS_SEC_AER_CAPABILITIES SecCapabilitiesAndControl;
3455 ULONG SecHeaderLog[4];
3456 } PCI_EXPRESS_BRIDGE_AER_CAPABILITY, *PPCI_EXPRESS_BRIDGE_AER_CAPABILITY;
3457
3458 typedef union _PCI_EXPRESS_SRIOV_CAPS {
3459 struct {
3460 ULONG VFMigrationCapable:1;
3461 ULONG Reserved1:20;
3462 ULONG VFMigrationInterruptNumber:11;
3463 } DUMMYSTRUCTNAME;
3464 ULONG AsULONG;
3465 } PCI_EXPRESS_SRIOV_CAPS, *PPCI_EXPRESS_SRIOV_CAPS;
3466
3467 typedef union _PCI_EXPRESS_SRIOV_CONTROL {
3468 struct {
3469 USHORT VFEnable:1;
3470 USHORT VFMigrationEnable:1;
3471 USHORT VFMigrationInterruptEnable:1;
3472 USHORT VFMemorySpaceEnable:1;
3473 USHORT ARICapableHierarchy:1;
3474 USHORT Reserved1:11;
3475 } DUMMYSTRUCTNAME;
3476 USHORT AsUSHORT;
3477 } PCI_EXPRESS_SRIOV_CONTROL, *PPCI_EXPRESS_SRIOV_CONTROL;
3478
3479 typedef union _PCI_EXPRESS_SRIOV_STATUS {
3480 struct {
3481 USHORT VFMigrationStatus:1;
3482 USHORT Reserved1:15;
3483 } DUMMYSTRUCTNAME;
3484 USHORT AsUSHORT;
3485 } PCI_EXPRESS_SRIOV_STATUS, *PPCI_EXPRESS_SRIOV_STATUS;
3486
3487 typedef union _PCI_EXPRESS_SRIOV_MIGRATION_STATE_ARRAY {
3488 struct {
3489 ULONG VFMigrationStateBIR:3;
3490 ULONG VFMigrationStateOffset:29;
3491 } DUMMYSTRUCTNAME;
3492 ULONG AsULONG;
3493 } PCI_EXPRESS_SRIOV_MIGRATION_STATE_ARRAY, *PPCI_EXPRESS_SRIOV_MIGRATION_STATE_ARRAY;
3494
3495 typedef struct _PCI_EXPRESS_SRIOV_CAPABILITY {
3496 PCI_EXPRESS_ENHANCED_CAPABILITY_HEADER Header;
3497 PCI_EXPRESS_SRIOV_CAPS SRIOVCapabilities;
3498 PCI_EXPRESS_SRIOV_CONTROL SRIOVControl;
3499 PCI_EXPRESS_SRIOV_STATUS SRIOVStatus;
3500 USHORT InitialVFs;
3501 USHORT TotalVFs;
3502 USHORT NumVFs;
3503 UCHAR FunctionDependencyLink;
3504 UCHAR RsvdP1;
3505 USHORT FirstVFOffset;
3506 USHORT VFStride;
3507 USHORT RsvdP2;
3508 USHORT VFDeviceId;
3509 ULONG SupportedPageSizes;
3510 ULONG SystemPageSize;
3511 ULONG BaseAddresses[PCI_TYPE0_ADDRESSES];
3512 PCI_EXPRESS_SRIOV_MIGRATION_STATE_ARRAY VFMigrationStateArrayOffset;
3513 } PCI_EXPRESS_SRIOV_CAPABILITY, *PPCI_EXPRESS_SRIOV_CAPABILITY;
3514
3515 /* PCI device classes */
3516 #define PCI_CLASS_PRE_20 0x00
3517 #define PCI_CLASS_MASS_STORAGE_CTLR 0x01
3518 #define PCI_CLASS_NETWORK_CTLR 0x02
3519 #define PCI_CLASS_DISPLAY_CTLR 0x03
3520 #define PCI_CLASS_MULTIMEDIA_DEV 0x04
3521 #define PCI_CLASS_MEMORY_CTLR 0x05
3522 #define PCI_CLASS_BRIDGE_DEV 0x06
3523 #define PCI_CLASS_SIMPLE_COMMS_CTLR 0x07
3524 #define PCI_CLASS_BASE_SYSTEM_DEV 0x08
3525 #define PCI_CLASS_INPUT_DEV 0x09
3526 #define PCI_CLASS_DOCKING_STATION 0x0a
3527 #define PCI_CLASS_PROCESSOR 0x0b
3528 #define PCI_CLASS_SERIAL_BUS_CTLR 0x0c
3529 #define PCI_CLASS_WIRELESS_CTLR 0x0d
3530 #define PCI_CLASS_INTELLIGENT_IO_CTLR 0x0e
3531 #define PCI_CLASS_SATELLITE_COMMS_CTLR 0x0f
3532 #define PCI_CLASS_ENCRYPTION_DECRYPTION 0x10
3533 #define PCI_CLASS_DATA_ACQ_SIGNAL_PROC 0x11
3534 #define PCI_CLASS_NOT_DEFINED 0xff
3535
3536 /* PCI device subclasses for class 0 */
3537 #define PCI_SUBCLASS_PRE_20_NON_VGA 0x00
3538 #define PCI_SUBCLASS_PRE_20_VGA 0x01
3539
3540 /* PCI device subclasses for class 1 (mass storage controllers)*/
3541 #define PCI_SUBCLASS_MSC_SCSI_BUS_CTLR 0x00
3542 #define PCI_SUBCLASS_MSC_IDE_CTLR 0x01
3543 #define PCI_SUBCLASS_MSC_FLOPPY_CTLR 0x02
3544 #define PCI_SUBCLASS_MSC_IPI_CTLR 0x03
3545 #define PCI_SUBCLASS_MSC_RAID_CTLR 0x04
3546 #define PCI_SUBCLASS_MSC_OTHER 0x80
3547
3548 /* PCI device subclasses for class 2 (network controllers)*/
3549 #define PCI_SUBCLASS_NET_ETHERNET_CTLR 0x00
3550 #define PCI_SUBCLASS_NET_TOKEN_RING_CTLR 0x01
3551 #define PCI_SUBCLASS_NET_FDDI_CTLR 0x02
3552 #define PCI_SUBCLASS_NET_ATM_CTLR 0x03
3553 #define PCI_SUBCLASS_NET_ISDN_CTLR 0x04
3554 #define PCI_SUBCLASS_NET_OTHER 0x80
3555
3556 /* PCI device subclasses for class 3 (display controllers)*/
3557 #define PCI_SUBCLASS_VID_VGA_CTLR 0x00
3558 #define PCI_SUBCLASS_VID_XGA_CTLR 0x01
3559 #define PCI_SUBCLASS_VID_3D_CTLR 0x02
3560 #define PCI_SUBCLASS_VID_OTHER 0x80
3561
3562 /* PCI device subclasses for class 4 (multimedia device)*/
3563 #define PCI_SUBCLASS_MM_VIDEO_DEV 0x00
3564 #define PCI_SUBCLASS_MM_AUDIO_DEV 0x01
3565 #define PCI_SUBCLASS_MM_TELEPHONY_DEV 0x02
3566 #define PCI_SUBCLASS_MM_OTHER 0x80
3567
3568 /* PCI device subclasses for class 5 (memory controller)*/
3569 #define PCI_SUBCLASS_MEM_RAM 0x00
3570 #define PCI_SUBCLASS_MEM_FLASH 0x01
3571 #define PCI_SUBCLASS_MEM_OTHER 0x80
3572
3573 /* PCI device subclasses for class 6 (bridge device)*/
3574 #define PCI_SUBCLASS_BR_HOST 0x00
3575 #define PCI_SUBCLASS_BR_ISA 0x01
3576 #define PCI_SUBCLASS_BR_EISA 0x02
3577 #define PCI_SUBCLASS_BR_MCA 0x03
3578 #define PCI_SUBCLASS_BR_PCI_TO_PCI 0x04
3579 #define PCI_SUBCLASS_BR_PCMCIA 0x05
3580 #define PCI_SUBCLASS_BR_NUBUS 0x06
3581 #define PCI_SUBCLASS_BR_CARDBUS 0x07
3582 #define PCI_SUBCLASS_BR_RACEWAY 0x08
3583 #define PCI_SUBCLASS_BR_OTHER 0x80
3584
3585 #define PCI_SUBCLASS_COM_SERIAL 0x00
3586 #define PCI_SUBCLASS_COM_PARALLEL 0x01
3587 #define PCI_SUBCLASS_COM_MULTIPORT 0x02
3588 #define PCI_SUBCLASS_COM_MODEM 0x03
3589 #define PCI_SUBCLASS_COM_OTHER 0x80
3590
3591 #define PCI_SUBCLASS_SYS_INTERRUPT_CTLR 0x00
3592 #define PCI_SUBCLASS_SYS_DMA_CTLR 0x01
3593 #define PCI_SUBCLASS_SYS_SYSTEM_TIMER 0x02
3594 #define PCI_SUBCLASS_SYS_REAL_TIME_CLOCK 0x03
3595 #define PCI_SUBCLASS_SYS_GEN_HOTPLUG_CTLR 0x04
3596 #define PCI_SUBCLASS_SYS_SDIO_CTRL 0x05
3597 #define PCI_SUBCLASS_SYS_OTHER 0x80
3598
3599 #define PCI_SUBCLASS_INP_KEYBOARD 0x00
3600 #define PCI_SUBCLASS_INP_DIGITIZER 0x01
3601 #define PCI_SUBCLASS_INP_MOUSE 0x02
3602 #define PCI_SUBCLASS_INP_SCANNER 0x03
3603 #define PCI_SUBCLASS_INP_GAMEPORT 0x04
3604 #define PCI_SUBCLASS_INP_OTHER 0x80
3605
3606 #define PCI_SUBCLASS_DOC_GENERIC 0x00
3607 #define PCI_SUBCLASS_DOC_OTHER 0x80
3608
3609 #define PCI_SUBCLASS_PROC_386 0x00
3610 #define PCI_SUBCLASS_PROC_486 0x01
3611 #define PCI_SUBCLASS_PROC_PENTIUM 0x02
3612 #define PCI_SUBCLASS_PROC_ALPHA 0x10
3613 #define PCI_SUBCLASS_PROC_POWERPC 0x20
3614 #define PCI_SUBCLASS_PROC_COPROCESSOR 0x40
3615
3616 /* PCI device subclasses for class C (serial bus controller)*/
3617 #define PCI_SUBCLASS_SB_IEEE1394 0x00
3618 #define PCI_SUBCLASS_SB_ACCESS 0x01
3619 #define PCI_SUBCLASS_SB_SSA 0x02
3620 #define PCI_SUBCLASS_SB_USB 0x03
3621 #define PCI_SUBCLASS_SB_FIBRE_CHANNEL 0x04
3622 #define PCI_SUBCLASS_SB_SMBUS 0x05
3623
3624 #define PCI_SUBCLASS_WIRELESS_IRDA 0x00
3625 #define PCI_SUBCLASS_WIRELESS_CON_IR 0x01
3626 #define PCI_SUBCLASS_WIRELESS_RF 0x10
3627 #define PCI_SUBCLASS_WIRELESS_OTHER 0x80
3628
3629 #define PCI_SUBCLASS_INTIO_I2O 0x00
3630
3631 #define PCI_SUBCLASS_SAT_TV 0x01
3632 #define PCI_SUBCLASS_SAT_AUDIO 0x02
3633 #define PCI_SUBCLASS_SAT_VOICE 0x03
3634 #define PCI_SUBCLASS_SAT_DATA 0x04
3635
3636 #define PCI_SUBCLASS_CRYPTO_NET_COMP 0x00
3637 #define PCI_SUBCLASS_CRYPTO_ENTERTAINMENT 0x10
3638 #define PCI_SUBCLASS_CRYPTO_OTHER 0x80
3639
3640 #define PCI_SUBCLASS_DASP_DPIO 0x00
3641 #define PCI_SUBCLASS_DASP_OTHER 0x80
3642
3643 #define PCI_ADDRESS_IO_SPACE 0x00000001
3644 #define PCI_ADDRESS_MEMORY_TYPE_MASK 0x00000006
3645 #define PCI_ADDRESS_MEMORY_PREFETCHABLE 0x00000008
3646 #define PCI_ADDRESS_IO_ADDRESS_MASK 0xfffffffc
3647 #define PCI_ADDRESS_MEMORY_ADDRESS_MASK 0xfffffff0
3648 #define PCI_ADDRESS_ROM_ADDRESS_MASK 0xfffff800
3649
3650 #define PCI_TYPE_32BIT 0
3651 #define PCI_TYPE_20BIT 2
3652 #define PCI_TYPE_64BIT 4
3653
3654 #define PCI_ROMADDRESS_ENABLED 0x00000001
3655
3656 #endif /* _PCI_X_ */
3657
3658 #define PCI_EXPRESS_LINK_QUIESCENT_INTERFACE_VERSION 1
3659
3660 typedef NTSTATUS
3661 (NTAPI PCI_EXPRESS_ENTER_LINK_QUIESCENT_MODE)(
3662 IN OUT PVOID Context);
3663 typedef PCI_EXPRESS_ENTER_LINK_QUIESCENT_MODE *PPCI_EXPRESS_ENTER_LINK_QUIESCENT_MODE;
3664
3665 typedef NTSTATUS
3666 (NTAPI PCI_EXPRESS_EXIT_LINK_QUIESCENT_MODE)(
3667 IN OUT PVOID Context);
3668 typedef PCI_EXPRESS_EXIT_LINK_QUIESCENT_MODE *PPCI_EXPRESS_EXIT_LINK_QUIESCENT_MODE;
3669
3670 typedef struct _PCI_EXPRESS_LINK_QUIESCENT_INTERFACE {
3671 USHORT Size;
3672 USHORT Version;
3673 PVOID Context;
3674 PINTERFACE_REFERENCE InterfaceReference;
3675 PINTERFACE_DEREFERENCE InterfaceDereference;
3676 PPCI_EXPRESS_ENTER_LINK_QUIESCENT_MODE PciExpressEnterLinkQuiescentMode;
3677 PPCI_EXPRESS_EXIT_LINK_QUIESCENT_MODE PciExpressExitLinkQuiescentMode;
3678 } PCI_EXPRESS_LINK_QUIESCENT_INTERFACE, *PPCI_EXPRESS_LINK_QUIESCENT_INTERFACE;
3679
3680 #define PCI_EXPRESS_ROOT_PORT_INTERFACE_VERSION 1
3681
3682 typedef ULONG
3683 (NTAPI *PPCI_EXPRESS_ROOT_PORT_READ_CONFIG_SPACE)(
3684 IN PVOID Context,
3685 OUT PVOID Buffer,
3686 IN ULONG Offset,
3687 IN ULONG Length);
3688
3689 typedef ULONG
3690 (NTAPI *PPCI_EXPRESS_ROOT_PORT_WRITE_CONFIG_SPACE)(
3691 IN PVOID Context,
3692 IN PVOID Buffer,
3693 IN ULONG Offset,
3694 IN ULONG Length);
3695
3696 typedef struct _PCI_EXPRESS_ROOT_PORT_INTERFACE {
3697 USHORT Size;
3698 USHORT Version;
3699 PVOID Context;
3700 PINTERFACE_REFERENCE InterfaceReference;
3701 PINTERFACE_DEREFERENCE InterfaceDereference;
3702 PPCI_EXPRESS_ROOT_PORT_READ_CONFIG_SPACE ReadConfigSpace;
3703 PPCI_EXPRESS_ROOT_PORT_WRITE_CONFIG_SPACE WriteConfigSpace;
3704 } PCI_EXPRESS_ROOT_PORT_INTERFACE, *PPCI_EXPRESS_ROOT_PORT_INTERFACE;
3705
3706 #define PCI_MSIX_TABLE_CONFIG_INTERFACE_VERSION 1
3707
3708 typedef NTSTATUS
3709 (NTAPI PCI_MSIX_SET_ENTRY)(
3710 IN PVOID Context,
3711 IN ULONG TableEntry,
3712 IN ULONG MessageNumber);
3713 typedef PCI_MSIX_SET_ENTRY *PPCI_MSIX_SET_ENTRY;
3714
3715 typedef NTSTATUS
3716 (NTAPI PCI_MSIX_MASKUNMASK_ENTRY)(
3717 IN PVOID Context,
3718 IN ULONG TableEntry);
3719 typedef PCI_MSIX_MASKUNMASK_ENTRY *PPCI_MSIX_MASKUNMASK_ENTRY;
3720
3721 typedef NTSTATUS
3722 (NTAPI PCI_MSIX_GET_ENTRY)(
3723 IN PVOID Context,
3724 IN ULONG TableEntry,
3725 OUT PULONG MessageNumber,
3726 OUT PBOOLEAN Masked);
3727 typedef PCI_MSIX_GET_ENTRY *PPCI_MSIX_GET_ENTRY;
3728
3729 typedef NTSTATUS
3730 (NTAPI PCI_MSIX_GET_TABLE_SIZE)(
3731 IN PVOID Context,
3732 OUT PULONG TableSize);
3733 typedef PCI_MSIX_GET_TABLE_SIZE *PPCI_MSIX_GET_TABLE_SIZE;
3734
3735 typedef struct _PCI_MSIX_TABLE_CONFIG_INTERFACE {
3736 USHORT Size;
3737 USHORT Version;
3738 PVOID Context;
3739 PINTERFACE_REFERENCE InterfaceReference;
3740 PINTERFACE_DEREFERENCE InterfaceDereference;
3741 PPCI_MSIX_SET_ENTRY SetTableEntry;
3742 PPCI_MSIX_MASKUNMASK_ENTRY MaskTableEntry;
3743 PPCI_MSIX_MASKUNMASK_ENTRY UnmaskTableEntry;
3744 PPCI_MSIX_GET_ENTRY GetTableEntry;
3745 PPCI_MSIX_GET_TABLE_SIZE GetTableSize;
3746 } PCI_MSIX_TABLE_CONFIG_INTERFACE, *PPCI_MSIX_TABLE_CONFIG_INTERFACE;
3747
3748 #define PCI_MSIX_TABLE_CONFIG_MINIMUM_SIZE \
3749 RTL_SIZEOF_THROUGH_FIELD(PCI_MSIX_TABLE_CONFIG_INTERFACE, UnmaskTableEntry)
3750 $endif
3751 $if (_NTDDK_)
3752
3753 #ifndef _ARC_DDK_
3754 #define _ARC_DDK_
3755 typedef enum _CONFIGURATION_TYPE {
3756 ArcSystem,
3757 CentralProcessor,
3758 FloatingPointProcessor,
3759 PrimaryIcache,
3760 PrimaryDcache,
3761 SecondaryIcache,
3762 SecondaryDcache,
3763 SecondaryCache,
3764 EisaAdapter,
3765 TcAdapter,
3766 ScsiAdapter,
3767 DtiAdapter,
3768 MultiFunctionAdapter,
3769 DiskController,
3770 TapeController,
3771 CdromController,
3772 WormController,
3773 SerialController,
3774 NetworkController,
3775 DisplayController,
3776 ParallelController,
3777 PointerController,
3778 KeyboardController,
3779 AudioController,
3780 OtherController,
3781 DiskPeripheral,
3782 FloppyDiskPeripheral,
3783 TapePeripheral,
3784 ModemPeripheral,
3785 MonitorPeripheral,
3786 PrinterPeripheral,
3787 PointerPeripheral,
3788 KeyboardPeripheral,
3789 TerminalPeripheral,
3790 OtherPeripheral,
3791 LinePeripheral,
3792 NetworkPeripheral,
3793 SystemMemory,
3794 DockingInformation,
3795 RealModeIrqRoutingTable,
3796 RealModePCIEnumeration,
3797 MaximumType
3798 } CONFIGURATION_TYPE, *PCONFIGURATION_TYPE;
3799 #endif /* !_ARC_DDK_ */
3800
3801 /*
3802 ** IRP function codes
3803 */
3804
3805 #define IRP_MN_QUERY_DIRECTORY 0x01
3806 #define IRP_MN_NOTIFY_CHANGE_DIRECTORY 0x02
3807
3808 #define IRP_MN_USER_FS_REQUEST 0x00
3809 #define IRP_MN_MOUNT_VOLUME 0x01
3810 #define IRP_MN_VERIFY_VOLUME 0x02
3811 #define IRP_MN_LOAD_FILE_SYSTEM 0x03
3812 #define IRP_MN_TRACK_LINK 0x04
3813 #define IRP_MN_KERNEL_CALL 0x04
3814
3815 #define IRP_MN_LOCK 0x01
3816 #define IRP_MN_UNLOCK_SINGLE 0x02
3817 #define IRP_MN_UNLOCK_ALL 0x03
3818 #define IRP_MN_UNLOCK_ALL_BY_KEY 0x04
3819
3820 #define IRP_MN_FLUSH_AND_PURGE 0x01
3821
3822 #define IRP_MN_NORMAL 0x00
3823 #define IRP_MN_DPC 0x01
3824 #define IRP_MN_MDL 0x02
3825 #define IRP_MN_COMPLETE 0x04
3826 #define IRP_MN_COMPRESSED 0x08
3827
3828 #define IRP_MN_MDL_DPC (IRP_MN_MDL | IRP_MN_DPC)
3829 #define IRP_MN_COMPLETE_MDL (IRP_MN_COMPLETE | IRP_MN_MDL)
3830 #define IRP_MN_COMPLETE_MDL_DPC (IRP_MN_COMPLETE_MDL | IRP_MN_DPC)
3831
3832 #define IRP_MN_QUERY_LEGACY_BUS_INFORMATION 0x18
3833
3834 #define IO_CHECK_CREATE_PARAMETERS 0x0200
3835 #define IO_ATTACH_DEVICE 0x0400
3836 #define IO_IGNORE_SHARE_ACCESS_CHECK 0x0800
3837
3838 typedef
3839 NTSTATUS
3840 (NTAPI *PIO_QUERY_DEVICE_ROUTINE)(
3841 IN PVOID Context,
3842 IN PUNICODE_STRING PathName,
3843 IN INTERFACE_TYPE BusType,
3844 IN ULONG BusNumber,
3845 IN PKEY_VALUE_FULL_INFORMATION *BusInformation,
3846 IN CONFIGURATION_TYPE ControllerType,
3847 IN ULONG ControllerNumber,
3848 IN PKEY_VALUE_FULL_INFORMATION *ControllerInformation,
3849 IN CONFIGURATION_TYPE PeripheralType,
3850 IN ULONG PeripheralNumber,
3851 IN PKEY_VALUE_FULL_INFORMATION *PeripheralInformation);
3852
3853 typedef enum _IO_QUERY_DEVICE_DATA_FORMAT {
3854 IoQueryDeviceIdentifier = 0,
3855 IoQueryDeviceConfigurationData,
3856 IoQueryDeviceComponentInformation,
3857 IoQueryDeviceMaxData
3858 } IO_QUERY_DEVICE_DATA_FORMAT, *PIO_QUERY_DEVICE_DATA_FORMAT;
3859
3860 typedef VOID
3861 (NTAPI *PDRIVER_REINITIALIZE)(
3862 IN struct _DRIVER_OBJECT *DriverObject,
3863 IN PVOID Context OPTIONAL,
3864 IN ULONG Count);
3865
3866 typedef struct _CONTROLLER_OBJECT {
3867 CSHORT Type;
3868 CSHORT Size;
3869 PVOID ControllerExtension;
3870 KDEVICE_QUEUE DeviceWaitQueue;
3871 ULONG Spare1;
3872 LARGE_INTEGER Spare2;
3873 } CONTROLLER_OBJECT, *PCONTROLLER_OBJECT;
3874
3875 #define DRVO_REINIT_REGISTERED 0x00000008
3876 #define DRVO_INITIALIZED 0x00000010
3877 #define DRVO_BOOTREINIT_REGISTERED 0x00000020
3878 #define DRVO_LEGACY_RESOURCES 0x00000040
3879
3880 typedef struct _CONFIGURATION_INFORMATION {
3881 ULONG DiskCount;
3882 ULONG FloppyCount;
3883 ULONG CdRomCount;
3884 ULONG TapeCount;
3885 ULONG ScsiPortCount;
3886 ULONG SerialCount;
3887 ULONG ParallelCount;
3888 BOOLEAN AtDiskPrimaryAddressClaimed;
3889 BOOLEAN AtDiskSecondaryAddressClaimed;
3890 ULONG Version;
3891 ULONG MediumChangerCount;
3892 } CONFIGURATION_INFORMATION, *PCONFIGURATION_INFORMATION;
3893
3894 typedef struct _DISK_SIGNATURE {
3895 ULONG PartitionStyle;
3896 _ANONYMOUS_UNION union {
3897 struct {
3898 ULONG Signature;
3899 ULONG CheckSum;
3900 } Mbr;
3901 struct {
3902 GUID DiskId;
3903 } Gpt;
3904 } DUMMYUNIONNAME;
3905 } DISK_SIGNATURE, *PDISK_SIGNATURE;
3906
3907 typedef struct _TXN_PARAMETER_BLOCK {
3908 USHORT Length;
3909 USHORT TxFsContext;
3910 PVOID TransactionObject;
3911 } TXN_PARAMETER_BLOCK, *PTXN_PARAMETER_BLOCK;
3912
3913 #define TXF_MINIVERSION_DEFAULT_VIEW (0xFFFE)
3914
3915 typedef struct _IO_DRIVER_CREATE_CONTEXT {
3916 CSHORT Size;
3917 struct _ECP_LIST *ExtraCreateParameter;
3918 PVOID DeviceObjectHint;
3919 PTXN_PARAMETER_BLOCK TxnParameters;
3920 } IO_DRIVER_CREATE_CONTEXT, *PIO_DRIVER_CREATE_CONTEXT;
3921
3922 typedef struct _AGP_TARGET_BUS_INTERFACE_STANDARD {
3923 USHORT Size;
3924 USHORT Version;
3925 PVOID Context;
3926 PINTERFACE_REFERENCE InterfaceReference;
3927 PINTERFACE_DEREFERENCE InterfaceDereference;
3928 PGET_SET_DEVICE_DATA SetBusData;
3929 PGET_SET_DEVICE_DATA GetBusData;
3930 UCHAR CapabilityID;
3931 } AGP_TARGET_BUS_INTERFACE_STANDARD, *PAGP_TARGET_BUS_INTERFACE_STANDARD;
3932
3933 typedef NTSTATUS
3934 (NTAPI *PGET_LOCATION_STRING)(
3935 IN OUT PVOID Context OPTIONAL,
3936 OUT PWCHAR *LocationStrings);
3937
3938 typedef struct _PNP_LOCATION_INTERFACE {
3939 USHORT Size;
3940 USHORT Version;
3941 PVOID Context;
3942 PINTERFACE_REFERENCE InterfaceReference;
3943 PINTERFACE_DEREFERENCE InterfaceDereference;
3944 PGET_LOCATION_STRING GetLocationString;
3945 } PNP_LOCATION_INTERFACE, *PPNP_LOCATION_INTERFACE;
3946
3947 typedef enum _ARBITER_ACTION {
3948 ArbiterActionTestAllocation,
3949 ArbiterActionRetestAllocation,
3950 ArbiterActionCommitAllocation,
3951 ArbiterActionRollbackAllocation,
3952 ArbiterActionQueryAllocatedResources,
3953 ArbiterActionWriteReservedResources,
3954 ArbiterActionQueryConflict,
3955 ArbiterActionQueryArbitrate,
3956 ArbiterActionAddReserved,
3957 ArbiterActionBootAllocation
3958 } ARBITER_ACTION, *PARBITER_ACTION;
3959
3960 typedef struct _ARBITER_CONFLICT_INFO {
3961 PDEVICE_OBJECT OwningObject;
3962 ULONGLONG Start;
3963 ULONGLONG End;
3964 } ARBITER_CONFLICT_INFO, *PARBITER_CONFLICT_INFO;
3965
3966 typedef struct _ARBITER_TEST_ALLOCATION_PARAMETERS {
3967 IN OUT PLIST_ENTRY ArbitrationList;
3968 IN ULONG AllocateFromCount;
3969 IN PCM_PARTIAL_RESOURCE_DESCRIPTOR AllocateFrom;
3970 } ARBITER_TEST_ALLOCATION_PARAMETERS, *PARBITER_TEST_ALLOCATION_PARAMETERS;
3971
3972 typedef struct _ARBITER_RETEST_ALLOCATION_PARAMETERS {
3973 IN OUT PLIST_ENTRY ArbitrationList;
3974 IN ULONG AllocateFromCount;
3975 IN PCM_PARTIAL_RESOURCE_DESCRIPTOR AllocateFrom;
3976 } ARBITER_RETEST_ALLOCATION_PARAMETERS, *PARBITER_RETEST_ALLOCATION_PARAMETERS;
3977
3978 typedef struct _ARBITER_BOOT_ALLOCATION_PARAMETERS {
3979 IN OUT PLIST_ENTRY ArbitrationList;
3980 } ARBITER_BOOT_ALLOCATION_PARAMETERS, *PARBITER_BOOT_ALLOCATION_PARAMETERS;
3981
3982 typedef struct _ARBITER_QUERY_ALLOCATED_RESOURCES_PARAMETERS {
3983 OUT PCM_PARTIAL_RESOURCE_LIST *AllocatedResources;
3984 } ARBITER_QUERY_ALLOCATED_RESOURCES_PARAMETERS, *PARBITER_QUERY_ALLOCATED_RESOURCES_PARAMETERS;
3985
3986 typedef struct _ARBITER_QUERY_CONFLICT_PARAMETERS {
3987 IN PDEVICE_OBJECT PhysicalDeviceObject;
3988 IN PIO_RESOURCE_DESCRIPTOR ConflictingResource;
3989 OUT PULONG ConflictCount;
3990 OUT PARBITER_CONFLICT_INFO *Conflicts;
3991 } ARBITER_QUERY_CONFLICT_PARAMETERS, *PARBITER_QUERY_CONFLICT_PARAMETERS;
3992
3993 typedef struct _ARBITER_QUERY_ARBITRATE_PARAMETERS {
3994 IN PLIST_ENTRY ArbitrationList;
3995 } ARBITER_QUERY_ARBITRATE_PARAMETERS, *PARBITER_QUERY_ARBITRATE_PARAMETERS;
3996
3997 typedef struct _ARBITER_ADD_RESERVED_PARAMETERS {
3998 IN PDEVICE_OBJECT ReserveDevice;
3999 } ARBITER_ADD_RESERVED_PARAMETERS, *PARBITER_ADD_RESERVED_PARAMETERS;
4000
4001 typedef struct _ARBITER_PARAMETERS {
4002 union {
4003 ARBITER_TEST_ALLOCATION_PARAMETERS TestAllocation;
4004 ARBITER_RETEST_ALLOCATION_PARAMETERS RetestAllocation;
4005 ARBITER_BOOT_ALLOCATION_PARAMETERS BootAllocation;
4006 ARBITER_QUERY_ALLOCATED_RESOURCES_PARAMETERS QueryAllocatedResources;
4007 ARBITER_QUERY_CONFLICT_PARAMETERS QueryConflict;
4008 ARBITER_QUERY_ARBITRATE_PARAMETERS QueryArbitrate;
4009 ARBITER_ADD_RESERVED_PARAMETERS AddReserved;
4010 } Parameters;
4011 } ARBITER_PARAMETERS, *PARBITER_PARAMETERS;
4012
4013 typedef enum _ARBITER_REQUEST_SOURCE {
4014 ArbiterRequestUndefined = -1,
4015 ArbiterRequestLegacyReported,
4016 ArbiterRequestHalReported,
4017 ArbiterRequestLegacyAssigned,
4018 ArbiterRequestPnpDetected,
4019 ArbiterRequestPnpEnumerated
4020 } ARBITER_REQUEST_SOURCE;
4021
4022 typedef enum _ARBITER_RESULT {
4023 ArbiterResultUndefined = -1,
4024 ArbiterResultSuccess,
4025 ArbiterResultExternalConflict,
4026 ArbiterResultNullRequest
4027 } ARBITER_RESULT;
4028
4029 #define ARBITER_FLAG_BOOT_CONFIG 0x00000001
4030
4031 typedef struct _ARBITER_LIST_ENTRY {
4032 LIST_ENTRY ListEntry;
4033 ULONG AlternativeCount;
4034 PIO_RESOURCE_DESCRIPTOR Alternatives;
4035 PDEVICE_OBJECT PhysicalDeviceObject;
4036 ARBITER_REQUEST_SOURCE RequestSource;
4037 ULONG Flags;
4038 LONG_PTR WorkSpace;
4039 INTERFACE_TYPE InterfaceType;
4040 ULONG SlotNumber;
4041 ULONG BusNumber;
4042 PCM_PARTIAL_RESOURCE_DESCRIPTOR Assignment;
4043 PIO_RESOURCE_DESCRIPTOR SelectedAlternative;
4044 ARBITER_RESULT Result;
4045 } ARBITER_LIST_ENTRY, *PARBITER_LIST_ENTRY;
4046
4047 typedef NTSTATUS
4048 (NTAPI *PARBITER_HANDLER)(
4049 IN OUT PVOID Context,
4050 IN ARBITER_ACTION Action,
4051 IN OUT PARBITER_PARAMETERS Parameters);
4052
4053 #define ARBITER_PARTIAL 0x00000001
4054
4055 typedef struct _ARBITER_INTERFACE {
4056 USHORT Size;
4057 USHORT Version;
4058 PVOID Context;
4059 PINTERFACE_REFERENCE InterfaceReference;
4060 PINTERFACE_DEREFERENCE InterfaceDereference;
4061 PARBITER_HANDLER ArbiterHandler;
4062 ULONG Flags;
4063 } ARBITER_INTERFACE, *PARBITER_INTERFACE;
4064
4065 typedef enum _RESOURCE_TRANSLATION_DIRECTION {
4066 TranslateChildToParent,
4067 TranslateParentToChild
4068 } RESOURCE_TRANSLATION_DIRECTION;
4069
4070 typedef NTSTATUS
4071 (NTAPI *PTRANSLATE_RESOURCE_HANDLER)(
4072 IN OUT PVOID Context OPTIONAL,
4073 IN PCM_PARTIAL_RESOURCE_DESCRIPTOR Source,
4074 IN RESOURCE_TRANSLATION_DIRECTION Direction,
4075 IN ULONG AlternativesCount OPTIONAL,
4076 IN IO_RESOURCE_DESCRIPTOR Alternatives[],
4077 IN PDEVICE_OBJECT PhysicalDeviceObject,
4078 OUT PCM_PARTIAL_RESOURCE_DESCRIPTOR Target);
4079
4080 typedef NTSTATUS
4081 (NTAPI *PTRANSLATE_RESOURCE_REQUIREMENTS_HANDLER)(
4082 IN OUT PVOID Context OPTIONAL,
4083 IN PIO_RESOURCE_DESCRIPTOR Source,
4084 IN PDEVICE_OBJECT PhysicalDeviceObject,
4085 OUT PULONG TargetCount,
4086 OUT PIO_RESOURCE_DESCRIPTOR *Target);
4087
4088 typedef struct _TRANSLATOR_INTERFACE {
4089 USHORT Size;
4090 USHORT Version;
4091 PVOID Context;
4092 PINTERFACE_REFERENCE InterfaceReference;
4093 PINTERFACE_DEREFERENCE InterfaceDereference;
4094 PTRANSLATE_RESOURCE_HANDLER TranslateResources;
4095 PTRANSLATE_RESOURCE_REQUIREMENTS_HANDLER TranslateResourceRequirements;
4096 } TRANSLATOR_INTERFACE, *PTRANSLATOR_INTERFACE;
4097
4098 typedef struct _PCI_AGP_CAPABILITY {
4099 PCI_CAPABILITIES_HEADER Header;
4100 USHORT Minor:4;
4101 USHORT Major:4;
4102 USHORT Rsvd1:8;
4103 struct _PCI_AGP_STATUS {
4104 ULONG Rate:3;
4105 ULONG Agp3Mode:1;
4106 ULONG FastWrite:1;
4107 ULONG FourGB:1;
4108 ULONG HostTransDisable:1;
4109 ULONG Gart64:1;
4110 ULONG ITA_Coherent:1;
4111 ULONG SideBandAddressing:1;
4112 ULONG CalibrationCycle:3;
4113 ULONG AsyncRequestSize:3;
4114 ULONG Rsvd1:1;
4115 ULONG Isoch:1;
4116 ULONG Rsvd2:6;
4117 ULONG RequestQueueDepthMaximum:8;
4118 } AGPStatus;
4119 struct _PCI_AGP_COMMAND {
4120 ULONG Rate:3;
4121 ULONG Rsvd1:1;
4122 ULONG FastWriteEnable:1;
4123 ULONG FourGBEnable:1;
4124 ULONG Rsvd2:1;
4125 ULONG Gart64:1;
4126 ULONG AGPEnable:1;
4127 ULONG SBAEnable:1;
4128 ULONG CalibrationCycle:3;
4129 ULONG AsyncReqSize:3;
4130 ULONG Rsvd3:8;
4131 ULONG RequestQueueDepth:8;
4132 } AGPCommand;
4133 } PCI_AGP_CAPABILITY, *PPCI_AGP_CAPABILITY;
4134
4135 typedef enum _EXTENDED_AGP_REGISTER {
4136 IsochStatus,
4137 AgpControl,
4138 ApertureSize,
4139 AperturePageSize,
4140 GartLow,
4141 GartHigh,
4142 IsochCommand
4143 } EXTENDED_AGP_REGISTER, *PEXTENDED_AGP_REGISTER;
4144
4145 typedef struct _PCI_AGP_ISOCH_STATUS {
4146 ULONG ErrorCode:2;
4147 ULONG Rsvd1:1;
4148 ULONG Isoch_L:3;
4149 ULONG Isoch_Y:2;
4150 ULONG Isoch_N:8;
4151 ULONG Rsvd2:16;
4152 } PCI_AGP_ISOCH_STATUS, *PPCI_AGP_ISOCH_STATUS;
4153
4154 typedef struct _PCI_AGP_CONTROL {
4155 ULONG Rsvd1:7;
4156 ULONG GTLB_Enable:1;
4157 ULONG AP_Enable:1;
4158 ULONG CAL_Disable:1;
4159 ULONG Rsvd2:22;
4160 } PCI_AGP_CONTROL, *PPCI_AGP_CONTROL;
4161
4162 typedef struct _PCI_AGP_APERTURE_PAGE_SIZE {
4163 USHORT PageSizeMask:11;
4164 USHORT Rsvd1:1;
4165 USHORT PageSizeSelect:4;
4166 } PCI_AGP_APERTURE_PAGE_SIZE, *PPCI_AGP_APERTURE_PAGE_SIZE;
4167
4168 typedef struct _PCI_AGP_ISOCH_COMMAND {
4169 USHORT Rsvd1:6;
4170 USHORT Isoch_Y:2;
4171 USHORT Isoch_N:8;
4172 } PCI_AGP_ISOCH_COMMAND, *PPCI_AGP_ISOCH_COMMAND;
4173
4174 typedef struct PCI_AGP_EXTENDED_CAPABILITY {
4175 PCI_AGP_ISOCH_STATUS IsochStatus;
4176 PCI_AGP_CONTROL AgpControl;
4177 USHORT ApertureSize;
4178 PCI_AGP_APERTURE_PAGE_SIZE AperturePageSize;
4179 ULONG GartLow;
4180 ULONG GartHigh;
4181 PCI_AGP_ISOCH_COMMAND IsochCommand;
4182 } PCI_AGP_EXTENDED_CAPABILITY, *PPCI_AGP_EXTENDED_CAPABILITY;
4183
4184 #define PCI_AGP_RATE_1X 0x1
4185 #define PCI_AGP_RATE_2X 0x2
4186 #define PCI_AGP_RATE_4X 0x4
4187
4188 #define PCIX_MODE_CONVENTIONAL_PCI 0x0
4189 #define PCIX_MODE1_66MHZ 0x1
4190 #define PCIX_MODE1_100MHZ 0x2
4191 #define PCIX_MODE1_133MHZ 0x3
4192 #define PCIX_MODE2_266_66MHZ 0x9
4193 #define PCIX_MODE2_266_100MHZ 0xA
4194 #define PCIX_MODE2_266_133MHZ 0xB
4195 #define PCIX_MODE2_533_66MHZ 0xD
4196 #define PCIX_MODE2_533_100MHZ 0xE
4197 #define PCIX_MODE2_533_133MHZ 0xF
4198
4199 #define PCIX_VERSION_MODE1_ONLY 0x0
4200 #define PCIX_VERSION_MODE2_ECC 0x1
4201 #define PCIX_VERSION_DUAL_MODE_ECC 0x2
4202
4203 typedef struct _PCIX_BRIDGE_CAPABILITY {
4204 PCI_CAPABILITIES_HEADER Header;
4205 union {
4206 struct {
4207 USHORT Bus64Bit:1;
4208 USHORT Bus133MHzCapable:1;
4209 USHORT SplitCompletionDiscarded:1;
4210 USHORT UnexpectedSplitCompletion:1;
4211 USHORT SplitCompletionOverrun:1;
4212 USHORT SplitRequestDelayed:1;
4213 USHORT BusModeFrequency:4;
4214 USHORT Rsvd:2;
4215 USHORT Version:2;
4216 USHORT Bus266MHzCapable:1;
4217 USHORT Bus533MHzCapable:1;
4218 } DUMMYSTRUCTNAME;
4219 USHORT AsUSHORT;
4220 } SecondaryStatus;
4221 union {
4222 struct {
4223 ULONG FunctionNumber:3;
4224 ULONG DeviceNumber:5;
4225 ULONG BusNumber:8;
4226 ULONG Device64Bit:1;
4227 ULONG Device133MHzCapable:1;
4228 ULONG SplitCompletionDiscarded:1;
4229 ULONG UnexpectedSplitCompletion:1;
4230 ULONG SplitCompletionOverrun:1;
4231 ULONG SplitRequestDelayed:1;
4232 ULONG Rsvd:7;
4233 ULONG DIMCapable:1;
4234 ULONG Device266MHzCapable:1;
4235 ULONG Device533MHzCapable:1;
4236 } DUMMYSTRUCTNAME;
4237 ULONG AsULONG;
4238 } BridgeStatus;
4239 USHORT UpstreamSplitTransactionCapacity;
4240 USHORT UpstreamSplitTransactionLimit;
4241 USHORT DownstreamSplitTransactionCapacity;
4242 USHORT DownstreamSplitTransactionLimit;
4243 union {
4244 struct {
4245 ULONG SelectSecondaryRegisters:1;
4246 ULONG ErrorPresentInOtherBank:1;
4247 ULONG AdditionalCorrectableError:1;
4248 ULONG AdditionalUncorrectableError:1;
4249 ULONG ErrorPhase:3;
4250 ULONG ErrorCorrected:1;
4251 ULONG Syndrome:8;
4252 ULONG ErrorFirstCommand:4;
4253 ULONG ErrorSecondCommand:4;
4254 ULONG ErrorUpperAttributes:4;
4255 ULONG ControlUpdateEnable:1;
4256 ULONG Rsvd:1;
4257 ULONG DisableSingleBitCorrection:1;
4258 ULONG EccMode:1;
4259 } DUMMYSTRUCTNAME;
4260 ULONG AsULONG;
4261 } EccControlStatus;
4262 ULONG EccFirstAddress;
4263 ULONG EccSecondAddress;
4264 ULONG EccAttribute;
4265 } PCIX_BRIDGE_CAPABILITY, *PPCIX_BRIDGE_CAPABILITY;
4266
4267 typedef struct _PCI_SUBSYSTEM_IDS_CAPABILITY {
4268 PCI_CAPABILITIES_HEADER Header;
4269 USHORT Reserved;
4270 USHORT SubVendorID;
4271 USHORT SubSystemID;
4272 } PCI_SUBSYSTEM_IDS_CAPABILITY, *PPCI_SUBSYSTEM_IDS_CAPABILITY;
4273
4274 #define OSC_FIRMWARE_FAILURE 0x02
4275 #define OSC_UNRECOGNIZED_UUID 0x04
4276 #define OSC_UNRECOGNIZED_REVISION 0x08
4277 #define OSC_CAPABILITIES_MASKED 0x10
4278
4279 #define PCI_ROOT_BUS_OSC_METHOD_CAPABILITY_REVISION 0x01
4280
4281 typedef struct _PCI_ROOT_BUS_OSC_SUPPORT_FIELD {
4282 union {
4283 struct {
4284 ULONG ExtendedConfigOpRegions:1;
4285 ULONG ActiveStatePowerManagement:1;
4286 ULONG ClockPowerManagement:1;
4287 ULONG SegmentGroups:1;
4288 ULONG MessageSignaledInterrupts:1;
4289 ULONG WindowsHardwareErrorArchitecture:1;
4290 ULONG Reserved:26;
4291 } DUMMYSTRUCTNAME;
4292 ULONG AsULONG;
4293 } u;
4294 } PCI_ROOT_BUS_OSC_SUPPORT_FIELD, *PPCI_ROOT_BUS_OSC_SUPPORT_FIELD;
4295
4296 typedef struct _PCI_ROOT_BUS_OSC_CONTROL_FIELD {
4297 union {
4298 struct {
4299 ULONG ExpressNativeHotPlug:1;
4300 ULONG ShpcNativeHotPlug:1;
4301 ULONG ExpressNativePME:1;
4302 ULONG ExpressAdvancedErrorReporting:1;
4303 ULONG ExpressCapabilityStructure:1;
4304 ULONG Reserved:27;
4305 } DUMMYSTRUCTNAME;
4306 ULONG AsULONG;
4307 } u;
4308 } PCI_ROOT_BUS_OSC_CONTROL_FIELD, *PPCI_ROOT_BUS_OSC_CONTROL_FIELD;
4309
4310 typedef enum _PCI_HARDWARE_INTERFACE {
4311 PciConventional,
4312 PciXMode1,
4313 PciXMode2,
4314 PciExpress
4315 } PCI_HARDWARE_INTERFACE, *PPCI_HARDWARE_INTERFACE;
4316
4317 typedef enum {
4318 BusWidth32Bits,
4319 BusWidth64Bits
4320 } PCI_BUS_WIDTH;
4321
4322 typedef struct _PCI_ROOT_BUS_HARDWARE_CAPABILITY {
4323 PCI_HARDWARE_INTERFACE SecondaryInterface;
4324 struct {
4325 BOOLEAN BusCapabilitiesFound;
4326 ULONG CurrentSpeedAndMode;
4327 ULONG SupportedSpeedsAndModes;
4328 BOOLEAN DeviceIDMessagingCapable;
4329 PCI_BUS_WIDTH SecondaryBusWidth;
4330 } DUMMYSTRUCTNAME;
4331 PCI_ROOT_BUS_OSC_SUPPORT_FIELD OscFeatureSupport;
4332 PCI_ROOT_BUS_OSC_CONTROL_FIELD OscControlRequest;
4333 PCI_ROOT_BUS_OSC_CONTROL_FIELD OscControlGranted;
4334 } PCI_ROOT_BUS_HARDWARE_CAPABILITY, *PPCI_ROOT_BUS_HARDWARE_CAPABILITY;
4335
4336 typedef union _PCI_EXPRESS_CAPABILITIES_REGISTER {
4337 struct {
4338 USHORT CapabilityVersion:4;
4339 USHORT DeviceType:4;
4340 USHORT SlotImplemented:1;
4341 USHORT InterruptMessageNumber:5;
4342 USHORT Rsvd:2;
4343 } DUMMYSTRUCTNAME;
4344 USHORT AsUSHORT;
4345 } PCI_EXPRESS_CAPABILITIES_REGISTER, *PPCI_EXPRESS_CAPABILITIES_REGISTER;
4346
4347 typedef union _PCI_EXPRESS_DEVICE_CAPABILITIES_REGISTER {
4348 struct {
4349 ULONG MaxPayloadSizeSupported:3;
4350 ULONG PhantomFunctionsSupported:2;
4351 ULONG ExtendedTagSupported:1;
4352 ULONG L0sAcceptableLatency:3;
4353 ULONG L1AcceptableLatency:3;
4354 ULONG Undefined:3;
4355 ULONG RoleBasedErrorReporting:1;
4356 ULONG Rsvd1:2;
4357 ULONG CapturedSlotPowerLimit:8;
4358 ULONG CapturedSlotPowerLimitScale:2;
4359 ULONG Rsvd2:4;
4360 } DUMMYSTRUCTNAME;
4361 ULONG AsULONG;
4362 } PCI_EXPRESS_DEVICE_CAPABILITIES_REGISTER, *PPCI_EXPRESS_DEVICE_CAPABILITIES_REGISTER;
4363
4364 #define PCI_EXPRESS_AER_DEVICE_CONTROL_MASK 0x07;
4365
4366 typedef union _PCI_EXPRESS_DEVICE_CONTROL_REGISTER {
4367 struct {
4368 USHORT CorrectableErrorEnable:1;
4369 USHORT NonFatalErrorEnable:1;
4370 USHORT FatalErrorEnable:1;
4371 USHORT UnsupportedRequestErrorEnable:1;
4372 USHORT EnableRelaxedOrder:1;
4373 USHORT MaxPayloadSize:3;
4374 USHORT ExtendedTagEnable:1;
4375 USHORT PhantomFunctionsEnable:1;
4376 USHORT AuxPowerEnable:1;
4377 USHORT NoSnoopEnable:1;
4378 USHORT MaxReadRequestSize:3;
4379 USHORT BridgeConfigRetryEnable:1;
4380 } DUMMYSTRUCTNAME;
4381 USHORT AsUSHORT;
4382 } PCI_EXPRESS_DEVICE_CONTROL_REGISTER, *PPCI_EXPRESS_DEVICE_CONTROL_REGISTER;
4383
4384 #define PCI_EXPRESS_AER_DEVICE_STATUS_MASK 0x0F;
4385
4386 typedef union _PCI_EXPRESS_DEVICE_STATUS_REGISTER {
4387 struct {
4388 USHORT CorrectableErrorDetected:1;
4389 USHORT NonFatalErrorDetected:1;
4390 USHORT FatalErrorDetected:1;
4391 USHORT UnsupportedRequestDetected:1;
4392 USHORT AuxPowerDetected:1;
4393 USHORT TransactionsPending:1;
4394 USHORT Rsvd:10;
4395 } DUMMYSTRUCTNAME;
4396 USHORT AsUSHORT;
4397 } PCI_EXPRESS_DEVICE_STATUS_REGISTER, *PPCI_EXPRESS_DEVICE_STATUS_REGISTER;
4398
4399 typedef union _PCI_EXPRESS_LINK_CAPABILITIES_REGISTER {
4400 struct {
4401 ULONG MaximumLinkSpeed:4;
4402 ULONG MaximumLinkWidth:6;
4403 ULONG ActiveStatePMSupport:2;
4404 ULONG L0sExitLatency:3;
4405 ULONG L1ExitLatency:3;
4406 ULONG ClockPowerManagement:1;
4407 ULONG SurpriseDownErrorReportingCapable:1;
4408 ULONG DataLinkLayerActiveReportingCapable:1;
4409 ULONG Rsvd:3;
4410 ULONG PortNumber:8;
4411 } DUMMYSTRUCTNAME;
4412 ULONG AsULONG;
4413 } PCI_EXPRESS_LINK_CAPABILITIES_REGISTER, *PPCI_EXPRESS_LINK_CAPABILITIES_REGISTER;
4414
4415 typedef union _PCI_EXPRESS_LINK_CONTROL_REGISTER {
4416 struct {
4417 USHORT ActiveStatePMControl:2;
4418 USHORT Rsvd1:1;
4419 USHORT ReadCompletionBoundary:1;
4420 USHORT LinkDisable:1;
4421 USHORT RetrainLink:1;
4422 USHORT CommonClockConfig:1;
4423 USHORT ExtendedSynch:1;
4424 USHORT EnableClockPowerManagement:1;
4425 USHORT Rsvd2:7;
4426 } DUMMYSTRUCTNAME;
4427 USHORT AsUSHORT;
4428 } PCI_EXPRESS_LINK_CONTROL_REGISTER, *PPCI_EXPRESS_LINK_CONTROL_REGISTER;
4429
4430 typedef union _PCI_EXPRESS_LINK_STATUS_REGISTER {
4431 struct {
4432 USHORT LinkSpeed:4;
4433 USHORT LinkWidth:6;
4434 USHORT Undefined:1;
4435 USHORT LinkTraining:1;
4436 USHORT SlotClockConfig:1;
4437 USHORT DataLinkLayerActive:1;
4438 USHORT Rsvd:2;
4439 } DUMMYSTRUCTNAME;
4440 USHORT AsUSHORT;
4441 } PCI_EXPRESS_LINK_STATUS_REGISTER, *PPCI_EXPRESS_LINK_STATUS_REGISTER;
4442
4443 typedef union _PCI_EXPRESS_SLOT_CAPABILITIES_REGISTER {
4444 struct {
4445 ULONG AttentionButtonPresent:1;
4446 ULONG PowerControllerPresent:1;
4447 ULONG MRLSensorPresent:1;
4448 ULONG AttentionIndicatorPresent:1;
4449 ULONG PowerIndicatorPresent:1;
4450 ULONG HotPlugSurprise:1;
4451 ULONG HotPlugCapable:1;
4452 ULONG SlotPowerLimit:8;
4453 ULONG SlotPowerLimitScale:2;
4454 ULONG ElectromechanicalLockPresent:1;
4455 ULONG NoCommandCompletedSupport:1;
4456 ULONG PhysicalSlotNumber:13;
4457 } DUMMYSTRUCTNAME;
4458 ULONG AsULONG;
4459 } PCI_EXPRESS_SLOT_CAPABILITIES_REGISTER, *PPCI_EXPRESS_SLOT_CAPABILITIES_REGISTER;
4460
4461 typedef union _PCI_EXPRESS_SLOT_CONTROL_REGISTER {
4462 struct {
4463 USHORT AttentionButtonEnable:1;
4464 USHORT PowerFaultDetectEnable:1;
4465 USHORT MRLSensorEnable:1;
4466 USHORT PresenceDetectEnable:1;
4467 USHORT CommandCompletedEnable:1;
4468 USHORT HotPlugInterruptEnable:1;
4469 USHORT AttentionIndicatorControl:2;
4470 USHORT PowerIndicatorControl:2;
4471 USHORT PowerControllerControl:1;
4472 USHORT ElectromechanicalLockControl:1;
4473 USHORT DataLinkStateChangeEnable:1;
4474 USHORT Rsvd:3;
4475 } DUMMYSTRUCTNAME;
4476 USHORT AsUSHORT;
4477 } PCI_EXPRESS_SLOT_CONTROL_REGISTER, *PPCI_EXPRESS_SLOT_CONTROL_REGISTER;
4478
4479 typedef union _PCI_EXPRESS_SLOT_STATUS_REGISTER {
4480 struct {
4481 USHORT AttentionButtonPressed:1;
4482 USHORT PowerFaultDetected:1;
4483 USHORT MRLSensorChanged:1;
4484 USHORT PresenceDetectChanged:1;
4485 USHORT CommandCompleted:1;
4486 USHORT MRLSensorState:1;
4487 USHORT PresenceDetectState:1;
4488 USHORT ElectromechanicalLockEngaged:1;
4489 USHORT DataLinkStateChanged:1;
4490 USHORT Rsvd:7;
4491 } DUMMYSTRUCTNAME;
4492 USHORT AsUSHORT;
4493 } PCI_EXPRESS_SLOT_STATUS_REGISTER, *PPCI_EXPRESS_SLOT_STATUS_REGISTER;
4494
4495 typedef union _PCI_EXPRESS_ROOT_CONTROL_REGISTER {
4496 struct {
4497 USHORT CorrectableSerrEnable:1;
4498 USHORT NonFatalSerrEnable:1;
4499 USHORT FatalSerrEnable:1;
4500 USHORT PMEInterruptEnable:1;
4501 USHORT CRSSoftwareVisibilityEnable:1;
4502 USHORT Rsvd:11;
4503 } DUMMYSTRUCTNAME;
4504 USHORT AsUSHORT;
4505 } PCI_EXPRESS_ROOT_CONTROL_REGISTER, *PPCI_EXPRESS_ROOT_CONTROL_REGISTER;
4506
4507 typedef union _PCI_EXPRESS_ROOT_CAPABILITIES_REGISTER {
4508 struct {
4509 USHORT CRSSoftwareVisibility:1;
4510 USHORT Rsvd:15;
4511 } DUMMYSTRUCTNAME;
4512 USHORT AsUSHORT;
4513 } PCI_EXPRESS_ROOT_CAPABILITIES_REGISTER, *PPCI_EXPRESS_ROOT_CAPABILITIES_REGISTER;
4514
4515 typedef union _PCI_EXPRESS_ROOT_STATUS_REGISTER {
4516 struct {
4517 ULONG PMERequestorId:16;
4518 ULONG PMEStatus:1;
4519 ULONG PMEPending:1;
4520 ULONG Rsvd:14;
4521 } DUMMYSTRUCTNAME;
4522 ULONG AsULONG;
4523 } PCI_EXPRESS_ROOT_STATUS_REGISTER, *PPCI_EXPRESS_ROOT_STATUS_REGISTER;
4524
4525 typedef struct _PCI_EXPRESS_CAPABILITY {
4526 PCI_CAPABILITIES_HEADER Header;
4527 PCI_EXPRESS_CAPABILITIES_REGISTER ExpressCapabilities;
4528 PCI_EXPRESS_DEVICE_CAPABILITIES_REGISTER DeviceCapabilities;
4529 PCI_EXPRESS_DEVICE_CONTROL_REGISTER DeviceControl;
4530 PCI_EXPRESS_DEVICE_STATUS_REGISTER DeviceStatus;
4531 PCI_EXPRESS_LINK_CAPABILITIES_REGISTER LinkCapabilities;
4532 PCI_EXPRESS_LINK_CONTROL_REGISTER LinkControl;
4533 PCI_EXPRESS_LINK_STATUS_REGISTER LinkStatus;
4534 PCI_EXPRESS_SLOT_CAPABILITIES_REGISTER SlotCapabilities;
4535 PCI_EXPRESS_SLOT_CONTROL_REGISTER SlotControl;
4536 PCI_EXPRESS_SLOT_STATUS_REGISTER SlotStatus;
4537 PCI_EXPRESS_ROOT_CONTROL_REGISTER RootControl;
4538 PCI_EXPRESS_ROOT_CAPABILITIES_REGISTER RootCapabilities;
4539 PCI_EXPRESS_ROOT_STATUS_REGISTER RootStatus;
4540 } PCI_EXPRESS_CAPABILITY, *PPCI_EXPRESS_CAPABILITY;
4541
4542 typedef enum {
4543 MRLClosed = 0,
4544 MRLOpen
4545 } PCI_EXPRESS_MRL_STATE;
4546
4547 typedef enum {
4548 SlotEmpty = 0,
4549 CardPresent
4550 } PCI_EXPRESS_CARD_PRESENCE;
4551
4552 typedef enum {
4553 IndicatorOn = 1,
4554 IndicatorBlink,
4555 IndicatorOff
4556 } PCI_EXPRESS_INDICATOR_STATE;
4557
4558 typedef enum {
4559 PowerOn = 0,
4560 PowerOff
4561 } PCI_EXPRESS_POWER_STATE;
4562
4563 typedef enum {
4564 L0sEntrySupport = 1,
4565 L0sAndL1EntrySupport = 3
4566 } PCI_EXPRESS_ASPM_SUPPORT;
4567
4568 typedef enum {
4569 L0sAndL1EntryDisabled,
4570 L0sEntryEnabled,
4571 L1EntryEnabled,
4572 L0sAndL1EntryEnabled
4573 } PCI_EXPRESS_ASPM_CONTROL;
4574
4575 typedef enum {
4576 L0s_Below64ns = 0,
4577 L0s_64ns_128ns,
4578 L0s_128ns_256ns,
4579 L0s_256ns_512ns,
4580 L0s_512ns_1us,
4581 L0s_1us_2us,
4582 L0s_2us_4us,
4583 L0s_Above4us
4584 } PCI_EXPRESS_L0s_EXIT_LATENCY;
4585
4586 typedef enum {
4587 L1_Below1us = 0,
4588 L1_1us_2us,
4589 L1_2us_4us,
4590 L1_4us_8us,
4591 L1_8us_16us,
4592 L1_16us_32us,
4593 L1_32us_64us,
4594 L1_Above64us
4595 } PCI_EXPRESS_L1_EXIT_LATENCY;
4596
4597 typedef enum {
4598 PciExpressEndpoint = 0,
4599 PciExpressLegacyEndpoint,
4600 PciExpressRootPort = 4,
4601 PciExpressUpstreamSwitchPort,
4602 PciExpressDownstreamSwitchPort,
4603 PciExpressToPciXBridge,
4604 PciXToExpressBridge,
4605 PciExpressRootComplexIntegratedEndpoint,
4606 PciExpressRootComplexEventCollector
4607 } PCI_EXPRESS_DEVICE_TYPE;
4608
4609 typedef enum {
4610 MaxPayload128Bytes = 0,
4611 MaxPayload256Bytes,
4612 MaxPayload512Bytes,
4613 MaxPayload1024Bytes,
4614 MaxPayload2048Bytes,
4615 MaxPayload4096Bytes
4616 } PCI_EXPRESS_MAX_PAYLOAD_SIZE;
4617
4618 typedef union _PCI_EXPRESS_PME_REQUESTOR_ID {
4619 struct {
4620 USHORT FunctionNumber:3;
4621 USHORT DeviceNumber:5;
4622 USHORT BusNumber:8;
4623 } DUMMYSTRUCTNAME;
4624 USHORT AsUSHORT;
4625 } PCI_EXPRESS_PME_REQUESTOR_ID, *PPCI_EXPRESS_PME_REQUESTOR_ID;
4626
4627 #if defined(_WIN64)
4628
4629 #ifndef USE_DMA_MACROS
4630 #define USE_DMA_MACROS
4631 #endif
4632
4633 #ifndef NO_LEGACY_DRIVERS
4634 #define NO_LEGACY_DRIVERS
4635 #endif
4636
4637 #endif /* defined(_WIN64) */
4638
4639 typedef enum _PHYSICAL_COUNTER_RESOURCE_DESCRIPTOR_TYPE {
4640 ResourceTypeSingle = 0,
4641 ResourceTypeRange,
4642 ResourceTypeExtendedCounterConfiguration,
4643 ResourceTypeOverflow,
4644 ResourceTypeMax
4645 } PHYSICAL_COUNTER_RESOURCE_DESCRIPTOR_TYPE;
4646
4647 typedef struct _PHYSICAL_COUNTER_RESOURCE_DESCRIPTOR {
4648 PHYSICAL_COUNTER_RESOURCE_DESCRIPTOR_TYPE Type;
4649 ULONG Flags;
4650 union {
4651 ULONG CounterIndex;
4652 ULONG ExtendedRegisterAddress;
4653 struct {
4654 ULONG Begin;
4655 ULONG End;
4656 } Range;
4657 } u;
4658 } PHYSICAL_COUNTER_RESOURCE_DESCRIPTOR, *PPHYSICAL_COUNTER_RESOURCE_DESCRIPTOR;
4659
4660 typedef struct _PHYSICAL_COUNTER_RESOURCE_LIST {
4661 ULONG Count;
4662 PHYSICAL_COUNTER_RESOURCE_DESCRIPTOR Descriptors[ANYSIZE_ARRAY];
4663 } PHYSICAL_COUNTER_RESOURCE_LIST, *PPHYSICAL_COUNTER_RESOURCE_LIST;
4664
4665 typedef VOID
4666 (NTAPI *PciPin2Line)(
4667 IN struct _BUS_HANDLER *BusHandler,
4668 IN struct _BUS_HANDLER *RootHandler,
4669 IN PCI_SLOT_NUMBER SlotNumber,
4670 IN PPCI_COMMON_CONFIG PciData);
4671
4672 typedef VOID
4673 (NTAPI *PciLine2Pin)(
4674 IN struct _BUS_HANDLER *BusHandler,
4675 IN struct _BUS_HANDLER *RootHandler,
4676 IN PCI_SLOT_NUMBER SlotNumber,
4677 IN PPCI_COMMON_CONFIG PciNewData,
4678 IN PPCI_COMMON_CONFIG PciOldData);
4679
4680 typedef VOID
4681 (NTAPI *PciReadWriteConfig)(
4682 IN struct _BUS_HANDLER *BusHandler,
4683 IN PCI_SLOT_NUMBER Slot,
4684 IN PVOID Buffer,
4685 IN ULONG Offset,
4686 IN ULONG Length);
4687
4688 #define PCI_DATA_TAG ' ICP'
4689 #define PCI_DATA_VERSION 1
4690
4691 typedef struct _PCIBUSDATA {
4692 ULONG Tag;
4693 ULONG Version;
4694 PciReadWriteConfig ReadConfig;
4695 PciReadWriteConfig WriteConfig;
4696 PciPin2Line Pin2Line;
4697 PciLine2Pin Line2Pin;
4698 PCI_SLOT_NUMBER ParentSlot;
4699 PVOID Reserved[4];
4700 } PCIBUSDATA, *PPCIBUSDATA;
4701
4702 #ifndef _PCIINTRF_X_
4703 #define _PCIINTRF_X_
4704
4705 typedef ULONG
4706 (NTAPI *PCI_READ_WRITE_CONFIG)(
4707 IN PVOID Context,
4708 IN ULONG BusOffset,
4709 IN ULONG Slot,
4710 IN PVOID Buffer,
4711 IN ULONG Offset,
4712 IN ULONG Length);
4713
4714 typedef VOID
4715 (NTAPI *PCI_PIN_TO_LINE)(
4716 IN PVOID Context,
4717 IN PPCI_COMMON_CONFIG PciData);
4718
4719 typedef VOID
4720 (NTAPI *PCI_LINE_TO_PIN)(
4721 IN PVOID Context,
4722 IN PPCI_COMMON_CONFIG PciNewData,
4723 IN PPCI_COMMON_CONFIG PciOldData);
4724
4725 typedef VOID
4726 (NTAPI *PCI_ROOT_BUS_CAPABILITY)(
4727 IN PVOID Context,
4728 OUT PPCI_ROOT_BUS_HARDWARE_CAPABILITY HardwareCapability);
4729
4730 typedef VOID
4731 (NTAPI *PCI_EXPRESS_WAKE_CONTROL)(
4732 IN PVOID Context,
4733 IN BOOLEAN EnableWake);
4734
4735 typedef struct _PCI_BUS_INTERFACE_STANDARD {
4736 USHORT Size;
4737 USHORT Version;
4738 PVOID Context;
4739 PINTERFACE_REFERENCE InterfaceReference;
4740 PINTERFACE_DEREFERENCE InterfaceDereference;
4741 PCI_READ_WRITE_CONFIG ReadConfig;
4742 PCI_READ_WRITE_CONFIG WriteConfig;
4743 PCI_PIN_TO_LINE PinToLine;
4744 PCI_LINE_TO_PIN LineToPin;
4745 PCI_ROOT_BUS_CAPABILITY RootBusCapability;
4746 PCI_EXPRESS_WAKE_CONTROL ExpressWakeControl;
4747 } PCI_BUS_INTERFACE_STANDARD, *PPCI_BUS_INTERFACE_STANDARD;
4748
4749 #define PCI_BUS_INTERFACE_STANDARD_VERSION 1
4750
4751 #endif /* _PCIINTRF_X_ */
4752
4753 #if (NTDDI_VERSION >= NTDDI_WIN7)
4754
4755 #define FILE_CHARACTERISTICS_EXPECT_ORDERLY_REMOVAL_EX 0x00004000
4756 #define FILE_CHARACTERISTICS_EXPECT_SURPRISE_REMOVAL_EX 0x00008000
4757 #define FILE_CHARACTERISTICS_REMOVAL_POLICY_MASK_EX \
4758 (FILE_CHARACTERISTICS_EXPECT_ORDERLY_REMOVAL_EX | \
4759 FILE_CHARACTERISTICS_EXPECT_SURPRISE_REMOVAL_EX)
4760
4761 #define FILE_CHARACTERISTICS_EXPECT_ORDERLY_REMOVAL_DEPRECATED 0x00000200
4762 #define FILE_CHARACTERISTICS_EXPECT_SURPRISE_REMOVAL_DEPRECATED 0x00000300
4763 #define FILE_CHARACTERISTICS_REMOVAL_POLICY_MASK_DEPRECATED 0x00000300
4764
4765 #else
4766
4767 #define FILE_CHARACTERISTICS_EXPECT_ORDERLY_REMOVAL 0x00000200
4768 #define FILE_CHARACTERISTICS_EXPECT_SURPRISE_REMOVAL 0x00000300
4769 #define FILE_CHARACTERISTICS_REMOVAL_POLICY_MASK 0x00000300
4770
4771 #define FILE_CHARACTERISTICS_EXPECT_ORDERLY_REMOVAL_EX FILE_CHARACTERISTICS_EXPECT_ORDERLY_REMOVAL
4772 #define FILE_CHARACTERISTICS_EXPECT_SURPRISE_REMOVAL_EX FILE_CHARACTERISTICS_EXPECT_SURPRISE_REMOVAL
4773 #define FILE_CHARACTERISTICS_REMOVAL_POLICY_MASK_EX FILE_CHARACTERISTICS_REMOVAL_POLICY_MASK
4774
4775 #endif /* (NTDDI_VERSION >= NTDDI_WIN7) */
4776
4777 #define FILE_CHARACTERISTICS_PROPAGATED ( FILE_REMOVABLE_MEDIA | \
4778 FILE_READ_ONLY_DEVICE | \
4779 FILE_FLOPPY_DISKETTE | \
4780 FILE_WRITE_ONCE_MEDIA | \
4781 FILE_DEVICE_SECURE_OPEN )
4782
4783 typedef struct _FILE_ALIGNMENT_INFORMATION {
4784 ULONG AlignmentRequirement;
4785 } FILE_ALIGNMENT_INFORMATION, *PFILE_ALIGNMENT_INFORMATION;
4786
4787 typedef struct _FILE_NAME_INFORMATION {
4788 ULONG FileNameLength;
4789 WCHAR FileName[1];
4790 } FILE_NAME_INFORMATION, *PFILE_NAME_INFORMATION;
4791
4792
4793 typedef struct _FILE_ATTRIBUTE_TAG_INFORMATION {
4794 ULONG FileAttributes;
4795 ULONG ReparseTag;
4796 } FILE_ATTRIBUTE_TAG_INFORMATION, *PFILE_ATTRIBUTE_TAG_INFORMATION;
4797
4798 typedef struct _FILE_DISPOSITION_INFORMATION {
4799 BOOLEAN DeleteFile;
4800 } FILE_DISPOSITION_INFORMATION, *PFILE_DISPOSITION_INFORMATION;
4801
4802 typedef struct _FILE_END_OF_FILE_INFORMATION {
4803 LARGE_INTEGER EndOfFile;
4804 } FILE_END_OF_FILE_INFORMATION, *PFILE_END_OF_FILE_INFORMATION;
4805
4806 typedef struct _FILE_VALID_DATA_LENGTH_INFORMATION {
4807 LARGE_INTEGER ValidDataLength;
4808 } FILE_VALID_DATA_LENGTH_INFORMATION, *PFILE_VALID_DATA_LENGTH_INFORMATION;
4809
4810 typedef struct _FILE_FS_LABEL_INFORMATION {
4811 ULONG VolumeLabelLength;
4812 WCHAR VolumeLabel[1];
4813 } FILE_FS_LABEL_INFORMATION, *PFILE_FS_LABEL_INFORMATION;
4814
4815 typedef struct _FILE_FS_VOLUME_INFORMATION {
4816 LARGE_INTEGER VolumeCreationTime;
4817 ULONG VolumeSerialNumber;
4818 ULONG VolumeLabelLength;
4819 BOOLEAN SupportsObjects;
4820 WCHAR VolumeLabel[1];
4821 } FILE_FS_VOLUME_INFORMATION, *PFILE_FS_VOLUME_INFORMATION;
4822
4823 typedef struct _FILE_FS_SIZE_INFORMATION {
4824 LARGE_INTEGER TotalAllocationUnits;
4825 LARGE_INTEGER AvailableAllocationUnits;
4826 ULONG SectorsPerAllocationUnit;
4827 ULONG BytesPerSector;
4828 } FILE_FS_SIZE_INFORMATION, *PFILE_FS_SIZE_INFORMATION;
4829
4830 typedef struct _FILE_FS_FULL_SIZE_INFORMATION {
4831 LARGE_INTEGER TotalAllocationUnits;
4832 LARGE_INTEGER CallerAvailableAllocationUnits;
4833 LARGE_INTEGER ActualAvailableAllocationUnits;
4834 ULONG SectorsPerAllocationUnit;
4835 ULONG BytesPerSector;
4836 } FILE_FS_FULL_SIZE_INFORMATION, *PFILE_FS_FULL_SIZE_INFORMATION;
4837
4838 typedef struct _FILE_FS_OBJECTID_INFORMATION {
4839 UCHAR ObjectId[16];
4840 UCHAR ExtendedInfo[48];
4841 } FILE_FS_OBJECTID_INFORMATION, *PFILE_FS_OBJECTID_INFORMATION;
4842
4843 typedef union _FILE_SEGMENT_ELEMENT {
4844 PVOID64 Buffer;
4845 ULONGLONG Alignment;
4846 }FILE_SEGMENT_ELEMENT, *PFILE_SEGMENT_ELEMENT;
4847
4848 #define IOCTL_AVIO_ALLOCATE_STREAM CTL_CODE(FILE_DEVICE_AVIO, 1, METHOD_BUFFERED, FILE_SPECIAL_ACCESS)
4849 #define IOCTL_AVIO_FREE_STREAM CTL_CODE(FILE_DEVICE_AVIO, 2, METHOD_BUFFERED, FILE_SPECIAL_ACCESS)
4850 #define IOCTL_AVIO_MODIFY_STREAM CTL_CODE(FILE_DEVICE_AVIO, 3, METHOD_BUFFERED, FILE_SPECIAL_ACCESS)
4851
4852 typedef enum _BUS_DATA_TYPE {
4853 ConfigurationSpaceUndefined = -1,
4854 Cmos,
4855 EisaConfiguration,
4856 Pos,
4857 CbusConfiguration,
4858 PCIConfiguration,
4859 VMEConfiguration,
4860 NuBusConfiguration,
4861 PCMCIAConfiguration,
4862 MPIConfiguration,
4863 MPSAConfiguration,
4864 PNPISAConfiguration,
4865 SgiInternalConfiguration,
4866 MaximumBusDataType
4867 } BUS_DATA_TYPE, *PBUS_DATA_TYPE;
4868 $endif
4869