bccd9b8a765449961ec32f91f9f82346c334dcc0
[reactos.git] / reactos / lib / fast486 / common.c
1 /*
2 * Fast486 386/486 CPU Emulation Library
3 * common.c
4 *
5 * Copyright (C) 2014 Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
20 */
21
22 /* INCLUDES *******************************************************************/
23
24 #include <windef.h>
25
26 // #define NDEBUG
27 #include <debug.h>
28
29 #include <fast486.h>
30 #include "common.h"
31
32 /* PUBLIC FUNCTIONS ***********************************************************/
33
34 BOOLEAN
35 Fast486ReadMemory(PFAST486_STATE State,
36 FAST486_SEG_REGS SegmentReg,
37 ULONG Offset,
38 BOOLEAN InstFetch,
39 PVOID Buffer,
40 ULONG Size)
41 {
42 ULONG LinearAddress;
43 PFAST486_SEG_REG CachedDescriptor;
44
45 ASSERT(SegmentReg < FAST486_NUM_SEG_REGS);
46
47 /* Get the cached descriptor */
48 CachedDescriptor = &State->SegmentRegs[SegmentReg];
49
50 if ((Offset + Size - 1) > CachedDescriptor->Limit)
51 {
52 /* Read beyond limit */
53 Fast486Exception(State, FAST486_EXCEPTION_GP);
54 return FALSE;
55 }
56
57 /* Check for protected mode */
58 if (State->ControlRegisters[0] & FAST486_CR0_PE)
59 {
60 /* Privilege checks */
61
62 if (!CachedDescriptor->Present)
63 {
64 Fast486Exception(State, FAST486_EXCEPTION_NP);
65 return FALSE;
66 }
67
68 if ((!InstFetch && (CachedDescriptor->Rpl > CachedDescriptor->Dpl))
69 || (Fast486GetCurrentPrivLevel(State) > CachedDescriptor->Dpl))
70 {
71 Fast486Exception(State, FAST486_EXCEPTION_GP);
72 return FALSE;
73 }
74
75 if (InstFetch)
76 {
77 if (!CachedDescriptor->Executable)
78 {
79 /* Data segment not executable */
80 Fast486Exception(State, FAST486_EXCEPTION_GP);
81 return FALSE;
82 }
83 }
84 else
85 {
86 if (CachedDescriptor->Executable && (!CachedDescriptor->ReadWrite))
87 {
88 /* Code segment not readable */
89 Fast486Exception(State, FAST486_EXCEPTION_GP);
90 return FALSE;
91 }
92 }
93 }
94
95 /* Find the linear address */
96 LinearAddress = CachedDescriptor->Base + Offset;
97
98 /* Read from the linear address */
99 return Fast486ReadLinearMemory(State, LinearAddress, Buffer, Size);
100 }
101
102 BOOLEAN
103 Fast486WriteMemory(PFAST486_STATE State,
104 FAST486_SEG_REGS SegmentReg,
105 ULONG Offset,
106 PVOID Buffer,
107 ULONG Size)
108 {
109 ULONG LinearAddress;
110 PFAST486_SEG_REG CachedDescriptor;
111
112 ASSERT(SegmentReg < FAST486_NUM_SEG_REGS);
113
114 /* Get the cached descriptor */
115 CachedDescriptor = &State->SegmentRegs[SegmentReg];
116
117 if ((Offset + Size - 1) > CachedDescriptor->Limit)
118 {
119 /* Write beyond limit */
120 Fast486Exception(State, FAST486_EXCEPTION_GP);
121 return FALSE;
122 }
123
124 /* Check for protected mode */
125 if (State->ControlRegisters[0] & FAST486_CR0_PE)
126 {
127 /* Privilege checks */
128
129 if (!CachedDescriptor->Present)
130 {
131 Fast486Exception(State, FAST486_EXCEPTION_NP);
132 return FALSE;
133 }
134
135 if ((CachedDescriptor->Rpl > CachedDescriptor->Dpl)
136 || (Fast486GetCurrentPrivLevel(State) > CachedDescriptor->Dpl))
137 {
138 Fast486Exception(State, FAST486_EXCEPTION_GP);
139 return FALSE;
140 }
141
142 if (CachedDescriptor->Executable)
143 {
144 /* Code segment not writable */
145 Fast486Exception(State, FAST486_EXCEPTION_GP);
146 return FALSE;
147 }
148 else if (!CachedDescriptor->ReadWrite)
149 {
150 /* Data segment not writeable */
151 Fast486Exception(State, FAST486_EXCEPTION_GP);
152 return FALSE;
153 }
154 }
155
156 /* Find the linear address */
157 LinearAddress = CachedDescriptor->Base + Offset;
158
159 /* Write to the linear address */
160 return Fast486WriteLinearMemory(State, LinearAddress, Buffer, Size);
161 }
162
163 BOOLEAN
164 Fast486InterruptInternal(PFAST486_STATE State,
165 USHORT SegmentSelector,
166 ULONG Offset,
167 ULONG GateType)
168 {
169 BOOLEAN GateSize = (GateType == FAST486_IDT_INT_GATE_32)
170 || (GateType == FAST486_IDT_TRAP_GATE_32);
171
172 /* Check for protected mode */
173 if (State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PE)
174 {
175 FAST486_TSS Tss;
176 USHORT OldSs = State->SegmentRegs[FAST486_REG_SS].Selector;
177 ULONG OldEsp = State->GeneralRegs[FAST486_REG_ESP].Long;
178
179 if (GateSize != (State->SegmentRegs[FAST486_REG_CS].Size))
180 {
181 /*
182 * The gate size doesn't match the current operand size, so toggle
183 * the OPSIZE flag.
184 */
185 State->PrefixFlags ^= FAST486_PREFIX_OPSIZE;
186 }
187
188 /* Check if the interrupt handler is more privileged */
189 if (Fast486GetCurrentPrivLevel(State) > GET_SEGMENT_RPL(SegmentSelector))
190 {
191 /* Read the TSS */
192 if (!Fast486ReadLinearMemory(State,
193 State->TaskReg.Base,
194 &Tss,
195 sizeof(Tss)))
196 {
197 /* Exception occurred */
198 return FALSE;
199 }
200
201 /* Check the new (higher) privilege level */
202 switch (GET_SEGMENT_RPL(SegmentSelector))
203 {
204 case 0:
205 {
206 if (!Fast486LoadSegment(State, FAST486_REG_SS, Tss.Ss0))
207 {
208 /* Exception occurred */
209 return FALSE;
210 }
211 State->GeneralRegs[FAST486_REG_ESP].Long = Tss.Esp0;
212
213 break;
214 }
215
216 case 1:
217 {
218 if (!Fast486LoadSegment(State, FAST486_REG_SS, Tss.Ss1))
219 {
220 /* Exception occurred */
221 return FALSE;
222 }
223 State->GeneralRegs[FAST486_REG_ESP].Long = Tss.Esp1;
224
225 break;
226 }
227
228 case 2:
229 {
230 if (!Fast486LoadSegment(State, FAST486_REG_SS, Tss.Ss2))
231 {
232 /* Exception occurred */
233 return FALSE;
234 }
235 State->GeneralRegs[FAST486_REG_ESP].Long = Tss.Esp2;
236
237 break;
238 }
239
240 default:
241 {
242 /* Should never reach here! */
243 ASSERT(FALSE);
244 }
245 }
246
247 /* Push SS selector */
248 if (!Fast486StackPush(State, OldSs)) return FALSE;
249
250 /* Push stack pointer */
251 if (!Fast486StackPush(State, OldEsp)) return FALSE;
252 }
253 }
254 else
255 {
256 if (State->SegmentRegs[FAST486_REG_CS].Size)
257 {
258 /* Set OPSIZE, because INT always pushes 16-bit values in real mode */
259 State->PrefixFlags |= FAST486_PREFIX_OPSIZE;
260 }
261 }
262
263 /* Push EFLAGS */
264 if (!Fast486StackPush(State, State->Flags.Long)) return FALSE;
265
266 /* Push CS selector */
267 if (!Fast486StackPush(State, State->SegmentRegs[FAST486_REG_CS].Selector)) return FALSE;
268
269 /* Push the instruction pointer */
270 if (!Fast486StackPush(State, State->InstPtr.Long)) return FALSE;
271
272 if ((GateType == FAST486_IDT_INT_GATE) || (GateType == FAST486_IDT_INT_GATE_32))
273 {
274 /* Disable interrupts after a jump to an interrupt gate handler */
275 State->Flags.If = FALSE;
276 }
277
278 /* Load new CS */
279 if (!Fast486LoadSegment(State, FAST486_REG_CS, SegmentSelector))
280 {
281 /* An exception occurred during the jump */
282 return FALSE;
283 }
284
285 if (GateSize)
286 {
287 /* 32-bit code segment, use EIP */
288 State->InstPtr.Long = Offset;
289 }
290 else
291 {
292 /* 16-bit code segment, use IP */
293 State->InstPtr.LowWord = LOWORD(Offset);
294 }
295
296 return TRUE;
297 }
298
299 VOID
300 FASTCALL
301 Fast486ExceptionWithErrorCode(PFAST486_STATE State,
302 FAST486_EXCEPTIONS ExceptionCode,
303 ULONG ErrorCode)
304 {
305 FAST486_IDT_ENTRY IdtEntry;
306
307 /* Increment the exception count */
308 State->ExceptionCount++;
309
310 /* Check if the exception occurred more than once */
311 if (State->ExceptionCount > 1)
312 {
313 /* Then this is a double fault */
314 ExceptionCode = FAST486_EXCEPTION_DF;
315 }
316
317 /* Check if this is a triple fault */
318 if (State->ExceptionCount == 3)
319 {
320 DPRINT("Fast486ExceptionWithErrorCode(%04X:%08X) -- Triple fault\n",
321 State->SegmentRegs[FAST486_REG_CS].Selector,
322 State->InstPtr.Long);
323
324 /* Reset the CPU */
325 Fast486Reset(State);
326 return;
327 }
328
329 /* Restore the IP to the saved IP */
330 State->InstPtr = State->SavedInstPtr;
331
332 if (!Fast486GetIntVector(State, ExceptionCode, &IdtEntry))
333 {
334 /*
335 * If this function failed, that means Fast486Exception
336 * was called again, so just return in this case.
337 */
338 return;
339 }
340
341 /* Perform the interrupt */
342 if (!Fast486InterruptInternal(State,
343 IdtEntry.Selector,
344 MAKELONG(IdtEntry.Offset, IdtEntry.OffsetHigh),
345 IdtEntry.Type))
346 {
347 /*
348 * If this function failed, that means Fast486Exception
349 * was called again, so just return in this case.
350 */
351 return;
352 }
353
354 if (EXCEPTION_HAS_ERROR_CODE(ExceptionCode)
355 && (State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PE))
356 {
357 /* Push the error code */
358 if (!Fast486StackPush(State, ErrorCode))
359 {
360 /*
361 * If this function failed, that means Fast486Exception
362 * was called again, so just return in this case.
363 */
364 return;
365 }
366 }
367
368 /* Reset the exception count */
369 State->ExceptionCount = 0;
370 }
371
372 /* EOF */